An under-voltage protection circuit

Abstract

The application provides an under-voltage protection circuit, comprising: a sampling module, a starting module, a reference module, a comparison module, a trigger module, a switch module and a load which are electrically connected in sequence; an input end of the sampling module is used for connecting a power supply; the reference module comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a first resistor; a source of the first transistor is connected with a source of the second transistor and is commonly connected with the power supply; a gate of the first transistor is connected with a gate of the second transistor; a drain of the first transistor is connected with a drain of the third transistor; the gate of the first transistor is also connected with a drain of the second transistor and an output end of the starting module respectively and serves as an input end of the reference module; the drain of the first transistor is connected with the drain and the gate of the third transistor respectively. The under-voltage protection circuit can reduce power consumption, improve noise immunity and improve product stability.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to an undervoltage protection circuit. Background Art

[0002] With the rapid development of integrated circuits, power management chips are increasingly used in portable mobile devices and smart electronic wearables. Each power chip has a minimum voltage required for normal operation. If the external power supply voltage is lower than the minimum voltage required for normal operation of the chip, the chip's internal control logic will enter an unstable state. This unstable state can cause irreversible damage to the power chip's internal components at best, or even affect the security of the power chip's back-end application system, causing major safety incidents. To address this, it is necessary to design an undervoltage protection circuit within the chip. When the undervoltage protection circuit detects that the chip's external power supply voltage is lower than its set minimum value, the undervoltage protection circuit responds quickly, sending a logic control signal to shut down the chip to protect the entire circuit system.

[0003] In the related art, undervoltage protection circuit (such as Figure 3 The circuit generally includes a Zener diode, multiple sampling resistors, a comparator, a control switch tube, and an output terminal. The Zener diode is connected in series with the sampling resistor, and the comparator is connected to the negative terminal of the Zener diode. The reference voltage is provided by the Zener diode, and the reference voltage is not very accurate. Resistors (R1 and R2) are used to sample the power supply. The sampled voltage is compared with the reference voltage by the comparator. The comparator outputs a signal to control the conduction and shutdown of the switch tube, thereby determining whether there is a voltage output at the output terminal. However, this method has poor anti-interference ability, and because Zener diodes are not available or matching Zener diodes are not available in some processes, the application range of this undervoltage protection circuit is relatively small. Summary of the Invention

[0004] The present invention provides an undervoltage protection circuit, aiming to solve the problems of low reference voltage accuracy, poor anti-interference capability and narrow application range of the existing undervoltage protection circuit.

[0005] An embodiment of the present invention provides an undervoltage protection circuit, comprising: a sampling module, a starting module, a reference module, a comparison module, a trigger module, a switch module, and a load electrically connected in sequence; the input end of the sampling module is used to connect to a power supply;

[0006] The reference module comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a first resistor; the source of the first transistor is connected with the source of the second transistor and is connected with the power supply together, the gate of the first transistor is connected with the gate of the second transistor, the drain of the first transistor is connected with the drain of the third transistor, and the gate of the first transistor is also connected with the drain of the second transistor and the output of the starting module respectively and serves as the input of the reference module; the drain of the first transistor is connected with the drain and the gate of the third transistor respectively, the gate of the third transistor is connected with the gate of the fourth transistor, the source of the third transistor is grounded, the source of the fourth transistor is connected with the first resistor and is grounded, and the drain of the fourth transistor is connected with the drain of the second transistor and serves as the output of the reference module and is connected with the input of the comparison module together.

[0007] Preferably, the sampling module comprises a second resistor and a third resistor, the first end of the second resistor serves as the input of the sampling module, the second end of the second resistor is connected with the first end of the third resistor, the second end of the third resistor is grounded, and the second end of the second resistor is used for connecting the first bias voltage.

[0008] Preferably, the starting module comprises a fifth transistor, a sixth transistor and a seventh transistor, the source of the fifth transistor is connected with the source of the sixth transistor and is grounded, the gate of the fifth transistor is connected with the gate of the sixth transistor, the drain of the fifth transistor is connected with the gate of the fifth transistor and the drain of the seventh transistor respectively, the gate of the seventh transistor is used for connecting the second bias voltage, the source of the seventh transistor serves as the input of the starting module and is connected with the power supply, and the drain of the sixth transistor serves as the output of the starting module.

[0009] Preferably, the comparison module comprises an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor; the source of the eighth transistor is connected with the source of the ninth transistor and is connected with the power supply together, the gate of the eighth transistor is connected with the gate of the ninth transistor, the drain of the eighth transistor is connected with the drain of the tenth transistor, and the gate of the eighth transistor is also connected with the drain of the eighth transistor; the source of the tenth transistor is connected with the source of the eleventh transistor and the drain of the twelfth transistor respectively, the gate of the tenth transistor serves as the input of the comparison module, the drain of the eleventh transistor is connected with the drain of the ninth transistor, the drain of the eleventh transistor also serves as the output of the comparison module, the gate of the eleventh transistor is used for connecting the first bias voltage, the gate of the twelfth transistor is used for connecting the second bias voltage, and the source of the twelfth transistor is grounded.

[0010] Preferably, the trigger module comprises a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor and an eighteenth transistor.

[0011] The source of the fourteenth transistor is connected to the power supply, the drain of the fourteenth transistor is connected to the source of the fifteenth transistor and the source of the sixteenth transistor respectively, the gate of the fourteenth transistor is connected to the gate of the fifteenth transistor, the gate of the seventeenth transistor and the gate of the eighteenth transistor respectively, the gate of the fourteenth transistor also serves as the input of the trigger module; the drain of the fifteenth transistor is connected to the drain of the seventeenth transistor, the gate of the sixteenth transistor and the gate of the thirteenth transistor respectively, the drain of the fifteenth transistor also serves as the output of the trigger module; the source of the seventeenth transistor is connected to the drain of the eighteenth transistor and the source of the thirteenth transistor respectively, the source of the eighteenth transistor is grounded, and the drain of the thirteenth transistor is used for connecting the power supply.

[0012] Preferably, the switch module is a nineteenth transistor, the gate of the nineteenth transistor is connected to the drain of the fifteenth transistor, the source of the nineteenth transistor is connected to the power supply, and the drain of the nineteenth transistor is used for connecting the load.

[0013] Compared with the prior art, the beneficial effects of the present application are that: the sampling module, the starting module, the reference module, the comparison module, the trigger module, the switch module and the load are sequentially electrically connected; the input of the sampling module is used for connecting the power supply for power supply; the source of the first transistor of the reference module is connected to the source of the second transistor and is commonly connected to the power supply, the gate of the first transistor is connected to the gate of the second transistor, the drain of the first transistor is connected to the drain of the third transistor, the gate of the first transistor is also connected to the drain of the second transistor and the output of the starting module and serves as the input of the reference module; the drain of the first transistor is connected to the drain and the gate of the third transistor respectively, the gate of the third transistor is connected to the gate of the fourth transistor, the source of the third transistor is grounded, the source of the fourth transistor is connected to the first resistor and is grounded, and the drain of the fourth transistor is connected to the drain of the second transistor and commonly serves as the output of the reference module and is connected to the input of the comparison module. In this way, the under-voltage protection circuit of the voltage stabilizing tube is not needed, the power consumption can be reduced, the anti-noise capability can be improved, and the product stability is improved. BRIEF DESCRIPTION OF DRAWINGS

[0014] The present application will be described in detail below with reference to the drawings. The above or other aspects of the present application will become more apparent and more readily appreciated through the detailed description, taken in conjunction with the following drawings, in which:

[0015] Figure 1 A module diagram of the under-voltage protection circuit provided by the embodiment of the present application is shown in the figure;

[0016] Figure 2 A circuit diagram of the under-voltage protection circuit provided by the embodiment of the present application is shown in the figure;

[0017] Figure 3 A circuit diagram of the under-voltage protection circuit provided by the embodiment of the present application is shown in the figure.

[0018] Wherein, 1, a sampling module, 2, a starting module, 3, a reference module, 4, a comparison module, 5, a trigger module, 6, a switch module, 7, a load. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical scheme and advantages of the present application more clear, the present application is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0020] In combination with the drawings Figures 1-2 The embodiment of the present application provides an under-voltage protection circuit, which comprises: a sampling module 1, a starting module 2, a reference module 3, a comparison module 4, a trigger module 5, a switch module 6 and a load 7 which are electrically connected in sequence; the input end of the sampling module 1 is used for connecting a power supply VCC;

[0021] The reference module 3 comprises a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4 and a first resistor R1; the source of the first transistor M1 is connected with the source of the second transistor M2 and is commonly connected with the power supply VCC, the gate of the first transistor M1 is connected with the gate of the second transistor M2, the drain of the first transistor M1 is connected with the drain of the third transistor M3, the gate of the first transistor M1 is also respectively connected with the drain of the second transistor M2 and the output end of the starting module 2 and serves as the input end of the reference module 3; the drain of the first transistor M1 is respectively connected with the drain and the gate of the third transistor M3, the gate of the third transistor M3 is connected with the gate of the fourth transistor M4, the source of the third transistor M3 is grounded, the source of the fourth transistor M4 is connected with the first resistor R1 and is grounded, and the drain of the fourth transistor M4 is connected with the drain of the second transistor M2 and commonly serves as the output end of the reference module 3 and is connected with the input end of the comparison module 4.

[0022] Wherein, the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are NMOS tubes, the width-length ratio of the first transistor M1 and the second transistor M2 is the same, the width-length ratio of the third transistor M3 and the fourth transistor M4 is the same, the output voltage V of the reference module 3 d = 2 (R1 + r O6 ) / u n C ox (W / L)6R1R1(2), from the above formula, the d point output voltage Vd is a fixed value, which is not affected by the power supply VCC. Wherein, R1 is the resistance R1 resistance, ro6 is the equivalent internal resistance of the sixth MOS tube M6, un is the electron mobility, Cox is the gate oxide layer capacitance, W / L is the width-length ratio of the MOS tube.

[0023] Specifically, the sampling module 1, the starting module 2, the reference module 3, the comparison module 4, the trigger module 5, the switch module 6 and the load 7 are electrically connected in turn; the input end of the sampling module 1 is used for connecting the power supply VCC for power supply; the source of the first transistor M1 of the reference module 3 is connected with the source of the second transistor M2 and is commonly connected with the power supply VCC, the gate of the first transistor M1 is connected with the gate of the second transistor M2, the drain of the first transistor M1 is connected with the drain of the third transistor M3, the gate of the first transistor M1 is also connected with the drain of the second transistor M2 and the output end of the starting module 2 and is used as the input end of the reference module 3; the drain of the first transistor M1 is connected with the drain and the gate of the third transistor M3, the gate of the third transistor M3 is connected with the gate of the fourth transistor M4, the source of the third transistor M3 is grounded, the source of the fourth transistor M4 is connected with the first resistor R1 and is grounded, the drain of the fourth transistor M4 is connected with the drain of the second transistor M2 and is commonly connected as the output end of the reference module 3 and is connected with the input end of the comparison module 4. In this way, the under-voltage protection circuit without voltage stabilizing tube can reduce power consumption, improve noise immunity and improve product stability.

[0024] In the embodiment, the sampling module 1 comprises a second resistor R2 and a third resistor R3, the first end of the second resistor R2 is used as the input end of the sampling module 1, the second end of the second resistor R2 is connected with the first end of the third resistor R3, the second end of the third resistor R3 is grounded, and the second end of the second resistor R2 is used for connecting the first bias voltage Va. By forming the sampling module 1 by the second resistor R2 and the third resistor R3, the a point voltage Va is collected and transmitted to the gate of the NMOS tube M11 of the comparison module 4; the a point voltage is V a =R3*VCC / (R2+R3)……(1), from the above formula, the a point voltage Va is reduced when the VCC voltage is reduced.

[0025] In the embodiment, the starting module 2 comprises a fifth transistor M5, a sixth transistor M6 and a seventh transistor M7, the source of the fifth transistor M5 is connected with the source of the sixth transistor M6 and grounded, the gate of the fifth transistor M5 is connected with the gate of the sixth transistor M6, the drain of the fifth transistor M5 is connected with the gate of the fifth transistor M5 and the drain of the seventh transistor M7 respectively, the gate of the seventh transistor M7 is used for connecting the second bias voltage Vb, the source of the seventh transistor M7 as the input of the starting module 2 is connected with the power supply VCC, and the drain of the sixth transistor M6 as the output of the starting module 2.

[0026] Wherein, the fifth transistor M5, the sixth transistor M6 and the seventh transistor M7 are all PMOS tubes. The gate of the seventh transistor M7 of the starting module 2 is connected with the point d of the reference module 3 and is driven by Vd, and the drain of the sixth transistor M6 is connected with the point c.

[0027] In the embodiment, the comparison module 4 comprises an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11 and a twelfth transistor M12; the source of the eighth transistor M8 is connected with the source of the ninth transistor M9 and is commonly connected with the power supply VCC, the gate of the eighth transistor M8 is connected with the gate of the ninth transistor M9, the drain of the eighth transistor M8 is connected with the drain of the tenth transistor M10, and the gate of the eighth transistor M8 is also connected with the drain of the eighth transistor M8; the source of the tenth transistor M10 is respectively connected with the source of the eleventh transistor M11 and the drain of the twelfth transistor M12, the gate of the tenth transistor M10 as the input of the comparison module 4, the drain of the eleventh transistor M11 is connected with the drain of the ninth transistor M9, the drain of the eleventh transistor M11 is also as the output of the comparison module 4, the gate of the eleventh transistor M11 is used for connecting the first bias voltage Va, the gate of the twelfth transistor M12 is used for connecting the second bias voltage Vb, and the source of the twelfth transistor M12 is grounded.

[0028] Optionally, the eighth transistor M8 and the ninth transistor M9 are PMOS tubes; the tenth transistor M10, the eleventh transistor M11 and the twelfth transistor M12 are all NMOS tubes. This is a differential amplification circuit, which can amplify the difference between the gate voltage Va of M11 and the gate voltage Vd of M10 from the point e; the voltage of the point e is V e = g m11 (ron / / o13)(V a -V d)......(3), from the above formula, it can be seen that the voltage Va of the point a is reduced, and the voltage Ve of the point e is also reduced. Wherein, gm11 is the transconductance of the eleventh MOS tube M11, ro11 is the equivalent internal resistance of the eleventh MOS tube M11, ro13 is the equivalent internal resistance of the thirteenth MOS tube M13, and ro11 / / ro13 represents the parallel connection of the two equivalent internal resistances.

[0029] In the embodiment, the trigger module 5 includes a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a seventeenth transistor M17 and an eighteenth transistor M18; wherein the thirteenth transistor M13, the seventeenth transistor M17 and the eighteenth transistor M18 are NMOS tubes; the fourteenth transistor M14, the fifteenth transistor M15 and the sixteenth transistor M16 are PMOS tubes.

[0030] The source of the fourteenth transistor M14 is connected to the power supply VCC, the drain of the fourteenth transistor M14 is connected to the source of the fifteenth transistor M15 and the source of the sixteenth transistor M16 respectively, the gate of the fourteenth transistor M14 is connected to the gate of the fifteenth transistor M15, the gate of the seventeenth transistor M17 and the gate of the eighteenth transistor M18 respectively, and the gate of the fourteenth transistor M14 also serves as an input end of the trigger module 5; the drain of the fifteenth transistor M15 is connected to the drain of the seventeenth transistor M17, the gate of the sixteenth transistor M16 and the gate of the thirteenth transistor M13 respectively, and the drain of the fifteenth transistor M15 also serves as an output end of the trigger module 5; the source of the seventeenth transistor M17 is connected to the drain of the eighteenth transistor M18 and the source of the thirteenth transistor M13 respectively, the source of the eighteenth transistor M18 is grounded, and the drain of the thirteenth transistor M13 is used to connect the power supply VCC.

[0031] Specifically, it is a Schmidt trigger; when the point e is at a high level, the point b is at a low level, when the voltage of the point e is reduced and exceeds the negative threshold voltage Vth1, the voltage of the point b becomes a high level, and when the voltage of the point e is raised and exceeds the positive threshold voltage Vth2, the voltage of the point b becomes a low level; due to the existence of hysteresis characteristic, the Schmidt trigger has a good inhibitory effect on the noise in the input signal, and only when the noise is large enough to make the input signal cross the threshold range, the output signal changes, which can avoid the change of the output signal caused by small amplitude noise.

[0032] In the embodiment, the switch module 6 is the nineteenth transistor M19, the gate of the nineteenth transistor M19 is connected with the drain of the fifteenth transistor M15, the source of the nineteenth transistor M19 is connected with the power supply VCC, and the drain of the nineteenth transistor M19 is used for connecting the load 7. The gate of the nineteenth transistor M19 is connected with the output end b point of the under-voltage protection circuit, and has the functions of low-level conduction and high-level shutdown.

[0033] In the embodiment, the nineteenth transistor M19 is a PMOS transistor.

[0034] In the embodiment, when the VCC is a normal voltage, the voltage a of the sampling module 1 is high level at this time, the output voltage Vd of the reference module 3 is fixed, and it can be known from the formula (3) that the voltage e is high level at this time, the output voltage b of the trigger module 5 is low level, the switch module 6 M1 is turned on, and the power supply VCC can be provided for the load 7.

[0035] When the VCC decreases, the voltage a also decreases, the output voltage Vd of the reference module 3 is unchanged, and it can be known from the formula (3) that the output voltage e of the comparison module 4 also decreases. When the VCC decreases to be lower than the lower threshold value VCC1, the voltage e Ve decreases to be more than the negative threshold voltage Vth1 of the trigger module 5, the voltage b Vb becomes high level, the switch module 6 is turned off, the under-voltage lock state is entered, and the power supply VCC of the load 7 is disconnected.

[0036] When the VCC increases, the voltage a also increases, the output voltage Vd of the reference module 3 is unchanged, and it can be known from the formula (3) that the output voltage e of the comparison module 4 also increases. When the VCC increases to be more than the upper threshold value VCC2, the voltage e Ve increases to be more than the positive threshold voltage Vth2 of the trigger module 5, the voltage b Vb becomes low level, the switch module 6 M1 is turned on, the under-voltage lock state is contacted, and the power supply VCC can be provided for the load 7.

[0037] It should be noted that, in this document, the terms "comprising", "containing" or any other similar words are intended to encompass non-exclusive inclusion, so that a process, article or device that includes a list of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent in such a process, article or device. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of additional identical elements in the process, article or device including the element.

[0038] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only a preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, which are all within the protection of the present invention.

Claims

1. An undervoltage protection circuit, characterized in that: include: A sampling module, a starting module, a reference module, a comparison module, a trigger module, a switch module and a load are electrically connected in sequence; the input end of the sampling module is used to connect to a power supply; The reference module includes a first transistor, a second transistor, a third transistor, a fourth transistor and a first resistor; the source of the first transistor is connected to the source of the second transistor and are jointly connected to the power supply, the gate of the first transistor is connected to the gate of the second transistor, the drain of the first transistor is connected to the drain of the third transistor, the gate of the first transistor is further connected to the drain of the second transistor and the output end of the startup module and serves as the input end of the reference module; the drain of the first transistor is respectively connected to the drain and gate of the third transistor, the gate of the third transistor is connected to the gate of the fourth transistor, the source of the third transistor is grounded, the source of the fourth transistor is connected to the first resistor and to ground, the drain of the fourth transistor is connected to the drain of the second transistor and jointly serves as the output end of the reference module and is connected to the input end of the comparison module; The startup module includes a fifth transistor, a sixth transistor, and a seventh transistor. The source of the fifth transistor is connected to the source of the sixth transistor and to ground. The gate of the fifth transistor is connected to the gate of the sixth transistor. The drain of the fifth transistor is respectively connected to the gate of the fifth transistor and the drain of the seventh transistor. The gate of the seventh transistor is used to connect to a second bias voltage. The source of the seventh transistor serves as an input end of the startup module and is connected to the power supply. The drain of the sixth transistor serves as an output end of the startup module.

2. The undervoltage protection circuit according to claim 1, characterized in that: The sampling module includes a second resistor and a third resistor, the first end of the second resistor serves as the input end of the sampling module, the second end of the second resistor is connected to the first end of the third resistor, the second end of the third resistor is grounded, and the second end of the second resistor is used to connect to a first bias voltage.

3. The undervoltage protection circuit according to claim 1, wherein: The comparison module includes an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor; the source of the eighth transistor is connected to the source of the ninth transistor and is commonly connected to the power supply, the gate of the eighth transistor is connected to the gate of the ninth transistor, the drain of the eighth transistor is connected to the drain of the tenth transistor, and the gate of the eighth transistor is also connected to the drain of the eighth transistor; the source of the tenth transistor is respectively connected to the source of the eleventh transistor and the drain of the twelfth transistor, the gate of the tenth transistor serves as the input end of the comparison module, the drain of the eleventh transistor is connected to the drain of the ninth transistor, and the drain of the eleventh transistor also serves as the output end of the comparison module, the gate of the eleventh transistor is used to connect to a first bias voltage, the gate of the twelfth transistor is used to connect to a second bias voltage, and the source of the twelfth transistor is grounded.

4. The undervoltage protection circuit according to claim 1, wherein: The trigger module includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor and an eighteenth transistor; The source of the fourteenth transistor is connected to the power supply, the drain of the fourteenth transistor is respectively connected to the source of the fifteenth transistor and the source of the sixteenth transistor, the gate of the fourteenth transistor is respectively connected to the gate of the fifteenth transistor, the gate of the seventeenth transistor and the gate of the eighteenth transistor, and the gate of the fourteenth transistor also serves as the input end of the trigger module; the drain of the fifteenth transistor is respectively connected to the drain of the seventeenth transistor, the gate of the sixteenth transistor and the gate of the thirteenth transistor, and the drain of the fifteenth transistor also serves as the output end of the trigger module; the source of the seventeenth transistor is respectively connected to the drain of the eighteenth transistor and the source of the thirteenth transistor, the source of the eighteenth transistor is grounded, and the drain of the thirteenth transistor is used to connect to the power supply.

5. The undervoltage protection circuit according to claim 4, characterized in that: The switch module is a nineteenth transistor, the gate of the nineteenth transistor is connected to the drain of the fifteenth transistor, the source of the nineteenth transistor is connected to the power supply, and the drain of the nineteenth transistor is used to connect to the load.

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