Pulse function controlled grid hidden multi-wing attractor chaotic system

Abstract

The application discloses a grid hidden multi-wing attractor chaotic system controlled by a pulse function, and comprises a reverse phase integral summation operation circuit, a reverse phase proportional operation circuit and a pulse function operation circuit. The grid hidden multi-wing chaotic signal is output continuously. On the basis of not changing the original system, a 2D equation is added by using the same structure of the pulse function, so that the wings are replicated on the grid plane, and the number of the wings can be controlled by only changing the pulse function parameter N. Compared with the existing chaotic circuit, the control circuit structure of the system is simple, the number of the wings is flexibly regulated, and the topological structure of the attractor is more complex. The grid hidden multi-wing chaotic signal provides a circuit basis for the application in the technical field of electronics, communication and information engineering, makes the encrypted content more difficult to be deciphered to a certain extent, and provides a new method for the research in the field of image encryption.

Description

Technical Field

[0001] The present invention relates to the field of chaos technology, belonging to electronics, communications and information engineering technologies, and specifically to a grid hidden multi-wing attractor chaotic system controlled by an impulse function. Background Art

[0002] In recent decades, with the rapid development of science and technology, the study of chaos has received great attention. Multi-wing / multi-scroll attractor chaotic systems have become a research hotspot because they have higher complexity than single-scroll or double-wing / double-scroll attractor chaotic systems. They have broad application prospects in image encryption, secure communication, machine learning and other fields.

[0003] In the past, the construction of multi-wing and multi-scroll attractor chaotic systems was mainly based on double-scroll or double-wing systems. By introducing nonlinear functions, the number of unstable equilibrium points of index 2 was expanded to realize the generation of multi-scroll / multi-wing attractors. The introduced nonlinear functions include hyperbolic functions, trigonometric functions, sawtooth wave functions, hysteresis functions, and sign functions.

[0004] In 2011, GA Leonov first proposed the concept of hidden attractors while analyzing Tsai circuits. A hidden attractor is an attractor whose basin of attraction in the phase space of a dynamical system does not intersect with any small neighborhood of any equilibrium point. This means that its existence is independent of the system's equilibrium point. Due to the unique properties of hidden attractors, traditional methods for predicting the system's trajectory based on unstable equilibrium points are inapplicable to hidden chaotic systems. In other words, the trajectory of hidden attractor chaotic systems is more unpredictable, making them more effective in information encryption applications.

[0005] Therefore, to better utilize the untraceability of hidden attractor chaotic systems and the higher complexity of multi-wing / multi-scroll attractor chaotic systems, experts and scholars have begun to study hidden multi-scroll / multi-wing chaotic systems. In previous chaotic systems, we have generated different numbers of multi-scroll self-excited attractors by varying the amplitude of state variables. We have proposed the extension of multi-scroll self-excited attractors in one and multiple dimensions, as well as the generation of multi-scroll hidden attractors through parameter control. However, the extension of multi-wing multi-scroll hidden attractors in one and multiple dimensions has not been studied. Due to the unique equilibrium point characteristics of hidden attractor systems, the traditional unstable equilibrium point method of expansion index 2 is not fully applicable to the construction of hidden multi-wing and multi-scroll chaotic systems. While there has been extensive research on multi-wing multi-scroll hidden attractor chaotic systems, common problems exist, such as complex nonlinear function structures, coupled parameters, and changes in the structure of the original system. Summary of the Invention

[0006] In order to solve the problems such as complex structure of the existing hidden multi-wing multi-vortex chaotic system construction method, the dimension expansion method based on pulse control is provided, on the basis of the original system, the balance point is translated, combined with the pulse function, the wing can be extended in one or two directions, and a chaotic system capable of generating grid hidden multi-wing attractor is constructed.

[0007] To achieve the above object, the technical solution provided by the present application is: a grid hidden multi-wing attractor chaotic system controlled by a pulse function, comprising an integral branch, an integral branch, an integral branch, an extended dimension integral branch, an extended dimension integral branch, an extended dimension integral branch, an operation circuit, an operation circuit, and an operation circuit.

[0008] The integral branch comprises signals , signals two input terminals, signals connected to the input terminal of the operational amplifier U1 through R1, signals connected to the input terminal of the operational amplifier U1 through R2, the output terminal of the operational amplifier U1 is connected to the input terminal of the operational amplifier U2 through the resistor R3, and the final output signal .

[0009] The integral branch comprises signals , signals , three input terminals of the voltage source VEE, signals , signals connected to the input terminal of the operational amplifier U3 through R5, signals VEE connected to the input terminal of the operational amplifier U3 through R6, the output terminal of the operational amplifier U3 is connected to the input terminal of the operational amplifier U4 through the resistor R7, and the final output signal .

[0010] The integral branch comprises signals signals , signals , signals three input terminals, signals , signals connected to the input terminal of the operational amplifier U5 through R9, signals connected to the input terminal of the operational amplifier U5 through R10, the output terminal of the operational amplifier U5 is connected to the input terminal of the operational amplifier U6 through the resistor R11, and the final output signal ;

[0011] Extended dimension branch circuit including signal ,Signal Two input terminals, signal Connect the input of operational amplifier U7 through R13, the signal The input of the operational amplifier U7 is connected through R14, and the output of the operational amplifier U7 is connected to the input of the operational amplifier U8 through resistor R15, and the final output signal ;

[0012] Extended dimension branch circuit including signal ,Signal Two input terminals, signal Connect the input of operational amplifier U9 through R17, signal The input of the operational amplifier U9 is connected through R18, and the output of the operational amplifier U9 is connected to the input of the operational amplifier U10 through resistor R19, and the final output signal ;

[0013] Extended dimension branch circuit including signal ,Signal Two input terminals, signal Connect the input of operational amplifier U11 through R21, the signal The input of the operational amplifier U11 is connected through R22, and the output of the operational amplifier U11 is connected to the input of the operational amplifier U12 through resistor R23, and the final output signal .

[0014] Furthermore, the The integrator branch circuit includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the signal Connect to the reverse input terminal of operational amplifier U1 through resistor R1, the signal The inverting input terminal of the operational amplifier U1 is connected to the resistor R2, the positive input terminal of the amplifier U1 is grounded, the inverting input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 through the capacitor C1, and the output terminal of the amplifier U1 outputs a signal The output of amplifier U1 is connected to the reverse input of operational amplifier U2 via resistor R3. The positive input of amplifier U2 is grounded. The reverse input of amplifier U2 is connected to the output of amplifier U4 via resistor R4. The output of amplifier U2 outputs a signal .

[0015] Furthermore, the The integrator branch includes an operational amplifier U3, an operational amplifier U4, a multiplier M1, a voltage source VEE, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2; the signal The input terminal of the multiplier M1 is connected to the output terminal of the multiplier M1 through the resistor R5, the DC power supply VEE is connected to the reverse input terminal of the operational amplifier U3 through the resistor R6, the positive input terminal of the amplifier U3 is grounded, the reverse input terminal of the amplifier U3 is connected to the output terminal of the amplifier U3 through the capacitor C2, and the output terminal of the amplifier U3 outputs the signal The output of amplifier U3 is connected to the reverse input of operational amplifier U4 via resistor R7. The positive input of amplifier U4 is grounded. The reverse input of amplifier U4 is connected to the output of amplifier U4 via resistor R8. The output of amplifier U4 outputs a signal .

[0016] Furthermore, the The integrator branch includes an operational amplifier U5, an operational amplifier U6, a multiplier M1, a resistor R9, a resistor R10, a resistor R11, a resistor R12 and a capacitor C3; the signal The input of the multiplier M2 is connected to the output of the multiplier M2 through the resistor R9 and the reverse input of the operational amplifier U5. The inverting input terminal of the operational amplifier U5 is connected to the resistor R10, the positive input terminal of the amplifier U5 is grounded, the inverting input terminal of the amplifier U5 is connected to the output terminal of the amplifier U5 through the capacitor C3, and the output terminal of the amplifier U5 outputs the signal The output of amplifier U5 is connected to the reverse input of operational amplifier U6 via resistor R11. The positive input of amplifier U6 is grounded. The reverse input of amplifier U6 is connected to the output of amplifier U6 via resistor R12. The output of amplifier U6 outputs a signal .

[0017] Furthermore, the The extended dimension product branch includes operational amplifier U7, operational amplifier U8, resistor R13, resistor R14, resistor R15, resistor R16, capacitor C4; signal Connect to the reverse input terminal of operational amplifier U7 through resistor R13, the signal The reverse input terminal of the operational amplifier U7 is connected to the resistor R14, the positive input terminal of the amplifier U7 is grounded, the reverse input terminal of the amplifier U7 is connected to the output terminal of the amplifier U7 through the capacitor C4, and the output terminal of the amplifier U7 outputs the signal The output of amplifier U7 is connected to the reverse input of operational amplifier U8 via resistor R15. The positive input of amplifier U8 is grounded. The reverse input of amplifier U8 is connected to the output of amplifier U8 via resistor R16. The output of amplifier U8 outputs a signal .

[0018] Furthermore, the The extended dimension branch includes operational amplifier U9, operational amplifier U10, resistor R17, resistor R18, resistor R19, resistor R20 and capacitor C5. Connect to the reverse input terminal of operational amplifier U9 through resistor R17, the signal The reverse input terminal of the operational amplifier U9 is connected to the resistor R18, the positive input terminal of the amplifier U9 is grounded, the reverse input terminal of the amplifier U8 is connected to the output terminal of the amplifier U9 through the capacitor C5, and the output terminal of the amplifier U9 outputs the signal The output of amplifier U9 is connected to the reverse input of operational amplifier U10 via resistor R19. The positive input of amplifier U10 is grounded. The reverse input of amplifier U10 is connected to the output of amplifier U10 via resistor R20. The output of amplifier U10 outputs a signal .

[0019] Furthermore, the The extended dimension product branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24 ​​and a capacitor C6; the signal Connect to the reverse input terminal of the operational amplifier U11 through the resistor R21, the signal The reverse input terminal of the operational amplifier U11 is connected to the resistor R22, the positive input terminal of the amplifier U11 is grounded, the reverse input terminal of the amplifier U11 is connected to the output terminal of the amplifier U11 through the capacitor C6, and the output terminal of the amplifier U11 outputs the signal The output of amplifier U11 is connected to the reverse input of operational amplifier U12 via resistor R23. The positive input of amplifier U12 is grounded. The reverse input of amplifier U12 is connected to the output of amplifier U12 via resistor R24. The output of amplifier U12 outputs a signal .

[0020] Furthermore, the three F-function operation circuits include Operational circuit, Operational circuits and operational circuits;

[0021] described The operational circuit includes an operational amplifier U13, an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, an operational amplifier U19, an adder A1, an adder A2, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32 and a resistor R33; the input end of the sinusoidal signal source VSIN1 is grounded, the output end of the sinusoidal signal source VSIN1 is connected to the inverting input end of the operational amplifier U13, the positive input end of the amplifier U13 is grounded, the output end of the amplifier U13 is connected to the inverting input end of the operational amplifier U14 via resistor R25, the positive input end of the amplifier U14 is grounded, the inverting input end of the amplifier U14 is connected to the output end of the amplifier U14 via resistor R26, and the output end of the amplifier U14 is connected to one side input end of the adder A1; the input end of the sinusoidal signal source VSIN2 is grounded, and the sinusoidal signal source VSIN2 is connected to the inverting input end of the operational amplifier U14. The output end is connected to the inverting input end of the operational amplifier U15, the positive input end of the amplifier U15 is grounded, the output end of the amplifier U15 is connected to the inverting input end of the operational amplifier U16 via a resistor R27, the positive input end of the amplifier U16 is grounded, the inverting input end of the amplifier U16 is connected to the output end of the amplifier U16 via a resistor R28, and the output end of the amplifier U16 is connected to one side input end of the adder A2; the input end of the sinusoidal signal source VSIN3 is grounded, the output end of the sinusoidal signal source VSIN3 is connected to the inverting input end of the operational amplifier U17, the positive input end of the amplifier U17 is grounded, the output end of the amplifier U17 is connected to the inverting input end of the operational amplifier U18 via a resistor R29, the positive input end of the amplifier U18 is grounded, the inverting input end of the amplifier U18 is connected to the output end of the amplifier U18 via a resistor R30, and the output end of the amplifier U18 is connected to the other side input end of the adder A2; the output end of the adder A2 is connected to one side input end of the adder A1; the signal The output of adder A1 is connected to the reverse input terminal of operational amplifier U19 through resistor R31, the output terminal of adder A1 is connected to the reverse input terminal of operational amplifier U19 through resistor R32, the positive input terminal of amplifier U19 is grounded, the reverse input terminal of amplifier U19 is connected to the output terminal of amplifier U19 through resistor R33, and the output terminal of amplifier U19 outputs signal ;

[0022] described The operational circuit includes an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, an operational amplifier U24, an operational amplifier U25, an operational amplifier U26, an adder A3, an adder A4, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41 and a resistor R42, wherein the input end of the sinusoidal signal source VSIN4 is grounded, the output end of the sinusoidal signal source VSIN4 is connected to the inverting input end of the operational amplifier U20, the positive input end of the amplifier U20 is grounded, the output end of the amplifier U20 is connected to the reverse input end of the operational amplifier U21 via resistor R34, the positive input end of the amplifier U21 is grounded, the reverse input end of the amplifier U21 is connected to the output end of the amplifier U21 via resistor R35, and the output end of the amplifier U21 is connected to one side input end of the adder A3; the input end of the sinusoidal signal source VSIN2 is grounded, the output end of the sinusoidal signal source VSIN2 is connected The inverting input terminal of the operational amplifier U22 is terminated, the positive input terminal of the amplifier U22 is grounded, the output terminal of the amplifier U22 is connected to the inverting input terminal of the operational amplifier U23 via a resistor R36, the positive input terminal of the amplifier U23 is grounded, the inverting input terminal of the amplifier U23 is connected to the output terminal of the amplifier U23 via a resistor R37, and the output terminal of the amplifier U23 is connected to one side input terminal of the adder A4; the input terminal of the sinusoidal signal source VSIN6 is grounded, the output terminal of the sinusoidal signal source VSIN6 is connected to the inverting input terminal of the operational amplifier U24, the positive input terminal of the amplifier U24 is grounded, the output terminal of the amplifier U24 is connected to the inverting input terminal of the operational amplifier U25 via a resistor R38, the positive input terminal of the amplifier U25 is grounded, the inverting input terminal of the amplifier U25 is connected to the output terminal of the amplifier U25 via a resistor R39, and the output terminal of the amplifier U25 is connected to the other side input terminal of the adder A4; the output terminal of the adder A4 is connected to one side input terminal of the adder A3; the signal The output of adder A3 is connected to the reverse input of operational amplifier U26 through resistor R41, the output of adder A3 is connected to the reverse input of operational amplifier U26 through resistor R40, the positive input of amplifier U26 is grounded, the reverse input of amplifier U26 is connected to the output of amplifier U26 through resistor R42, and the output of amplifier U26 outputs signal ;

[0023] described The operational circuit includes an operational amplifier U27, an operational amplifier U28, an operational amplifier U29, an operational amplifier U30, an operational amplifier U31, an operational amplifier U32, an operational amplifier U33, an adder A5, an adder A6, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a resistor R48, a resistor R49, a resistor R50 and a resistor R51; the input end of the sinusoidal signal source VSIN7 is grounded, the output end of the sinusoidal signal source VSIN7 is connected to the inverting input end of the operational amplifier U27, the positive input end of the amplifier U27 is grounded, the output end of the amplifier U27 is connected to the reverse input end of the operational amplifier U28 via resistor R43, the positive input end of the amplifier U28 is grounded, the reverse input end of the amplifier U28 is connected to the output end of the amplifier U28 via resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5; the input end of the sinusoidal signal source VSIN8 is grounded, the sinusoidal signal source VSIN8 The output end is connected to the inverting input end of the operational amplifier U29, the positive input end of the amplifier U29 is grounded, the output end of the amplifier U29 is connected to the inverting input end of the operational amplifier U30 via a resistor R45, the positive input end of the amplifier U30 is grounded, the inverting input end of the amplifier U30 is connected to the output end of the amplifier U30 via a resistor R46, and the output end of the amplifier U30 is connected to one side input end of the adder A6; the input end of the sinusoidal signal source VSIN9 is grounded, the output end of the sinusoidal signal source VSIN9 is connected to the inverting input end of the operational amplifier U31, the positive input end of the amplifier U31 is grounded; the output end of the amplifier U31 is connected to the inverting input end of the operational amplifier U32 via a resistor R47, the positive input end of the amplifier U32 is grounded, the inverting input end of the amplifier U32 is connected to the output end of the amplifier U32 via a resistor R48, and the output end of the amplifier U32 is connected to the other side input end of the adder A6; the output end of the adder A6 is connected to one side input end of the adder A5; the signal The output of adder A5 is connected to the reverse input terminal of operational amplifier U33 through resistor R50, the output of adder A5 is connected to the reverse input terminal of operational amplifier U33 through resistor R49, the positive input terminal of amplifier U33 is grounded, the reverse input terminal of amplifier U33 is connected to the output terminal of amplifier U33 through resistor R51, and the output terminal of amplifier U33 outputs signal .

[0024] Beneficial effects

[0025] The present invention discloses a grid hidden multi-wing attractor chaotic system controlled by an impulse function. The system outputs a continuous grid hidden multi-wing chaotic signal through an inverted integral summation operation circuit, an inverted proportional operation circuit, and an impulse function operation circuit. Without changing the original system, a two-dimensional equation is added by using an impulse function of the same structure, thereby realizing the replication of wings on the grid plane, and the number of wings can be controlled by only changing the impulse function parameter N.

[0026] This simple control method, without changing the original system structure, utilizes the same pulse signal pattern to generate one- or two-dimensional multi-wing hidden attractors by expanding an infinite number of stable equilibrium points. This generates hidden multi-wing attractors on a plane. The number of wings can be flexibly controlled by simply adjusting the parameter N in the pulse signal. The proposed grid-hidden multi-wing hidden attractor chaotic system generates attractors with higher complexity, providing a theoretical foundation and technical support for the development of fields such as image encryption and secure communications. Hidden attractors are more complex and have richer dynamic characteristics than self-excited attractors, offering enhanced security in applications such as image encryption and secure communications.

[0027] Compared with existing chaotic circuits, the control circuit structure of the system proposed in this invention is simple, the number of wings can be flexibly controlled, and the attractor topology generated is more complex. This provides a circuit basis for the application of hidden multi-wing chaotic signals in the technical fields of electronics, communications, and information engineering. To a certain extent, it makes encrypted content more difficult to decipher, and provides a new method for research in fields such as image encryption. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a block diagram of the main circuit principle of the present invention.

[0029] Figure 2 The extended dimensional nonlinear function of the present invention Principle block diagram of the operational circuit.

[0030] Figure 3 The extended dimensional nonlinear function of the present invention Principle block diagram of the operational circuit.

[0031] Figure 4 The extended dimensional nonlinear function of the present invention Principle block diagram of the operational circuit.

[0032] Figure 5 for Phase diagram of a planar grid multi-wing hidden attractor.

[0033] Figure 6 for Phase diagram of a planar grid multi-wing hidden attractor.

[0034] Figure 7 for Phase diagram of a planar grid multi-wing hidden attractor. DETAILED DESCRIPTION

[0035] The present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments:

[0036] See also Figure 1-Figure 7 , a grid hidden multi-wing attractor chaotic system controlled by an impulse function, characterized in that the main circuit includes Ji branch road, Ji branch road, Ji branch road, Expand the dimension branch, Expand the dimension branch, Expand the dimension product branch, and there are three other operation circuits including Operational circuit, Operational circuit, operational circuits;

[0037] The integrated branch circuit includes the signal ,Signal Two input terminals, signal Connect the input of operational amplifier U1 through R1, the signal The input of the operational amplifier U1 is connected through R2, and the output of the operational amplifier U1 is connected to the input of the operational amplifier U2 through resistor R3, and the final output signal ;

[0038] The integrated branch circuit includes the signal ,Signal , voltage source VEE three input terminals, signal ,Signal The input of the operational amplifier U3 is connected through R5, the signal VEE is connected to the input of the operational amplifier U3 through R6, and the output of the operational amplifier U3 is connected to the input of the operational amplifier U4 through the resistor R7, and the final output signal is ;

[0039] The integrated branch circuit includes the signal signal ,Signal ,Signal Three input terminals, signal ,Signal Connect the input of operational amplifier U5 through R9, the signal The input of the operational amplifier U5 is connected through R10, and the output of the operational amplifier U5 is connected to the input of the operational amplifier U6 through resistor R11, and the final output signal ;

[0040] Extended dimension branch circuit including signal ,Signal Two input terminals, signal Connect the input of operational amplifier U7 through R13, the signal The input of the operational amplifier U7 is connected through R14, and the output of the operational amplifier U7 is connected to the input of the operational amplifier U8 through resistor R15, and the final output signal ;

[0041] Extended dimension branch circuit including signal ,Signal Two input terminals, signal Connect the input of operational amplifier U9 through R17, signal The input of the operational amplifier U9 is connected through R18, and the output of the operational amplifier U9 is connected to the input of the operational amplifier U10 through resistor R19, and the final output signal ;

[0042] Extended dimension branch circuit including signal ,Signal Two input terminals, signal Connect the input of operational amplifier U11 through R21, the signal The input of the operational amplifier U11 is connected through R22, and the output of the operational amplifier U11 is connected to the input of the operational amplifier U12 through resistor R23, and the final output signal .

[0043] described The integrator branch circuit includes operational amplifier U1, operational amplifier U2, resistor R1, resistor R2, resistor R3, resistor R4 and capacitor C1, signal ,Signal Connect the input end of the inverting integration circuit built by operational amplifier U1, resistor R1, resistor R2, and capacitor C1, and the output end of the inverting integration circuit outputs the signal ;Signal The input is the input end of the inverting proportional operational circuit built by operational amplifier U2, resistor R3, and resistor R4, and the output end of the inverting proportional operational circuit outputs the signal . The signal Connect to the reverse input terminal of operational amplifier U1 through resistor R1, the signal The reverse input terminal of the operational amplifier U1 is connected to the reverse input terminal of the operational amplifier U1 through the resistor R2, the positive input terminal of the amplifier U1 is grounded, the reverse input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 through the capacitor C1, and the output terminal of the amplifier U1 outputs the signal The output of the amplifier U1 is connected to the reverse input of the operational amplifier U2 via the resistor R3. The positive input of the amplifier U2 is grounded. The reverse input of the amplifier U2 is connected to the output of the amplifier U4 via the resistor R4. The output of the amplifier U2 outputs a signal ;

[0044] described The product branch includes operational amplifier U3, operational amplifier U4, multiplier M1, voltage source VEE, resistor R5, resistor R6, resistor R7, resistor R8 and capacitor C2, signal ,Signal The input end of the inverting integral operation circuit constructed by the operational amplifier U3, resistor R5, resistor R6, and capacitor C2 is connected to the voltage source VEE through the multiplier M1, and the output end of the inverting integral operation circuit outputs a signal ;Signal The input is the input end of the inverting proportional operational circuit built by operational amplifier U4, resistor R7, and resistor R8, and the output end of the inverting proportional operational circuit outputs the signal .

[0045] The signal The input terminal of the multiplier M1 is connected to the output terminal of the multiplier M1 through the resistor R5, the DC power supply VEE is connected to the reverse input terminal of the operational amplifier U3 through the resistor R6, the positive input terminal of the amplifier U3 is grounded, the reverse input terminal of the amplifier U3 is connected to the output terminal of the amplifier U3 through the capacitor C2, and the output terminal of the amplifier U3 outputs the signal The output of the amplifier U3 is connected to the reverse input of the operational amplifier U4 via the resistor R7. The positive input of the amplifier U4 is grounded. The reverse input of the amplifier U4 is connected to the output of the amplifier U4 via the resistor R8. The output of the amplifier U4 outputs a signal ;

[0046] described The integrator branch includes an operational amplifier U5, an operational amplifier U6, a multiplier M1, a resistor R9, a resistor R10, a resistor R11, a resistor R12 and a capacitor C3. The integrator branch includes operational amplifier U5, operational amplifier U6, multiplier M2, resistor R9, resistor R10, resistor R11, resistor R12, and capacitor C3. ,Signal After multiplier M2 and signal Connect the input end of the inverting integral operation circuit built by operational amplifier U5, resistor R9, resistor R10, and capacitor C3, and the output end of the inverting integral operation circuit outputs the signal ;Signal The input is the input end of the inverting proportional operational circuit built by operational amplifier U6, resistor R11, and resistor R12, and the output end of the inverting proportional operational circuit outputs the signal . The signal The input terminal of the multiplier M2 is connected to the output terminal of the multiplier M2 through the resistor R9 and the inverting input terminal of the operational amplifier U5. The reverse input terminal of the operational amplifier U5 is connected to the reverse input terminal of the operational amplifier U5 through the resistor R10, the positive input terminal of the amplifier U5 is grounded, the reverse input terminal of the amplifier U5 is connected to the output terminal of the amplifier U5 through the capacitor C3, and the output terminal of the amplifier U5 outputs the signal The output of the amplifier U5 is connected to the reverse input of the operational amplifier U6 via the resistor R11. The positive input of the amplifier U6 is grounded. The reverse input of the amplifier U6 is connected to the output of the amplifier U6 via the resistor R12. The output of the amplifier U6 outputs a signal ;

[0047] described The extended dimension branch includes an operational amplifier U7, an operational amplifier U8, a resistor R13, a resistor R14, a resistor R15, a resistor R16 and a capacitor C4. The extended dimension branch includes operational amplifier U7, operational amplifier U8, resistor R13, resistor R14, resistor R15, resistor R16, and capacitor C4. ,Signal Connect the input end of the inverting integral operation circuit built by operational amplifier U7, resistor R13, resistor R14, and capacitor C4, and the output end of the inverting integral operation circuit outputs the signal ;Signal The input is the input end of the inverting proportional operational circuit built by operational amplifier U6, resistor R15, and resistor R16, and the output end of the inverting proportional operational circuit outputs the signal .

[0048] The signal Connect to the reverse input terminal of operational amplifier U7 through resistor R13, the signal The reverse input terminal of the operational amplifier U7 is connected to the reverse input terminal of the operational amplifier U7 through the resistor R14. The positive input terminal of the amplifier U7 is grounded. The reverse input terminal of the amplifier U7 is connected to the output terminal of the amplifier U7 through the capacitor C4. The output terminal of the amplifier U7 outputs a signal The output of the amplifier U7 is connected to the reverse input of the operational amplifier U8 via the resistor R15. The positive input of the amplifier U8 is grounded. The reverse input of the amplifier U8 is connected to the output of the amplifier U8 via the resistor R16. The output of the amplifier U8 outputs a signal ;

[0049] described The extended dimension product branch includes an operational amplifier U9, an operational amplifier U10, a resistor R17, a resistor R18, a resistor R19, a resistor R20 and a capacitor C5. The extended dimension branch includes operational amplifier U9, operational amplifier U10, resistor R17, resistor R18, resistor R19, resistor R20, and capacitor C5. ,Signal Connect the input end of the inverting integral operation circuit built by operational amplifier U9, resistor R17, resistor R18, and capacitor C5, and the output end of the inverting integral operation circuit outputs a signal ;Signal The input is the input end of the inverting proportional operational circuit built by operational amplifier U10, resistor R19, and resistor R20, and the output end of the inverting proportional operational circuit outputs the signal . The signal Connect to the reverse input terminal of operational amplifier U9 through resistor R17, the signal The reverse input terminal of the operational amplifier U9 is connected to the reverse input terminal of the operational amplifier U9 through the resistor R18. The positive input terminal of the amplifier U9 is grounded. The reverse input terminal of the amplifier U8 is connected to the output terminal of the amplifier U9 through the capacitor C5. The output terminal of the amplifier U9 outputs the signal The output of the amplifier U9 is connected to the reverse input of the operational amplifier U10 via the resistor R19. The positive input of the amplifier U10 is grounded. The reverse input of the amplifier U10 is connected to the output of the amplifier U10 via the resistor R20. The output of the amplifier U10 outputs a signal ;

[0050] described The extended dimension branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24 ​​and a capacitor C6. The extended dimension branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24, and a capacitor C6. ,Signal Connect the input end of the inverting integral operation circuit built by operational amplifier U11, resistor R121, resistor R22, and capacitor C6, and the output end of the inverting integral operation circuit outputs the signal ;Signal The input is the input end of the inverting proportional operational circuit built by operational amplifier U12, resistor R23, and resistor R24, and the output end of the inverting proportional operational circuit outputs the signal . The signal Connect to the reverse input terminal of the operational amplifier U11 through the resistor R21, the signal The reverse input terminal of the operational amplifier U11 is connected to the reverse input terminal of the operational amplifier U11 through the resistor R22. The positive input terminal of the amplifier U11 is grounded. The reverse input terminal of the amplifier U11 is connected to the output terminal of the amplifier U11 through the capacitor C6. The output terminal of the amplifier U11 outputs a signal The output end of the amplifier U11 is connected to the reverse input end of the operational amplifier U12 via the resistor R23. The positive input end of the amplifier U12 is grounded. The reverse input end of the amplifier U12 is connected to the output end of the amplifier U12 via the resistor R24. The output end of the amplifier U12 outputs a signal .

[0051] described The operational circuit includes an operational amplifier U13, an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, an operational amplifier U19, an adder A1, an adder A2, a sinusoidal signal source VSIN1, a sinusoidal signal source VSIN2, a sinusoidal signal source VSIN3, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, and a resistor R33, wherein the input end of the sinusoidal signal source VSIN1 is grounded, the output end of the sinusoidal signal source VSIN1 is connected to the inverting input end of the operational amplifier U13, and the positive input end of the amplifier U13 is grounded. The output end of the amplifier U13 is connected to the inverting input end of the operational amplifier U14 via a resistor R25, the positive input end of the amplifier U14 is grounded, the inverting input end of the amplifier U14 is connected to the output end of the amplifier U14 via a resistor R26, and the output end of the amplifier U14 is connected to one input end of the adder A1; the input end of the sinusoidal signal source VSIN2 is grounded, the output end of the sinusoidal signal source VSIN2 is connected to the inverting input end of the operational amplifier U15, the positive input end of the amplifier U15 is grounded, the output end of the amplifier U15 is connected to the inverting input end of the operational amplifier U16 via a resistor R27, the positive input end of the amplifier U16 is grounded, the inverting input end of the amplifier U16 is connected to the output end of the amplifier U16 via a resistor R28, and the output end of the amplifier U16 is connected to one input end of the adder A2; the input end of the sinusoidal signal source VSIN3 is grounded, the output end of the sinusoidal signal source VSIN3 is connected to the inverting input end of the operational amplifier U17, and the positive input end of the amplifier U17 is grounded. The output end of the amplifier U17 is connected to the reverse input end of the operational amplifier U18 via the resistor R29. The positive input end of the amplifier U18 is grounded. The reverse input end of the amplifier U18 is connected to the output end of the amplifier U18 via the resistor R30. The output end of the amplifier U18 is connected to the other input end of the adder A2. The output end of the adder A2 is connected to one input end of the adder A1. The signal The output of adder A1 is connected to the reverse input terminal of operational amplifier U19 through resistor R31, and the positive input terminal of amplifier U19 is grounded. The reverse input terminal of amplifier U19 is connected to the output terminal of amplifier U19 through resistor R33, and the output terminal of amplifier U19 outputs signal ;

[0052] The sinusoidal signal source VSIN1 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U13, operational amplifier U14, resistor R25, and resistor R26. The output end of the pulse function operation circuit outputs the signal

[0053] The sine signal source VSIN2 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U15, operational amplifier U16, resistor R27, and resistor R28, and the output end of the pulse function operation circuit outputs the signal The sine signal source VSIN3 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U17, operational amplifier U18, resistor R29, and resistor R30, and the output end of the pulse function operation circuit outputs the signal ;Signal ,Signal Connect the input of adder A2, the output of adder A2, the signal Connect the input of adder A1 and the output of adder A1 to the signal Connect the input end of the inverting proportional operational circuit built by operational amplifier U19, resistor R31, resistor R32, and resistor R33, and the output end of the inverting proportional operational circuit outputs a signal .

[0054] described The operational circuit includes an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, an operational amplifier U24, an operational amplifier U25, an operational amplifier U26, an adder A3, an adder A4, a sinusoidal signal source VSIN4, a sinusoidal signal source VSIN5, a sinusoidal signal source VSIN6, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, and a resistor R42, wherein the sinusoidal signal source VSIN4 is input The input end is grounded, the output end of the sinusoidal signal source VSIN4 is connected to the inverting input end of the operational amplifier U20, the positive input end of the amplifier U20 is grounded, the output end of the amplifier U20 is connected to the inverting input end of the operational amplifier U21 via a resistor R34, the positive input end of the amplifier U21 is grounded, the inverting input end of the amplifier U21 is connected to the output end of the amplifier U21 via a resistor R35, and the output end of the amplifier U21 is connected to one side input end of the adder A3; the input end of the sinusoidal signal source VSIN2 is grounded, The output end of the sinusoidal signal source VSIN2 is connected to the inverting input end of the operational amplifier U22, the positive input end of the amplifier U22 is grounded, the output end of the amplifier U22 is connected to the reverse input end of the operational amplifier U23 via a resistor R36, the positive input end of the amplifier U23 is grounded, the reverse input end of the amplifier U23 is connected to the output end of the amplifier U23 via a resistor R37, and the output end of the amplifier U23 is connected to one side input end of the adder A4; the input end of the sinusoidal signal source VSIN6 is grounded, the sinusoidal signal The output end of the signal source VSIN6 is connected to the inverting input end of the operational amplifier U24, the positive input end of the amplifier U24 is grounded, the output end of the amplifier U24 is connected to the reverse input end of the operational amplifier U25 via a resistor R38, the positive input end of the amplifier U25 is grounded, the reverse input end of the amplifier U25 is connected to the output end of the amplifier U25 via a resistor R39, and the output end of the amplifier U25 is connected to the other side input end of the adder A4; the output end of the adder A4 is connected to one side input end of the adder A3; the signal The output of adder A3 is connected to the reverse input terminal of operational amplifier U26 through resistor R41, and the output terminal of adder A3 is connected to the reverse input terminal of operational amplifier U26 through resistor R40. The positive input terminal of amplifier U26 is grounded, and the reverse input terminal of amplifier U26 is connected to the output terminal of amplifier U26 through resistor R42. The output terminal of amplifier U26 outputs signal ;

[0055] The sinusoidal signal source VSIN4 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U20, operational amplifier U21, resistor R34, and resistor R35. The output end of the pulse function operation circuit outputs the signal

[0056] ; the sine signal source VSIN5 connects the input end of the pulse function operation circuit built by the operational amplifier U22, the operational amplifier U23, the resistor R36, the resistor R37, and the output end of the pulse function operation circuit outputs the signal ; the sine signal source VSIN6 connects the input end of the pulse function operation circuit built by the operational amplifier U24, the operational amplifier U25, the resistor R38, the resistor R39, and the output end of the pulse function operation circuit outputs the signal ; the signal , the signal connects the input end of the adder A4, the output end of the adder A4, the signal connects the input end of the adder A3, the output end of the adder A3 and the signal connects the input end of the inverting proportional operation circuit built by the operational amplifier U26, the resistor R40, the resistor R41, the resistor R42, and the output end of the inverting proportional operation circuit outputs the signal .

[0057] the The operational circuit includes an operational amplifier U27, an operational amplifier U28, an operational amplifier U29, an operational amplifier U30, an operational amplifier U31, an operational amplifier U32, an operational amplifier U33, an adder A5, an adder A6, a sinusoidal signal source VSIN7, a sinusoidal signal source VSIN8, a sinusoidal signal source VSIN9, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a resistor R48, a resistor R49, a resistor R50, and a resistor R51, wherein the sinusoidal signal source VSIN7 input The input end is grounded, the output end of the sinusoidal signal source VSIN7 is connected to the inverting input end of the operational amplifier U27, the positive input end of the amplifier U27 is grounded, the output end of the amplifier U27 is connected to the inverting input end of the operational amplifier U28 via a resistor R43, the positive input end of the amplifier U28 is grounded, the inverting input end of the amplifier U28 is connected to the output end of the amplifier U28 via a resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5; the input end of the sinusoidal signal source VSIN8 is grounded, The output end of the sinusoidal signal source VSIN8 is connected to the inverting input end of the operational amplifier U29, the positive input end of the amplifier U29 is grounded, the output end of the amplifier U29 is connected to the reverse input end of the operational amplifier U30 via a resistor R45, the positive input end of the amplifier U30 is grounded, the reverse input end of the amplifier U30 is connected to the output end of the amplifier U30 via a resistor R46, and the output end of the amplifier U30 is connected to one side input end of the adder A6; the input end of the sinusoidal signal source VSIN9 is grounded, the sinusoidal signal The output end of the signal source VSIN9 is connected to the inverting input end of the operational amplifier U31, the positive input end of the amplifier U31 is grounded, the output end of the amplifier U31 is connected to the reverse input end of the operational amplifier U32 via a resistor R47, the positive input end of the amplifier U32 is grounded, the reverse input end of the amplifier U32 is connected to the output end of the amplifier U32 via a resistor R48, the output end of the amplifier U32 is connected to the other side input end of the adder A6; the output end of the adder A6 is connected to one side input end of the adder A5; the signal The output of adder A5 is connected to the reverse input terminal of operational amplifier U33 through resistor R50, and the positive input terminal of amplifier U33 is grounded. The reverse input terminal of amplifier U33 is connected to the output terminal of amplifier U33 through resistor R51, and the output terminal of amplifier U33 outputs signal .

[0058] The sinusoidal signal source VSIN7 is connected to the input end of the pulse function operation circuit constructed by operational amplifier U27, operational amplifier U28, resistor R43, and resistor R44. The output end of the pulse function operation circuit outputs the signal

[0059] The sine signal source VSIN8 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U29, the operational amplifier U30, the resistor R45, and the resistor R49, and the output end of the pulse function operation circuit outputs the signal The sine signal source VSIN9 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U31, operational amplifier U32, resistor R47, and resistor R48, and the output end of the pulse function operation circuit outputs the signal ;Signal ,Signal Connect the input of adder A6, the output of adder A6, the signal Connect the input of adder A5, and the output of adder A5 to the signal Connect the input end of the inverting proportional operational circuit built by operational amplifier U33, resistor R49, resistor R50, and resistor R51, and the output end of the inverting proportional operational circuit outputs a signal .

[0060] Preferably, the voltage value of the voltage source VCC is 15V, and the voltage value of the voltage source VEE is -15V.

[0061] Preferably, the capacitance values ​​of the capacitors C1, C2 and C3 are , the capacitance values ​​of capacitors C4, C5 and C6 are .

[0062] Preferably, the resistance of the resistor R1 in the main circuit is The resistance of resistor R2 is , the resistance values ​​of resistor R3, resistor R4, resistor R7, resistor R8, resistor R11, resistor R12, resistor R15, resistor R16, resistor R19, resistor R20, resistor R23, and resistor R24 ​​are , the resistance of resistor R5, resistor R9, and resistor R13 is , the resistance of resistor R6 is , the resistance of resistor R10 is , the resistance of resistor R14 is , the resistance of resistor R17 and resistor R21 is , the resistance of resistor R18 and resistor R22 is In the pulse function operation circuit, the resistance values ​​of resistors R25, R27, R29, R34, R36, R38, R43, R45, and R47 are , the resistance of resistor R26, resistor R28, resistor R30, resistor R35, resistor R37, resistor R39, resistor R44, resistor R46, and resistor R48 is , resistor R31, resistor R32, resistor R33, resistor R40, resistor R41, resistor R42, resistor R49, resistor R50, and the resistance of resistor R51 are .

[0063] Preferably, the multiplication coefficient of the multiplier M1 is is 1, the multiplication coefficient of multiplier M2 is 1.

[0064] The dimensionless mathematical model of a grid hidden multi-wing attractor chaotic system controlled by an impulse function is as follows:

[0065]

[0066] Formula (1) can be implemented by six integral operation circuits. The circuit equation is consistent with the dynamic equation. The coefficients of each feedback term in the system are realized by the joint setting of resistance and capacitance. The circuit equation corresponding to formula (1) is:

[0067]

[0068] Among them, the capacitor , The corresponding resistance value is 、

[0069] 、 、 、 、 、

[0070] , 、

[0071] 、

[0072] .

[0073] like Figure 5 、 Figure 6 、 Figure 7 As shown, they are the chaotic attractors 、 、 Plane phase diagram, the system can now 、 、 Three planes are generated The feasibility of the proposed technical solution is demonstrated.

[0074] The specific embodiments are only for illustrating the technical idea of the present application, and cannot limit the protection scope of the present application. Any modification made according to the technical idea of the present application on the basis of the technical scheme falls within the protection scope of the present application.

Claims

1. A grid hidden multi-wing attractor chaotic system controlled by an impulse function, characterized in that: include Ji branch road, Ji branch road, Ji branch road, Expanded dimension branch road, Expanded dimension branch, Expanded dimension branch, Operational circuits, Operational circuits and Operational circuits; The integrated branch circuit includes the signal ,Signal Two input terminals, signal Connect the input of operational amplifier U1 through R1, the signal The input of the operational amplifier U1 is connected through R2, and the output of the operational amplifier U1 is connected to the input of the operational amplifier U2 through resistor R3, and the final output signal ; The integrated branch circuit includes the signal ,Signal , voltage source VEE three input terminals, signal ,Signal The input of the operational amplifier U3 is connected through R5, the voltage source VEE is connected to the input of the operational amplifier U3 through R6, and the output of the operational amplifier U3 is connected to the input of the operational amplifier U4 through the resistor R7, and the final output signal is ; The integrated branch circuit includes the signal ,Signal ,Signal Three input terminals, signal ,Signal Connect the input of operational amplifier U5 through R9, the signal The input of the operational amplifier U5 is connected through R10, and the output of the operational amplifier U5 is connected to the input of the operational amplifier U6 through resistor R11, and the final output signal ; Extended dimension branch circuit including signal , operational circuit Two input terminals, signal Connect the input of operational amplifier U7 through R13, the operational circuit The input of the operational amplifier U7 is connected through R14, and the output of the operational amplifier U7 is connected to the input of the operational amplifier U8 through resistor R15, and the final output signal ; Extended dimension branch circuit including signal , operational circuit Two input terminals, signal Connect the input of operational amplifier U9 through R17, the operational circuit The input of the operational amplifier U9 is connected through R18, and the output of the operational amplifier U9 is connected to the input of the operational amplifier U10 through resistor R19, and the final output signal ; Extended dimension branch circuit including signal , operational circuit Two input terminals, signal Connect the input of the operational amplifier U11 through R21, and the operational circuit The input of the operational amplifier U11 is connected through R22, and the output of the operational amplifier U11 is connected to the input of the operational amplifier U12 through resistor R23, and the final output signal .

2. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: described The integrator branch circuit includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the signal Connect to the reverse input terminal of operational amplifier U1 through resistor R1, the signal The inverting input terminal of the operational amplifier U1 is connected to the resistor R2, the positive input terminal of the amplifier U1 is grounded, the inverting input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 through the capacitor C1, and the output terminal of the amplifier U1 outputs a signal The output of amplifier U1 is connected to the reverse input of operational amplifier U2 via resistor R3. The positive input of amplifier U2 is grounded. The reverse input of amplifier U2 is connected to the output of amplifier U2 via resistor R4. The output of amplifier U2 outputs a signal .

3. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: described The integrator branch includes an operational amplifier U3, an operational amplifier U4, a multiplier M1, a voltage source VEE, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2; the signal The input terminal of the multiplier M1 is connected to the output terminal of the multiplier M1 through the resistor R5, the voltage source VEE is connected to the reverse input terminal of the operational amplifier U3 through the resistor R6, the positive input terminal of the amplifier U3 is grounded, the reverse input terminal of the amplifier U3 is connected to the output terminal of the amplifier U3 through the capacitor C2, and the output terminal of the amplifier U3 outputs the signal The output of amplifier U3 is connected to the reverse input of operational amplifier U4 via resistor R7. The positive input of amplifier U4 is grounded. The reverse input of amplifier U4 is connected to the output of amplifier U4 via resistor R8. The output of amplifier U4 outputs a signal .

4. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: described The integrator branch includes an operational amplifier U5, an operational amplifier U6, a multiplier M2, a resistor R9, a resistor R10, a resistor R11, a resistor R12 and a capacitor C3; the signal The input of the multiplier M2 is connected to the output of the multiplier M2 through the resistor R9 and the reverse input of the operational amplifier U5. The inverting input terminal of the operational amplifier U5 is connected to the resistor R10, the positive input terminal of the amplifier U5 is grounded, the inverting input terminal of the amplifier U5 is connected to the output terminal of the amplifier U5 through the capacitor C3, and the output terminal of the amplifier U5 outputs the signal The output of amplifier U5 is connected to the reverse input of operational amplifier U6 via resistor R11. The positive input of amplifier U6 is grounded. The reverse input of amplifier U6 is connected to the output of amplifier U6 via resistor R12. The output of amplifier U6 outputs a signal .

5. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: described The extended dimension product branch includes operational amplifier U7, operational amplifier U8, resistor R13, resistor R14, resistor R15, resistor R16, capacitor C4; signal Connect to the reverse input terminal of the operational amplifier U7 through the resistor R13, the operational circuit The reverse input terminal of the operational amplifier U7 is connected to the resistor R14, the positive input terminal of the amplifier U7 is grounded, the reverse input terminal of the amplifier U7 is connected to the output terminal of the amplifier U7 through the capacitor C4, and the output terminal of the amplifier U7 outputs the signal The output of amplifier U7 is connected to the reverse input of operational amplifier U8 via resistor R15. The positive input of amplifier U8 is grounded. The reverse input of amplifier U8 is connected to the output of amplifier U8 via resistor R16. The output of amplifier U8 outputs a signal .

6. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: described The extended dimension branch includes operational amplifier U9, operational amplifier U10, resistor R17, resistor R18, resistor R19, resistor R20 and capacitor C5. Connect to the reverse input terminal of the operational amplifier U9 through the resistor R17, the operational circuit The reverse input terminal of the operational amplifier U9 is connected to the resistor R18, the positive input terminal of the amplifier U9 is grounded, and the reverse input terminal of the amplifier U9 is connected to the output terminal of the amplifier U9 through the capacitor C5. The output terminal of the amplifier U9 outputs the signal The output of amplifier U9 is connected to the reverse input of operational amplifier U10 via resistor R19. The positive input of amplifier U10 is grounded. The reverse input of amplifier U10 is connected to the output of amplifier U10 via resistor R20. The output of amplifier U10 outputs a signal .

7. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: described The extended dimension product branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24 ​​and a capacitor C6; the signal Connect to the reverse input terminal of the operational amplifier U11 through the resistor R21, the operational circuit The reverse input terminal of the operational amplifier U11 is connected to the resistor R22, the positive input terminal of the amplifier U11 is grounded, the reverse input terminal of the amplifier U11 is connected to the output terminal of the amplifier U11 through the capacitor C6, and the output terminal of the amplifier U11 outputs the signal The output of amplifier U11 is connected to the reverse input of operational amplifier U12 via resistor R23. The positive input of amplifier U12 is grounded. The reverse input of amplifier U12 is connected to the output of amplifier U12 via resistor R24. The output of amplifier U12 outputs a signal .

8. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: described The operational circuit includes an operational amplifier U13, an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, an operational amplifier U19, an adder A1, an adder A2, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32 and a resistor R33; the input end of the sinusoidal signal source VSIN1 is grounded, the output end of the sinusoidal signal source VSIN1 is connected to the inverting input end of the operational amplifier U13, the positive input end of the amplifier U13 is grounded, the output end of the amplifier U13 is connected to the inverting input end of the operational amplifier U14 via resistor R25, the positive input end of the amplifier U14 is grounded, the inverting input end of the amplifier U14 is connected to the output end of the amplifier U14 via resistor R26, and the output end of the amplifier U14 is connected to one side input end of the adder A1; the input end of the sinusoidal signal source VSIN2 is grounded, and the sinusoidal signal source VSIN2 is connected to the inverting input end of the operational amplifier U14. The output end is connected to the inverting input end of the operational amplifier U15, the positive input end of the amplifier U15 is grounded, the output end of the amplifier U15 is connected to the inverting input end of the operational amplifier U16 via a resistor R27, the positive input end of the amplifier U16 is grounded, the inverting input end of the amplifier U16 is connected to the output end of the amplifier U16 via a resistor R28, and the output end of the amplifier U16 is connected to one side input end of the adder A2; the input end of the sinusoidal signal source VSIN3 is grounded, the output end of the sinusoidal signal source VSIN3 is connected to the inverting input end of the operational amplifier U17, the positive input end of the amplifier U17 is grounded, the output end of the amplifier U17 is connected to the inverting input end of the operational amplifier U18 via a resistor R29, the positive input end of the amplifier U18 is grounded, the inverting input end of the amplifier U18 is connected to the output end of the amplifier U18 via a resistor R30, and the output end of the amplifier U18 is connected to the other side input end of the adder A2; the output end of the adder A2 is connected to one side input end of the adder A1; the signal The output end of the adder A1 is connected to the inverting input end of the operational amplifier U19 via the resistor R31, the output end of the adder A1 is connected to the inverting input end of the operational amplifier U19 via the resistor R32, the positive input end of the amplifier U19 is grounded, the inverting input end of the amplifier U19 is connected to the output end of the amplifier U19 via the resistor R33, and the output end of the amplifier U19 outputs a signal; described The operational circuit includes an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, an operational amplifier U24, an operational amplifier U25, an operational amplifier U26, an adder A3, an adder A4, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41 and a resistor R42, wherein the input end of the sinusoidal signal source VSIN4 is grounded, the output end of the sinusoidal signal source VSIN4 is connected to the inverting input end of the operational amplifier U20, the positive input end of the amplifier U20 is grounded, the output end of the amplifier U20 is connected to the reverse input end of the operational amplifier U21 via resistor R34, the positive input end of the amplifier U21 is grounded, the reverse input end of the amplifier U21 is connected to the output end of the amplifier U21 via resistor R35, and the output end of the amplifier U21 is connected to one side input end of the adder A3; the input end of the sinusoidal signal source VSIN2 is grounded, the output end of the sinusoidal signal source VSIN2 is connected The inverting input terminal of the operational amplifier U22 is terminated, the positive input terminal of the amplifier U22 is grounded, the output terminal of the amplifier U22 is connected to the inverting input terminal of the operational amplifier U23 via a resistor R36, the positive input terminal of the amplifier U23 is grounded, the inverting input terminal of the amplifier U23 is connected to the output terminal of the amplifier U23 via a resistor R37, and the output terminal of the amplifier U23 is connected to one side input terminal of the adder A4; the input terminal of the sinusoidal signal source VSIN6 is grounded, the output terminal of the sinusoidal signal source VSIN6 is connected to the inverting input terminal of the operational amplifier U24, the positive input terminal of the amplifier U24 is grounded, the output terminal of the amplifier U24 is connected to the inverting input terminal of the operational amplifier U25 via a resistor R38, the positive input terminal of the amplifier U25 is grounded, the inverting input terminal of the amplifier U25 is connected to the output terminal of the amplifier U25 via a resistor R39, and the output terminal of the amplifier U25 is connected to the other side input terminal of the adder A4; the output terminal of the adder A4 is connected to one side input terminal of the adder A3; the signal The output end of the adder A3 is connected to the inverting input end of the operational amplifier U26 via the resistor R41, the output end of the adder A3 is connected to the inverting input end of the operational amplifier U26 via the resistor R40, the positive input end of the amplifier U26 is grounded, the inverting input end of the amplifier U26 is connected to the output end of the amplifier U26 via the resistor R42, and the output end of the amplifier U26 outputs a signal; described The operational circuit includes an operational amplifier U27, an operational amplifier U28, an operational amplifier U29, an operational amplifier U30, an operational amplifier U31, an operational amplifier U32, an operational amplifier U33, an adder A5, an adder A6, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a resistor R48, a resistor R49, a resistor R50 and a resistor R51; the input end of the sinusoidal signal source VSIN7 is grounded, the output end of the sinusoidal signal source VSIN7 is connected to the inverting input end of the operational amplifier U27, the positive input end of the amplifier U27 is grounded, the output end of the amplifier U27 is connected to the reverse input end of the operational amplifier U28 via resistor R43, the positive input end of the amplifier U28 is grounded, the reverse input end of the amplifier U28 is connected to the output end of the amplifier U28 via resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5; the input end of the sinusoidal signal source VSIN8 is grounded, the output end of the sinusoidal signal source VSIN8 is connected to the inverting input end of the operational amplifier U27, the positive input end of the amplifier U28 is grounded, the reverse input end of the amplifier U28 is connected to the output end of the amplifier U28 via resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5 The output terminal is connected to the inverting input terminal of the operational amplifier U29, the positive input terminal of the amplifier U29 is grounded, the output terminal of the amplifier U29 is connected to the inverting input terminal of the operational amplifier U30 via a resistor R45, the positive input terminal of the amplifier U30 is grounded, the inverting input terminal of the amplifier U30 is connected to the output terminal of the amplifier U30 via a resistor R46, and the output terminal of the amplifier U30 is connected to one side input terminal of the adder A6; the input terminal of the sinusoidal signal source VSIN9 is grounded, the output terminal of the sinusoidal signal source VSIN9 is connected to the inverting input terminal of the operational amplifier U31, the positive input terminal of the amplifier U31 is grounded, the output terminal of the amplifier U31 is connected to the inverting input terminal of the operational amplifier U32 via a resistor R47, the positive input terminal of the amplifier U32 is grounded, the inverting input terminal of the amplifier U32 is connected to the output terminal of the amplifier U32 via a resistor R48, and the output terminal of the amplifier U32 is connected to the other side input terminal of the adder A6; the output terminal of the adder A6 is connected to one side input terminal of the adder A5; the signal The output end of the adder A5 is connected to the inverting input end of the operational amplifier U33 via the resistor R50, the output end of the adder A5 is connected to the inverting input end of the operational amplifier U33 via the resistor R49, the positive input end of the amplifier U33 is grounded, the inverting input end of the amplifier U33 is connected to the output end of the amplifier U33 via the resistor R51, and the output end of the amplifier U33 outputs a signal.

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