Polishing composition for semiconductor process and method for polishing substrate using same

By using a polishing composition containing polished particles, polyoxyalkylene-based surfactant and deflection inhibitor in the semiconductor process, the problem of being difficult to smooth the polished surface during the multi-film polishing process is solved, and an efficient polishing effect is achieved.

CN119775903APending Publication Date: 2025-04-08YOUNG CHANG CHEMICAL CO LTD
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Patent Information

Application Number
CN202411315486.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-10-06
Filing Date
2024-09-20
Publication Date
2025-04-08

AI Technical Summary

Technical Problem

In the manufacturing process of semiconductor devices, especially when polishing two or more films is included, it is difficult for the prior art to achieve a smoother polished surface while maintaining the polishing speed.

Method used

A polishing composition comprising polishing particles, a polyoxyalkylene-based surfactant and a skew inhibitor is used. Polyoxyalkylene-based surfactants are used to inhibit the dish defects of the silicon oxide film, and skew inhibitors are used to inhibit the skew of the silicon nitride film.

Benefits of technology

It is achieved while maintaining a polishing speed above a predetermined level, and providing a smoother polished surface is reduced, reducing the frequency of occurrence of dish defects and skews.

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Abstract

A polishing composition for a semiconductor process according to one embodiment of the present specification includes polishing particles, a polyoxyalkylene-based surfactant, and a skew inhibitor of chemical formula 1 below. The polyoxyalkylene surfactant is characterized in that the hydrophilic-lipophilic balance (HLB) value of the polyoxyalkylene surfactant is at least 13, and that the polyoxyalkylene surfactant has a hydrophilic-lipophilic balance (HLB) value of at least 13. In the following chemical formula 1, R1 is H, methyl or ethyl, and R2, R3 and R4 are respectively and independently methyl or ethyl. When a polishing composition having such characteristics is applied to polish a substrate including two or more films, the polishing composition can achieve a smoother surface to be polished while exhibiting a polishing speed above a prescribed level. [Chemical Formula 1] # imgabs0 #
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Description

Technical Field

[0001] Embodiments relate to a polishing composition for semiconductor process and a method for polishing a substrate using the same. Background Art

[0002] As semiconductor devices become more miniaturized and denser, more sophisticated patterning techniques are used. As a result, the surface structure of semiconductor devices becomes more complex, and the step difference of interlayer films becomes larger. In the process of manufacturing semiconductor devices, the chemical mechanical polishing (hereinafter referred to as "CMP") process is used as a flattening technology for removing the step difference in a specific film formed on a substrate.

[0003] The CMP process polishes the surface by supplying slurry to the polishing pad and pressing and rotating the substrate. Depending on the process steps, the object to be flattened is different, and the physical properties of the slurry used at this time are also different.

[0004] Polishing after metal wiring formation needs to maintain a sufficient polishing rate and polishing speed while minimizing dishing defects and the like.

[0005] The above-mentioned background technology refers to the technical information possessed by the inventor in order to derive the present invention or obtained in the process of deriving the present invention, and is not necessarily the known technology disclosed to the general public before applying for the present invention.

[0006] Prior art literature

[0007] Patent Literature

[0008] (Patent Document 1) Korean Patent No. 10-0516886

[0009] (Patent Document 2) Korean Patent No. 10-1395866 Summary of the invention

[0010] Problem to be solved

[0011] An object of the embodiments is to provide a polishing composition for semiconductor processes and the like which can provide a smoother polished surface while maintaining a polishing rate at or above a predetermined level when polishing a substrate surface including two or more films.

[0012] Solutions to the problem

[0013] A polishing composition for semiconductor processes according to an embodiment of the present specification includes polishing particles, a polyoxyalkylene surfactant, and a skew suppressor of the following Chemical Formula 1.

[0014] [Chemical formula 1]

[0015]

[0016] In the above Chemical Formula 1, R1 is H, methyl or ethyl, and R2, R3 and R4 are each independently methyl or ethyl.

[0017] The polyoxyalkylene surfactant has a hydrophile-lipophile balance (HLB) value of 13 or more.

[0018] The polyoxyalkylene surfactant may be a compound represented by the following Chemical Formula 2.

[0019] [Chemical formula 2]

[0020]

[0021] In the above Chemical Formula 2, the above R5 may be an alkyl group having 10 to 30 carbon atoms.

[0022] The above R6 and R7 may each independently be a methyl group or an ethyl group.

[0023] The m and n may be integers of 10 to 30, respectively and independently.

[0024] The ratio of the content (weight basis) of the polyoxyalkylene surfactant to the content (weight basis) of the skewing inhibitor may be 0.3 to 1.2.

[0025] The weight average molecular weight of the polyoxyalkylene surfactant may be 500 g / mol to 4000 g / mol.

[0026] The surface charge of the polishing particles may be positive.

[0027] The polishing composition for semiconductor processing may further include an anionic polymer dispersant.

[0028] The anionic polymer dispersant may include one or more compounds selected from the group consisting of polyacrylic acid, polymethacrylic acid, polymaleic acid, and derivatives thereof.

[0029] The pH of the semiconductor process polishing composition may be 5.5 to 12.

[0030] The zeta potential of the polishing composition for semiconductor process may be -80 mV to -20 mV.

[0031] The polyoxyalkylene surfactant may be a disk-shaped defect inhibitor for the silicon oxide film.

[0032] The above-mentioned skew suppressor may be a skew suppressor for a silicon nitride film.

[0033] A method for manufacturing a substrate according to another embodiment of the present specification includes a process of applying the above-mentioned polishing composition for semiconductor processes as a slurry to polish a substrate.

[0034] Effects of the Invention

[0035] Process Polishing Composition When polishing a substrate surface including two or more films, the semiconductor process polishing composition according to the embodiment can provide a smoother polished surface while maintaining a polishing rate above a predetermined level. DETAILED DESCRIPTION

[0036] The following detailed description of the embodiments can be easily implemented by those skilled in the art. However, the embodiments can be implemented in many different forms and are not limited to the embodiments described herein.

[0037] When used in this specification, the terms "about", "substantially", etc., which indicate the degree of error inherent in manufacturing and materials, are used in the sense of being from or close to their numerical values ​​to prevent unscrupulous infringers from improperly taking advantage of public content that mentions exact or absolute numerical values ​​in order to facilitate understanding of the embodiments.

[0038] Throughout this specification, the term "combination thereof" included in the Markush form expression means a mixture or combination of one or more selected from the group consisting of multiple structural elements described in the Markush form expression, and means including one or more selected from the group consisting of the above multiple structural elements.

[0039] Throughout the present specification, the description "A and / or B" means "A, B, or A and B".

[0040] Throughout the present specification, terms such as “first”, “second” or “A”, “B” and the like are used to distinguish the same terms unless otherwise specified.

[0041] In the present specification, B is located on A means that B is located on A, or other layers are located therebetween, and B is located on A or can be located on A, and its interpretation is not limited to B being located on the surface of A in a conforming manner.

[0042] In this specification, unless otherwise specified, a singular expression is interpreted as including the singular or plural meaning explained in the context.

[0043] The "alkylene oxide-based compound" described in the present specification is interpreted as including alkylene oxide-based compounds and derivatives thereof. For example, the polyoxyalkylene oxide-based compound means a compound including polyoxyalkylene oxide and derivatives thereof.

[0044] As semiconductors become more integrated, the density of patterns to be realized on wafers is increasing. When a substrate with a pattern is polished using a CMP process, defects such as over-polishing of the center of a wide pattern (dish defect) and corrosion of the insulating film (skew) may occur. The frequency of such defects tends to increase as the density of the pattern becomes higher.

[0045] The inventors of the embodiment applied polyoxyalkylene surfactants and skew inhibitors, etc., and confirmed through experiments that they could provide a polishing composition that can smoothly polish two or more films at a polishing rate above a specified level, especially a substrate surface where a silicon oxide film and a silicon nitride film are exposed at the same time, thereby completing the embodiment.

[0046] Hereinafter, embodiments will be described in detail.

[0047] A polishing composition for semiconductor processes according to an embodiment of the present disclosure includes polishing particles, a polyoxyalkylene surfactant, and a deflection inhibitor.

[0048] Polyoxyalkylene surfactants

[0049] In the embodiment, a polyoxyalkylene surfactant can be used in the polishing composition. The polyoxyalkylene surfactant is a surfactant derived from a polyoxyalkylene compound.

[0050] The polyoxyalkylene surfactant can be a dishing defect inhibitor for the silicon oxide film. When polishing the surface of the substrate where the silicon oxide film is exposed, the surfactant can be adsorbed on the surface of the silicon oxide film with an appropriate strength. The adsorbed surfactant helps to effectively suppress the dishing defect phenomenon of the silicon oxide film while maintaining the polishing rate of the polishing composition at a predetermined level or above.

[0051] The polyoxyalkylene surfactant may be a nonionic surfactant. The polyoxyalkylene surfactant may have a hydrophile-lipophile balance (HLB) value of 13 or more.

[0052] In the embodiment, the polyoxyalkylene surfactant having an HLB value controlled within a predetermined range can be stably dispersed in the polishing composition, easily adsorbed to the hydrophilic silicon oxide film, and can stably prevent over-polishing of the silicon oxide film.

[0053] The HLB value of the polyoxyalkylene surfactant was calculated according to the following formula 1.

[0054] [Formula 1]

[0055]

[0056] In the above formula 1, M h M is the molecular weight of the hydrophilic part of the polyoxyalkylene surfactant, and M is the total molecular weight of the polyoxyalkylene surfactant.

[0057] The HLB value of the polyoxyalkylene surfactant may be 13 or more. The HLB value may be 14 or more. The HLB value may be 15 or more. The HLB value may be less than 20. In this case, the surfactant may be stably dispersed in the polishing composition and easily adsorbed to the silicon oxide film.

[0058] The polyoxyalkylene-based surfactant may be a compound of the following Chemical Formula 2.

[0059] [Chemical formula 2]

[0060]

[0061] In the above Chemical Formula 2, R5 is an alkyl group having 10 to 30 carbon atoms, R6 and R7 are each independently a methyl group or an ethyl group, and m and n are each independently an integer of 10 to 30.

[0062] In the polyoxyalkylene surfactant having the composition of Chemical Formula 2, the portion containing the oxyalkylene repeating unit (in Chemical Formula 2, the -R6O- repeating unit and the -R7O- repeating unit) can form a hydrogen bond with the silicon oxide film, which helps to form a stable passivation film on the above oxide film. In addition, in the above surfactant, the portion containing the alkyl group (in Chemical Formula 2, the R5 functional group) can form a steric barrier near the silicon oxide film, effectively inhibiting the polishing particles from over-polishing the silicon oxide film.

[0063] In the above Chemical Formula 2, R5 may be an alkyl group having 10 to 30 carbon atoms. The above carbon number may be 12 or more. The above carbon number may be 25 or less. In this case, the polishing composition may be able to polish the surface of the substrate on which the silicon oxide film is exposed more smoothly, and the excessive increase in the degree of convergence of the polishing particles due to the use of the surfactant may be stably prevented.

[0064] In the above Chemical Formula 2, m and n are each independently an integer of 10 to 30. The above m and n may each independently be an integer of 12 or more. The above m and n may each independently be an integer of 25 or less.

[0065] The sum of m and n may be an integer greater than 20. The sum of m and n may be an integer greater than 24. The sum of m and n may be an integer less than 60. The sum of m and n may be an integer less than 50. The sum of m and n may be an integer less than 40.

[0066] The polyoxyalkylene surfactant having such characteristics can be adsorbed to the surface of the silicon oxide film with a controlled strength, which helps to improve the smoothness of the substrate surface. In addition, it can prevent the above-mentioned surfactant and polishing particles from interacting with each other, thereby preventing the dispersibility of the polishing composition from being excessively reduced.

[0067] The weight average molecular weight of the polyoxyalkylene surfactant may be 500 g / mol to 4000 g / mol. The weight average molecular weight may be 1000 g / mol or more. The weight average molecular weight may be 3000 g / mol or less. The weight average molecular weight may be 2500 g / mol or less. In this case, the polishing particle dispersibility of the polishing composition caused by the addition of the surfactant can be stably controlled, and when the surface of the substrate where the silicon oxide film is exposed is polished, the frequency of defects caused by over-polishing of the silicon oxide film can be effectively reduced.

[0068] The weight average molecular weight of the polyoxyalkylene surfactant can be measured by gel permeation chromatography (GPC).

[0069] Deflection Inhibitor

[0070] The polishing composition for semiconductor process of the embodiment may include a deflection suppressant of the following Chemical Formula 1.

[0071] [Chemical formula 1]

[0072]

[0073] In the above Chemical Formula 1, R1 is H, methyl or ethyl, and R2, R3 and R4 are each independently methyl or ethyl.

[0074] The skew inhibitor of Chemical Formula 1 is a skew inhibitor for silicon nitride film. When polishing the surface of a substrate including a silicon nitride film, the skew inhibitor can be adsorbed on the surface of the nitride film, effectively suppressing excessive erosion of the nitride film that may occur during the polishing process.

[0075] The polishing composition of the embodiment may contain both of the polyoxyalkylene surfactant and the deflection inhibitor according to Chemical Formula 1. The polishing selectivity ratio of the silicon oxide film to the silicon nitride film can be improved, and the surface of the substrate where the silicon oxide film and the silicon nitride film are simultaneously exposed can be smoothly polished. Furthermore, even if the compound is adsorbed on the surface of the polishing object, the polishing composition can exhibit a polishing rate above a predetermined level.

[0076] The embodiment can suppress excessive degradation of the polishing rate and dispersibility of the polishing composition, reduce the frequency of defects on the polished surface, and improve the polishing selectivity of the silicon oxide film to the silicon nitride film by adjusting the content ratio of the polyoxyalkylene surfactant and the skew inhibitor.

[0077] In the polishing composition for semiconductor process, the ratio of the content (weight basis) of the polyoxyalkylene surfactant to the content (weight basis) of the above-mentioned skew inhibitor can be 0.3 to 1.2. The above-mentioned ratio can be 0.4 or more. The above-mentioned ratio can be 0.45 or more. The above-mentioned ratio can be 0.5 or more. The above-mentioned ratio can be 0.6 or more. The above-mentioned ratio can be 0.7 or more. The above-mentioned ratio can be 1.1 or less. The above-mentioned ratio can be 1.0 or less. In this case, the polishing composition can present stable dispersibility, polishing speed and polishing selectivity, and effectively reduce the frequency of defects on the polished surface.

[0078] Dispersants

[0079] The embodiment may further include an anionic polymer dispersant. The dispersant may be stretched without condensing in the pH-controlled polishing composition. When such a dispersant is adsorbed on the surface of the polishing particles, especially the surface of the polishing particles with positive surface charge, by means of electrostatic attraction, a considerable steric barrier may be formed around the polishing particles, providing excellent dispersibility to the polishing composition. This feature may help reduce the frequency of scratches on the polished surface caused by agglomeration of the polishing particles.

[0080] The anionic polymer dispersant may include one or more compounds selected from the group consisting of polyacrylic acid, polymethacrylic acid, polymaleic acid and their derivatives. The above dispersant may include polyacrylic acid and its derivatives. The above dispersant may include polyacrylic acid. The dispersant may be polyacrylic acid.

[0081] The weight average molecular weight of the anionic polymer dispersant can be 1000 g / mol to 50000 g / mol. The weight average molecular weight can be 2000 g / mol or more. The weight average molecular weight can be 3000 g / mol or more. The weight average molecular weight can be 5000 g / mol or more. The weight average molecular weight can be 10000 g / mol or more. The weight average molecular weight can be 40000 g / mol or less. In this case, by adjusting the amount of the dispersant adsorbed on the surface of the polishing particles, the excessive reduction of the reaction sites of the polishing particles can be suppressed, and the polishing characteristics of the polishing composition can be maintained above a specified level. At the same time, the dispersibility of the polishing particles can be effectively improved.

[0082] The weight average molecular weight of the dispersant can be measured by gel permeation chromatography.

[0083] The polishing composition may contain 50 to 200 weight percent of anionic polymer dispersant relative to 100 weight percent of polishing particles. The polishing composition may contain 60 weight percent or more of anionic polymer dispersant relative to 100 weight percent of polishing particles. The polishing composition may contain 70 weight percent or more of anionic polymer dispersant relative to 100 weight percent of polishing particles. The polishing composition may contain 80 weight percent or more of anionic polymer dispersant relative to 100 weight percent of polishing particles. The polishing composition may contain 90 weight percent or more of anionic polymer dispersant relative to 100 weight percent of polishing particles. The polishing composition may contain 150 weight percent or less of anionic polymer dispersant relative to 100 weight percent of polishing particles.

[0084] The polishing composition for semiconductor process may contain 0.15 weight percent or more of anionic polymer dispersant. The polishing composition for semiconductor process may contain 0.2 weight percent or more of anionic polymer dispersant. The polishing composition for semiconductor process may contain 0.25 weight percent or more of anionic polymer dispersant. The polishing composition for semiconductor process may contain 0.5 weight percent or less of anionic polymer dispersant.

[0085] In this case, it is possible to help stably maintain the dispersibility of the polishing particles.

[0086] The embodiment may further include a zwitterionic dispersant with a molecular weight of 50 g / mol to 300 g / mol. The zwitterionic dispersant with adjusted molecular weight may be adsorbed on the surface of the polishing particles where the dispersant as anionic polymer is not adsorbed, thereby further improving the dispersibility of the polishing particles.

[0087] The zwitterionic dispersant may include any one selected from the group consisting of picolinic acid, amino acids, and combinations thereof. The amino acids may be illustratively at least one of glutamic acid, aspartic acid, glutamine, tyrosine, tryptophan, serine, threonine, glycine, alanine, methionine, cysteine, phenylalanine, leucine, valine, and isoleucine. The zwitterionic dispersant may include picolinic acid. The zwitterionic dispersant may be picolinic acid.

[0088] The polishing composition may contain 0.2 to 15 weight percent of a zwitterionic dispersant relative to 100 weight percent of the polishing particles. The polishing composition may contain 0.5 weight percent or more of a zwitterionic dispersant relative to 100 weight percent of the polishing particles. The polishing composition may contain 0.8 weight percent or more of a zwitterionic dispersant relative to 100 weight percent of the polishing particles. The polishing composition may contain 10 weight percent or less of a zwitterionic dispersant relative to 100 weight percent of the polishing particles. The polishing composition may contain 8 weight percent or less of a zwitterionic dispersant relative to 100 weight percent of the polishing particles. The polishing composition may contain 5 weight percent or less of a zwitterionic dispersant relative to 100 weight percent of the polishing particles.

[0089] The polishing composition for semiconductor processing may include 0.01 weight percent to 0.5 weight percent of a zwitterionic dispersant. The polishing composition for semiconductor processing may include 0.02 weight percent or more of a zwitterionic dispersant. The polishing composition for semiconductor processing may include 0.03 weight percent or more of a zwitterionic dispersant. The polishing composition for semiconductor processing may include 0.05 weight percent or more of a zwitterionic dispersant. The polishing composition for semiconductor processing may include 0.4 weight percent or less of a zwitterionic dispersant. The polishing composition for semiconductor processing may include 0.3 weight percent or less of a zwitterionic dispersant.

[0090] In this case, it can help to more effectively reduce the frequency of scratches on the polished surface.

[0091] The semiconductor process polishing composition may further include a nonionic polymer dispersant. The nonionic polymer dispersant may be adsorbed on the polishing particles to increase dispersibility, and the non-adsorbed nonionic polymer dispersant may further improve dispersion stability through steric hindrance effects and the like. Furthermore, the dispersant is nonionic, and even in an acidic environment described later, the semiconductor process polishing composition may have a more stable dispersion stability. Furthermore, during the polishing process, the occurrence of defects caused by polishing on the substrate may be reduced.

[0092] The above-mentioned nonionic polymer can be at least one selected from the group consisting of polyethylene glycol, polypropylene glycol, polyvinyl pyrrolidone, polyethylene oxide, polypropylene oxide, polyalkyl oxide, polyethylene oxide, polyethylene oxide-propylene oxide copolymer, cellulose, methyl cellulose, methyl hydroxyethyl cellulose, methyl hydroxypropyl cellulose, hydroxyethyl cellulose, carboxymethyl cellulose, carboxymethyl hydroxyethyl cellulose, sulfoethyl cellulose and carboxymethyl sulfoethyl cellulose.

[0093] The nonionic polymer may have a weight average molecular weight of 1000 g / mol or more and less than 25000 g / mol. When the nonionic polymer is within this range, it can exhibit better solubility, dispersion stability, etc., and is also beneficial to polishing properties.

[0094] The nonionic polymer may be contained in an amount of 0.01 to 5 weight percent, or 0.1 to 2 weight percent, based on the entire semiconductor process polishing composition. In this case, the occurrence of defects on the surface of the polished substrate can be suppressed, and the degree of contamination such as reattached particles on the surface of the polished substrate can be adjusted below a specified level.

[0095] Polishing particles and other compounds

[0096] The surface charge of the polishing particles may be positive. In this case, the anionic polymer dispersant can be easily adsorbed on the surface of the polishing particles by electrostatic attraction.

[0097] The polishing particles may include any one selected from the group consisting of ceria, silica, zirconia, alumina, zeolite, and combinations thereof. The polishing particles may include surface-modified particles.

[0098] The polishing particles may contain ceria. The polishing particles may be ceria. Ceria may react with the film to be polished during the polishing process to exhibit high polishing properties. In addition, the surface of ceria exhibits a positive charge, thereby easily improving the dispersibility of the polishing particles caused by the anionic polymer dispersant.

[0099] The polishing particles may include colloidal ceria particles. The polishing particles may be colloidal ceria. Colloidal ceria may have a high density and crystallinity compared to ceria formed by a solid phase method. Such properties may impart improved polishing properties to the polishing composition. Furthermore, colloidal ceria has a relatively uniform particle shape and particle size distribution, which may effectively reduce the frequency of defects on the polished surface.

[0100] The average diameter of the secondary particles of the polishing particles may be 100 nm or more. The average diameter may be 110 nm or more. The average diameter may be 120 nm or more. The average diameter may be 130 nm or more. The average diameter may be 170 nm or less. The average diameter may be 160 nm or less. The average diameter may be 150 nm or less. A polishing composition using such particles can reduce the frequency of defects such as scratches on the polished surface while presenting an excellent polishing rate on the substrate surface.

[0101] The average diameter of the primary particles of the polishing particles may be 30 nm or more. The average diameter may be 40 nm or more. The average diameter may be 50 nm or more. The average diameter may be 200 nm or less. The average diameter may be 150 nm or less. The average diameter may be 120 nm or less. The average diameter may be 90 nm or less. In this case, the polishing composition may present an excellent polishing rate on the substrate surface while the frequency of adsorption of the polishing particles on the substrate can be stably adjusted.

[0102] The polishing particles may contain more than 50 weight percent of ceria particles. The polishing particles may contain more than 70 weight percent of ceria particles. The polishing particles may contain more than 90 weight percent of ceria particles. The polishing particles may contain less than 100 weight percent of ceria particles. The polishing particles may be ceria particles.

[0103] The polishing particles may contain more than 50 weight percent of colloidal ceria particles. The polishing particles may contain more than 70 weight percent of colloidal ceria particles. The polishing particles may contain more than 90 weight percent of colloidal ceria particles. The polishing particles may contain less than 100 weight percent of colloidal ceria particles. The polishing particles may be colloidal ceria particles.

[0104] The polishing composition for semiconductor process may contain more than 0.1 weight percent of polishing particles. The polishing composition for semiconductor process may contain more than 0.15 weight percent of polishing particles. The polishing composition for semiconductor process may contain more than 0.2 weight percent of polishing particles. The polishing composition for semiconductor process may contain less than 5 weight percent of polishing particles. The polishing composition for semiconductor process may contain less than 3 weight percent of polishing particles. The polishing composition for semiconductor process may contain less than 1.5 weight percent of polishing particles. In this case, in particular, for the surface of the substrate where the oxide film and the nitride film are exposed at the same time, effective polishing can be performed.

[0105] The polishing composition for semiconductor processing may also contain a chelating agent. The chelating agent adsorbs metals or metal ions to facilitate removal. Specifically, metals that may occur during the polishing process are likely to reattach to the polished surface or remain in subsequent processes and cause defects. In particular, metals such as tungsten have the characteristics of being relatively easy to dissolve in a specific environment, but also easy to reattach to the surface, so the chelating agent can be used as a blocking agent to prevent this situation.

[0106] Exemplarily, the chelating agent can be at least one selected from the group consisting of butyric acid, citric acid, tartaric acid, succinic acid, oxalic acid, acetic acid, adipic acid, capric acid, caproic acid, caprylic acid, carboxylic acid, glutaric acid, glutamic acid, glycolic acid, thioglycolic acid, formic acid, mandelic acid, fumaric acid, lactic acid, lauric acid, malic acid, malonic acid, myristic acid, palmitic acid, phthalic acid, isophthalic acid, terephthalic acid, citraconic acid, propionic acid, pyruvic acid, stearic acid, valeric acid, benzoic acid, phenylacetic acid, naphthoic acid, aspartic acid, amino acid and ethylenediaminetetraacetic acid. As the above-mentioned amino acid, glycine, α-alanine, β-alanine, L-aspartic acid, N-methylglycine (methylglycine) and their combinations can be applied.

[0107] The chelating agent may contain two or more carboxyl groups or alcohol groups in the molecule. As the chelating agent, two or more chelating agents containing two or more carboxyl groups or alcohol groups in the molecule may be used. Specifically, the chelating agent may contain any one selected from the group consisting of ethylenediaminetetraacetic acid (EDTA), glycine, carboxylic acids, and combinations thereof. The carboxylic acids mean compounds containing at least one or more carboxyl groups in the molecule.

[0108] The chelating agent may be contained in an amount of 0.003 to 0.5 weight percent, or 0.005 to 0.3 weight percent, based on the total amount of the semiconductor process polishing composition. In this case, the frequency of defects caused by particles originating from the metal film can be reduced.

[0109] The polishing composition for semiconductor processing may further include an oxidant, which can oxidize the metal film, create an environment that can be more easily planarized, and play a role in increasing the polishing rate and etching rate.

[0110] The oxidizing agent can be at least one selected from the group consisting of hydrogen peroxide, urea hydrogen peroxide, urea, percarbonate, periodic acid, periodate, perchloric acid, perchlorate, perbromic acid, perbromate, perboric acid, perborate, permanganic acid, permanganate, persulfate, bromate, chlorate, chlorite, chromate, iodate, iodic acid, ammonium persulfate, benzoyl peroxide, calcium peroxide, barium peroxide, sodium peroxide and urea peroxide.

[0111] The oxidant may be contained in an amount of 0.01 to 5 weight percent based on the total weight of the semiconductor process polishing composition. In this case, the oxidation degree of the metal film is controlled and the polishing rate can be adjusted within a stable range.

[0112] In order to adjust the pH value of the polishing composition for semiconductor processing, an acid component may be added to the composition in addition to the solvent. The acid component may be used together with a pH adjuster.

[0113] The acid component can illustratively be at least one selected from the group consisting of hydrochloric acid, phosphoric acid, sulfuric acid, hydrofluoric acid, bromic acid, iodic acid, formic acid, malonic acid, oxalic acid, acetic acid, adipic acid, citric acid, acetic acid, propionic acid, fumaric acid, lactic acid, salicylic acid, pimelic acid, benzoic acid, succinic acid, phthalic acid, butyric acid, glutaric acid, glutamic acid, glycolic acid, lactic acid, aspartic acid, tartaric acid and their salts.

[0114] The pH adjuster may be any one selected from the group consisting of ammonia, aminomethyl propanol, tetramethyl ammonium hydroxide, potassium hydroxide, sodium hydroxide, magnesium hydroxide, rubidium hydroxide, cesium hydroxide, sodium bicarbonate, sodium carbonate, imidazole, and combinations thereof.

[0115] The above-mentioned acid component and pH adjuster can be used in appropriate amounts according to the desired pH.

[0116] The polishing composition for semiconductor process contains a solvent as a remaining component in addition to the above-described components and the components to be added later. The solvent may be water, preferably ultrapure water.

[0117] Physical properties of polishing composition

[0118] The embodiments can help adjust the pH of the polishing composition and inhibit the aggregation of polishing particles. Specifically, when the pH of the polishing composition is adjusted, the anionic polymer dispersant contained in the above composition does not condense even when adsorbed on the surface of the polishing particles, but remains in a stretched state, and can form a considerable steric barrier around the polishing particles. Thus, the aggregation between the polishing particles can be effectively prevented.

[0119] The pH of the semiconductor process polishing composition may be 5.5 to 12. The pH may be 6 or more. The pH may be 7 or more. The pH may be 11 or less. The pH may be 10 or less. In this case, it is possible to adjust the degree of condensation of the dispersant in the polishing composition and improve the dispersibility of the polishing composition.

[0120] The zeta potential of the polishing composition for semiconductor process may be -80 mV to -20 mV. The zeta potential may be -70 mV or more. The zeta potential may be -60 mV or more. The zeta potential may be -55 mV or more. The zeta potential may be -25 mV or less. The zeta potential may be -35 mV or less.

[0121] In this case, the dispersibility of the polishing composition can be improved, and the frequency of scratches on the polished surface can be effectively reduced.

[0122] The pH and zeta potential of the polishing composition are measured by a measurement method generally used in the field of polishing compositions for semiconductor processes.

[0123] The polishing rate of the semiconductor process polishing composition for silicon oxide film can be The polishing rate of the semiconductor process polishing composition for silicon oxide film can be The polishing rate of the semiconductor process polishing composition for silicon oxide film can be The polishing rate of the semiconductor process polishing composition for silicon oxide film can be the following.

[0124] The polishing rate of the semiconductor process polishing composition for silicon nitride film can be The polishing rate of the semiconductor process polishing composition for silicon nitride film can be The polishing rate of the semiconductor process polishing composition for silicon nitride film can be The polishing rate of the semiconductor process polishing composition for silicon nitride film can be The polishing rate of the semiconductor process polishing composition for silicon nitride film can be The polishing rate of the semiconductor process polishing composition for silicon nitride film can be above.

[0125] The polishing selectivity of the semiconductor process polishing composition for the silicon oxide film relative to the silicon nitride film may be 10 or more. The polishing selectivity may be 12 or more. The polishing selectivity may be 15 or more. The polishing selectivity may be 20 or more. The polishing selectivity may be 35 or less. In this case, in the process of etching the surface where the silicon oxide film and the silicon nitride film are simultaneously exposed, the occurrence of excessive step difference on the surface of the polishing object can be effectively suppressed.

[0126] When measuring the polishing rate of the polishing composition for semiconductor process, the substrate to be polished is a pattern wafer with a pitch of 1000 μm, a density of 50% of silicon oxide film and silicon nitride film, a carrier / plate speed of 93 / 87 RPM, a slurry flow rate of 100 ml / min, and a polishing pressure of 4.0 psi. When measuring the dishing defect value, the polishing pad can be a SKEnpulse HD-500C pad.

[0127] The polishing composition for semiconductor process comprises a silicon nitride film and a silicon oxide film. When a substrate with a pattern density of 50% is polished for 200 seconds, the dishing defect value of the silicon oxide film can be the following.

[0128] When measuring dishing defect values, the polishing target substrate is a pattern wafer with a pitch of 1000 μm, a density of 50% for silicon oxide film and silicon nitride film, a carrier / plate speed of 93 / 87 RPM, a slurry flow rate of 100 ml / min, and a polishing pressure of 4.0 psi. When measuring dishing defect values, the polishing pad can be an HD-500C pad from SK Enpulse.

[0129] Polishing the substrate for 200 seconds means polishing a substrate having a smooth surface for 200 seconds, or polishing a substrate having a step difference on an upper portion and further polishing for 200 seconds from the point at which the substrate starts to have a smooth surface.

[0130] The polishing composition for semiconductor process comprises a silicon nitride film and a silicon oxide film. When a substrate with a pattern density of 50% is polished for 200 seconds, the dishing defect value of the silicon oxide film can be The above dish defect value can be The above dish defect value can be The above dish defect value can be The above dish defect value can be The above dish defect value can be The composition having such characteristics can provide a smoother polished surface.

[0131] The polishing composition for semiconductor process comprises a silicon nitride film and a silicon oxide film. When a substrate with a pattern density of 50% is polished for 200 seconds, the skew value of the silicon nitride film can be the following.

[0132] The deflection value of the silicon nitride film means the depth to which the silicon nitride film is polished when the substrate is polished.

[0133] When measuring the tilt of the silicon nitride film, the polishing conditions may be the same as those when measuring the dishing defect value of the above-mentioned silicon oxide film.

[0134] The polishing composition for semiconductor process comprises a silicon nitride film and a silicon oxide film. When a substrate with a pattern density of 50% is polished for 200 seconds, the deflection value of the silicon nitride film can be The above skew value can be The above skew value can be The above skew value can be The above skew value can be The above skew value can be The above skew value can be In this case, the degree of step difference on the polished surface due to over-polishing can be effectively suppressed.

[0135] Method for manufacturing substrate

[0136] A method for manufacturing a substrate according to another embodiment of the present specification includes a process of applying the above-described polishing composition for semiconductor processes as a slurry to polish a substrate.

[0137] The upper surface of the substrate may include at least one of an insulating film, a metal wiring and a barrier layer. The metal wiring may include copper or tungsten. When the metal wiring includes copper, the barrier layer may include tantalum and its nitride. When the metal wiring includes tungsten, the barrier layer may include titanium and its nitride. The insulating film may include a silicon nitride film or a silicon oxide film.

[0138] Specifically, the process of polishing a substrate can be carried out by bringing the substrate to be polished into contact with the polishing pad together with the semiconductor process polishing composition supplied from a nozzle, rotating the polishing head for fixing the substrate, and rotating the plate to which the polishing pad is attached.

[0139] The process of polishing the substrate may further include a step of conditioning the surface of the polishing pad before polishing as required.

[0140] The polishing composition for semiconductor processing can polish a wafer in contact with a polishing pad while penetrating toward a substrate.

[0141] During the polishing of the substrate, a pressure of 6.89 kPa to 48.26 kPa may be applied. The pressure may be 13.79 kPa to 34.47 kPa.

[0142] The process of polishing the substrate can be carried out for 50 seconds to 10 minutes. However, the degree of polishing can be changed according to the purpose.

[0143] The description of the polishing composition for semiconductor process mentioned above is repeated in the previous content and thus omitted.

[0144] The method of manufacturing a substrate may further include a cleaning process of cleaning the polished substrate.

[0145] The cleaning process may be performed by cleaning the polished substrate with purified water and an inert gas.

[0146] Hereinafter, specific embodiments are described in more detail.

[0147] Production Example: Production of Polishing Composition for Semiconductor Process

[0148] Example 1: 0.3 weight percent of colloidal cerium dioxide as polishing particles, 2.7 weight percent of KONION SM-30 produced by Green Chemical as a polyoxyalkylene surfactant, 1.2 weight percent of tetramethylethylenediamine as a skewness inhibitor, and 0.35 weight percent of polyacrylic acid as an anionic polymer dispersant are added to ultrapure water as a solvent to prepare a polishing composition of a total of 100 weight percent.

[0149] Example 2: A polishing composition of 100 weight percent was prepared under the same conditions as in Example 1 except that 2.0 weight percent of a polyoxyalkylene surfactant and 1.6 weight percent of a skew inhibitor were used.

[0150] Example 3: A polishing composition having a total weight of 100% was prepared under the same conditions as in Example 1 except that 1.6% by weight of the deflection inhibitor was used.

[0151] Example 4: A polishing composition of 100 weight percent was prepared under the same conditions as in Example 1 except that 3.3 weight percent of a polyoxyalkylene surfactant and 1.6 weight percent of a skew inhibitor were used.

[0152] Example 5: A polishing composition having a total weight of 100% was prepared under the same conditions as in Example 1 except that 2.0% by weight of the deflection inhibitor was used.

[0153] Comparative Example 1: A polishing composition of 100 weight percent was prepared under the same conditions as in Example 1 except that 0.6 weight percent of a polyoxyalkylene surfactant and 0.8 weight percent of a skew inhibitor were used.

[0154] The composition, pH, zeta potential, and diameter of the polishing particles (secondary particles) of the polishing compositions of various examples and comparative examples are shown in Table 1 below.

[0155] Evaluation Example: Measurement of dishing defect value of silicon oxide film and skew value of silicon nitride film

[0156] The semiconductor process polishing compositions of different embodiments and comparative examples were used to polish a substrate having a smooth surface and a pattern density of 50% including a silicon nitride film and a silicon oxide film for 200 seconds. During polishing, the polishing pad was HD-500C of SK Enpulse, the carrier / plate speed was 93 / 87RPM, the slurry flow rate was 100ml / min, and the polishing pressure was 4psi.

[0157] After polishing, the step difference of the polished silicon oxide film is measured, and the value is taken as the dishing defect value of the silicon oxide film.

[0158] Then, the polishing depth of the polished silicon nitride film is measured, and the value is taken as the skew value of the silicon nitride film.

[0159] The measurement results of different embodiments and comparative examples are recorded in Table 2 below.

[0160] Evaluation example: Determination of polishing rate and scratch frequency on polished surface

[0161] The semiconductor process polishing compositions of the different embodiments and comparative examples were used to polish the silicon nitride film wafer and the silicon oxide film wafer for 60 seconds respectively. During the polishing, the polishing pressure was 4.0 psi.

[0162] After polishing, the polishing depths of the silicon oxide film and the silicon nitride film in the substrate are measured, and the polishing rate is calculated from the measured values. Furthermore, the polishing selectivity of the silicon oxide film to the silicon nitride film is calculated from the polishing rate values ​​of the silicon oxide film and the silicon nitride film.

[0163] Furthermore, the number of scratches formed in the substrate after polishing was measured using the AIT-XP+ model of KLA Tencor, which is a wafer defect inspection instrument.

[0164] The measurement results of different embodiments and comparative examples are recorded in Table 2 below.

[0165] [Table 1]

[0166]

[0167] *R S / O : Ratio of the content (weight percentage) of the polyoxyalkylene surfactant to the content (weight percentage) of the skew inhibitor

[0168] [Table 2]

[0169]

[0170] In the above Table 2, the dishing defect values ​​of the silicon oxide film were measured in Examples 1 to 5 as follows: In contrast, in Comparative Example 1, the

[0171] The skew value of the silicon nitride film was measured in Examples 1 to 5 as follows: In contrast, in Comparative Example 1, the

[0172] The polishing selectivity ratio was 17 or more in Examples 1 to 5, whereas it was less than 15.5 in Comparative Example 1.

[0173] This means that when the content ratio of the skew inhibitor to the content of the polyoxyalkylene surfactant is adjusted within the preset range in the embodiment, the dishing defect value of the silicon oxide film and the skew value of the silicon nitride film can be reduced to below the specified level, showing an excellent polishing selectivity.

[0174] The frequency of scratches on the polished surface was less than 700 in the examples and comparative examples, which means that the dispersibility of the polishing particles was effectively improved by adding the anionic polymer dispersant.

[0175] The preferred embodiments are described in detail above, but the scope of the present invention is not limited thereto, and various modifications and improvements made by ordinary technicians in the technical field of the present invention using the basic concepts of the embodiments defined in the following claims also fall within the scope of the present invention.

Claims

1. A polishing composition for semiconductor process, characterized in that: The invention comprises polishing particles, a polyoxyalkylene surfactant and a deflection inhibitor of the following chemical formula 1, The hydrophile-lipophile balance (HLB) value of the polyoxyalkylene surfactant is 13 or more, [Chemical formula 1] In the above chemical formula 1, R1 is H, methyl or ethyl, R2, R3 and R4 are each independently methyl or ethyl.

2. The semiconductor process polishing composition according to claim 1, characterized in that The polyoxyalkylene surfactant is a compound of the following chemical formula 2: [Chemical formula 2] In the above chemical formula 2, R5 is an alkyl group having 10 to 30 carbon atoms, R6 and R7 are each independently methyl or ethyl, m and n are each independently an integer of 10 to 30.

3. The semiconductor process polishing composition according to claim 1, characterized in that The ratio of the content (weight basis) of the polyoxyalkylene surfactant to the content (weight basis) of the skewing inhibitor is 0.3 to 1.

2.

4. The semiconductor process polishing composition according to claim 1, characterized in that The weight average molecular weight of the polyoxyalkylene surfactant is 500 g / mol to 4000 g / mol.

5. The semiconductor process polishing composition according to claim 1, wherein The surface charge of the polishing particles is positive. The semiconductor process polishing composition further comprises an anionic polymer dispersant.

6. The semiconductor process polishing composition according to claim 5, characterized in that The anionic polymer dispersant includes one or more compounds selected from the group consisting of polyacrylic acid, polymethacrylic acid, polymaleic acid, and derivatives thereof.

7. The semiconductor process polishing composition according to claim 1, characterized in that The pH is 5.5 to 12.

8. The semiconductor process polishing composition according to claim 1, wherein The zeta potential was -80 mV to -20 mV.

9. The semiconductor process polishing composition according to claim 1, wherein The polyoxyalkylene surfactant is a disk-shaped defect inhibitor for silicon oxide films. The above-mentioned skew suppressor is a skew suppressor for a silicon nitride film.

10. A method for manufacturing a substrate, characterized in that: The method comprises applying the semiconductor process polishing composition according to claim 1 as a slurry to polish a substrate.

Citation Information

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