Processing method, CPU, electronic device, storage medium and computer program product

Abstract

The invention relates to a processing method, a CPU, an electronic device, a storage medium and a computer program product. The method comprises the following steps: when a power supply state of a load unit is switched, acquiring a voltage difference between a power supply voltage and a voltage actually applied to the load unit; and generating a control signal for controlling the maximum value of the number of the conducted transistors according to the incidence relation and the obtained voltage difference, wherein the incidence relation can represent the relevance between the maximum value of the number of the transistors needing to be conducted when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit. Therefore, the circuit structure can be simplified, and the working power supply voltage, the power consumption and the layout area can be reduced.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a processing method, a central processing unit (CPU), an electronic device, a storage medium, and a computer program product. Background Art

[0002] Under different voltage conditions, the CPU's operating frequency and operating current will vary greatly, where the voltage conditions include, for example, the power supply voltage VCC and the voltage VDDO actually provided to the load unit, such as the CPU core. When the state of the load unit is switched, such as the load unit switching from light load to heavy load or from heavy load to light load, the number of internally turned-on transistors needs to be increased or decreased accordingly to match the power of the load unit as much as possible.

[0003] In the related art, an analog circuit is used to generate a control signal for controlling the maximum number of transistors to be turned on. In the analog circuit, a resistor is used to simulate the equivalent resistance of the load unit when the load is at its maximum, and the control signal for controlling the maximum number of transistors to be turned on at this time is determined by negative feedback self-adjustment.

[0004] However, the use of analog circuits is equivalent to an external circuit board corresponding to the analog circuits. Therefore, the use of analog circuits to generate the above control signals has a complex circuit structure, requires a higher operating power supply voltage, consumes a lot of power, and has a large layout area. Summary of the invention

[0005] In view of this, the present disclosure proposes a processing method, a CPU, an electronic device, a storage medium and a computer program product to overcome the above-mentioned defects in the prior art.

[0006] According to a first aspect of the present disclosure, a processing method is provided, which is applied to a CPU, and the processing method includes: when the power supply state of a load unit is switched, obtaining a voltage difference between a power supply voltage and a voltage actually applied to the load unit; and generating a control signal for controlling the maximum number of transistors to be turned on based on an association relationship and the obtained voltage difference, wherein the association relationship characterizes the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

[0007] In a possible implementation manner, the processing method further includes: adjusting the number of transistors that are turned on according to the control signal.

[0008] In a possible implementation, the number of turned-on transistors is adjusted according to the control signal, including: when the power supply state of the load unit switches from light load to heavy load, the number of increased turned-on transistors is the product of the number corresponding to the control signal and the first ratio.

[0009] In one possible implementation, the number of turned-on transistors is adjusted according to the control signal, including: when the power supply state of the load unit switches from heavy load to light load, the number of turned-on transistors is reduced to the product of the number corresponding to the control signal and the second ratio.

[0010] In a possible implementation manner, the control signal indicates a maximum value of the number of transistors that are turned on under the supply conditions of the power supply voltage and the voltage actually applied to the load unit.

[0011] In one possible implementation, the association relationship is a fitting curve pre-constructed through simulation, which can fit the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

[0012] In a possible implementation, the fitting curve is: y=ax 4 +bx 3 +cx 2 +dx+e, wherein y represents the control signal, x represents the voltage difference between the power supply voltage and the voltage actually applied to the load unit, a, b, c, d, e represent coefficients, and a, b, c, d, e change with changes in the processing technology and with switching of the power supply state of the load unit.

[0013] In one possible implementation, a is 347.88, b is -732.03, c is 561.08, d is -192.04, and e is 28.007.

[0014] According to a second aspect of the present disclosure, a CPU is provided, comprising: an acquisition module for acquiring a voltage difference between a power supply voltage and a voltage actually applied to the load unit when the power supply state of the load unit is switched; and a generation module for generating a control signal for controlling the maximum number of transistors to be turned on based on an association relationship and the acquired voltage difference, wherein the association relationship characterizes a correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

[0015] In a possible implementation, the CPU further includes: an adjustment module, configured to adjust the number of transistors that are turned on according to the control signal.

[0016] According to a third aspect of the present disclosure, an electronic device is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the above-mentioned processing method when executing the instructions stored in the memory.

[0017] According to a fourth aspect of the present disclosure, a computer-readable storage medium is provided, which stores computer program instructions, and the computer program instructions implement the above processing method when executed by a processor.

[0018] According to a fifth aspect of the present disclosure, a computer program product is provided, which includes computer program instructions, and the computer program instructions implement the above processing method when executed by a processor.

[0019] According to the present disclosure, compared with the prior art that uses analog circuits to generate a control signal for controlling the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched, the present disclosure obtains the voltage difference between the power supply voltage and the voltage actually applied to the load unit when the power supply state of the load unit is switched, and generates the control signal based on the voltage difference and the correlation relationship that can characterize the correlation between the voltage difference and the maximum number of transistors that need to be turned on. Thus, a digital circuit is used to generate the aforementioned control signal without the need to introduce an additional analog circuit, so the circuit structure is simple, and a higher working power supply voltage is not required, so the solution of the present disclosure can be implemented at a low voltage, and the working power supply voltage, power consumption and layout area can be reduced.

[0020] Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0022] Figure 1 A schematic diagram showing the circuit structure of a CPU that uses an analog circuit to generate a control signal.

[0023] Figure 2 A flowchart illustrating a processing method applied to a CPU according to an exemplary embodiment.

[0024] Figure 3 A circuit structure diagram of a CPU according to an exemplary embodiment is shown.

[0025] Figure 4 A circuit structure diagram of a CPU according to an exemplary embodiment is shown.

[0026] Figure 5 A circuit structure diagram of a CPU according to an exemplary embodiment is shown. DETAILED DESCRIPTION

[0027] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0028] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0029] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0030] Figure 1 FIG. 2 shows a schematic diagram of a circuit structure of a CPU that uses an analog circuit to generate a control signal. Figure 1 As shown, the circuit structure may include a Dummy DLDO (fake DLDO) and a main DLDO. The Dummy DLDO may include a PMOS power transistor M0<31:0>, a resistor R0, a comparator, a Dummy DLDO logic control unit, a binary thermometer code converter, and a set of inverters. The main DLDO may include a PMOS power transistor M1<31:0>, a resistor R1<31:0>, a comparator, a Dummy DLDO logic control unit, a binary thermometer code converter, and a set of inverters. <n:0>, DLDO logic control unit, and CPU core (CPUcore).

[0031] It should be understood that the above-mentioned devices included in the Dummy DLDO constitute a negative feedback loop. The negative feedback loop uses resistor R0 to simulate the equivalent resistance of the maximum load of the CPU Core as a load unit under the current power supply conditions, and the number of power transistors M0 used is much smaller than the number of power transistors M1 in the main DLDO, and the number of transistors M0 can be in a certain proportion to the number of transistors M1. For example, if the current capacity of resistor R0 is one thousandth of the current capacity of the CPU core, the number of transistors M0 can be one thousandth of the number of transistors M1.

[0032] The signal S in the negative feedback loop is a control signal for controlling the maximum value of the number of transistors that are turned on, and represents a value related to the number of transistors that need to be turned on. In addition, the value represented by the control signal S is represented by multiple bits of data. For example, when 5 bits of data are used to represent the value of the control signal S, the control signal is represented as S<4:0>.

[0033] The negative feedback loop will eventually force the control signal S to stabilize at a set of values, so that VDDO_dummy stabilizes near VREF, slightly larger than VREF and closest to VREF. For example, when the control signal S represents the maximum value of the number of transistors that need to be turned on and uses 5-bit data to represent the value, the negative feedback loop will eventually force S<4:0> to stabilize at a set of values ​​of 5 bits, thereby, the loop determines the maximum value of the number of transistors that need to be turned on at this time through negative feedback self-adjustment.

[0034] After the Dummy DLDO generates the control signal, the DLDO logic control unit performs predetermined processing on the control signal S to obtain the number of transistors actually to be turned on in the power transistor M1 .

[0035] Therefore, as described in the background technology, the above-mentioned Dummy DLDO is used to generate the control signal, that is, the analog circuit is used to generate the control signal. Therefore, it is necessary to increase the working power supply VCC for the Dummy DLDO. The VCC is, for example, 1.8V, which is higher than the working power supply of the main DLDO. It can be seen that the use of the above-mentioned analog circuit to generate the control signal has a complex circuit structure, requires a higher working power supply voltage, consumes a lot of power, and has a large layout area.

[0036] Based on the awareness of the above problems, in order to solve the above problems, the present disclosure considers using a digital circuit to generate a control signal without using a Dummy DLDO.

[0037] The present disclosure has found that within the operating voltage range of DLDO, the maximum value of the number of transistors turned on represented by the control signal S is highly correlated with the voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit, but is weakly correlated with the specific voltage values ​​of the power supply voltage VCC and the voltage VDDO.

[0038] On this basis, the present disclosure considers using the aforementioned correlation and the voltage difference between the power supply voltage VCC and the voltage VDDO to generate the control signal S. Therefore, whenever the power supply state of the load unit is switched, it is only necessary to obtain the aforementioned voltage difference, and the control signal S can be generated using the obtained voltage difference and the aforementioned correlation.

[0039] For ease of understanding, the following combination Figure 2 to Figure 4 The technical solution of the present invention will be described in detail.

[0040] Figure 2 1 shows a flow chart of a processing method applied to a CPU according to an exemplary embodiment. The processing method can be executed by the CPU, such as Figure 2 As shown, the processing method may include the following steps:

[0041] In step S210 , when the power supply state of the load unit is switched, a voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit is obtained.

[0042] In this embodiment, the power supply voltage VCC and the voltage VDDO actually applied to the load unit can be obtained respectively, and then the difference between the two can be calculated, and the difference is the voltage difference mentioned above. Of course, the voltage difference between the power supply voltage VCC and the voltage VDDO can also be received from other components.

[0043] It should be understood that the present embodiment does not limit the method for obtaining the voltage difference, and the voltage difference may be obtained in any suitable manner that can obtain the above-mentioned voltage difference.

[0044] After the voltage difference between the power supply voltage VCC and the voltage VDDO is obtained in step S210 , the following step S220 may be performed.

[0045] In step S220, a control signal S for controlling the maximum number of transistors that are turned on is generated based on the association relationship and the acquired voltage difference, wherein the association relationship can characterize the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

[0046] In this embodiment, the control signal S can be generated according to the association relationship and the obtained voltage difference to control the number of transistors turned on that is increased or decreased when the load current is changed. Since the association relationship can characterize the correlation between the maximum number of transistors turned on and the voltage difference, as long as the voltage difference is obtained in response to the switching of the power supply state of the load unit, the association relationship and the voltage difference can be used to generate a control signal S corresponding to the voltage difference.

[0047] According to this embodiment, compared with the prior art that uses an analog circuit to generate a control signal for controlling the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched, this embodiment uses a digital circuit to generate the aforementioned control signal without the need to additionally introduce an analog circuit. Therefore, the circuit structure is simple and does not require a higher operating power supply voltage. Therefore, the solution of this embodiment can be implemented at a low voltage, and the operating power supply voltage, power consumption and layout area can be reduced.

[0048] For example, in Figure 1 In the Dummy DLDO, a 1.8V power supply VCC and a 1.2V power supply VCC are required. In contrast, in this embodiment, since a digital circuit is used to implement it, there is no need to use an analog circuit, and naturally there is no need to use the 1.8V power supply VCC used by the analog circuit, and only a 1.2V power supply is required, thereby simplifying the circuit structure, not requiring a higher operating power supply voltage, and thus reducing the operating power supply voltage. In addition, since a digital circuit is used to implement it, a complex device structure is not required, so the layout area and power consumption can be reduced.

[0049] In a possible implementation, the control signal S represents the maximum value of the number of transistors that are turned on under the power supply conditions of the power supply voltage and the voltage actually applied to the load unit. Therefore, this embodiment can generate a control signal for controlling the maximum value of the number of transistors that are turned on according to the association relationship and the obtained voltage difference.

[0050] In a possible implementation, the value corresponding to the control signal S may be represented by data of any bit. In this embodiment, the control signal S may be represented by 5-bit data, and accordingly, the control signal may be S<4:0>.

[0051] In one possible implementation, the association relationship is a fitting curve pre-constructed through simulation that can fit the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit.

[0052] In this embodiment, a fitting curve that can characterize the correlation relationship can be constructed in advance through simulation. For example, simulation can be performed to obtain the maximum value of the number of transistors that need to be turned on for the voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit under different voltage conditions, thereby obtaining several sets of data values ​​of the voltage difference and the maximum value of the number of transistors that need to be turned on, and then the obtained data value list is used to fit the obtained list to the curve using the least squares method, thereby constructing the relationship between the aforementioned voltage difference and the aforementioned number, thereby constructing the above-mentioned fitting curve.

[0053] It should be understood that for curve fitting, the smaller the interval of the voltage difference is, the closer the fitting curve is to the corresponding relationship between the maximum number of transistors that need to be turned on and the voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit.

[0054] Exemplarily, x can be set equal to the voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit, that is, x=VCC-VDDO, and y is set to represent the control signal S<4:0> for controlling the maximum number of transistors to be turned on, that is, y=S<4:0>. Both x and y are in decimal, and the calculated y can be converted into binary.

[0055] The y values ​​for different x values ​​are obtained through simulation. Then, the obtained x and y values ​​are tabulated, and the least square method is used to fit the x and y data in the obtained list to obtain the following relationship between x and y: Y = ax 4 +bx 3 +cx 2 +dx+e, where a, b, c, d, and e represent coefficients and can be positive or negative, and change with changes in the processing technology and with switching of the power supply state of the load unit.

[0056] It should be understood that since the aforementioned coefficients change with changes in the processing technology and / or switching of the load unit, when the processing technology changes and / or the load unit is switched, the aforementioned coefficients can be changed accordingly, and the control signal S can be determined using the changed coefficients and the above relationship.

[0057] Therefore, compared with the prior art, this embodiment is easier to implement, and the migration between various circuit processes is very convenient, and only the above coefficients need to be changed.

[0058] For example, some simulation data used to construct the fitting curve can be found in Table 1 below:

[0059] Table 1

[0060] VCC VDDO s＜4:0＞ Decimal 1.4 0.95 00011 3 1.4 0.9 00010 2 1.4 0.85 00010 2 1.4 0.8 00010 2 1.4 0.75 00010 2 1.4 0.7 00001 1 1.4 0.65 00001 1 1.4 0.585 00001 1 1.3 0.95 00100 4 1.3 0.9 00011 3 1.3 0.85 00011 3 1.3 0.8 00010 2 1.3 0.75 00010 2 1.3 0.7 00010 2 1.3 0.65 00010 2 1.3 0.5854 00001 1 1.2 0.95 00101 5 0.95 0.65 00100 4 0.95 0.585 00011 3 0.9 0.8 01101 13 0.9 0.75 01000 8 0.9 0.7 00110 6 0.9 0.65 00100 4 0.9 0.585 00011 3 0.85 0.75 01101 13 0.85 0.7 01000 8 0.85 0.65 00110 6 0.85 0.585 00100 4 0.3 0.7 01101 13 0.8 0.65 01000 8 0.8 0.585 00110 6 0.75 0.65 01101 13 0.75 0.585 01000 8

[0061] The data in Table 1 can be fitted by the least square method, thereby obtaining the following relationship between x and y: y = 347.88x 4 -732.03x 3 +561.08x 2 -192.04x+28.007.

[0062] In a possible implementation, after generating a control signal for controlling the maximum number of transistors turned on according to the association relationship and the acquired voltage difference, the processing method may further include: adjusting the number of transistors turned on according to the control signal.

[0063] In this embodiment, the maximum number of transistors that are turned on can be calculated based on the control signal, and then adjusted according to a certain proportion of the maximum number according to the change in the load state to meet the power demand caused by the power supply state switching of the load unit under the VCC / VDDO voltage condition.

[0064] In a possible implementation, adjusting the number of transistors turned on according to the control signal may include: when the power supply state of the load unit switches from light load to heavy load, increasing the number of transistors turned on by the product of the number corresponding to the control signal and a first ratio. Exemplarily, the first ratio is less than 1.

[0065] In this embodiment, when the power supply state of the load unit is switched from light load to heavy load, it means that the load increases. At this time, the number of transistors turned on needs to be increased to meet the power increase demand caused by the switching of the power supply state of the load unit. Therefore, the number of transistors turned on is increased proportionally according to the control signal S. The larger the number corresponding to the control signal S, the more the number of transistors turned on increases. Correspondingly, the smaller the number corresponding to the control signal S, the less the number of transistors turned on increases. In this way, it can be ensured that the increased number of transistors turned on is as close as possible to the demand of load changes, and it is prevented that too many or too few transistors turned on are added, resulting in drastic fluctuations in the VDDO voltage.

[0066] As a result, the number of transistors to be turned on can be increased more accurately, thereby reducing the fluctuation of DLDO.

[0067] In a possible implementation, adjusting the number of transistors turned on according to the control signal may include: when the power supply state of the load unit switches from heavy load to light load, making the number of transistors turned on reduced equal to the product of the number corresponding to the control signal and a second ratio. Exemplarily, the second ratio is less than 1.

[0068] In this embodiment, when the power supply state of the load unit is switched from heavy load to light load, it means that the load is reduced. At this time, the number of transistors turned on needs to be reduced to meet the power reduction requirement brought about by the switching of the power supply state of the load unit. Therefore, the number of transistors turned on is reduced proportionally according to the control signal S. The larger the number corresponding to the control signal S, the more the number of transistors turned on is reduced. Correspondingly, the smaller the number corresponding to the control signal S, the less the number of transistors turned on is reduced.

[0069] As a result, the number of transistors to be turned on can be reduced more accurately, thereby reducing the fluctuation of DLDO.

[0070] It can be understood that the above-mentioned various method embodiments mentioned in the present disclosure can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present disclosure will not go into details.

[0071] Those skilled in the art will appreciate that, in the above method of specific implementation, the order in which the steps are written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of the steps should be determined by their functions and possible internal logic.

[0072] Figure 3 FIG. 2 shows a schematic diagram of a circuit structure of a CPU according to an exemplary embodiment. Figure 3 As shown, the circuit of the CPU of this exemplary embodiment may include a Digital DLDO, wherein the Digital DLDO may include an acquisition module 310 and a generation module 320 .

[0073] The acquisition module 310 is used to acquire the voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit when the power supply state of the load unit, such as the working voltage, is switched. The generation module 320 is connected to the acquisition module 310 and is used to generate a control signal S for controlling the maximum number of transistors to be turned on according to the association relationship and the acquired voltage difference VDDO, wherein the association relationship can characterize the association between the maximum number of transistors that need to be turned on when the power supply state of the load unit, such as the working voltage, is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

[0074] In a possible implementation, the control signal S represents a maximum value of the number of transistors that are turned on under the supply conditions of the power supply voltage and the voltage actually applied to the load unit.

[0075] In one possible implementation, the association relationship is a fitting curve pre-constructed through simulation that can fit the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage VCC and the voltage VDDO actually applied to the load unit.

[0076] In a possible implementation, the fitting curve is: y=ax 4 +bx 3 +cx 2 +dx+e, wherein y represents the control signal, x represents the voltage difference between the power supply voltage and the voltage actually applied to the load unit, a, b, c, d, e represent coefficients, which can be positive or negative, and a, b, c, d, e change with changes in the processing technology and with switching of the power supply state of the load unit.

[0077] Figure 4 FIG. 1 is a schematic diagram showing a circuit structure of a CPU according to an exemplary embodiment. Figure 3 , Figure 4 The CPU circuit in the embodiment may further include a main DLDO. For details about the structure of Digital DLDO, please refer to the above description. Figure 3 The description will not be repeated here.

[0078] like Figure 4 As shown, the main DLDO may include: a DLDO logic control unit 330 (corresponding to an adjustment module), configured to adjust the number of transistors turned on according to a control signal S provided by the Digital DLDO.

[0079] In a possible implementation, the DLDO logic control unit 330 is configured to: when the power supply state of the load unit is switched from light load to heavy load, increase the number of transistors turned on to be the product of the number corresponding to the control signal and the first ratio.

[0080] In a possible implementation, the DLDO logic control unit 330 is configured to: when the power supply state of the load unit is switched from heavy load to light load, reduce the number of transistors turned on to be the product of the number corresponding to the control signal and the second ratio.

[0081] The above description is for the case of a single CPU core. However, the CPU in a current computer generally has multiple CPU cores, and the working states of each CPU are not the same during operation. For example, in terms of operating frequency, some CPU cores have high operating frequencies, while others have low operating frequencies. CPU cores with high operating frequencies require high minimum operating voltages, while CPU cores with low operating frequencies require low minimum operating voltages. When only one power supply VCC is set to facilitate power supply, it is impossible to control the power supply voltage VDDO of each CPU core individually.

[0082] In order to reduce the power consumption of the entire CPU, the present disclosure considers designing multiple DLDOs, each DLDO supplies power to a corresponding CPU core, so that the power supply voltage of each CPU core can be adjusted individually, and each CPU core in different working states can have a different power supply voltage.

[0083] Figure 5 FIG. 1 is a schematic diagram showing a circuit structure of a CPU according to an exemplary embodiment. Figure 4 , Figure 5 The CPU in the system has multiple CPU cores, and respective DLDOs are set for each of the multiple CPU cores. The structure of DLDO is similar to Figure 4 The structure of the main DLDO in Figure 4 The digital DLDO and DLDO logic control unit in the system are combined into the control logic. The specific structure of DLDO can be found in the previous article about Figure 4 The description will not be repeated here.

[0084] exist Figure 5 In the example, the CPU includes multiple CPU cores as load units. A respective DLDO is set for CPU core 1, CPU core 2, ..., CPU core m. Each DLDO has the following characteristics: Figure 3 The acquisition module and generation module shown.

[0085] In a possible implementation, there are multiple CPU cores serving as load units, and the acquisition module and the generation module are respectively provided for the load units.

[0086] By setting control logic 1, control logic 2, ... control logic m for CPU core 1, CPU core 2 ... CPU core m, respectively, the control signal S<4:0> for controlling the maximum number of transistors that are turned on is calculated, so that each CPU core has a different power supply voltage VDD1, VDDO2, ... VDDOm adapted to its working state. The CPU core with a high working frequency requires a high minimum working voltage, and the CPU core with a low working frequency requires a low minimum working voltage. By adjusting the power supply voltage VDDO of each CPU core, the VDDO of the CPU core with a high working frequency can be set high to ensure its working requirements, and the VDDO of the CPU core with a low working frequency can be set low, thereby reducing its working current and thus reducing power consumption.

[0087] The above control signal S<4:0> is used to characterize the maximum load current allowed by the load CPU core at a certain VCC / VDDO, such as the maximum operating current that may occur at each certain operating frequency. However, in the actual operation of the CPU core, although the operating frequency remains unchanged, the operating current of the CPU core will still switch between light load and heavy load according to the different tasks and working states being processed. In order to ensure that the VDDO voltage of the CPU core remains as stable as possible during the switching process between light load and heavy load, it is necessary to continuously adjust the number of on-state transistors so that the number matches the current load of the CPU core at this time. In order to match the number of on-state transistors after adjustment with the change of the current load of the CPU core, it can be selected to adjust according to a certain proportion of the maximum operating current at the operating frequency, so that when the operating frequency is high, the number of transistors adjusted each time is large, and when the operating frequency is low, the number of transistors adjusted each time is small. Since the number of transistors adjusted each time matches the change of the current load of the CPU core well, the fluctuation of VDDO becomes smaller.

[0088] In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to execute the method described in the above method embodiments. The specific implementation can refer to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0089] The present disclosure also proposes an electronic device, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to implement the above-mentioned processing method when executing the instructions stored in the memory.

[0090] The embodiment of the present disclosure further provides a computer-readable storage medium storing computer program instructions, which implement the above processing method when executed by a processor.

[0091] The embodiment of the present disclosure also provides a computer program product, which includes computer program instructions, and the computer program instructions implement the above processing method when executed by a processor.

[0092] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A processing method, applied to a CPU, characterized in that: include: When the power supply state of the load unit is switched, obtaining a voltage difference between the power supply voltage and the voltage actually applied to the load unit; as well as A control signal for controlling the maximum number of transistors that are turned on is generated based on the association relationship and the acquired voltage difference, wherein the association relationship represents the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

2. The processing method according to claim 1, characterized in that: Also includes: According to the control signal, the number of transistors turned on is adjusted.

3. The processing method according to claim 2, characterized in that: According to the control signal, adjusting the number of transistors turned on includes: When the power supply state of the load unit is switched from light load to heavy load, the number of transistors that are increased to be turned on is the product of the number corresponding to the control signal and the first ratio.

4. The processing method according to claim 2, characterized in that: According to the control signal, adjusting the number of transistors turned on includes: When the power supply state of the load unit is switched from heavy load to light load, the number of transistors turned on is reduced to the product of the number corresponding to the control signal and the second ratio.

5. The processing method according to claim 1, characterized in that: The control signal indicates a maximum value of the number of transistors that are turned on under the supply condition of the power supply voltage and the voltage actually applied to the load unit.

6. The processing method according to any one of claims 1 to 5, characterized in that: The association relationship is a fitting curve constructed in advance through simulation, which can fit the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

7. The processing method according to claim 6, characterized in that: The fitting curve is: y=ax 4 +bx 3 +cx 2 +dx+e; Wherein, y represents the control signal, x represents the voltage difference between the power supply voltage and the voltage actually applied to the load unit, a, b, c, d, e represent coefficients, and a, b, c, d, e change with changes in the processing technology and with switching of the power supply state of the load unit.

8. A CPU, characterized in that: include: An acquisition module, used for acquiring a voltage difference between a power supply voltage and a voltage actually applied to the load unit when the power supply state of the load unit is switched; as well as A generating module is used to generate a control signal for controlling the maximum number of transistors to be turned on according to an association relationship and an acquired voltage difference, wherein the association relationship represents the correlation between the maximum number of transistors that need to be turned on when the power supply state of the load unit is switched and the voltage difference between the power supply voltage and the voltage actually applied to the load unit.

9. The CPU according to claim 8, characterized in that: Also includes: The adjustment module is used to adjust the number of transistors that are turned on according to the control signal.

10. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to implement the processing method described in any one of claims 1-7 when executing the instructions stored in the memory.

11. A computer-readable storage medium storing computer program instructions, characterized in that: When the computer program instructions are executed by a processor, the processing method according to any one of claims 1 to 7 is implemented.

12. A computer program product comprising computer program instructions, characterized in that: When the computer program instructions are executed by a processor, the processing method according to any one of claims 1 to 7 is implemented.

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