A loop execution method, system, program product, medium and device

Abstract

The present invention provides a loop body execution method, system, program product, medium and device. The loop body execution method automatically infers the loop body, does not require any modification to the instruction set or compiler, has no additional requirements for programming, and expands the scope of application; uses a loop buffer to cache loop body instructions, removes loop variable accumulation instructions and comparison instructions, accelerates the execution of the loop, and avoids fetching instructions from the memory each time, further improves the operating efficiency, and reduces power consumption. It also detects whether the instruction in the destination address is in the fail buffer, whether the loop buffer is full, whether multiple immediate number operations are performed on one of the two operands, or whether an immediate number operation is performed on one operand and then an immediate number operation is performed on the other operand, to ensure the correctness of the loop, reduce meaningless comparisons, and further increase execution efficiency.

Description

Technical Field

[0001] The present invention relates to the field of digital signal processing, and in particular to a loop execution method, system, program product, medium and device. Background Art

[0002] Artificial intelligence (AI) computing has important significance and wide-ranging effects. AI computing can quickly identify, process and analyze large amounts of data, improving computing efficiency and accuracy. For example, in the financial industry, AI computing predicts stock prices by analyzing historical transaction records and market conditions to support investment decisions. In addition, AI computing technology extracts new insights and generates new capabilities from large data sets through machine learning algorithms. For example, American Express uses AI computing to detect fraud in credit card transactions. In addition, AI computing has been widely used in various fields such as healthcare, education, and transportation. In the medical field, AI computing can make accurate judgments on patients' conditions, diagnoses, and treatment plans through data analysis, thereby improving patients' survival rates.

[0003] In the execution of AI computing for applications, it is common to process loops, especially a large number of matrix and vector operations, which are calculated element by element through loops during implementation. Generally, in addition to the data operation instructions in the middle of the loop body, the loop body needs to accumulate the loop variables and make a judgment at the end of the loop body. In a short loop, the overhead caused by the accumulation of the number of loops and the judgment of whether the loop has ended will have a great impact on performance. In addition, in order to speed up the execution of the program, branch instructions (loop jump instructions) are often executed by speculation, that is, without waiting for the execution result of the instruction, it is directly inferred (predicted) to decide whether to jump out of the loop. When the speculation is wrong, it will cause flushing of the pipeline, further loss of performance.

[0004] Some central processing units (CPUs) provide special instructions for loops. For example, the x86 instruction set provides instructions starting with REP, and specifies counters for loops to help accelerate the execution of loop blocks. However, not all CPUs (such as RISCV) provide such instructions. Patent CN107450888B proposes a zero-overhead loop in an embedded digital signal processor, but its operation is based on the presence of loop instructions. When such instructions do not exist in the instruction set, the method is invalid. Therefore, a more widely used effective AI operation acceleration method for loops is needed. Summary of the invention

[0005] In view of the deficiencies in the prior art, the present invention provides a loop execution method, system, program product, medium and device, which mainly solves the problem in the prior art of lacking a more widely used effective AI operation acceleration method for loops.

[0006] The objective of the present invention is achieved through the following solutions:

[0007] In a first aspect, according to an embodiment of the present invention, a loop execution method is provided, comprising the following steps: S1, in response to detecting a branch instruction, determining whether the jump destination address of the branch instruction is less than the program counter of the branch instruction; if so, recording the program counter of the branch instruction in a loop end position register, recording two operands in the branch instruction, and recording the type of comparison of the jump condition in the branch instruction in a loop comparator; S2, jumping to the destination address to fetch a new instruction, determining whether to perform an immediate operation on one of the two operands; if so, storing the operand to be subjected to the immediate operation in a loop comparator; The step of step 100 comprises: first, storing the new instruction in the loop data register, storing another operand in the constant register, and storing the immediate number in the step register; if not, storing the new instruction in the loop buffer, and sequentially fetching the next instruction; S3, determining whether the program counter of the next instruction is less than the program counter of the branch instruction, and if so, repeating step S2; S4, when the program counter of the next instruction is equal to the program counter of the branch instruction, directly fetching the instruction from the loop buffer for execution, and simultaneously accumulating the operands in the loop data register, and determining whether the accumulated operands meet the judgment condition of the branch instruction based on the loop comparator.

[0008] According to an embodiment of the present invention, the loop body execution method also includes: in S2, detecting whether the instruction in the destination address is in the failure buffer, and if so, skipping the remaining steps, wherein the failure buffer is used to store the program counter of the most recently detected backward jump instruction but not a loop, and the backward jump is a jump whose destination address is smaller than the program counter of the branch instruction.

[0009] According to an embodiment of the present invention, the types of comparison include greater than, less than, equal to, greater than or equal to, and less than or equal to.

[0010] According to an embodiment of the present invention, the immediate number operation includes an immediate number addition operation and an immediate number subtraction operation.

[0011] According to an embodiment of the present invention, the immediate number operation is performed using an adder.

[0012] According to an embodiment of the present invention, when the immediate number operation is an immediate number subtraction operation, an addition operation is performed using the complement of the immediate number.

[0013] According to an embodiment of the present invention, the immediate value may be any non-zero integer.

[0014] According to an embodiment of the present invention, the loop body execution method also includes: in step S2, when the loop buffer is full and the address of the next instruction is less than the value in the loop body end position register, the value in the loop body end position register is placed in the failure buffer and the remaining steps are skipped.

[0015] According to an embodiment of the present invention, the loop execution method further includes: in step S2, when multiple immediate operations are performed on one of the two operands, the value in the loop end position register is placed in a failure buffer and the remaining steps are skipped.

[0016] According to an embodiment of the present invention, the loop execution method also includes: in S4, when an immediate number operation is performed on the one operand and then an immediate number operation is performed on the other operand, the value in the loop end position register is placed in a failure buffer and the remaining steps are skipped.

[0017] In a second aspect, according to another embodiment of the present invention, a loop body execution system based on branch instruction detection is provided, comprising: a loop controller, which executes a program using a loop body execution method as described in the first aspect; a loop comparator, which is used to determine the loop termination condition; a loop adder, which is used to accumulate loop variables; a loop body end position register, which is used to store the program counter of the last branch instruction of the loop body; a loop buffer, which is used to temporarily store the instructions of the loop body; a fail buffer, which is used to temporarily store the program counter of the backward jump branch instruction that was recently judged to be non-loop; a loop data register, which is used to store the value of the loop accumulation variable; a constant register, which is used to store the value of the loop threshold constant; and a step register, which is used to store the step length of the loop variable accumulation.

[0018] According to a third aspect, a computer program product is provided according to another embodiment of the present invention. The computer program product includes a computer program code. When the computer program code runs on an electronic device, the electronic device executes the method as described in the first aspect.

[0019] In a fourth aspect, according to another embodiment of the present invention, there is provided a computer-readable storage medium having a computer program stored thereon, wherein the computer program can be executed by a processor to implement the steps of the method described in the first aspect.

[0020] In the fifth aspect, according to another embodiment of the present invention, an electronic device is provided, comprising: one or more processors; and a memory, wherein the memory is used to store executable instructions; the one or more processors are configured to implement the steps of the method described in the first aspect by executing the executable instructions.

[0021] Compared with the prior art, the present invention has the following beneficial effects: by automatically inferring the loop body, no modification of the instruction set or compiler is required, no additional requirements are placed on programming, and the scope of application is expanded; a loop buffer is used to cache loop body instructions, loop variable accumulation instructions and comparison instructions are eliminated, the execution of the loop is accelerated, and instruction fetching from the memory is avoided each time, thereby further improving operating efficiency and reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The embodiments of the present invention are further described below with reference to the accompanying drawings:

[0023] Figure 1 A schematic flow chart of a loop execution method based on branch instruction detection according to an embodiment of the present invention;

[0024] Figure 2 Schematic diagram of a loop execution system based on branch instruction detection according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] Before proceeding to the following detailed description, it may be advantageous to set forth the definitions of certain words and phrases used throughout this patent document. The terms "coupling", "connection" and their derivatives refer to any direct or indirect communication or connection between two or more elements, regardless of whether those elements are in physical contact with each other. The terms "transmission", "reception" and "communication" and their derivatives cover direct and indirect communication. The terms "include" and "comprising" and their derivatives refer to including but not limited to. The term "or" is inclusive, meaning and / or. The phrase "associated with..." and its derivatives refer to including, including within, interconnecting, containing, contained within, connecting or connecting with, coupling or coupling with, communicating with, cooperating, interweaving, parallel, close to, binding or binding with, having, having attributes, having a relationship or having a relationship with, etc. The term "controller" refers to any device, system or part thereof that controls at least one operation. Such a controller can be implemented with hardware, or a combination of hardware and software and / or firmware. The functions associated with any particular controller can be centralized or distributed, whether local or remote. The phrase "at least one of", when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one of the items in the list may be required. For example, "at least one of A, B, C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.

[0026] Definitions for other specific words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior and future uses of such defined words and phrases.

[0027] In this patent document, the application combination of modules and the division level of sub-modules are only used for illustration, and the application combination of modules and the division level of sub-modules may have different forms without departing from the scope of the present disclosure.

[0028] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below through specific embodiments in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0029] In order to explain the present invention more clearly, the loop instruction segment execution method in the prior art is first reviewed.

[0030] For example, a for loop is executed 100 times, in which the vector addition of b[i] and c[i] is performed:

[0031] for(i=0;i<100,i++){

[0032] A[i]=b[i]+c[i]

[0033] }

[0034] After compilation, the above instruction block will form a string of instruction codes. The approximate assembly pseudo code is as follows:

[0035] X10=0;#corresponds to i=0

[0036] X20=100; #Number of cycles

[0037] Loop: #loop body

[0038] LOAD X12,(B_ADDR)#Put B into register X12

[0039] LOAD X13,(C_ADDR)#Put C into register X13

[0040] ADD X11,X12,X13#Calculate A=B+C, and put the result into X11

[0041] STORE(A_ADDR),x11#store the result back to memory

[0042] Add A_ADDR,A_ADDR,1#Address accumulation

[0043] ADD B_ADDR, B_ADDR, 1#Address accumulation

[0044] ADD C_ADDR,C_ADDR,1#Address accumulation

[0045] ADD X10,X10,1#i=i+1, enter the next cycle

[0046] BLT X10, X20, Loop#If it is less than 100, go back to the Loop to calculate the next set of elements

[0047] It can be seen that, except for the middle A[I]=b[i]+c[i], the for statement needs to accumulate the variable i and make a judgment at the end of the loop body. As described in the background technology, in a short loop, the overhead caused by the accumulation of the number of loops and the judgment of whether the loop has ended will have a great impact on performance. In addition, executing branch instructions by speculative methods may further lose performance. Therefore, the prior art lacks a more widely used effective AI computing acceleration method for loops.

[0048] Regarding the above issues, Figure 1 As shown, according to an embodiment of the present invention, a loop body execution method is provided, comprising the following steps: S1, in response to detecting a branch instruction, determining whether the jump destination address of the branch instruction is less than the program counter of the branch instruction; if so, recording the program counter of the branch instruction in the loop body end position register, recording the two operands in the branch instruction, and recording the type of comparison of the jump condition in the branch instruction in the loop comparator; S2, jumping to the destination address to fetch a new instruction, determining whether to perform an immediate operation on one of the two operands; if so, storing the operand to be operated on immediately in the loop comparator; loop data register, store another operand into the constant register, and store the immediate number into the step register; if not, store the new instruction into the loop buffer and fetch the next instruction in sequence; S3, determine whether the program counter of the next instruction is less than the program counter of the branch instruction, if so, repeat step S2; S4, when the program counter of the next instruction is equal to the program counter of the branch instruction, directly fetch the instruction from the loop buffer for execution, and at the same time accumulate the operands in the loop data register, and determine whether the accumulated operands meet the judgment condition of the branch instruction based on the loop comparator.

[0049] By automatically inferring the loop body, there is no need to modify the instruction set or compiler, and there are no additional requirements for programming, which expands the scope of application; using the loop buffer to cache the loop body instructions, eliminating the loop variable accumulation instructions and comparison instructions, speeding up the execution of the loop, and avoiding each instruction fetch from the memory, further improving the operating efficiency and reducing power consumption.

[0050] In addition, in order to reduce meaningless comparisons and further increase execution efficiency, according to an embodiment of the present invention, the loop body execution method also includes: in S2, detecting whether the instruction in the destination address is in the fail buffer, and if so, skipping the remaining steps, wherein the fail buffer is used to store the program counter of the most recently detected instruction of a backward jump but not a loop, and a backward jump is a jump whose destination address is smaller than the program counter of the branch instruction.

[0051] In order to enhance the adaptability of the loop execution method, according to an embodiment of the present invention, the types of comparison include greater than, less than, equal to, greater than or equal to, and less than or equal to. In addition, other judgment methods for loop end conditions can also be supported according to actual usage scenarios.

[0052] According to an embodiment of the present invention, the immediate number operation includes an immediate number addition operation and an immediate number subtraction operation. The immediate number operation is used to jump to the next cycle. For the sake of versatility, whether it is an immediate number addition operation or an immediate number subtraction operation, according to an embodiment of the present invention, the immediate number operation is performed using an adder. According to an embodiment of the present invention, when the immediate number operation is an immediate number subtraction operation, the complement of the immediate number is used to perform the addition operation.

[0053] In addition, in order to increase the adaptability of the loop execution method, the immediate value can be any non-zero integer, that is, it can be added (subtracted) by 1 each time, or it can be added by 2 each time, and any non-zero integer can be selected and set according to the actual use scenario.

[0054] In addition, in order to ensure that the program execution does not exceed the hardware limit, according to an embodiment of the present invention, the loop execution method further includes: in the step S2, when the loop buffer is full and the address of the next instruction is less than the value in the loop end position register, the value in the loop end position register is placed in the fail buffer and the remaining steps are skipped. If this happens, it means that the program exceeds the range that the hardware can bear, and the reason may be that the loop body is too large or is not a loop at all.

[0055] In addition, in order to ensure the correctness of the loop, according to an embodiment of the present invention, the loop execution method further includes: in the step S2, when multiple immediate operations are performed on one of the two operands, the value in the loop end position register is placed in the failure buffer, and the remaining steps are skipped. It can be seen from the general definition that this situation does not meet the conditions of the general loop.

[0056] To further ensure the correctness of the loop, according to an embodiment of the present invention, the loop execution method further includes: in S4, when an immediate number operation is performed on the one operand and then an immediate number operation is performed on the other operand, the value in the loop end position register is placed in a failure buffer and the remaining steps are skipped. Similarly, this situation does not meet the conditions of a general loop.

[0057] According to another embodiment of the present invention, Figure 2 As shown, a loop body execution system based on branch instruction detection is provided, including: a loop controller (not shown), which executes a program using a loop body execution method as described above; a loop comparator (loop cmp), which is used to judge the loop termination condition (jump?); a loop adder (loop add), which is used to accumulate loop variables; a loop body end position register (not shown), which is used to store the program counter (loop pc) of the last branch instruction of the loop body; a loop buffer (loop buffer), which is used to temporarily store the instructions of the loop body; a fail buffer (failcmp), which is used to temporarily store the program counter of the backward jump branch instruction that is recently judged to be non-loop; a loop data register (acc_value), which is used to store the value of the loop accumulation variable; a constant register (const_value), which is used to store the value of the loop threshold constant; a step register (step), which is used to store the step length of the loop variable accumulation. It can be seen that the loop variable accumulation instruction and loop judgment in the original loop body are performed in the adder and the comparator, and other instructions (inst0-4) are placed in the loop buffer. By setting it in this way, it is not necessary to fetch values ​​from the memory, and the execution of instructions in the loop buffer and the loop variable accumulation instructions and loop judgment instructions can be performed simultaneously, thereby improving the execution efficiency.

[0058] According to another embodiment of the present invention, a computer program product is provided. The computer program product includes computer program code. When the computer program code is executed on an electronic device, the electronic device executes a loop execution method as described above.

[0059] According to another embodiment of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. The computer program can be executed by a processor to implement the steps of a loop execution method as described above.

[0060] According to another embodiment of the present invention, there is provided an electronic device, comprising: one or more processors; and a memory, wherein the memory is used to store executable instructions; the one or more processors are configured to implement the steps of a loop execution method as described above by executing the executable instructions.

[0061] The present invention may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present invention.

[0062] Computer readable storage medium can be a tangible device that holds and stores instructions used by an instruction execution device. Computer readable storage medium can include, for example, but is not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (non-exhaustive list) of computer readable storage medium include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, for example, a punch card or a protruding structure in a groove on which instructions are stored, and any suitable combination thereof.

[0063] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A loop execution method, characterized in that: The following steps are involved: S1. In response to detecting a branch instruction, determining whether the jump destination address of the branch instruction is less than the program counter of the branch instruction, and if so, recording the program counter of the branch instruction in a loop body end position register, recording two operands in the branch instruction, and recording the type of comparison of the jump condition in the branch instruction in a loop comparator; S2, jump to the destination address to fetch a new instruction, determine whether to perform an immediate operation on one of the two operands: if yes, store the operand to be operated on immediately into the loop data register, store the other operand into the constant register, and store the immediate number into the step register; if no, store the new instruction into the loop buffer, and fetch the next instruction in sequence; S3, determine whether the program counter of the next instruction is less than the program counter of the branch instruction, if so, repeat step S2; S4. When the program counter of the next instruction is equal to the program counter of the branch instruction, the instruction is directly fetched from the loop buffer for execution, and the operands in the loop data register are accumulated at the same time, and it is determined based on the loop comparator whether the accumulated operands meet the judgment condition of the branch instruction.

2. A loop execution method according to claim 1, characterized in that: Also includes: In S2, it is detected whether the instruction in the destination address is in the failure buffer. If so, the remaining steps are skipped, wherein the failure buffer is used to store the program counter of the most recently detected instruction of a backward jump but not a loop, wherein a backward jump is a jump whose destination address is smaller than the program counter of the branch instruction.

3. A loop execution method according to claim 1, characterized in that: The types of comparison include greater than, less than, equal to, greater than or equal to, and less than or equal to.

4. A loop execution method according to claim 1, characterized in that: The immediate number operation includes an immediate number addition operation and an immediate number subtraction operation.

5. A loop execution method according to claim 4, characterized in that: The immediate operation is performed using an adder.

6. A loop execution method according to claim 5, characterized in that: When the immediate number operation is an immediate number subtraction operation, an addition operation is performed using the complement of the immediate number.

7. A loop execution method according to claim 1, characterized in that: The immediate value can be any non-zero integer.

8. A loop execution method according to claim 1, characterized in that: Also includes: In step S2, when the loop buffer is full and the address of the next instruction is smaller than the value in the loop body end position register, the value in the loop body end position register is placed in the fail buffer and the remaining steps are skipped.

9. A loop execution method according to claim 1, characterized in that: Also includes: In step S2, when multiple immediate operations are performed on one of the two operands, the value in the loop end position register is placed in the failure buffer, and the remaining steps are skipped.

10. A loop execution method according to claim 1, characterized in that: Also includes: In S4, when an immediate number operation is performed on the one operand and then an immediate number operation is performed on the other operand, the value in the loop end position register is placed in the failure buffer, and the remaining steps are skipped.

11. A loop execution system based on branch instruction detection, characterized in that: include: A loop controller, executing a program using a loop execution method as claimed in any one of claims 1 to 10; Loop comparator, used to determine the loop termination condition; Circular adder, used for accumulation of loop variables; The loop body end position register is used to store the program counter of the last branch instruction of the loop body; A loop buffer, used to temporarily store the instructions of the loop body; a fail buffer for temporarily storing the program counter of the most recent backward jump branch instruction determined to be non-loop; Loop data register, used to store the value of the loop accumulation variable; A constant register, used to store the value of the loop threshold constant; The step register is used to store the step length of the loop variable accumulation.

12. A computer program product, characterized in that The computer program product comprises a computer program code, and when the computer program code is run on an electronic device, the electronic device is enabled to perform the method according to any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and the computer program can be executed by a processor to implement the steps of the method according to any one of claims 1 to 10.

14. An electronic device, characterized in that: include: one or more processors; as well as A memory, wherein the memory is used to store executable instructions; The one or more processors are configured to implement the steps of the method of any one of claims 1-11 by executing the executable instructions.

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