A DPU RDMA simulation verification method and system
By providing RDMA simulation verification methods and systems on the DPU, using data plane development components and virtual machine supervisors to simulate and verify RDMA applications, the complex and inefficient RDMA verification in the prior art is solved, and a simplified verification process and efficient testing capabilities are achieved.
Patent Information
- Application Number
- CN202411584926.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-07
- Publication Date
- 2025-04-08
AI Technical Summary
In the prior art, RDMA verification results cannot be obtained simply and effectively, and it is difficult to write test cases by yourself and it is difficult to deal with tests in complex scenarios.
It provides a DPU RDMA simulation verification method and system. It receives instructions and data packets from RDMA applications sent by the virtual machine supervisor through the data plane development component, performs parsing simulation, encapsulation simulation and transmission resource management simulation, and transmits it to the hardware virtual layer based on the communication method of the file system to perform RDMA verification.
The RDMA verification process is simplified, the test case writing is reduced, and the testing is more in line with the use scenarios is possible, the verification efficiency and accuracy is improved, and the data transmission and processing process stability is improved through error analysis and feedback.
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Figure CN119783597A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of simulation verification technology, and in particular to a DPU RDMA simulation verification method and system. Background Art
[0002] RDMA (Remote Direct Memory Access) is a technology used in high-performance data center networks that allows a computer system to directly access the memory of another computer system without the intervention of the operating system, thereby achieving high bandwidth and extremely low latency. Remote direct memory access technology is one of the important supporting technologies for realizing the potential of DPU (Data Processing Unit) solutions; Data Processing Unit is an important part of modern computing, which can enhance data processing capabilities, improve data processing efficiency and performance, and help the central processing unit share data load; Remote Direct Memory Access chips are hardware devices specially designed to support Remote Direct Memory Access technology. These chips are usually integrated in network adapters or network cards, and are designed to provide high-performance and low-latency data transmission capabilities, especially in data centers and high-performance computing environments. For remote direct memory access chips, verification is an indispensable step. Verification of remote direct memory access chips mainly includes: protocol implementation verification, performance and latency characteristics verification, security verification, fault isolation and debugging, compatibility and interoperability verification, and standard compliance verification. In order to complete the above verification, a complete set of simulation verification platforms needs to be designed for remote direct memory access chips to ensure the functions and performance of remote direct memory access chips.
[0003] In the prior art, the RDMA simulation verification platform uses the system modeling language (SystemC) developed based on C++ to complete the implementation of the entire simulation framework, including hardware simulation abstraction, RDMA protocol simulation and simulation case writing; after the constructed test case passes through the RDMA protocol simulation layer also implemented in the SystemC language environment, the data is input into the device under test through the hardware virtual layer to complete the functional verification of the device under test; when the RDMA simulation verification framework is fully implemented using the SystemC language environment, its development environment will be limited by the SystemC language environment, and all test cases need to be written by themselves to complete the test verification of the device under test. Due to the complexity and particularity of the RDMA protocol itself, the workload of writing test cases and implementing the RDMA protocol is huge and the abnormal situation processing process is extremely complicated. Furthermore, the test cases written by themselves will inevitably have omissions, making it difficult to cope with tests in complex scenarios. Summary of the invention
[0004] In view of this, an embodiment of the present invention provides a DPU RDMA simulation verification method and system to eliminate or improve one or more defects in the prior art, and solves the problem that the prior art cannot simply and effectively obtain RDMA verification results.
[0005] One aspect of the present invention provides a RDMA simulation verification method for a DPU, the method is run on a data plane development component, the data plane development component is deployed on a computer loaded with the DPU, and the method comprises the following steps:
[0006] Receive the instructions and data packets of the RDMA application sent by the virtual machine supervisor, and obtain the target data packet after performing parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data packet in accordance with the instructions to meet the RDMA protocol; wherein the RDMA application is loaded by the virtual machine supervisor with an RDMA software driver for hardware virtualization and then runs as a simulation use case;
[0007] The target data message is transmitted to the hardware virtual layer based on the communication mode of the file system, and converted into the target format data message processed by the device under test during the RDMA verification process, so that the device under test can parse and obtain the protocol information of the target format data message, and execute the prescribed routing mode and application processing method based on the protocol information; the hardware virtual layer is constructed based on a preset program language;
[0008] Receiving a response message returned by a communication method based on the file system; the response message is constructed and encapsulated according to the processing result of the routing mode and the application processing method;
[0009] The data transmission process and data processing process of the device under test are analyzed for correctness, integrity and processing rate through the response message to obtain a verification result on the implementation of RDMA by the device under test.
[0010] In some embodiments, constructing and encapsulating the response message according to the routing mode and the processing result of the application processing method includes:
[0011] Transmitting the target format data message to a corresponding processing program through the routing mode for parsing to obtain a command type and request data of the target format data message;
[0012] The application processing method is executed on the request data according to the command type to obtain processing data, and the processing data is encapsulated layer by layer to obtain a response message.
[0013] In some embodiments, the analysis of the correctness, integrity and processing rate of the data transmission process and the data processing process of the device under test includes: analyzing whether the data of the data transmission process is correct and complete and whether the data processing process is correct and meets the expected processing rate. When the data of the data transmission process is correct and complete and the data processing process is correct and meets the expected processing rate, it indicates that the RDMA verification is passed.
[0014] In some embodiments, the method also includes: when there are data errors or incompleteness in the data transmission process and the data processing process, and the data processing process is erroneous or does not meet the expected processing rate, the error type, error occurrence time and error description in the response message are recorded, and the code and configuration of the device under test are analyzed to obtain the root cause of the error.
[0015] In some embodiments, the method further includes: feeding back the error type, error occurrence time, error description and root cause of the error in the response message to the processing end for processing and improvement, and monitoring the improved data processing process and data transmission process of the device under test.
[0016] On the other hand, the present invention also provides a DPU RDMA simulation verification system, the system comprising:
[0017] An application acquisition and transmission module, used to use the RDMA application as a simulation case and send the instructions and data messages of the RDMA application to the protocol simulation module;
[0018] A protocol simulation module, the module is used to execute the RDMA simulation verification method of the DPU, receive the instructions and data packets of the RDMA application, perform parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data packets to meet the RDMA protocol according to the instructions, and obtain the target data packets; receive the response message to analyze the correctness, integrity and processing rate of the data transmission process and data processing process of the component module under test, so as to obtain the verification result of the RDMA implementation of the component module under test;
[0019] A data communication module, used for transmitting the target data message to the component module under test based on the communication mode of the file system;
[0020] The component module under test is used to convert the target data message into a target format data message, parse the target format data message to obtain the protocol information of the target format data message, execute the specified routing mode and application processing method based on the protocol information, obtain a response message according to the processing result and transmit it to the protocol simulation module.
[0021] In some embodiments, the protocol simulation module further includes:
[0022] A fault detection component is used to detect data transmission faults and data processing faults when analyzing the correctness, integrity and processing rate of the data transmission process and the data processing procedure of the device under test.
[0023] In some embodiments, the system further comprises:
[0024] The cloud storage module is used to record and store the analysis results of the correctness, integrity and processing rate of the response message, the data transmission failure, the data processing failure and the failure handling method.
[0025] On the other hand, the present invention further provides a computer-readable storage medium having a computer program stored thereon, characterized in that the program implements the steps of any of the above methods when executed by a processor.
[0026] On the other hand, the present invention further provides a computer program product, comprising a computer program, which implements the steps of any of the above methods when executed by a processor.
[0027] The beneficial effects of the present invention are at least:
[0028] In the RDMA simulation verification method and system of the DPU of the present invention, the data plane development tool receives the instructions and data messages of the RDMA application sent by the virtual machine supervisor, the RDMA application is loaded by the virtual machine supervisor with an RDMA software driver for hardware virtualization and then runs as a simulation case, and the RDMA application is used as a test case of the device under test without constructing a test case by itself, which is conducive to making the test scenario more suitable for the use scenario and simplifying the RDMA verification process, and the data plane development component receives the instructions and data messages of the RDMA application and performs parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data message according to the instructions to obtain the target data message , the target data message is transmitted to the hardware virtual layer constructed under the preset program language in a communication mode based on the file system, and is converted into a target format data message processed in the RDMA verification process of the device under test. The communication mode based on the file system does not need to rely on the network protocol stack, but only copies the application layer data from one process to another process, providing a simple and efficient communication mode; the routing mode and the application processing method are executed according to the protocol information parsed from the target format data message, the processing result is constructed and encapsulated to obtain a response message, and the data transmission process and data processing procedure of the device under test are analyzed for correctness, integrity and processing rate, and the verification result of the RDMA implementation of the device under test is obtained according to the analysis result.
[0029] Furthermore, when the present invention detects that an error exists in the data transmission process and the data processing process, the error type, error occurrence time and error description in the response message are recorded, the code and configuration of the device under test are analyzed to obtain the root cause of the error and transmit it to the processing end for processing and monitoring, thereby improving the stability and reliability of the data transmission process and the data processing process, and taking preventive measures through monitoring and analysis to improve the efficiency of the data transmission process and the data processing process.
[0030] Additional advantages, purposes, and features of the present invention will be described in part in the following description, and will become apparent to those skilled in the art after studying the following, or may be learned from the practice of the present invention. The purposes and other advantages of the present invention may be achieved and obtained by the structures specifically indicated in the specification and the accompanying drawings.
[0031] Those skilled in the art will appreciate that the objectives and advantages that can be achieved with the present invention are not limited to the above specific description, and the above and other objectives that can be achieved by the present invention will be more clearly understood from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] The drawings described herein are used to provide a further understanding of the present invention, constitute a part of the present application, and do not constitute a limitation of the present invention. In the drawings:
[0033] Figure 1 The figure is a flow chart of the RDMA simulation verification method of the DPU according to an embodiment of the present invention.
[0034] Figure 2 The present invention is a schematic diagram of the structure of the RDMA simulation verification system of the DPU described in an embodiment of the present invention. DETAILED DESCRIPTION
[0035] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments and the accompanying drawings. Here, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but are not intended to limit the present invention.
[0036] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only structures and / or processing steps closely related to the solutions according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.
[0037] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, elements, steps or components, but does not exclude the presence or addition of one or more other features, elements, steps or components.
[0038] It should also be noted that, unless otherwise specified, the term “connection” herein may refer not only to a direct connection but also to an indirect connection involving an intermediate.
[0039] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals represent the same or similar components, or the same or similar steps.
[0040] In the prior art, the RDMA simulation verification platform uses the SystemC language environment to complete the implementation of the entire simulation framework, including hardware simulation abstraction, RDMA protocol simulation and simulation case writing; after the constructed test case passes through the RDMA protocol simulation layer also implemented in the SystemC language environment, the data is input into the device under test through the hardware virtual layer to complete the functional verification of the device under test; when the RDMA simulation verification framework is fully implemented using SystemC, its development environment will be limited by SystemC. Due to the complexity and particularity of the RDMA protocol itself, the workload of writing test cases and implementing the RDMA protocol is huge, and the processing flow of abnormal situations is extremely complicated. It is inevitable that there will be omissions in the test cases written by yourself, and it is difficult to cope with the test in complex scenarios; the present invention proposes an RDMA simulation framework for DPU A verification method and system, wherein a data plane development component receives instructions and data packets of an RDMA application sent by a virtual machine supervisor and performs parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data packets according to the instructions to obtain a target data packet, transmits the target data packet to a hardware virtual layer constructed under a preset program language based on a file system communication method, and converts the target data packet into a target format data packet processed during the RDMA verification process of the device under test, executes a routing mode and an application processing method according to protocol information parsed from the target format data packet, constructs and encapsulates the processing result to obtain a response packet, and analyzes the correctness, integrity and processing rate of the data transmission process and data processing process of the device under test, and obtains a verification result on the implementation of RDMA by the device under test according to the analysis result.
[0041] Figure 1 The flowchart of the RDMA simulation verification method of the DPU described in one embodiment of the present invention is shown in FIG. Specifically, the present application provides an RDMA simulation verification method of the DPU, the method is run on a data plane development component, and the data plane development component is deployed on a computer loaded with the DPU, and the method includes the following steps S101 to S104:
[0042] Step S101: receiving instructions and data packets of the RDMA application sent by the virtual machine supervisor, and performing parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data packets in accordance with the instructions to obtain the target data packets; wherein, the RDMA application is loaded by the virtual machine supervisor with an RDMA software driver for hardware virtualization and then runs as a simulation use case.
[0043] Step S102: The target data message is transmitted to the hardware virtual layer based on the communication method of the file system, and converted into a target format data message processed by the device under test during the RDMA verification process, so that the device under test can parse and obtain the protocol information of the target format data message, and execute the specified routing mode and application processing method based on the protocol information; the hardware virtual layer is constructed based on a preset program language.
[0044] Step S103: receiving a response message returned by the communication method based on the file system; the response message is constructed and encapsulated according to the processing result of the routing mode and the application processing method.
[0045] Step S104: Analyze the correctness, integrity and processing rate of the data transmission process and data processing process of the device under test through the response message to obtain the verification result of the RDMA implementation of the device under test.
[0046] In step S101, the virtual machine monitor is one of the two functions of an open source simulator and a virtual machine monitor. When used as a virtual machine monitor, it can simulate the entire system and create a virtual machine with performance close to that of the host. After the virtual machine monitor deploys the RDMA software driver, it can directly use the Linux operating system and run RDMA applications in the virtual machine monitor. The RDMA application is used as a test case for the device under test, which saves the complex work of self-writing and can adjust various test scenarios. The Linux operating system is deployed on a computer equipped with a DPU, supports running multiple applications at the same time, and is stable and secure.
[0047] Furthermore, the virtual machine monitor and the data plane development component are interacted with each other through the RDMA software driver, and the instructions and data packets of the RDMA application are transmitted to the data plane development tool. The data plane development tool runs on the host machine and implements the simulated RDMA protocol. The instructions of the RDMA application define and guide the transmission method and processing method of the data packet. The data packet contains the data of the RDMA application. The simulated RDMA protocol includes memory resource management, parsing and encapsulation of data packets. The data plane development component performs message header inspection, verification and verification and determines the message type of the received message, and processes the data message according to the message type and the processing method defined by the instruction. The processing includes but is not limited to load balancing and verification checksum. Further, according to the instructions of the RDMA application, the data message is encapsulated and the message header is added or modified to obtain the target data message.
[0048] In step S102, the communication method based on the file system of the present invention adopts a Unix Socket channel (Unix domain socket), and the Unix domain socket can transmit the target data message from the data plane development component to the hardware virtual layer without a network protocol stack; specifically, when the target data message is converted into a target format data message in the hardware virtual layer, the operation includes protocol reorganization and data field adjustment, so as to ensure that the target format data message meets the processing requirements of the hardware virtual layer and the device under test; a hardware virtual layer (TLM) is constructed based on the SystemC language environment, and SystemC is an open source C++ library for hardware or software system-level modeling, and the target data message is transmitted from the data plane development component to the hardware virtual layer, and the target data message is format converted in the hardware virtual layer to obtain a target format data message that can be processed by the device under test.
[0049] Furthermore, after receiving the target format data message, the device under test transmits it to the corresponding processing program according to the transmission port contained in the data message protocol information; when multiple processing programs share a channel, only one Unix domain socket needs to be created, and when each processing program requires an independent channel, multiple Unix domain sockets need to be created; the transmission port identifies the process or service that sends and receives data; the processing program processes the target format data message according to the protocol information, and the processing includes protocol parsing, business logic processing and security checking. The protocol parsing includes command parsing, data verification and status update. The business logic processing executes the corresponding business logic according to the parsed commands and data, including database operations, file reading and writing, and calculation processing. In the process of processing according to the protocol information, the device under test will also perform security checks, including firewall rule matching, intrusion detection, and data encryption and decryption; the operations of forwarding, filtering and service quality processing of the target format data message are also verified in the device under test.
[0050] In step S104, after the device under test processes the target format data message, a response message is generated. The response message reflects the result of the device under test in transmitting and processing the target format data message. After the result is encapsulated, a response message is obtained and returned to the data plane development component to verify whether the transmission process and processing process of the data message meet the requirements. After the response message is returned to the data plane open tool, the correctness, integrity and processing rate are analyzed to verify whether the data in the data transmission process is correct and complete, and whether the data processing process is correct and meets the expected processing rate; in some embodiments, the correctness, integrity and processing rate of the data transmission process and data processing process of the device under test are analyzed, including: analyzing whether the data in the data transmission process is correct and complete, and whether the data processing process is correct and meets the expected processing rate. When the data in the data transmission process is correct and complete, and the data processing process is correct and meets the expected processing rate, it indicates that the RDMA verification is passed. Specifically, check whether the response message contains correct connection confirmation information, whether the data message sent by the data plane development tool is consistent with the data message received by the device under test, whether the data message transmission rate and delay are in line with expectations, and whether there is error information in the response message. Through the data transmission process and data processing process of the target format data message and the response message, verify whether the device under test can correctly implement the RDMA protocol. Furthermore, in addition to verifying whether the data in the data transmission process is correct and complete and whether the data processing process is correct and meets the expected processing rate, it can also verify whether the response message contains sensitive information.
[0051] In some embodiments, the method also includes: when there are data errors or incompleteness in the data transmission process and the data processing process, and when there are errors in the data transmission process or the data processing process does not meet the expected processing rate, the error type, error occurrence time and error description in the response message are recorded, and the code and configuration of the device under test are analyzed to obtain the root cause of the error. Specifically, the analysis results reflect the transmission process and processing process of the target format data message by the device under test, thereby completing the RDMA verification. When the device under test fails to perform RDMA verification, debugging and error analysis are required to determine the cause of the failure. The error type, error occurrence time and error description are recorded as a test report to be fed back to the processing end for processing and improvement; further, the test case of the present invention uses an RDMA application, which avoids the errors and loopholes in self-written test cases and saves and reduces the workload of writing test cases, and copes with tests in various scenarios.
[0052] Furthermore, in some embodiments, the method further includes: feeding back the error type, error occurrence time, error description and root cause of the error in the response message to the processing end for processing and improvement, and monitoring the data processing process and data transmission process of the improved device under test. The data processing and transmission are iteratively updated until the data can be correctly processed by the device under test. Specifically, the error code in the response message is analyzed to obtain the error type, which includes protocol error, data error and resource usage error. The error occurrence time and error description are recorded, and the code and configuration of the device under test are checked to analyze the root cause of the error. If there is an error in the code, the code needs to be modified and redeployed. If there is an error in the configuration, the configuration settings need to be adjusted; further, after correcting the error, retest and monitor the results to ensure that the error has been processed, and continuously monitor the performance and stability of the device under test.
[0053] In some embodiments, constructing and encapsulating a response message according to the processing results of the routing mode and the application processing method includes steps S1041 to S1042:
[0054] Step S1041: transmitting the target format data message to the corresponding processing program through the routing mode for parsing to obtain the command type and request data of the target format data message.
[0055] Step S1042: Execute the application processing method on the request data according to the command type to obtain processed data, and encapsulate the processed data layer by layer to obtain a response message.
[0056] On the other hand, the present invention also provides a DPU RDMA simulation verification system, the system comprising:
[0057] The application acquisition and transmission module is used to take the RDMA application as a simulation case and send the instructions and data packets of the RDMA application to the protocol simulation module.
[0058] The protocol simulation module is used to execute the RDMA simulation verification method of the above-mentioned DPU, receive the instructions and data packets of the RDMA application, and obtain the target data packet after performing parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data packet to meet the RDMA protocol according to the instructions; receive the response message to analyze the correctness, integrity and processing rate of the data transmission process and data processing process of the component module under test, so as to obtain the verification result of the RDMA implementation of the component module under test.
[0059] The data communication module is used to transmit the target data message to the component module under test based on the communication mode of the file system.
[0060] The component module under test is used to convert the target data message into a target format data message, parse the target format data message to obtain the protocol information of the target format data message, execute the specified routing mode and application processing method based on the protocol information, obtain the response message according to the processing result and transmit it to the protocol simulation module.
[0061] In some embodiments, the protocol simulation module further includes:
[0062] The fault detection component is used to detect data transmission faults and data processing faults when analyzing the correctness, integrity and processing rate of the data transmission process and data processing process of the device under test. Specifically, data transmission faults include data errors or incomplete data in the transmission process, and data processing faults include data processing errors or failure to meet the expected processing rate.
[0063] In some embodiments, the system further comprises:
[0064] The cloud storage module is used to record and store the analysis results of the correctness, integrity and processing rate of the response message, data transmission failures, data processing failures and fault handling methods.
[0065] On the other hand, the present invention further provides a computer-readable storage medium having a computer program stored thereon, characterized in that the program implements the steps of any of the above methods when executed by a processor.
[0066] On the other hand, the present invention further provides a computer program product, comprising a computer program, which implements the steps of any of the above methods when executed by a processor.
[0067] The present invention is described below in conjunction with a specific embodiment:
[0068] Figure 2 The structure diagram of the RDMA simulation verification system of the DPU described in one embodiment of the present invention. The present invention proposes an RDMA simulation verification method and system on the DPU, which runs the RDMA application software based on the open source simulator and virtual machine supervisor (QEMU), and implements the simulation of the RDMA protocol layer through the data plane development component (DPDK) at the back end of the open source simulator and virtual machine supervisor, and then exchanges data with the device under test (DUT) through the Unix domain socket (Unix Socket) to complete the verification of the device under test. Compared with the traditional RDMA simulation verification method implemented in the SystemC language environment, the RDMA application software can be directly run using the open source simulator and virtual machine supervisor, without the need to construct test cases by itself, and the test scenario is more in line with the usage scenario, so that the verification of RDMA can be completed simply and effectively.
[0069] The RDMA simulation verification system proposed in the present invention includes four main parts, among which the open source simulator and virtual machine monitor are used to implement the RDMA software driver and provide RDMA simulation use cases, and the data plane development component serves as the backend of the open source simulator and virtual machine monitor to complete the simulation of the RDMA protocol. Among them:
[0070] 1. Open source simulators and virtual machine monitors: Since open source simulators and virtual machine monitors can achieve hardware-level virtualization, they can directly use the Linux operating system to run applications. Therefore, the RDMA software driver needs to be implemented in the open source simulators and virtual machine monitors to simulate the RDMA hardware devices; after completing the RDMA device simulation, the open source simulators and virtual machine monitors can directly run RDMA applications without writing test cases by themselves. Various complex test scenarios can also be adjusted according to the RDMA application to complete the verification of various aspects of the RDMA chip.
[0071] The RDMA software driver will interact with the backend data plane development component through the virtual device, correctly transmit the application's instructions and data packets to the data plane development component, and complete the test process.
[0072] 2. The data plane development component is a process running on the host machine, and its main function is to realize the simulation of the RDMA protocol. After receiving instructions and data packets from the open source simulator and virtual machine supervisor, the data plane development component will perform a complete simulation of the RDMA protocol within the data plane development component, including resource management and data packet parsing and encapsulation.
[0073] After encapsulating the RDMA data message, the target data message is obtained. The data plane development component process will transmit the target data message to the TLM (hardware virtual layer) through the Unix domain socket. The hardware virtual layer converts the format to obtain the target format data message and then hands it over to the device under test for processing to complete the final verification.
[0074] 3. Hardware virtualization layer and device under test: Different from the traditional simulation verification platform, in the architecture proposed by the present invention, the hardware virtualization layer does not need to construct test cases and build a test framework. It only needs to abstractly model the device under test so that the device under test can correctly receive and parse RDMA target format data packets. After the device under test completes RDMA message processing, the hardware virtualization layer transmits the response message to the data plane development component through the Unix domain socket to complete an RDMA protocol verification.
[0075] In summary, the present invention provides a DPU RDMA simulation verification method and system, the method runs on a data plane development component, the data plane development tool is deployed on a computer loaded with the DPU, the RDMA software driver simulated by the virtual machine supervisor can call the RDMA application, the data plane development tool receives the instructions and data messages of the RDMA application and simulates the RDMA protocol, parses and encapsulates the data messages according to the instructions to obtain target data messages, transmits them to the hardware virtual layer based on the communication mode of the file system, converts them into target format data messages and is processed by the device under test, receives the response message sent by the device under test after processing the target format data message, analyzes the correctness, integrity and processing rate, and completes the RDMA verification according to the analysis result.
[0076] Furthermore, when the present invention detects errors in the data transmission process and the processing process, the error type, error occurrence time and error description in the response message are recorded, the code and configuration of the device under test are analyzed to obtain the root cause of the error and transmit it to the processing end for feedback processing and monitoring, thereby improving the stability and reliability of the data transmission process and the processing process, and taking preventive measures through monitoring and analysis to improve the efficiency of the transmission process and the processing process.
[0077] An embodiment of the present invention further provides a computer device, which may include a processor and a memory, wherein the processor and the memory may be connected via a bus or in other ways.
[0078] The processor may be a central processing unit (CPU). The processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or a combination of the above chips.
[0079] The memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer executable programs and modules, such as the program instructions / modules corresponding to the key shielding method of the vehicle-mounted display device in the embodiment of the present invention. The processor executes various functional applications and data processing of the processor by running the non-transitory software programs, instructions and modules stored in the memory.
[0080] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created by the processor, etc. In addition, the memory may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0081] The one or more modules are stored in the memory, and when executed by the processor, the method described in this embodiment is performed.
[0082] The embodiment of the present invention also provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps of the aforementioned edge computing server deployment method are implemented. The computer-readable storage medium can be a tangible storage medium, such as a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a floppy disk, a hard disk, a removable storage disk, a CD-ROM, or any other form of storage medium known in the technical field.
[0083] It should be understood by those skilled in the art that the exemplary components, systems and methods described in conjunction with the embodiments disclosed herein can be implemented in hardware, software or a combination of the two. Whether it is performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present invention are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link via a data signal carried in a carrier.
[0084] It should be clear that the present invention is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present invention.
[0085] In the present invention, features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, and / or combined with features of other embodiments or replace features of other embodiments.
[0086] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A DPU RDMA simulation verification method, characterized in that: The method is run on a data plane development component, which is deployed on a computer loaded with a DPU, and includes the following steps: Receive the instructions and data packets of the RDMA application sent by the virtual machine supervisor, and obtain the target data packet after performing parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data packet in accordance with the instructions to meet the RDMA protocol; wherein the RDMA application is loaded by the virtual machine supervisor with an RDMA software driver for hardware virtualization and then runs as a simulation use case; The target data message is transmitted to the hardware virtual layer based on the communication mode of the file system, and converted into the target format data message processed by the device under test during the RDMA verification process, so that the device under test can parse and obtain the protocol information of the target format data message, and execute the prescribed routing mode and application processing method based on the protocol information; the hardware virtual layer is constructed based on a preset program language; Receiving a response message returned by a communication method based on the file system; the response message is constructed and encapsulated according to the processing result of the routing mode and the application processing method; The data transmission process and data processing process of the device under test are analyzed for correctness, integrity and processing rate through the response message to obtain a verification result on the implementation of RDMA by the device under test.
2. The RDMA simulation verification method of DPU according to claim 1, characterized in that: Constructing and encapsulating the response message according to the processing result of the routing mode and the application processing method includes: Transmitting the target format data message to a corresponding processing program through the routing mode for parsing to obtain a command type and request data of the target format data message; The application processing method is executed on the request data according to the command type to obtain processed data, and the processed data is encapsulated layer by layer to obtain a response message.
3. The RDMA simulation verification method of DPU according to claim 1, characterized in that: The analysis of the correctness, integrity and processing rate of the data transmission process and the data processing process of the device under test includes: analyzing whether the data of the data transmission process is correct and complete and whether the data processing process is correct and meets the expected processing rate. When the data of the data transmission process is correct and complete and the data processing process is correct and meets the expected processing rate, it indicates that the RDMA verification is passed.
4. The RDMA simulation verification method of DPU according to claim 3 is characterized in that: The method also includes: when there are data errors or incompleteness in the data transmission process and the data processing process, and when the data processing process is erroneous or does not meet the expected processing rate, the error type, error occurrence time and error description in the response message are recorded, and the code and configuration of the device under test are analyzed to obtain the root cause of the error.
5. The RDMA simulation verification method of DPU according to claim 4 is characterized in that: The method also includes: feeding back the error type, error occurrence time, error description and root cause of the error in the response message to the processing end for processing and improvement, and monitoring the improved data processing process and data transmission process of the device under test.
6. A DPU RDMA simulation verification system, characterized in that: The system includes: An application acquisition and transmission module, used to use the RDMA application as a simulation case and send the instructions and data messages of the RDMA application to the protocol simulation module; A protocol simulation module, the module is used to execute the RDMA simulation verification method of the DPU as described in claims 1 to 5, receive the instructions and data packets of the RDMA application, and perform parsing simulation, encapsulation simulation and RDMA application transmission resource management simulation on the data packets to meet the RDMA protocol according to the instructions to obtain the target data packets; receive the response message to analyze the correctness, integrity and processing rate of the data transmission process and data processing process of the component module under test, so as to obtain the verification result of the implementation of RDMA by the component module under test; A data communication module, used for transmitting the target data message to the measured component module based on the communication mode of the file system; The component module under test is used to convert the target data message into a target format data message, parse the target format data message to obtain the protocol information of the target format data message, execute the specified routing mode and application processing method based on the protocol information, obtain a response message according to the processing result and transmit it to the protocol simulation module.
7. The RDMA simulation verification system of DPU according to claim 6, characterized in that: The protocol simulation module also includes: A fault detection component is used to detect data transmission faults and data processing faults when analyzing the correctness, integrity and processing rate of the data transmission process and the data processing process of the device under test.
8. The RDMA simulation verification system of DPU according to claim 6, characterized in that: The system further comprises: The cloud storage module is used to record and store the analysis results of the correctness, integrity and processing rate of the response message, the data transmission failure, the data processing failure and the failure handling method.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.
10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.
Citation Information
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Function test method and device, storage medium and electronic equipment
CN121562509A