Wafer deviation rectifying method and device
By identifying and determining the target cutting channel inclination angle of the wafer and performing bias correction on the wafer, the problem that the prior art cannot be applied to U- or V-shaped directional marking wafers is solved, and a wider and more accurate wafer bias correction is achieved.
Patent Information
- Application Number
- CN202411903734.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2025-04-08
AI Technical Summary
The existing wafer bias correction method cannot be applied to wafers without flat edges, such as wafers with U- or V-shaped orientation marks.
By acquiring the image of the wafer to be cut, the inclination angle of the target cutting channel is identified and determined, and the wafer is subjected to bias correction based on this angle.
The correction of different types of wafers is achieved, including wafers with flat edges, U-shaped and V-shaped orientation marks, improving the universality and accuracy of wafer deviation correction.
Smart Images
Figure CN119786414A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of wafer processing technology, and in particular to the field of wafer deflection correction technology. Background Art
[0002] Wafers are usually circular sheets made of silicon, silicon carbide or other semiconductor materials, used to manufacture electronic components such as integrated circuits (ICs) and chips. In the manufacture and processing of wafers, in order to determine the direction and position of the wafer, an orientation mark is set on the wafer, usually by cutting or grinding a mark such as Figure 1 As the wafer size increases and the number of cuts decreases, in order to reduce waste, this orientation mark is U-shaped or as shown in the figure. Figure 2 The V-shaped mouth is shown.
[0003] When processing wafers, it is necessary to accurately locate the wafer's cutting path (i.e., scribe line) in order to separate the individual chips (die). Due to errors in the wafer manufacturing process and the transfer equipment, the wafer may deviate or angularly during the transfer and processing process (e.g. Figure 3 As shown in the figure, the wafer needs to be deflected to accurately align the wafer on the processing equipment to ensure that the cutting path is consistent or parallel to the X-axis direction of the coordinate system of the wafer cutting equipment. Figure 3 The wafer in the position shown is corrected as Figure 1 The wafer is positioned as shown, thereby ensuring the accuracy of the subsequent cutting and inspection processes.
[0004] The existing wafer deflection correction method is to correct the wafer deflection by identifying the flat edge of the wafer and determining the slope of the flat edge of the wafer. However, the existing flat edge identification method is not applicable to wafers without flat edges, such as wafers with U-shaped or V-shaped orientation marks. Summary of the invention
[0005] In view of this, the embodiments of the present disclosure provide a wafer deflection correction method and device, which at least partially solve the problems existing in the prior art.
[0006] In a first aspect, an embodiment of the present disclosure provides a wafer deflection correction method, comprising:
[0007] Acquire an image of a wafer to be cut, wherein the wafer to be cut comprises a plurality of cutting lanes;
[0008] Based on the acquired image of the wafer to be cut, a target cutting path is identified and determined, and an inclination angle of the target cutting path is determined;
[0009] Based on the determined inclination angle of the target cutting path, a correction process is performed on the wafer to be cut.
[0010] Optionally, based on the acquired image of the wafer to be cut, identifying and determining a target cutting path, and determining an inclination angle of the target cutting path, comprises:
[0011] Determine the coordinate positions of two target deviation correction points of the target cutting path, wherein the coordinate positions of the two target deviation correction points are positions in the coordinate system of the wafer processing equipment;
[0012] Determining a first inclination angle of the target cutting path based on the identified coordinate positions of two target correction points on the target cutting path;
[0013] The step of performing a deviation correction process on the wafer to be cut based on the determined inclination angle of the target cutting path includes:
[0014] Based on the determined first inclination angle of the target cutting street, a first deflection correction process is performed on the wafer to be cut.
[0015] Optionally, before performing a first deflection correction process on the wafer to be cut, the method further comprises:
[0016] Based on the acquired image of the wafer to be cut, a second inclination angle of the target cutting path is determined by a visual algorithm, and based on the second inclination angle, a second deflection correction process is performed on the wafer to be cut.
[0017] Optionally, the two target deviation correction points are respectively located in two semicircular areas of the wafer to be cut.
[0018] Optionally, the target cutting path is a cutting path adjacent to a target diameter area of the wafer to be cut.
[0019] Optionally, determining the positions of two target deviation correction points on the target cutting path includes:
[0020] The search starts from the target edge position of the wafer to be cut, and based on the image containing the target cutting road collected during the search process, the target cutting road is determined, and the intersection center point of the first cutting road intersecting with the target cutting road is determined as the first target correction point, and the intersection center point of the cutting road intersecting with the target cutting road last is determined as the second target correction point.
[0021] Optionally, the target edge position of the wafer to be cut is determined based on the first center coordinates of the wafer to be cut and the diameter of the wafer to be cut, and the first center coordinates of the wafer to be cut are coordinates in a coordinate system of a wafer processing device.
[0022] Optionally, determining the first center coordinate of the wafer to be cut includes:
[0023] Based on the collected contour image of the wafer to be cut, the second center coordinates of the wafer to be cut are determined by using a contour positioning algorithm, where the second center coordinates are coordinates in a pixel coordinate system;
[0024] Based on the camera parameter information for collecting the contour image of the wafer to be cut and the second center coordinates of the wafer to be cut, the first center coordinates of the wafer to be cut are determined.
[0025] Optionally, the searching and determining the intersection center point of the cutting road that intersects the target cutting road last as the second target deviation correction point includes:
[0026] Based on the grain size of the wafer to be cut, determining the step length of searching and determining the second target deviation correction point of the target cutting path;
[0027] Based on the determined search, the step size of the second target correction point of the target cutting road is determined, and the target cutting road is controlled to move toward the center point of the field of view of the CCD camera until it reaches the other edge of the wafer to be cut by the target cutting road, and the intersection center point of the cutting road where any target cutting road last intersects is used as the second target correction point.
[0028] In a second aspect, a wafer deflection correction device is provided, comprising:
[0029] Visual imaging module, translation stage, industrial computer;
[0030] The translation stage is used to carry the wafer to be cut, and the translation stage includes three motion axes, X, Y, and Z, which are used to control the translation stage to move in the X, Y, and Z directions;
[0031] The visual imaging module is used to collect the image of the wafer to be cut on the displacement stage;
[0032] The industrial computer is used to execute the method described in any one of claims 1 to 9, and based on the image of the wafer to be cut captured by the visual imaging module, controls the movement of the translation stage to perform deviation correction processing on the wafer to be cut.
[0033] The present disclosure provides a wafer deflection correction method, including: acquiring an image of a wafer to be cut, wherein the wafer to be cut includes a plurality of cutting paths; based on the acquired image of the wafer to be cut, identifying and determining a target cutting path, and determining the inclination angle of the target cutting path; and based on the determined inclination angle of the target cutting path, performing deflection correction processing on the wafer to be cut. In other words, by identifying and determining the inclination angle of the target cutting path of the wafer to be cut, performing deflection correction processing on the wafer based on the inclination angle of the target cutting path, deflection correction can be achieved regardless of whether the wafer uses a flat edge as a positioning mark or a wafer uses a U-shaped angle or a V-shaped angle as a positioning mark, thereby improving the universality of wafer deflection correction.
[0034] In order to make the above-mentioned objectives, features and advantages of the present disclosure more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following is a brief introduction to the drawings required for use in the embodiments. The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used together with the specification to illustrate the technical solutions of the present disclosure. It should be understood that the following drawings only illustrate certain embodiments of the present disclosure and should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can also be obtained based on these drawings without creative work.
[0036] Figure 1 is a schematic diagram of a wafer with flat edges provided by an embodiment of the present disclosure;
[0037] Figure 2 is a schematic diagram of a wafer with a V-shaped angle positioning mark provided by an embodiment of the present disclosure;
[0038] Figure 3 is a schematic diagram of a wafer that needs to be corrected according to an embodiment of the present disclosure;
[0039] Figure 4 It is a schematic diagram of the process flow of the wafer deflection correction method provided by the embodiment of the present disclosure;
[0040] Figure 5 A schematic diagram of wafer target correction points provided in an embodiment of the present disclosure;
[0041] Figure 6 A schematic diagram of a wafer in which two correction points are located in the same half circle provided in an embodiment of the present disclosure;
[0042] Figure 7 A schematic diagram showing a comparison of cutting paths in an area adjacent to a target diameter and in an area deviating from the target diameter provided in an embodiment of the present disclosure;
[0043] Figure 8 A schematic diagram of the edge position points of a wafer to be cut provided in an embodiment of the present disclosure;
[0044] Fig. 9 A schematic diagram of a wafer contour image collected according to an embodiment of the present disclosure;
[0045] Fig.10 A schematic diagram of the center and diameter of a wafer provided in an embodiment of the present disclosure;
[0046] Fig.11 A schematic diagram of the center point of a CCD camera provided in an embodiment of the present disclosure;
[0047] Fig.12 A schematic diagram of a wafer deflection correction device provided in an embodiment of the present disclosure.
[0048] The description of the figures is as follows:
[0049] 1-contour CCD; 2-correction CCD; 3-point light source; 4-surface light source; 5-light source controller; 6-translation stage; 7-DD motor; 8-industrial computer. DETAILED DESCRIPTION
[0050] The following describes the implementation methods of the embodiments of the present disclosure through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the embodiments of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The embodiments of the present disclosure can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the embodiments of the present disclosure. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict. Based on the embodiments in the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of the embodiments of the present disclosure.
[0051] Due to the errors in wafer manufacturing process and conveying equipment, the wafer may be offset or have an angle deviation during the conveying and processing process (such as Figure 3 The main purpose of wafer deskew is to accurately align the wafer on the processing equipment to ensure that the cutting path is parallel to the X-axis direction of the coordinate system of the wafer processing equipment, thereby ensuring the accuracy of the subsequent cutting and testing process. Precise wafer deskew is crucial to the quality of wafer segmentation, especially when the wafer size gradually increases and the cutting path gradually decreases. Wafer deskew directly affects whether the chip will be damaged during the cutting process, or even cause the entire wafer to be scrapped.
[0052] The present disclosure provides a wafer deflection correction method. Figure 4 As shown, including:
[0053] Step S401, acquiring an image of a wafer to be cut, wherein the wafer to be cut includes a plurality of cutting lanes;
[0054] Step S402, based on the acquired image of the wafer to be cut, identifying and determining the target cutting path, and determining the inclination angle of the target cutting path;
[0055] Step S403: Based on the determined inclination angle of the target cutting path, a correction process is performed on the wafer to be cut.
[0056] Specifically, the image of the wafer to be cut placed on the displacement stage can be collected by the visual imaging module configured by the wafer processing equipment, and the target cutting path of the wafer to be cut can be identified and determined by the corresponding image analysis method, such as the template matching method, and the inclination angle of the target cutting path can be determined; or the target cutting path and the slope of the corresponding target cutting path can be directly identified and determined by the machine learning model method. Among them, the inclination angle (or slope) of the target cutting path is the inclination angle in the X-axis direction relative to the coordinate system of the wafer processing equipment. In the actual cutting process, the displacement stage carrying the wafer to be cut moves along the X-axis direction, and enables the cutting path to be aligned with the laser focus point, so as to realize the laser modification and cutting processing of the cutting path.
[0057] The template matching method can be: 1. Generate a template image feature file in advance, specifically including (1) manually leveling the wafer cutting path (i.e., correcting the deflection), (2) setting a suitable light source brightness, and selecting the wafer cutting path by box selection on the corrected CCD image captured by the corrected CCD camera, (3) reading the selected image and performing grayscale conversion on the image, (4) creating a template matching template based on grayscale value, setting the number of pyramid layers, angle range, etc., and (5) generating a template image feature file. 2. Template matching process, (1) reading the wafer image to be identified containing the cutting path and performing grayscale conversion, (2) loading the created template feature file, (3) normalizing the template grayscale value, sliding the template window, and calculating the correlation with each area of the target image, (4) outputting the similarity score of the matching target cutting path image, the position coordinates of the cutting path intersection in the image, and the rotation angle (cutting path inclination angle), and (5) filtering low-quality results according to the matching score, and only retaining the results with scores higher than the threshold.
[0058] The method of the aforementioned machine learning model may be: 1. Pre-training a machine learning model based on deep learning, wherein the training sample may be an image of a captured wafer, a marked cutting road area, and a corresponding inclination angle of the cutting road. 2. Inputting the captured image of the wafer to be cut into the pre-trained machine learning model based on deep learning to obtain the target cutting road and the slope of the target cutting road.
[0059] Specifically, after determining the inclination angle of the target cutting path, the industrial computer can send a correction instruction to control the DD motor to carry the translation stage of the wafer to be cut to rotate, so as to achieve correction. Among them, the target cutting path can include one or more cutting paths. The wafer can be corrected based on one cutting path or based on multiple cutting paths.
[0060] The present disclosure provides a wafer deflection correction method, including: acquiring an image of a wafer to be cut, wherein the wafer to be cut includes a plurality of cutting paths; based on the acquired image of the wafer to be cut, identifying and determining a target cutting path, and determining the inclination angle of the target cutting path; and based on the determined inclination angle of the target cutting path, performing deflection correction processing on the wafer to be cut. In other words, by identifying and determining the inclination angle of the target cutting path of the wafer to be cut, performing deflection correction processing on the wafer based on the inclination angle of the target cutting path, deflection correction can be achieved regardless of whether the wafer uses a flat edge as a positioning mark or a wafer uses a U-shaped angle or a V-shaped angle as a positioning mark, thereby improving the universality of wafer deflection correction.
[0061] The present disclosure provides a possible implementation method, wherein step S402 identifies and determines a target cutting path based on the acquired image of the wafer to be cut, and determines the inclination angle of the target cutting path, including:
[0062] Step S4021 (not shown in the figure), determining the coordinate positions of two target deviation correction points of the target cutting path, the coordinate positions of the two target deviation correction points being positions in the coordinate system of the wafer processing equipment;
[0063] Step S4022 (not shown in the figure), determining a first inclination angle of the target cutting path based on the identified coordinate positions of the two target correction points on the target cutting path;
[0064] The step S403 of performing a deflection correction process on the wafer to be cut based on the determined inclination angle of the target cutting path includes:
[0065] Step S4031 (not shown in the figure), based on the determined first inclination angle of the target cutting path, a first deflection correction process is performed on the wafer to be cut.
[0066] Specifically, exemplarily, Figure 5 As shown, the coordinate positions of the two target correction points P1 and P2 on the target cutting path can be identified and determined, wherein the coordinate positions of P1 and P2 are based on the coordinate system of the equipment processing the wafer. Then, according to the coordinates of points P1 and P2, the horizontal difference Δx=x2-x1 and the vertical difference Δy=y2-y1 are calculated, and the tilt angle θ=arctan(Δy,Δx). The correction command is sent by the industrial computer to drive the translation stage to rotate by an angle of θ to complete the angle correction of the wafer to be cut.
[0067] Preferably, the two target deviation correction points are located in two semicircular regions of the wafer to be cut, rather than in the same semicircular region (such as Figure 6As shown, P1 and P3 are located in the same semicircle area); specifically, the target cutting path is a cutting path adjacent to the target diameter area of the wafer to be cut, rather than a cutting path deviating from the target diameter area (such as Figure 7 As shown, the cutting path determined by P4 and P5), wherein the target diameter has the smallest inclination angle relative to the X-axis direction of the coordinate system of the wafer processing equipment. Thus, there is a relatively long distance between the two target correction points, which can improve the accuracy of the target cutting path slope calculation, and thus improve the accuracy of subsequent correction.
[0068] The disclosed embodiment identifies and determines two deviation correction points on a target cutting path, determines the slope of the target cutting according to the two deviation correction points, and then performs deviation correction based on the determined slope, thereby achieving precise deviation correction.
[0069] The present disclosure provides a possible implementation method. Before performing a first deflection correction process on the wafer to be cut, the method further includes:
[0070] Step S4021 (not shown in the figure), based on the acquired image of the wafer to be cut, determine the second inclination angle of the target cutting path through a visual algorithm, and based on the second inclination angle, perform a second deflection correction process on the wafer to be cut.
[0071] Specifically, based on the collected image of the wafer to be cut, the second inclination angle of the target cutting path can be determined by a visual algorithm, and based on the second inclination angle, the wafer to be cut is subjected to a second deflection correction process (i.e., a preliminary deflection correction process), and then based on the method for determining the target deflection correction point, a precise deflection correction process is performed. In the process of determining the target deflection correction point, a camera with a relatively high magnification can be used, so that the camera's field of view does not include the entirety of the wafer to be cut, but only includes part of the cutting path of the wafer to be cut.
[0072] In the disclosed embodiment, before precise correction is performed by determining the target correction point, a preliminary correction process is first performed to avoid the situation where the cutting path deviates from the camera's field of view due to the limited field of view of the correction CCD camera due to the large inclination angle of the wafer to be cut, resulting in the inability to determine the target correction point on the target cutting path.
[0073] The embodiment of the present disclosure provides a possible implementation method, wherein determining the positions of two target deviation correction points on the target cutting path includes:
[0074] The search is started from the target edge position of the wafer to be cut, and based on the image of the target cutting road collected during the search process, the intersection center point of the first cutting road that intersects with the target cutting road is determined as the first target correction point, and the intersection center point of the cutting road that last intersects with any target cutting road is determined as the second target correction point.
[0075] Specifically, the industrial computer can be used to control the translation stage carrying the wafer to be cut to move along the X-axis direction, and the wafer to be cut is moved from its edge position (such as Figure 8 Starting from the P0 point in the figure, to the other edge of the wafer to be cut (such as Figure 8 At the same time, the configured CCD camera collects an image containing the target cutting road, and then determines the intersection center point of the first cutting road intersecting with the target cutting road based on the collected image containing the target cutting road (such as Figure 8 As the first target deviation correction point, and determining the intersection center point of the cutting path that intersects with any target cutting path at the end (such as Figure 8 P2) in , as the second target correction point.
[0076] The target edge position of the wafer to be cut is based on the first center coordinate O0 (x1, y1) of the wafer to be cut and the diameter d of the wafer to be cut. r Determine, that is, the position of P0 (x1-d / 2, y1) is the edge position of a target cutting path on the wafer to be cut, and P5 (x1+d / 2, y1) is the edge position of another target cutting path on the wafer to be cut, and the first center coordinate of the wafer to be cut is the coordinate in the coordinate system of the wafer processing equipment. Among them, based on the collected contour image of the wafer to be cut, the second center coordinate of the wafer to be cut can be determined by the contour positioning algorithm, and the second center coordinate is the coordinate in the pixel coordinate system; based on the camera parameter information of the collected contour image of the wafer to be cut, and the second center coordinate of the wafer to be cut, the first center coordinate of the wafer to be cut is determined. Exemplarily, the contour image of the wafer to be cut is collected by a contour CCD camera (such as Fig. 9 , 10 As shown in the figure), the collected contour image is input into the industrial computer to execute the contour positioning algorithm, and the pixel diameter d of the wafer in the contour image is output. px and the center coordinates O px , and then perform pixel and physical coordinate conversion according to the camera parameters to obtain the actual wafer diameter d r and the position of the wafer in the processing coordinate system O0(x1,y1), of course the diameter of the wafer d r It can be entered directly into the system.
[0077] Specifically, the search determines the intersection center point of the cutting road that last intersects with any of the target cutting roads as the second target correction point, including: determining the step size of the second target correction point of the target cutting road based on the grain size of the wafer to be cut; based on the determined step size of the second target correction point of the target cutting road determined by the search, controlling the target cutting road to move toward the center point of the field of view of the CCD camera until the target cutting road reaches the other edge of the wafer to be cut, and using the intersection center point of the cutting road that last intersects with any of the target cutting roads as the second target correction point.
[0078] The size of the grain can be manually input or determined by image analysis, which is not limited in the embodiments of the present disclosure. The step length of the second target correction point of the target cutting path can include the step length in the X direction and the step length in the Y direction, and the step length in the X direction and the step length in the Y direction can be several times of the length of the grain in the X direction and the Y direction, respectively, such as 1 time, 2 times, etc.
[0079] Among them, for example, Fig.11 As shown, in the process of searching and determining the second target correction point, the target cutting road can be controlled to move toward the direction of the center point P7 of the CCD camera's field of view, and the correction processing can be continuously performed to avoid the target cutting road deviating from the camera's field of view due to the target cutting road's excessive inclination angle and the camera's limited field of view during the mobile search process.
[0080] Exemplarily, the process of the wafer deflection correction method disclosed in the present invention may be:
[0081] 1. System configuration steps. Before wafer processing, you can first enter the process parameter information used for the wafer to be processed, including the length of the wafer grain in the X direction, the length in the Y direction (used to determine the moving step of the translation stage for searching and determining the cutting path), correction parameter settings (template image, light source brightness, applicable CCD camera parameters), profile parameter settings (light source brightness, grayscale area value) and other information.
[0082] 2. Wafer center coordinates and diameter determination steps. The loading robot grabs the wafer and places it on the contour detection position. The contour CCD camera of the visual imaging module collects the contour image of the wafer, and inputs the contour image to the industrial computer to execute the contour positioning algorithm, and outputs the pixel diameter d of the wafer in the image. px and the center coordinates O px , and then perform pixel and physical coordinate conversion according to the camera parameters to obtain the actual wafer diameter d r and the position O0(x0,y0) of the wafer in the processing coordinate system.
[0083] 3. Align the center of the CCD camera with the edge of the wafer. Based on the above information, it can be further obtained that when the center of the correction CCD camera coincides with the center of the wafer, the coordinates of the translation stage carrying the wafer to be cut are O1 (x1, y1), and the translation stage is moved to the position of P0 (x1-d / 2, y1), that is, the translation stage is horizontally moved from the position where the center of the wafer coincides with the center of the CCD camera, by a radius of the wafer, so as to reach the edge of the wafer. At this position, the center of the CCD camera is aligned with the edge of the wafer.
[0084] 4. Start searching for wafer cutting paths based on path planning and visual algorithms, and perform preliminary correction steps. Move the translation stage along the X-axis direction. When the search successfully matches the first matching cutting path image, determine the cutting path inclination angle θ through image analysis methods. The industrial computer issues a correction command to drive the translation stage to rotate by an angle θ to complete the rough correction.
[0085] 5. Find the correction point and determine the coordinates of the correction point. Continue to move the translation stage and continuously acquire images. Use the visual algorithm to determine that the pixel coordinates of the first target correction point (the first intersection center point of the target cutting path and other cutting paths) matched to the target cutting path is (x0, y0). The deviation of the distance between the center point of the cutting path and the center of the entire image is Δx = 1 / 2w-x0 and Δy = 1 / 2h-y0, where w and h are the pixels of the width and height of the camera output image, respectively. According to the conversion ratio coefficient λ of the camera pixel point and the physical distance, the translation stage should be controlled to move λΔx and λΔy relative to each other, so that the center point of the correction CCD is aligned with the center point of the cutting path, and the absolute coordinates in the coordinate system where the current translation stage is located are obtained and set as the first point P1 (x1, y1) of the cutting path.
[0086] 6. Correction steps during movement. The industrial computer outputs signals to control the translation stage to move along the X direction of the current cutting path to the other end, that is, to P5 (x1+d / 2, y1). The distance of each movement is a certain multiple of the grain pitch. After each movement, the visual algorithm is used to obtain the distance of the cutting path from the center point, and the translation stage is controlled to move and correct so that the cutting path is located in the center of the image. The purpose is to ensure that the current cutting path will not deviate from the camera field of view during the movement.
[0087] 7. Determine the second target correction point step. Move to the last successful matching cutting path image at the edge of the wafer and stop. Use the same method as above to make the center point of the cutting path coincide with the center point of the image. Then obtain the absolute coordinates in the coordinate system where the current translation stage is located and set it as the first point P2 (x2, y2) of the cutting path.
[0088] 8. Final correction step. According to the coordinates of points P1 and P2 in the coordinate system, the horizontal difference Δx = x2-x1 and the vertical difference Δy = y2-y1 are calculated, and the tilt angle θ = arctan (Δy, Δx). Then the industrial computer issues a correction command to control the translation stage to rotate an angle of θ to complete the final angle correction of the wafer.
[0089] In a second aspect, the present disclosure provides a wafer deflection correction device, such as Fig.12 As shown, including:
[0090] Visual imaging module, translation stage 6, industrial computer 8;
[0091] The translation stage is used to carry the wafer to be cut. The translation stage includes three motion axes, X, Y, and Z, which are used to control the movement of the translation stage in the X, Y, and Z directions. The X and Y axes are used to control the movement of the translation stage in the X and Y directions, so that the correction camera above can capture different images of the wafer surface. The Z axis is used to adjust the imaging focal length of the camera to ensure the clarity of the captured image.
[0092] The visual imaging module is used to collect the image of the wafer to be cut on the displacement stage;
[0093] The industrial computer is used to execute the method described in the first aspect, and based on the image of the wafer to be cut acquired by the visual imaging module, controls the movement of the translation stage to perform a deflection correction process on the wafer to be cut.
[0094] Specifically, the visual imaging modules may be three, each of which may include a CCD camera, an imaging lens barrel, a light source (such as Fig.12 The point light source 3 and the surface light source 4 in the image processing apparatus can control the light source through the light source controller 5). Among them, the three visual imaging modules can specifically include a contour imaging module (contour CCD1) and two correction imaging modules (correction CCD2). Among them, the contour imaging module is used to collect the contour image of the wafer sheet; the two correction imaging modules are used to collect the cutting path image on the surface of the wafer. The two correction imaging modules can be configured with camera lenses of different magnifications, such as 2x and 6x camera lenses. When collecting the cutting path image, an imaging module can be selected according to different grain sizes.
[0095] The device may also include a high-precision DD motor 7, which is mainly used to control the rotation of the translation stage to adjust the inclination angle of the wafer cutting path.
[0096] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the embodiments of the present disclosure. The drawings only show components related to the embodiments of the present disclosure rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0097] The following embodiments of the present disclosure are provided by specific specific examples to illustrate the embodiments of the present disclosure. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present disclosure.
[0098] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein may be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present disclosure, it should be understood by those skilled in the art that an aspect described herein may be implemented independently of any other aspect, and two or more of these aspects may be combined in various ways. For example, any number of aspects described herein may be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein may be used to implement this device and / or practice this method.
[0099] The embodiments described above are part of the embodiments of the present disclosure, but not all of them. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the embodiments of the present disclosure.
[0100] In the description of the embodiments of the present disclosure, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present disclosure. In addition, the terms "first", "second", and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.
[0101] In the description of the embodiments of the present disclosure, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present disclosure can be understood according to specific circumstances.
[0102] The above are only specific implementations of the embodiments of the present disclosure, but the protection scope of the embodiments of the present disclosure is not limited thereto. Any changes or replacements that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed in the embodiments of the present disclosure should be included in the protection scope of the embodiments of the present disclosure. Therefore, the protection scope of the embodiments of the present disclosure should be based on the protection scope of the claims.
Claims
1. A wafer deflection correction method, characterized in that: include: Acquire an image of a wafer to be cut, wherein the wafer to be cut comprises a plurality of cutting lanes; Based on the acquired image of the wafer to be cut, a target cutting path is identified and determined, and an inclination angle of the target cutting path is determined; Based on the determined inclination angle of the target cutting path, a correction process is performed on the wafer to be cut.
2. The method according to claim 1, characterized in that Based on the acquired image of the wafer to be cut, a target cutting path is identified and determined, and an inclination angle of the target cutting path is determined, including: Determine the coordinate positions of two target deviation correction points of the target cutting path, wherein the coordinate positions of the two target deviation correction points are positions in the coordinate system of the wafer processing equipment; Determining a first inclination angle of the target cutting path based on the identified coordinate positions of two target correction points on the target cutting path; The step of performing a deviation correction process on the wafer to be cut based on the determined inclination angle of the target cutting path includes: Based on the determined first inclination angle of the target cutting street, a first deflection correction process is performed on the wafer to be cut.
3. The method according to claim 2, characterized in that Before performing a first deflection correction process on the wafer to be cut, the method further comprises: Based on the acquired image of the wafer to be cut, a second inclination angle of the target cutting path is determined by a visual algorithm, and based on the second inclination angle, a second deflection correction process is performed on the wafer to be cut.
4. The method according to claim 2, characterized in that: The two target deviation correction points are respectively located in two semicircular areas of the wafer to be cut.
5. The method according to claim 2, characterized in that: The target cutting path is a cutting path adjacent to a target diameter area of the wafer to be cut.
6. The method according to claim 2, characterized in that The determining the positions of the two target deviation correction points on the target cutting path includes: The search starts from the target edge position of the wafer to be cut, and based on the image containing the target cutting road collected during the search process, the target cutting road is determined, and the intersection center point of the first cutting road intersecting with the target cutting road is determined as the first target correction point, and the intersection center point of the cutting road intersecting with the target cutting road last is determined as the second target correction point.
7. The method according to claim 6, characterized in that The target edge position of the wafer to be cut is determined based on the first center coordinates of the wafer to be cut and the diameter of the wafer to be cut, and the first center coordinates of the wafer to be cut are coordinates in the coordinate system of the wafer processing equipment.
8. The method according to claim 7, characterized in that Determining the first center coordinate of the wafer to be cut includes: Based on the collected contour image of the wafer to be cut, the second center coordinates of the wafer to be cut are determined by using a contour positioning algorithm, where the second center coordinates are coordinates in a pixel coordinate system; Based on the camera parameter information for collecting the contour image of the wafer to be cut and the second center coordinates of the wafer to be cut, the first center coordinates of the wafer to be cut are determined.
9. The method according to claim 6, characterized in that The searching and determining the intersection center point of the cutting path that intersects the target cutting path last as the second target deviation correction point includes: Based on the grain size of the wafer to be cut, determining the step length of searching and determining the second target deviation correction point of the target cutting path; Based on the determined search, the step size of the second target correction point of the target cutting road is determined, and the target cutting road is controlled to move toward the center point of the field of view of the CCD camera until it reaches the other edge of the wafer to be cut by the target cutting road, and the intersection center point of the cutting road where any target cutting road last intersects is used as the second target correction point.
10. A wafer deflection correction device, characterized in that: include: Visual imaging module, translation stage, industrial computer; The translation stage is used to carry the wafer to be cut, and the translation stage includes three motion axes, X, Y, and Z, which are used to control the translation stage to move in the X, Y, and Z directions; The visual imaging module is used to collect the image of the wafer to be cut on the displacement stage; The industrial computer is used to execute the method described in any one of claims 1 to 9, and based on the image of the wafer to be cut captured by the visual imaging module, controls the movement of the translation stage to perform deviation correction processing on the wafer to be cut.