Differential source follower circuit and its voltage gain adjustment method

Abstract

The present invention provides a differential source follower circuit and a method for adjusting its voltage gain. The differential source follower circuit includes a differential circuit part, a bias circuit part, and an auxiliary amplifier circuit part. Among them, the bias circuit part is used to provide a corresponding DC operating point for the differential circuit part; the auxiliary amplifier circuit part is used to provide auxiliary amplification for the differential circuit part; the differential circuit part is used to perform differential amplification processing on two differential input signals based on the bias circuit part and the auxiliary amplifier circuit part to form two differential output signals. The differential source follower circuit provided by the present invention can solve the problems that the voltage gain value of the traditional source follower in the prior art is too small and cannot be adjusted.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and more specifically, to a differential source follower circuit and a method for adjusting its voltage gain. Background Art

[0002] A source follower circuit is a common amplifier circuit, also known as a voltage follower circuit. Its main function is to amplify or reduce the voltage of an input signal and then output it. It can be said that the source follower circuit is a voltage scaler that can convert a high-impedance input signal into a low-impedance signal output to drive the next-stage circuit or load.

[0003] The circuit structure of a traditional single-ended source follower is as Figure 1 shown. The single-ended source follower circuit includes two PMOS transistors, M0' and M2'. Among them, M0' is the amplifying transistor. The input signal is input from the gate of M0' and output from the source of M0'. The drain of M0' is grounded; M2' is the biasing transistor, and the gate of M2' is connected to a fixed bias voltage to provide a suitable DC operating point for M0'.

[0004] From Figure 1 it can be known that the calculation formula for the voltage gain of the circuit of a traditional single-ended source follower is as follows:

[0005] ,

[0006] The calculation formula for the output resistance of the circuit of a traditional single-ended source follower is as follows:

[0007] ,

[0008] In the above two formulas, represents the transconductance of M0', represents the output resistance of M0'.

[0009] It can be seen from the above two formulas that the voltage gain of a traditional (single-ended) source follower is about 1 but slightly less than 1; however, the too-low voltage gain (less than 1) limits the application range of the source follower; moreover, the voltage gain of a traditional source follower is determined and cannot be adjusted, making it inapplicable to application scenarios where the voltage gain changes.

[0010] Based on the above technical problems, there is an urgent need for a source follower circuit with adjustable voltage gain. Summary of the Invention

[0011] In view of the above problems, the purpose of the present invention is to provide a differential source follower circuit to solve the problem that the voltage gain value of a traditional source follower in the prior art is too small and cannot be adjusted.

[0012] The present invention provides a differential source follower circuit, which includes a differential circuit part, a bias circuit part, and an auxiliary amplifier circuit part; wherein,

[0013] The bias circuit part is used to provide a corresponding DC operating point for the differential circuit part;

[0014] The auxiliary amplifier circuit part is used to provide auxiliary amplification for the differential circuit part;

[0015] The differential circuit part is used to perform differential amplification processing on two differential input signals based on the bias circuit part and the auxiliary amplifier circuit part to form two differential output signals; wherein, the differential circuit part, the bias circuit part, and the auxiliary amplifier circuit part each include two transistors; wherein, the two transistors of the differential circuit part and the two transistors of the bias circuit part are transistors of the same channel type, and the two transistors of the differential circuit part and the two transistors of the auxiliary amplifier circuit part are transistors of different channel types; and,

[0016] The two transistors included in the differential circuit part are respectively grouped in one-to-one correspondence with the two transistors of the auxiliary amplifier circuit part; wherein, the drains of the two grouped transistors are connected, and the gates of the two non-grouped transistors are connected and then connected to the corresponding differential input signal.

[0017] In addition, a preferred solution is that the differential circuit part includes a first transistor and a second transistor, the bias circuit part includes a third transistor and a fourth transistor, and the auxiliary amplifier circuit part includes a fifth transistor and a sixth transistor; wherein,

[0018] The first transistor, the second transistor, the third transistor, and the fourth transistor are PMOS transistors, and the fifth transistor and the sixth transistor are NMOS transistors; and,

[0019] The gates of the first transistor and the sixth transistor are both connected to a first differential input signal, the gates of the second transistor and the fifth transistor are both connected to a second differential input signal, the gates of the third transistor and the fourth transistor are both connected to a first fixed bias voltage, the sources of the first transistor and the drains of the third transistor are both connected to a first differential output signal, the sources of the second transistor and the drains of the fourth transistor are both connected to a second differential output signal, the drains of the first transistor and the fifth transistor are connected, the drains of the second transistor and the sixth transistor are connected, the sources of the third transistor and the fourth transistor are both connected to a power supply, and the sources of the fifth transistor and the sixth transistor are both grounded.

[0020] In addition, preferably, a variable resistor is connected between the first differential output signal and the second differential output signal.

[0021] In addition, preferably,

[0022] The variable resistor includes a gate-controlled transmission gate.

[0023] In addition, preferably, the voltage gain calculation formula of the differential source follower circuit is:

[0024] ,

[0025] where, and respectively represent the transconductances of the first transistor and the fifth transistor, and respectively represent the output resistances of the first transistor and the fifth transistor, represents the resistance value of the variable resistor.

[0026] In addition, preferably, the differential circuit part includes a seventh transistor and an eighth transistor, the bias circuit part includes a ninth transistor and a tenth transistor, and the auxiliary amplifier circuit part includes an eleventh transistor and a twelfth transistor; where,

[0027] The seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor are NMOS transistors, and the eleventh transistor and the twelfth transistor are PMOS transistors; and,

[0028] The gates of the seventh transistor and the twelfth transistor are both connected to a third differential input signal, the gates of the eighth transistor and the eleventh transistor are both connected to a fourth differential input signal, the gates of the ninth transistor and the tenth transistor are both connected to a second fixed bias voltage, the sources of the seventh transistor and the drains of the ninth transistor are both connected to a third differential output signal, the sources of the eighth transistor and the drains of the tenth transistor are both connected to a fourth differential output signal, the drains of the seventh transistor and the eleventh transistor are connected to each other, the drains of the eighth transistor and the twelfth transistor are connected to each other, the sources of the ninth transistor and the tenth transistor are both grounded, and the sources of the eleventh transistor and the twelfth transistor are both connected to a power supply.

[0029] In addition, preferably, a variable resistor is connected between the third differential output signal and the fourth differential output signal.

[0030] In addition, in a preferred embodiment, the variable resistor includes a gate-controlled transmission gate.

[0031] On the other hand, the present invention also provides a method for adjusting the voltage gain of the differential source follower circuit as described above, including:

[0032] Adjusting the resistance value of the variable resistor to adjust the voltage gain of the differential source follower circuit.

[0033] In addition, in a preferred embodiment, adjusting the resistance value of the variable resistor includes:

[0034] Adjusting the gate voltage of the transmission gate to adjust the on-resistance of the transmission gate; wherein,

[0035] The on-resistance of the transmission gate is the resistance value of the variable resistor.

[0036] Compared with the prior art, the differential source follower circuit provided by the present invention can increase the voltage gain to 6 dB, which is twice that of the traditional source follower circuit, and can significantly improve the voltage gain of the source follower circuit. In addition, the differential source follower circuit and its voltage gain adjustment method provided by the present invention can also adjust the voltage gain to adapt to different voltage gain application scenarios.

[0037] To achieve the above and related purposes, one or more aspects of the present invention include features that will be described in detail hereinafter and particularly pointed out in the claims. The following description and the accompanying drawings illustrate certain exemplary aspects of the present invention in detail. However, these aspects merely indicate some of the various ways in which the principles of the present invention can be used. In addition, the present invention is intended to cover all such aspects and their equivalents. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] By referring to the following description in conjunction with the accompanying drawings and the content of the claims, and with a more comprehensive understanding of the present invention, other objects and results of the present invention will become more apparent and easier to understand. In the drawings:

[0039] Figure 1 is a schematic diagram of a traditional single-ended source follower circuit;

[0040] Figure 2 is a schematic diagram of the first differential source follower circuit provided by the embodiment of the present invention;

[0041] Figure 3 is a schematic diagram of the second differential source follower circuit provided by the embodiment of the present invention;

[0042] Figure 4 is a schematic diagram of the small-signal (corresponding to the first differential source follower circuit) equivalent circuit of the differential source follower circuit provided by the embodiment of the present invention.

[0043] In the accompanying drawings: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a first differential input signal inp1, a second differential input signal inn1, a first differential output signal outp1, a second differential output signal outn1, a first fixed bias voltage vb1, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a third differential input signal inp2, a fourth differential input signal inn2, a second fixed bias voltage vb2.

[0044] In all the accompanying drawings, the same reference numerals indicate similar or corresponding features or functions. Detailed implementation manners

[0045] In the following description, for the purpose of illustration, in order to provide a thorough understanding of one or more embodiments, numerous specific details are set forth. However, it is obvious that these embodiments can also be implemented without these specific details. In other instances, well-known structures and devices are shown in block diagram form for the convenience of describing one or more embodiments.

[0046] It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0047] The principle of the differential source follower circuit provided by the present invention will be described in detail below with reference to the accompanying drawings. The main body of the differential source follower circuit provided by the present invention is a differential circuit structure, which mainly includes three parts, namely, a differential circuit part, a bias circuit part, and an auxiliary amplifier circuit part. Among them, the bias circuit part is used to provide the corresponding DC operating point for the differential circuit part; the auxiliary amplifier circuit part is used to provide auxiliary amplification for the differential circuit part; the differential circuit part is used to perform differential amplification processing on two differential input signals based on the bias circuit part and the auxiliary amplifier circuit part to form two differential output signals. Among them, the differential circuit part, the bias circuit part, and the auxiliary amplifier circuit part each include two transistors. Among them, the two transistors of the differential circuit part and the two transistors of the bias circuit part are transistors of the same channel type, and the two transistors of the differential circuit part and the two transistors of the auxiliary amplifier circuit part are transistors of different channel types. And, the two transistors included in the differential circuit part are respectively grouped in one-to-one correspondence with the two transistors of the auxiliary amplifier circuit part. Among them, the drains of the two grouped transistors are connected, and the gates of the two non-grouped transistors are connected and then connected to the corresponding differential input signal. The sources of the two transistors of the differential circuit part are respectively connected to the corresponding differential output signals. The gates of the two transistors of the bias circuit part are both connected to a fixed bias voltage, the drains of the two transistors of the bias circuit part are respectively connected to the corresponding differential output signals, and the sources of the two transistors of the bias circuit part are commonly connected to the power supply (when the two transistors of the bias circuit part are PMOS transistors) or commonly grounded (when the two transistors of the bias circuit part are NMOS transistors). The sources of the two transistors of the auxiliary amplifier circuit part are commonly grounded (when the two transistors of the auxiliary amplifier circuit part are NMOS transistors) or commonly connected to the power supply (when the two transistors of the auxiliary amplifier circuit part are PMOS transistors).

[0048] For example, Figure 2 In the illustrated embodiment, M1 and M5 are defined as a group, and M2 and M6 are defined as a group. At this time, M1 and M6 are defined as non-grouped (respectively in the differential circuit part and the auxiliary amplifier circuit part), and M2 and M5 are defined as non-grouped (respectively in the differential circuit part and the auxiliary amplifier circuit part); the drains between the grouped M1 and M5 are connected, the drains between the grouped M2 and M6 are connected, the gates of the non-grouped M1 and M6 are connected and then connected to a differential input signal, and the gates of the non-grouped M2 and M5 are connected and then connected to another differential input signal.

[0049] For another example, Figure 3In the illustrated embodiment, M7 and M11 are defined as a group, and M8 and M12 are defined as a group. At this time, M7 and M12 are defined as not grouped (located in the differential circuit part and the auxiliary amplification circuit part respectively), and M8 and M11 are defined as not grouped (located in the differential circuit part and the auxiliary amplification circuit part respectively); the drains of the grouped M7 and M11 are connected, the drains of the grouped M8 and M12 are connected, the gates of the ungrouped M7 and M12 are connected and then connected to a differential input signal, and the gates of the ungrouped M8 and M11 are connected and then connected to another differential input signal.

[0050] Specifically, to implement the functions of each part in the differential source follower circuit provided by the present invention, the present invention provides two specific circuit designs. The schematic diagram of the first differential source follower circuit provided by the present invention is as Figure 2 shown, and it can be seen from Figure 2 that the first differential source follower circuit provided by the present invention mainly includes four PMOS transistors M1 - M4 and two NMOS transistors M5 and M6; among them, the differential circuit part includes a first transistor M1 and a second transistor M2, and the first transistor M1 and the second transistor M2 are amplification transistors; the bias circuit part includes a third transistor M3 and a fourth transistor M4, and the third transistor M3 and the fourth transistor M4 are bias transistors; the auxiliary amplification circuit part includes a fifth transistor M5 and a sixth transistor M6, and the fifth transistor M5 and the sixth transistor M6 are auxiliary amplification transistors.

[0051] More specifically, the gates of the first transistor M1 and the sixth transistor M6 are both connected to the first differential input signal inp1, the gates of the second transistor M2 and the fifth transistor M5 are both connected to the second differential input signal inn1, the gates of the third transistor M3 and the fourth transistor M4 are both connected to the first fixed bias voltage vb1, and the first fixed bias voltage vb1 is used to provide a suitable DC operating point for the circuit. The source of the first transistor M1 and the drain of the third transistor M3 are both connected to the first differential output signal outp1, the source of the second transistor M2 and the drain of the fourth transistor M4 are both connected to the second differential output signal outn1, the drain of the first transistor M1 is connected to the drain of the fifth transistor M5, the drain of the second transistor M2 is connected to the drain of the sixth transistor M6, the sources of the third transistor M3 and the fourth transistor M4 are both connected to the power supply, and the sources of the fifth transistor M5 and the sixth transistor M6 are both grounded.

[0052] A preliminary analysis of the schematic diagram of the first differential source follower circuit provided in the embodiments of the present invention above shows that, under the drive of the first transistor M1 and the second transistor M2, due to the presence of the third transistor M3 and the fourth transistor M4 as bias transistors, when the first differential input signal inp1 increases (and the corresponding second differential input signal inn1 decreases), the first differential output signal outp1 will initially increase (and the corresponding second differential output signal outn1 will initially decrease). In addition, due to the presence of the fifth transistor M5 and the sixth transistor M6 as auxiliary amplification transistors, the voltage at the drain of the fifth transistor M5 will increase (and the voltage at the drain of the corresponding sixth transistor M6 will decrease), thereby causing the first differential output signal outp1 to further increase (and the corresponding second differential output signal outn1 to further decrease), thus significantly improving the voltage gain of the differential source follower circuit provided by the present invention, and the voltage gain can be increased to 6 dB.

[0053] Furthermore, for the first differential source follower circuit provided in the embodiments of the present invention, in order to achieve controllable adjustment of its voltage gain, a variable resistor can be connected across the first differential output signal outp1 and the second differential output signal outn1. Specifically, in order to achieve resistance adjustment of the variable resistor, the variable resistor can include a transmission gate controlled by a gate. When the gate voltage vdac of the transmission gate changes under control, the on-resistance of the transmission gate will also change. Thus, the resistance adjustment of the variable resistor is achieved.

[0054] The schematic diagram of the second differential source follower circuit provided by the present invention is as Figure 3 shown, and is composed of Figure 3It can be known that the differential circuit part may also include a seventh transistor M7 and an eighth transistor M8, the bias circuit part includes a ninth transistor M9 and a tenth transistor M10, and the auxiliary amplification circuit part includes an eleventh transistor M11 and a twelfth transistor M12; wherein, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 are NMOS transistors, and the eleventh transistor M11 and the twelfth transistor M12 are PMOS transistors; moreover, the gates of the seventh transistor M7 and the twelfth transistor M12 are both connected to a third differential input signal inp2, the gates of the eighth transistor M8 and the eleventh transistor M11 are both connected to a fourth differential input signal inn2, the gates of the ninth transistor M9 and the tenth transistor M10 are both connected to a second fixed bias voltage vb2, the sources of the seventh transistor M7 and the drains of the ninth transistor M9 are both connected to a third differential output signal outp2, the sources of the eighth transistor M8 and the drains of the tenth transistor M10 are both connected to a fourth differential output signal outn2, the drains of the seventh transistor M7 and the eleventh transistor M11 are connected to each other, the drains of the eighth transistor M8 and the twelfth transistor M12 are connected to each other, the sources of the ninth transistor M9 and the tenth transistor M10 are both grounded, and the sources of the eleventh transistor M11 and the twelfth transistor M12 are both connected to a power supply.

[0055] Certainly, for the second differential source follower circuit provided by the embodiments of the present invention, in order to achieve controllable adjustment of its voltage gain, a variable resistor may also be connected across the third differential output signal outp2 and the fourth differential output signal outn2. Specifically, to achieve resistance value adjustment of the variable resistor, the variable resistor may include a gate-controlled transmission gate. When the gate voltage vdac of the transmission gate changes under control, the on-resistance of the transmission gate also changes, thereby achieving resistance value adjustment of the variable resistor.

[0056] It is worth noting that Figure 2 what is described is the circuit structure when PMOS is input. Correspondingly, Figure 3 the circuit structure when NMOS is input is described; these two structures have the same function and internal logic and should both be within the protection scope of this patent.

[0057] To further illustrate the working principle of the differential source follower circuit provided by the present invention, Figure 4 a single-ended small-signal equivalent circuit of the differential source follower circuit provided by the embodiments of the present invention is shown (this equivalent circuit corresponds to Figure 2 the first differential source follower circuit shown, Figure 3The principle of the second differential source follower circuit shown is the same. By analyzing and calculating it, the voltage gain calculation formula of the differential source follower circuit provided by the present invention can be obtained as follows:

[0058] ,

[0059] wherein, represents the output voltage, represents the input voltage, and respectively represent the transconductances of the first transistor and the fifth transistor, and respectively represent the output resistances of the first transistor and the fifth transistor, represents the resistance value of the variable resistor. It should be noted that since Figure 4 is Figure 2 which shows the equivalent circuit of the first differential source follower circuit provided by the embodiment of the present invention. Therefore, in Figure 4 , corresponds to outp1, corresponds to inp1.

[0060] Compared with the voltage gain calculation formula of the traditional single - ended source follower circuit mentioned in the background art of this application, for the voltage gain formula of the differential source follower circuit provided by the present invention above, when and are approximately equal (which is satisfied in most cases), the voltage gain of the differential source follower circuit provided by the present invention is 6 dB, which is twice that of the traditional source follower circuit. At the same time, the voltage gain is proportional to the load (i.e., the resistance value of the variable resistor). By changing the value of , the adjustment of the voltage gain can be achieved. At the same time, the voltage gain is proportional to the load . By changing the value of , the adjustment of the voltage gain can be achieved.

[0061] In addition, the output resistance calculation formula is the value of Vo divided by the output - end current when the input voltage is 0. Therefore, by further analyzing and calculating Figure 4 , the output resistance calculation formula of the differential source follower circuit provided by the present invention can be obtained as follows:

[0062] .

[0063] Compared with the output resistance calculation formula of the traditional single - ended source follower circuit mentioned in the background art of this application, when When it is large enough (which is satisfied in most cases), the output resistance of the differential source follower circuit provided by the present invention is basically the same as that of the traditional source follower circuit, and can maintain the broadband width characteristic of the source follower.

[0064] On the other hand, to further illustrate the specific adjustment principle of the differential source follower circuit provided by the present invention, the present invention also provides a voltage gain adjustment method for the differential source follower circuit as described above. This voltage gain adjustment method is applicable to the above two differential source follower circuits provided by the present invention, and this voltage gain adjustment method includes:

[0065] Adjust the resistance value of the variable resistor to adjust the voltage gain of the differential source follower circuit.

[0066] Furthermore, the specific process of adjusting the resistance value of the variable resistor includes:

[0067] Adjust the gate voltage of the transmission gate to adjust the on-resistance of the transmission gate; wherein,

[0068] The on-resistance of the transmission gate is the resistance value of the variable resistor.

[0069] As described above, the differential source follower circuit and its gain adjustment method according to the present invention are described by way of example with reference to the accompanying drawings. However, those skilled in the art should understand that various improvements can be made to the above differential source follower circuit and its gain adjustment method proposed by the present invention without departing from the content of the present invention. Therefore, the protection scope of the present invention should be determined by the content of the appended claims.

Claims

1. A differential source follower circuit, characterized in that: It includes a differential circuit part, a bias circuit part and an auxiliary amplifier circuit part; wherein, The bias circuit part is used to provide a corresponding DC operating point for the differential circuit part; The auxiliary amplifier circuit part is used to provide auxiliary amplification for the differential circuit part; The differential circuit part is used to perform differential amplification processing on two differential input signals based on the bias circuit part and the auxiliary amplifier circuit part to form two differential output signals; wherein, The differential circuit part is connected to the bias circuit part, and the differential circuit part, the bias circuit part and the auxiliary amplifier circuit part each include two transistors; wherein the two transistors of the differential circuit part and the two transistors of the bias circuit part are PMOS transistors, and the two transistors of the auxiliary amplifier circuit part are NMOS transistors; or, the two transistors of the differential circuit part and the two transistors of the bias circuit part are NMOS transistors, and the two transistors of the auxiliary amplifier circuit part are PMOS transistors; and, The two transistors included in the differential circuit part are respectively grouped with the two transistors of the auxiliary amplifier circuit part in a one-to-one correspondence; wherein the drains of the two transistors in the group are connected, and the gates of the two transistors not in the group are connected and then connected to the corresponding differential input signal; the sources of the two transistors in the differential circuit part are respectively connected to the corresponding differential output signals.

2. The differential source follower circuit according to claim 1, characterized in that: The differential circuit part includes a first transistor and a second transistor, the bias circuit part includes a third transistor and a fourth transistor, and the auxiliary amplifier circuit part includes a fifth transistor and a sixth transistor; wherein, The first transistor, the second transistor, the third transistor and the fourth transistor are PMOS transistors, the fifth transistor and the sixth transistor are NMOS transistors; and, The gate of the first transistor and the gate of the sixth transistor are both connected to the first differential input signal, the gate of the second transistor and the gate of the fifth transistor are both connected to the second differential input signal, the gate of the third transistor and the gate of the fourth transistor are both connected to a first fixed bias voltage, the source of the first transistor and the drain of the third transistor are both connected to the first differential output signal, the source of the second transistor and the drain of the fourth transistor are both connected to the second differential output signal, the drain of the first transistor is connected to the drain of the fifth transistor, the drain of the second transistor is connected to the drain of the sixth transistor, the source of the third transistor and the source of the fourth transistor are both connected to a power supply, and the source of the fifth transistor and the source of the sixth transistor are both grounded.

3. The differential source follower circuit according to claim 2, characterized in that: A variable resistor is connected between the first differential output signal and the second differential output signal.

4. The differential source follower circuit according to claim 3, characterized in that: The variable resistor includes a gate-controlled transmission gate.

5. The differential source follower circuit according to claim 4, characterized in that: The voltage gain calculation formula of the differential source follower circuit is: in, and denote the transconductance of the first transistor and the fifth transistor respectively, and Respectively represent the output resistance of the first transistor and the fifth transistor, Indicates the resistance value of the variable resistor.

6. The differential source follower circuit according to claim 1, characterized in that: The differential circuit part includes a seventh transistor and an eighth transistor, the bias circuit part includes a ninth transistor and a tenth transistor, and the auxiliary amplifier circuit part includes an eleventh transistor and a twelfth transistor; wherein, The seventh transistor, the eighth transistor, the ninth transistor and the tenth transistor are NMOS transistors, the eleventh transistor and the twelfth transistor are PMOS transistors; and, The gate of the seventh transistor and the gate of the twelfth transistor are both connected to the third differential input signal, the gate of the eighth transistor and the gate of the eleventh transistor are both connected to the fourth differential input signal, the gate of the ninth transistor and the gate of the tenth transistor are both connected to the second fixed bias voltage, the source of the seventh transistor and the drain of the ninth transistor are both connected to the third differential output signal, the source of the eighth transistor and the drain of the tenth transistor are both connected to the fourth differential output signal, the drain of the seventh transistor is connected to the drain of the eleventh transistor, the drain of the eighth transistor is connected to the drain of the twelfth transistor, the source of the ninth transistor and the source of the tenth transistor are both grounded, and the source of the eleventh transistor and the source of the twelfth transistor are both connected to a power supply.

7. The differential source follower circuit according to claim 6, characterized in that: A variable resistor is connected between the third differential output signal and the fourth differential output signal.

8. The differential source follower circuit according to claim 7, characterized in that: The variable resistor includes a gate-controlled transmission gate.

9. A voltage gain adjustment method for a differential source follower circuit as claimed in any one of claims 1 to 8, characterized in that: include: The resistance value of the variable resistor is adjusted to adjust the voltage gain of the differential source follower circuit.

10. The voltage gain adjustment method of the differential source follower circuit according to claim 9, characterized in that: The step of adjusting the resistance value of the variable resistor comprises: Regulating the gate voltage of the transmission gate to adjust the on-resistance of the transmission gate; wherein, The on-resistance of the transmission gate is the resistance value of the variable resistor.

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