Transistor structure, frequency characteristic improvement method and manufacturing method

Abstract

The invention relates to the technical field of chip manufacturing processes, and discloses a transistor structure, a frequency characteristic improvement method and a manufacturing method. The transistor body comprises a substrate epitaxial layer, a collector electrode, an emitter electrode and a base electrode; the collector is arranged at the bottom of the substrate epitaxial layer; a first base region and a second base region are arranged at the top of the substrate epitaxial layer; wherein the second base region is located in the first base region, and an emitter region is arranged in the second base region; the base electrode is arranged in the first base region at the top of the substrate epitaxial layer; according to the invention, the second base region is arranged in the first base region, so that the parasitic effect of the transistor under high-frequency operation is reduced, and on the basis of not changing the structural design of other plate layers, the photoetching plate design of the second base region is additionally arranged on the original structure, so that the frequency characteristic of the transistor is remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip manufacturing process, and in particular to a transistor structure, frequency characteristic improvement and manufacturing method. Background Art

[0002] The transistor is one of the most important devices in electronic circuits, and its most important functions are current amplification and switching. Bipolar transistors have been widely used in broadcasting, television, communications, radar, computers, automatic control devices, electronic instruments, household appliances and other fields due to their small size, light weight, low power consumption, long life and high reliability. They play the role of amplification, oscillation and switching, and high-frequency transistors are widely used in some high-frequency, high-reliability and demanding equipment. With the development of various power electronic systems towards miniaturization, intelligence and automation, the operating frequency of electronic whole systems is getting higher and higher, and microwave semiconductor devices are increasingly widely used in various fields. At the same time, there are also higher requirements for the performance of transistors, especially the requirements for the operating frequency of transistors.

[0003] A common method to increase the characteristic frequency of transistors is to reduce the base width W B , but reduce W B Make the transistor characteristic frequency ƒ T At the same time, the current gain of the transistor will be significantly increased and it will be detrimental to the noise performance of the transistor. Therefore, this method is only applicable to products with a large transistor current gain margin. Summary of the invention

[0004] In order to overcome the defects of the above-mentioned prior art, the purpose of the present invention is to provide a transistor structure, an improvement in frequency characteristics and a manufacturing method, so as to solve the technical problem that the frequency characteristics cannot be improved in the prior art.

[0005] The present invention is achieved through the following technical solutions: In a first aspect, the present invention provides a transistor structure, comprising a transistor body; The transistor body comprises a substrate epitaxial layer, a collector, an emitter and a base; The collector is arranged at the bottom of the substrate epitaxial layer; the first base region and the second base region are arranged on the top of the substrate epitaxial layer; wherein the second base region is located in the first base region, and an emitter region is arranged in the second base region; the base is arranged in the first base region at the top of the substrate epitaxial layer; and the emitter is arranged in the emitter region.

[0006] Preferably, the base is on the top of the epitaxial layer of the substrate and is located between the first base region and the second base region.

[0007] Preferably, the coverage width of the first base region on the top of the substrate epitaxial layer is 8 μm to 10 μm, wherein the depth of the first base region is 1.5 μm to 2.0 μm.

[0008] Preferably, the coverage width of the second base region on the top of the substrate epitaxial layer is 2 μm to 4 μm, wherein the depth of the second base region is 1.0 μm to 1.5 μm.

[0009] Preferably, the depth of the emission region is 0.5 μm to 1.0 μm.

[0010] Preferably, the first base region and the second base region are in the same area in the longitudinal direction of the substrate epitaxial layer, wherein the coverage width of the first base region over the second base region at the top of the substrate epitaxial layer is 4μm to 6μm; the first base region is 0.5μm to 1.0μm deeper than the second base region.

[0011] Preferably, the substrate epitaxial layer comprises a substrate layer and an epitaxial layer; The collector electrode is arranged at the bottom of the substrate layer, and the epitaxial layer is arranged at the top of the substrate layer; The first base region and the second base region are both arranged on the top of the epitaxial layer.

[0012] In a second aspect, the present invention further provides a method for improving the frequency characteristics of a transistor structure, based on the above-mentioned transistor structure, comprising the following process: In the first base region on the top of the epitaxial layer of the substrate, a second base region is formed by photolithography; Impurities are injected into the first base region and the second base region so that the impurity distribution of the first base region and the second base region is steep, the base region electric field factor is determined according to the impurity concentration of the first base region and the second base region, and the frequency characteristics are determined according to the base region electric field factor, wherein the greater the impurity concentration of the first base region and the second base region, the greater the base region electric field factor, and the greater the frequency characteristics.

[0013] Preferably, the frequency characteristic of the transistor structure is expressed as follows:

[0014] in, f T Represents the frequency characteristics of the transistor structure; τ b W represents the base region transit time of minority carriers; B is the base width; D B is the base region minority carrier diffusion coefficient, and λ is the base region electric field factor.

[0015] In a third aspect, the present invention further provides a method for manufacturing a transistor structure, based on the above-mentioned transistor structure, comprising the following process: A first base region is formed by photolithography on a silicon wafer of a substrate epitaxial layer, wherein the depth of the expansion region of the first base region is 1.5 μm to 2 μm; a second base region is formed by photolithography in the first base region, wherein the depth of the expansion region of the second base region is 1 μm to 1.5 μm, and the coverage width of the first base region on the second base region is 4 μm to 6 μm; Then, an emission region is formed in the second base region by photolithography, and the expansion depth of the emission region is 0.5 μm to 1.0 μm; A base ohmic hole and an emitter ohmic hole are formed in the first base region, the second base region and the emitter region respectively through a photolithography hole process, and then metal is deposited on the front side. Then, metal and alloy are photolithographically processed to form ohmic contact with the base ohmic hole and the emitter ohmic hole, thereby forming a base and an emitter respectively. The first base region, the second base region and the emitter region constitute the process structure of the transistor body, and finally metallization is performed on the back side of the silicon wafer to form a collector.

[0016] Compared with the prior art, the present invention has the following beneficial technical effects: The present invention provides a transistor structure, wherein a collector is arranged at the bottom of a substrate epitaxial layer; a first base region and a second base region are arranged at the top of the substrate epitaxial layer; wherein the second base region is located in the first base region, and an emitter region is arranged in the second base region; a base is arranged in the first base region at the top of the substrate epitaxial layer; an emitter is arranged in the emitter region, and by arranging the second base region in the first base region, the parasitic effect of the transistor under high-frequency operation is reduced, and on the basis of not changing the design of other layer structures, a photolithography plate design of the second base region is added to the original structure to significantly improve the frequency characteristics of the transistor.

[0017] The present invention provides a method for improving the frequency characteristics of a transistor structure. By photolithographically forming a second base region in a first base region at the top of a substrate epitaxial layer and accurately controlling the impurity injection of the first base region and the second base region, the internal electric field distribution of the transistor can be significantly affected. When the impurity concentration increases, the base region electric field factor also increases, which directly leads to a significant improvement in the frequency characteristics of the transistor. The steepness of the impurity distribution is crucial to the performance of the transistor. By accurately controlling the impurity injection process, it can be ensured that the impurity distribution of the first base region and the second base region is both steep and uniform. This steep impurity distribution helps to reduce the current diffusion effect inside the transistor, thereby improving the switching speed and frequency response of the transistor.

[0018] The present invention also provides a method for manufacturing a transistor structure, which uses photolithography technology to accurately control the expansion depth of the first base region, the second base region and the emitter region and the coverage width of the first base region on the second base region, thereby ensuring the accuracy and consistency of the transistor structure. This precise control helps to optimize the performance of the transistor, such as improving frequency response, reducing power consumption and enhancing stability. The base ohmic hole and the emitter ohmic hole are formed by a photolithography hole process, and after the metal is deposited on the front side, the metal and alloy are processed by photolithography to ensure that good ohmic contact is formed between the metal and the base and emitter. This high-quality ohmic contact helps to reduce contact resistance and improve the current transmission efficiency and stability of the transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a schematic diagram of the structure of a transistor in an embodiment of the present invention; Figure 2 Schematic diagram of the impurity concentration curve at the boundary of the second base-emitter junction in an embodiment of the present invention; Figure 3 A schematic diagram of the structure of an NPN transistor in an embodiment of the present invention; In the figure: 1. transistor body; 2. collector; 3. substrate layer; 4. epitaxial layer; 5. first base region; 6. second base region; 7. emitter region; 8. emitter; 9. base. DETAILED DESCRIPTION

[0020] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0021] The purpose of the present invention is to provide a transistor structure, an improvement in frequency characteristics and a manufacturing method to solve the technical problem that the frequency characteristics cannot be improved in the prior art.

[0022] The present invention is further described in detail below in conjunction with the accompanying drawings: Example 1 See also Figure 1 , In one embodiment of the present invention, a transistor structure is provided, including a transistor body 1; The transistor body 1 includes a substrate epitaxial layer, a collector 2, an emitter 8 and a base 9; The collector 2 is arranged at the bottom of the substrate epitaxial layer; the first base region 5 and the second base region 6 are arranged at the top of the substrate epitaxial layer; wherein the second base region 6 is located in the first base region 5, and an emitter region 7 is arranged in the second base region 6; the base 9 is arranged in the first base region 5 at the top of the substrate epitaxial layer; the emitter 8 is arranged in the emitter region 7.

[0023] Specifically, the base 9 is on the top of the substrate epitaxial layer and located between the first base region 5 and the second base region 6 .

[0024] Specifically, the coverage width of the first base region 5 on the top of the substrate epitaxial layer is 8 μm to 10 μm, wherein the depth of the first base region 5 is 1.5 μm to 2.0 μm.

[0025] Specifically, the coverage width of the second base region 6 on the top of the substrate epitaxial layer is 2 μm to 4 μm, wherein the depth of the second base region 6 is 1.0 μm to 1.5 μm.

[0026] Specifically, the depth of the emission region 7 is 0.5 μm to 1.0 μm.

[0027] Specifically, the first base region 5 and the second base region 6 are in the same area in the longitudinal direction of the substrate epitaxial layer, wherein the coverage width of the first base region 5 to the second base region 6 at the top of the substrate epitaxial layer is 4μm to 6μm; the first base region 5 is 0.5μm to 1.0μm deeper than the second base region 6.

[0028] Specifically, the substrate epitaxial layer includes a substrate layer 3 and an epitaxial layer 4; The collector electrode 2 is arranged at the bottom of the substrate layer 3, and the epitaxial layer 4 is arranged on the top of the substrate layer 3; The first base region 5 and the second base region 6 are both arranged on the top of the epitaxial layer 4 .

[0029] In this embodiment, the substrate epitaxial layer is composed of a substrate layer 3 and an epitaxial layer 4, which provides a basic physical structure for the transistor. The collector 2, the emitter 8 and the base 9 are the basic electrodes of the transistor, which respectively bear the functions of collecting current, emitting current and controlling current. The special design of the first base region 5 and the second base region 6 is the key to achieving high performance of the transistor. The second base region 6 is located in the first base region 5, and this nested structure helps to more accurately control the current path and current density. The coverage width and depth of the first base region 5 and the second base region 6 on the top of the substrate epitaxial layer are accurately calculated to ensure that the transistor has good current amplification performance and stability.

[0030] In summary, the present invention provides a transistor structure, wherein a collector is arranged at the bottom of a substrate epitaxial layer; a first base region and a second base region are arranged at the top of the substrate epitaxial layer; wherein the second base region is located in the first base region, and an emitter region is arranged in the second base region; a base is arranged in the first base region at the top of the substrate epitaxial layer; an emitter is arranged in the emitter region, and by arranging the second base region in the first base region, the parasitic effect of the transistor under high-frequency operation is reduced, and on the basis of not changing the design of other layer structures, a photolithography design of the second base region is added to the original structure to significantly improve the frequency characteristics of the transistor.

[0031] Example 2 The present invention also provides a method for improving the frequency characteristics of a transistor structure, based on the above-mentioned transistor structure, comprising the following process: In the first base region 5 on the top of the epitaxial layer of the substrate, a second base region 6 is formed by photolithography; Impurities are injected into the first base region 5 and the second base region 6 so that the impurity distribution of the first base region 5 and the second base region 6 is steep, the base region electric field factor is determined according to the impurity concentration of the first base region 5 and the second base region 6, and the frequency characteristics are determined according to the base region electric field factor, wherein the greater the impurity concentration of the first base region 5 and the second base region 6, the greater the base region electric field factor, and the greater the frequency characteristics.

[0032] In this embodiment, the characteristic frequency formula of the transistor is as follows:

[0033] Among them, τ b is the base region transit time of minority carriers, W B is the base width, D B is the base region minority carrier diffusion coefficient, λ is the base region electric field factor; from the above formula, it can be seen that the transistor characteristic frequency ƒ T The high frequency transistor structure of this embodiment is mainly used to increase the characteristic frequency of the transistor by increasing the base region electric field factor λ.

[0034] The calculation formula of the base electric field factor λ is as follows:

[0035] According to the above, N B (0) is the impurity concentration on the base side at the junction of the base and emitter regions, N B (W B ) is the impurity concentration on the base side at the junction of the base and collector regions; λ is determined by the impurity concentration of the base at the two boundaries of the emitter junction and the collector junction. The steeper the impurity distribution in the base region, that is, the steeper the impurity concentration distribution curve in the base region, the larger λ is.

[0036] In this embodiment, the second base region 6 mainly functions to increase the impurity concentration of the base region at the emitter junction boundary, thereby making the impurity distribution of the base region at the two boundaries of the emitter junction and the collector junction steeper, thereby increasing the base region electric field factor λ. Therefore, according to the influence on other parameters of the transistor, the impurity injection dose of the first base region 5 and the second base region 6 is adjusted so that λ is preferably maintained between 4 and 6.

[0037] Take NPN tube as an example. Figure 2 As shown, N B (0) is the impurity concentration at the base-emitter junction boundary. λ is the base electric field factor, which is a dimensionless number and can be expressed as B (0) and N B (W B )express.

[0038] In this embodiment, impurities are implanted into the first base region 5 and the second base region 6 to form a steep impurity profile. The concentration and depth of the impurity implantation are key parameters, which directly determine the size of the base region electric field factor. An increase in the impurity concentration will lead to a decrease in the base region resistivity, thereby enhancing the electric field strength in the base region. This enhancement of the electric field strength helps to increase the switching speed of the transistor, thereby improving the frequency characteristics.

[0039] The base region electric field factor is an important parameter that describes the electric field strength in the base region. When the impurity concentration of the first base region 5 and the second base region 6 increases, the base region electric field factor also increases. The increase in the base region electric field factor means that the electric field strength in the base region is enhanced, which helps to accelerate the movement of carriers and increase the switching speed of the transistor. Therefore, the frequency characteristics also increase.

[0040] By precisely controlling the concentration and depth of impurity implantation and optimizing the structural dimensions of the base region, the method of the present invention can significantly improve the frequency characteristics of the transistor. The improvement of the frequency characteristics means that the transistor can respond to changes in the input signal more quickly and is suitable for higher frequency circuit applications.

[0041] In summary, this embodiment provides a method for improving the frequency characteristics of a transistor structure, by photolithographically forming a second base region in a first base region at the top of a substrate epitaxial layer, and accurately controlling the impurity injection of the first base region and the second base region, the internal electric field distribution of the transistor can be significantly affected. When the impurity concentration increases, the base region electric field factor also increases, which directly leads to a significant improvement in the frequency characteristics of the transistor. The steepness of the impurity distribution is crucial to the performance of the transistor. By accurately controlling the impurity injection process, it can be ensured that the impurity distribution of the first base region and the second base region is both steep and uniform. This steep impurity distribution helps to reduce the current diffusion effect inside the transistor, thereby improving the switching speed and frequency response of the transistor.

[0042] Example 3 according to Figure 3 As shown, this embodiment provides a method for manufacturing a transistor structure, using a chip designed with the structure of a high-frequency NPN transistor, taking a silicon wafer with an N+ substrate layer and an N- epitaxial layer material as an example, including the following processes: First, the first base region 5 is photolithographically formed on the silicon wafer of the N+ substrate layer and the N- epitaxial layer, and then the P-type first base region 5 is formed by boron implantation and boron annealing, and the expansion depth of the first base region 5 is 1.5μm to 2μm. Then the second base region 6 is photolithographically formed, and the coverage of the first base region 5 on the second base region 6 is about 4μm to 6μm, and the second base region 6 is formed by boron implantation and boron annealing, and the expansion depth of the second base region 6 is 1μm to 1.5μm.

[0043] Then, the emitter region 7 is formed in the second base region 6 by photolithography, and phosphorus is implanted and phosphorus is annealed to form the emitter region 7. The expansion depth of the N+ emitter region 7 is 0.5 μm to 1.0 μm.

[0044] The base ohmic hole and emitter ohmic hole are formed in the base region and emitter region respectively by photolithography hole process, and then metal is deposited on the front side, and then metal and alloy are photolithography to form ohmic contact with the base ohmic hole and emitter ohmic hole, thereby forming the base and emitter of the NPN transistor respectively. The first base region 5, the second base region 6 and the emitter region 7 constitute the process structure of the high-frequency NPN transistor. Finally, metallization is performed on the back side of the silicon wafer, and the back side of the chip is the collector 2 of the NPN transistor.

[0045] In this embodiment, when the base of the NPN transistor receives a forward voltage, it attracts electrons in the emitter region 7 and moves them toward the conduction band. These electrons then pass through the first base region 5 and the second base region 6 and are collected by the collector. Due to the introduction and precise control of the second base region 6, the current path of the transistor is optimized. This helps to reduce unnecessary current leakage and power consumption and improve the efficiency of the transistor. At the same time, by precisely controlling the impurity concentration and size of each region, the frequency characteristics of the transistor are significantly improved. This enables the transistor to respond to changes in the input signal more quickly and is suitable for higher frequency circuit applications.

[0046] In this embodiment, the structural design of the high-frequency NPN transistor is applied to the actual NPN transistor chip manufacturing. The design and structural verification are carried out through the tape-out of the actual product. The specific implementation steps are as follows: The structural design of the high-frequency NPN transistor is applied to the layout design of the NPN tube. The most important thing is that the base region includes two photolithography layer designs of the first base region 5 and the second base region 6, and then the tape-out is carried out on the production line of the semiconductor chip; two schemes are used for comparative tape-out. Scheme 1 is a conventional NPN transistor structure, which only includes the first base region 5; Scheme 2 is an NPN transistor using the high-frequency structure of this embodiment, which includes the first base region 5 and the second base region 6. Because the frequency characteristic is a dynamic parameter, it can only be tested after the chip is packaged. Therefore, after completing the tape-out of the two schemes, the qualified tube cores obtained by the tape-out of the two schemes were packaged respectively, and finally the frequency characteristic test of the packaged transistor device was carried out.

[0047] The device frequency characteristics comparison test results of the two solutions are shown in Table 1.

[0048] Table 1 Comparison test results of NPN transistors of two solutions

[0049] After comparative testing of NPN transistors with two different structures, it is found that the NPN transistor with the high-frequency structure design of this embodiment has significantly improved frequency characteristics while the current gain is not significantly changed compared to the NPN transistor with conventional structure, and the characteristic frequency is increased by about 50%. Compared with conventional NPN transistors, the frequency characteristics of the NPN transistor are significantly improved at a very low cost by only adding the design of the second base region 6 without changing other layer designs. The structural design and manufacturing method for improving the frequency characteristics of transistors are of great reference significance to the design of other high-frequency tubes.

[0050] In summary, the present invention also provides a method for manufacturing a transistor structure, which uses photolithography technology to accurately control the expansion depth of the first base region, the second base region and the emitter region and the coverage width of the first base region on the second base region, thereby ensuring the accuracy and consistency of the transistor structure. This precise control helps to optimize the performance of the transistor, such as improving frequency response, reducing power consumption and enhancing stability. The base ohmic hole and the emitter ohmic hole are formed by a photolithography hole process, and after the metal is deposited on the front side, the metal and alloy are processed by photolithography to ensure that good ohmic contact is formed between the metal and the base and emitter. This high-quality ohmic contact helps to reduce contact resistance and improve the current transmission efficiency and stability of the transistor.

[0051] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A transistor structure, characterized in that: comprising a transistor body (1); The transistor body (1) comprises a substrate epitaxial layer, a collector (2), an emitter (8) and a base (9); The collector (2) is arranged at the bottom of the substrate epitaxial layer; a first base region (5) and a second base region (6) are arranged at the top of the substrate epitaxial layer; the second base region (6) is located in the first base region (5), and an emitter region (7) is arranged in the second base region (6); the base (9) is arranged in the first base region (5) at the top of the substrate epitaxial layer; and the emitter (8) is arranged in the emitter region (7).

2. A transistor structure according to claim 1, characterized in that: The base (9) is at the top of the substrate epitaxial layer and is located between the first base region (5) and the second base region (6).

3. A transistor structure according to claim 1, characterized in that: The coverage width of the first base region (5) on the top of the substrate epitaxial layer is 8 μm to 10 μm, wherein the depth of the first base region (5) is 1.5 μm to 2.0 μm.

4. A transistor structure according to claim 1, characterized in that: The coverage width of the second base region (6) on the top of the substrate epitaxial layer is 2 μm to 4 μm, wherein the depth of the second base region (6) is 1.0 μm to 1.5 μm.

5. A transistor structure according to claim 1, characterized in that: The depth of the emission region (7) is 0.5 μm to 1.0 μm.

6. A transistor structure according to claim 1, characterized in that: The first base region (5) and the second base region (6) are located in the same region in the longitudinal direction of the substrate epitaxial layer, wherein the coverage width of the first base region (5) over the second base region (6) at the top of the substrate epitaxial layer is 4 μm to 6 μm; and the depth of the first base region (5) is 0.5 μm to 1.0 μm greater than that of the second base region (6).

7. A transistor structure according to claim 1, characterized in that: The substrate epitaxial layer comprises a substrate layer (3) and an epitaxial layer (4); The collector electrode (2) is arranged at the bottom of the substrate layer (3), and the epitaxial layer (4) is arranged on the top of the substrate layer (3); The first base region (5) and the second base region (6) are both arranged on the top of the epitaxial layer (4).

8. A method for improving the frequency characteristics of a transistor structure, characterized in that: A transistor structure according to any one of claims 1 to 7, comprising the following process: Photolithographically forming a second base region (6) in the first base region (5) at the top of the epitaxial layer of the substrate; Impurities are injected into the first base region (5) and the second base region (6) so that the impurity distribution of the first base region (5) and the second base region (6) is steep, a base region electric field factor is determined according to the impurity concentration of the first base region (5) and the second base region (6), and a frequency characteristic is determined according to the base region electric field factor, wherein the greater the impurity concentration of the first base region (5) and the second base region (6), the greater the base region electric field factor, and the greater the frequency characteristic.

9. The method for improving the frequency characteristics of a transistor structure according to claim 8, characterized in that: The frequency characteristic of the transistor structure is expressed as follows: in, f T Represents the frequency characteristics of the transistor structure; τ b W represents the base region transit time of minority carriers; B is the base width; D B is the base region minority carrier diffusion coefficient, and λ is the base region electric field factor.

10. A method for manufacturing a transistor structure, characterized in that: A transistor structure according to any one of claims 1 to 7, comprising the following process: Photolithography forms a first base region (5) on a silicon wafer of a substrate epitaxial layer, wherein the expansion depth of the first base region (5) is 1.5 μm to 2 μm; photolithography forms a second base region (6) in the first base region (5), wherein the expansion depth of the second base region (6) is 1 μm to 1.5 μm, and the coverage width of the first base region (5) on the second base region (6) is 4 μm to 6 μm; Then, an emission region (7) is formed in the second base region (6) by photolithography, wherein the expansion depth of the emission region (7) is 0.5 μm to 1.0 μm; A base ohmic hole and an emitter ohmic hole are formed in the first base region (5), the second base region (6) and the emitter region (7) respectively by a photolithography hole process, and then metal is deposited on the front side. Then, metal and alloy are photolithography-etched to form ohmic contact with the base ohmic hole and the emitter ohmic hole, thereby forming a base (9) and an emitter (8) respectively. The first base region (5), the second base region (6) and the emitter region (7) constitute the process structure of the transistor body (1), and finally metallization is performed on the back side of the silicon wafer to form a collector (2).

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