Silicon carbide PiN with adjustable fin-type JTE structure and preparation method of silicon carbide PiN

Abstract

The invention discloses silicon carbide PiN with an adjustable fin type JTE structure and a preparation method of the silicon carbide PiN. The silicon carbide PiN comprises a substrate, a drift layer located on the substrate, a positive doped region and a negative doped region formed by doping the drift layer, a fin type JTE structure formed by etching the drift layer between the positive doped region and the negative doped region, a terminal oxide layer with three sides surrounding the fin type JTE structure, and a terminal metal layer covering the surface of the terminal oxide layer, the positive electrode metal layer is positioned on the positive electrode doped region; and the negative electrode metal layer is positioned on the negative electrode doped region. According to the silicon carbide PiN with the adjustable and controllable fin type JTE structure, terminal electric field distribution suitable for different working environments can be formed by adjusting the terminal control signal and the terminal charges, and then the terminal efficiency is improved.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and specifically relates to an adjustable fin-type JTE (Junction Termination Extension) structure silicon carbide PiN (Positive-intrinsic-Negative, P-type semiconductor-impurity-N-type semiconductor) and a preparation method thereof. Background Art

[0002] Due to the superior physical properties of SiC (silicon carbide) materials, SiC devices have received extensive attention and research. This silicon carbide high-temperature and high-power electronic device has advantages such as high input impedance, fast switching speed, high operating frequency, and high temperature and high pressure resistance, and has been widely used in switching power supplies, high-frequency heating, automotive electronics, power amplifiers and other fields.

[0003] In the process of manufacturing SiC devices, an electric field concentration effect is often inevitably formed at the edge of the junction, so existing SiC power devices need to adopt a terminal structure to protect the edge of the device. The terminal structure has a great influence on the performance of SiC power devices, so it is necessary to provide a high-performance SiC power device with a terminal structure. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a silicon carbide PiN with an adjustable fin-type JTE structure and a preparation method thereof.

[0005] The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] In a first aspect, the present invention provides a silicon carbide PiN with an adjustable fin-type JTE structure, comprising:

[0007] substrate;

[0008] A drift layer, located on the substrate;

[0009] Doping the drift layer to form a positive electrode doping region and a negative electrode doping region;

[0010] A fin-type JTE structure is formed by etching a drift layer between the positive electrode doping region and the negative electrode doping region;

[0011] A terminal oxide layer surrounding the fin-type JTE structure on three sides;

[0012] A terminal metal layer covering the surface of the terminal oxide layer;

[0013] A positive electrode metal layer located on the positive electrode doping region;

[0014] A cathode metal layer is located on the cathode doped region.

[0015] Optionally, the substrate includes a silicon carbide substrate.

[0016] Optionally, the drift layer includes a silicon carbide drift layer.

[0017] Optionally, the terminal oxide layer comprises a silicon dioxide terminal oxide layer.

[0018] Optionally, the terminal metal layer comprises an aluminum terminal metal layer.

[0019] Optionally, the positive electrode metal layer includes an aluminum positive electrode metal layer; and the negative electrode metal layer includes an aluminum negative electrode metal layer.

[0020] In a second aspect, the present invention provides a method for preparing silicon carbide PiN with an adjustable fin-type JTE structure, the method comprising:

[0021] Selecting a substrate and forming a drift layer on the substrate;

[0022] Performing ion implantation on the drift layer to form a positive electrode doping region and a negative electrode doping region respectively;

[0023] Etching the drift layer between the positive electrode doping region and the negative electrode doping region to form a fin-type JTE structure;

[0024] Depositing a terminal oxide layer around the fin-type JTE structure on three sides;

[0025] Depositing a terminal metal layer on the surface of the terminal oxide layer;

[0026] Depositing a positive electrode metal layer on the positive electrode doping region;

[0027] A cathode metal layer is deposited on the cathode doped region.

[0028] Optionally, ion implantation is performed on the drift layer to form a positive electrode doping region and a negative electrode doping region respectively, including:

[0029] Selecting a positive electrode region on the surface of the drift layer;

[0030] forming a first barrier layer on the surface of the drift layer except the positive electrode region;

[0031] Performing ion implantation on the anode region to form the anode doped region;

[0032] Etching away the first barrier layer;

[0033] A negative electrode region is selected on the surface of the drift layer; the negative electrode region and the positive electrode region are spaced a certain distance apart;

[0034] forming a second barrier layer on the surface of the drift layer except the negative electrode region;

[0035] Performing ion implantation on the cathode region to form the cathode doped region;

[0036] The second barrier layer is etched away.

[0037] Optionally, etching the drift layer between the positive doping region and the negative doping region to form a fin-type JTE structure includes:

[0038] forming a third barrier layer on the surfaces of the positive electrode doping region and the negative electrode doping region;

[0039] Etching the drift layer between the positive electrode doping region and the negative electrode doping region to form the fin-type JTE structure;

[0040] The third barrier layer is etched away.

[0041] The present invention provides a silicon carbide PiN with an adjustable fin-type JTE structure, comprising a substrate, a drift layer located on the substrate, a positive doping region and a negative doping region formed by doping the drift layer, a fin-type JTE structure formed by etching the drift layer between the positive doping region and the negative doping region, a terminal oxide layer surrounding the fin-type JTE structure on three sides, a terminal metal layer covering the surface of the terminal oxide layer, a positive metal layer located above the positive doping region, and a negative metal layer located above the negative doping region.

[0042] Because the terminal oxide layer in this solution is a terminal oxide layer surrounded by a fin-type JTE structure on three sides, the terminal charge can be provided from three directions through the terminal control signal provided by the terminal metal layer, thereby adjusting the terminal electric field distribution. Moreover, due to the existence of the fin-type JTE structure, the control capability of the terminal charge and the terminal control signal can be enhanced. By adjusting the terminal control signal and the terminal charge, a terminal electric field distribution suitable for different working environments can be formed, thereby improving the terminal efficiency.

[0043] The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 A cross-sectional view of a silicon carbide PiN with an adjustable fin-type JTE structure provided by an embodiment of the present invention;

[0045] Figure 2 A schematic flow chart of a method for preparing a silicon carbide PiN with an adjustable fin-type JTE structure provided by an embodiment of the present invention;

[0046] Figure 3A schematic diagram of a preparation process of a silicon carbide PiN with an adjustable fin-type JTE structure provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0048] In order to provide a high-performance SiC power device with a terminal structure, an embodiment of the present invention provides a silicon carbide PiN with an adjustable fin-type JTE structure, see Figure 1 , Figure 1 A cross-sectional view of a silicon carbide PiN with an adjustable fin-type JTE structure provided by an embodiment of the present invention, wherein the silicon carbide PiN includes:

[0049] A substrate 10, a drift layer 20 located on the substrate 10, a positive doping region 30 and a negative doping region 40 formed by doping the drift layer 20, a fin-type JTE structure formed by etching the drift layer 20 between the positive doping region 30 and the negative doping region 40, a terminal oxide layer 50 surrounding the fin-type JTE structure on three sides, a terminal metal layer 60 covering the surface of the terminal oxide layer 50, a positive metal layer 70 located on the positive doping region 30, and a negative metal layer 80 located on the negative doping region 40.

[0050] In this embodiment, the substrate 10 is a base of a semiconductor chip, and provides a process platform for the subsequent formation of a semiconductor structure. The substrate 10 can be grown in different ways, which are not limited here.

[0051] In this embodiment, the drift layer 20 may be deposited on the substrate 10 by using methods such as chemical vapor deposition, physical vapor deposition or atomic layer deposition.

[0052] The positive electrode doping region 30 is a doping region formed by introducing a trivalent element such as boron or gallium, etc. The negative electrode doping region 40 is a doping region formed by introducing a pentavalent element such as phosphorus or arsenic, etc.

[0053] In the present embodiment, the fin-type JTE structure is formed by etching the drift layer 20 between the positive doping region 30 and the negative doping region 40 .

[0054] Specifically, a photolithography machine may be used to perform exposure and development on the drift layer 20 between the positive doping region 30 and the negative doping region 40 to form a photolithography pattern to be etched. The photolithography pattern is then etched to finally obtain a fin-type JTE structure.

[0055] In this embodiment, the terminal oxide layer 50 surrounds the fin-type JTE structure from three sides, namely, the front, top and back directions. Therefore, the terminal oxide layer 50 can provide terminal charges from three directions to regulate the terminal electric field distribution.

[0056] The terminal metal layer 60, ie, the terminal electrode, is deposited on the surface of the terminal oxide layer 50, and a terminal control signal is provided through the terminal electrode.

[0057] In this embodiment, the positive metal layer 70 and the negative metal layer 80 are used to establish electrical connection and lead out electrical signals. Specifically, the positive metal layer 70 is connected to a positive voltage to form an electrical connection on the surface of the positive doping region 30. The negative metal layer 80 is connected to a negative voltage to form an electrical connection on the surface of the negative doping region 40.

[0058] In the silicon carbide PiN with an adjustable fin-type JTE structure provided in this embodiment, the terminal oxide layer 50 is a terminal oxide layer 50 that surrounds the fin-type JTE structure on three sides, so the terminal control signal provided by the terminal metal layer 60 can provide terminal charges from three directions, thereby adjusting the terminal electric field distribution. Moreover, due to the presence of the fin-type JTE structure, the control capability of the terminal charge and the terminal control signal can be enhanced. By adjusting the terminal control signal and the terminal charge, a terminal electric field distribution suitable for different working environments can be formed, thereby improving the terminal efficiency.

[0059] In the embodiment of the present invention, the substrate 10 may be a silicon carbide, germanium or silicon germanium substrate. Since silicon carbide material has good stability, heat dissipation and corrosion resistance, in this solution, the substrate 10 is preferably a silicon carbide substrate. At the same time, since silicon carbide material also has good electrical conductivity, the drift layer 20 is preferably a silicon carbide drift layer, and the corresponding positive electrode doping region 30 is a silicon carbide positive electrode doping region, and the negative electrode doping region 40 is a silicon carbide negative electrode doping region.

[0060] In an embodiment of the present invention, the terminal oxide layer 50 is preferably a silicon dioxide terminal oxide layer. Silicon dioxide has excellent insulation properties and good thermal stability. It can still maintain stable insulation properties at higher temperatures, which helps to improve the operating temperature range of semiconductor devices. At the same time, silicon dioxide has good chemical stability and anti-friction properties, which reduces the risk of damage to the device. In addition, silicon dioxide is also a common inorganic material with low cost, easy preparation and processing, which is conducive to reducing manufacturing costs.

[0061] In the embodiment of the present invention, the terminal metal layer 60 is preferably an aluminum terminal metal layer, the positive electrode metal layer 70 is preferably an aluminum positive electrode metal layer, and the negative electrode metal layer 80 is preferably an aluminum negative electrode metal layer. Aluminum is a high-quality conductive material that can provide a good current transmission effect. Aluminum also has good chemical stability and physical stability, which can make semiconductor devices more stable and reliable. At the same time, the high thermal conductivity of aluminum can effectively dissipate heat and help reduce the temperature of semiconductor devices. In addition, aluminum is also a common metal material with low cost, which can reduce the manufacturing cost of semiconductor devices.

[0062] The present invention also provides a method for preparing silicon carbide PiN with a tunable fin-type JTE structure. Figure 2 , Figure 2 A schematic flow chart of a method for preparing a silicon carbide PiN with an adjustable fin-type JTE structure provided in an embodiment of the present invention, the method comprising the following steps:

[0063] Step S201 , selecting a substrate 10 and forming a drift layer 20 on the substrate 10 .

[0064] See also Figure 3 In (a), Figure 3 A schematic diagram of a process for preparing a silicon carbide PiN with an adjustable fin-type JTE structure provided by an embodiment of the present invention. In this embodiment, the substrate 10 is preferably a silicon carbide substrate, and the drift layer 20 is preferably a silicon carbide drift layer.

[0065] In step S202 , ion implantation is performed on the drift layer 20 to form a positive doping region 30 and a negative doping region 40 .

[0066] See also Figure 3 In (b), ion implantation refers to implanting charged ions with a certain energy into the drift layer 20. Ion implantation can control the amount of impurities more accurately. In this embodiment, ion implantation can be a single implantation or multiple implantations.

[0067] Step S203 , etching the drift layer 20 between the positive doping region 30 and the negative doping region 40 to form a fin-type JTE structure.

[0068] Etching is a semiconductor manufacturing process, by which the unnecessary portion of the drift layer 20 between the positive doping region 30 and the negative doping region 40 can be removed. Figure 3 In (c), the drift layer 20 between the positive doping region 30 and the negative doping region 40 is etched to form a fin-type JTE structure.

[0069] Step S204 , depositing a terminal oxide layer 50 around the fin-type JTE structure on three sides.

[0070] See also Figure 3 In (d), in this embodiment, a terminal oxide layer 50 is deposited around the top, front and rear surfaces of the fin-type JTE structure.

[0071] Common oxidation methods include dry oxygen oxidation and wet oxygen oxidation. In order to prevent the oxidation time from being too long and to ensure the quality of oxidation, in this embodiment, a method of first wet oxygen oxidation and then dry oxygen oxidation is used to form the terminal oxide layer 50. The wet oxygen oxidation is first used to increase the rate of generating the terminal oxide layer 50, and the dry oxygen oxidation is then used to ensure the quality of the terminal oxide layer 50.

[0072] Step S205 , depositing a terminal metal layer 60 on the surface of the terminal oxide layer 50 .

[0073] See also Figure 3 In (e), after cleaning the surface of the terminal oxide layer 50, a terminal metal layer 60 is formed on the surface of the terminal oxide layer 50. Specifically, it can be implemented by physical vapor deposition (PVD) or chemical vapor deposition (CVD) technology.

[0074] Step S206 , depositing an anode metal layer 70 on the anode doping region 30 .

[0075] See also Figure 3 In (f), a positive electrode metal layer 70 is deposited on the surface of the positive electrode doping region 30 on the left side. For the specific deposition process, please refer to step S205.

[0076] Step S207 , depositing a negative electrode metal layer 80 on the negative electrode doping region 40 .

[0077] See also Figure 3 In (f), a negative electrode metal layer 80 is deposited on the surface of the right negative electrode doping region 40. For the specific deposition process, please refer to step S205.

[0078] In this embodiment, the preparation method of the silicon carbide PiN with adjustable fin-type JTE structure is to select a substrate 10 and form a drift layer 20 on the substrate 10, perform ion implantation on the drift layer 20 to form a positive doping region 30 and a negative doping region 40 respectively, and then etch the drift layer 20 between the positive doping region 30 and the negative doping region 40 to form a fin-type JTE structure. A terminal oxide layer 50 is deposited around the fin-type JTE structure on three sides. A terminal metal layer 60 is deposited on the surface of the terminal oxide layer 50. A positive metal layer 70 is deposited on the positive doping region 30, and a negative metal layer 80 is deposited on the negative doping region 40.

[0079] Because the terminal oxide layer 50 is a terminal oxide layer 50 surrounded by a fin-type JTE structure on three sides, the terminal control signal provided by the terminal metal layer 60 can provide terminal charges from three directions, thereby adjusting the terminal electric field distribution. In addition, due to the existence of the fin-type JTE structure, the control capability of the terminal charge and the terminal control signal can be enhanced. By adjusting the terminal control signal and the terminal charge, the terminal electric field distribution suitable for different working environments can be formed, thereby improving the terminal efficiency.

[0080] In the embodiment of the present invention, ion implantation is performed on the drift layer 20 to form the positive doping region 30 and the negative doping region 40 respectively, including:

[0081] (1) A positive electrode region is selected on the surface of the drift layer 20 .

[0082] See also Figure 3 In (b), the left side is selected as the positive electrode area.

[0083] (2) After forming a first barrier layer on the surface of the drift layer 20 except the positive electrode region, ion implantation is performed into the positive electrode region to form a positive electrode doping region 30;

[0084] The positive electrode doping region 30 is a doping region formed by introducing trivalent elements, such as boron or gallium, etc. The first barrier layer may be a silicon dioxide barrier layer.

[0085] (3) After forming the anode doping region 30, the first barrier layer is etched away.

[0086] (4) A negative electrode region is selected on the surface of the drift layer 20 ; wherein the negative electrode region and the positive electrode region are separated by a certain distance.

[0087] See also Figure 3 In (b), the right side is selected as the negative electrode area.

[0088] (5) After forming a second barrier layer on the surface of the drift layer 20 except the cathode region, ion implantation is performed into the cathode region to form the cathode doped region 40 .

[0089] (6) After forming the cathode doping region 40, the second barrier layer is etched away. The second barrier layer may be a silicon dioxide barrier layer.

[0090] In an embodiment of the present invention, the step of etching the drift layer 20 between the positive doping region 30 and the negative doping region 40 to form a fin-type JTE structure may be to generate an oxidation barrier layer on the surface of the drift layer 20, the positive doping region 30 and the negative doping region 40, and then form a third barrier layer on the oxidation barrier layer generated on the surface of the positive doping region 30 and the negative doping region 40, wherein the third barrier layer may be formed by coating a photoresist. The third barrier layer is exposed and developed using a photolithography machine, and then the third barrier layer is used as an etching barrier layer of the oxidation barrier layer to etch the oxidation barrier layer on the surface of the drift layer 20 between the positive doping region 30 and the negative doping region 40 to form a photolithography pattern to be etched. The third barrier layer is removed, and then the photolithography pattern of the oxidation barrier layer on the surface of the drift layer 20 between the positive doping region 30 and the negative doping region 40 is etched to remove a certain depth of the drift layer 20 to form a fin-type JTE structure. Among them, the oxidation barrier layer may be a silicon dioxide barrier layer.

[0091] By etching, the area not covered by the third barrier layer can be removed, and the drift layer 20 of a certain depth can be removed to form a fin-type JTE structure, see Figure 3 In (c), the oxidation barrier layer is finally etched away.

[0092] In addition, after the etching process, the residues produced by the etching can be removed by cleaning.

[0093] In the embodiment of the present invention, the step of depositing the terminal oxide layer 50 around the fin-type JTE structure on three sides specifically includes: forming a fourth barrier layer on the surface other than the fin-type JTE structure, and depositing the terminal oxide layer 50 around the fin-type JTE structure on three sides from the front, top and back directions, see Figure 3 In (d), the fourth barrier layer is then etched away. The fourth barrier layer may be a silicon dioxide barrier layer.

[0094] In the embodiment of the present invention, the step of depositing the terminal metal layer 60 on the surface of the terminal oxide layer 50 is specifically to form a fifth barrier layer on the surface other than the terminal oxide layer 50, and deposit a layer of the terminal metal layer 60 on the surface of the terminal oxide layer 50, see Figure 3 In step (e), the fifth barrier layer is then etched away. The fifth barrier layer may be a silicon dioxide barrier layer.

[0095] In the embodiment of the present invention, the specific step of depositing the positive electrode metal layer 70 on the positive electrode doping region 30 is to deposit a positive electrode metal layer 70 on the positive electrode doping region 30 after forming the sixth barrier layer on the surface other than the positive electrode doping region 30, see Figure 3 The specific step of depositing the negative electrode metal layer 80 on the negative electrode doping region 40 is to form the seventh barrier layer on the surface other than the negative electrode doping region 40, and then deposit the negative electrode metal layer 80 on the negative electrode doping region 40, see Figure 3 (f) in the figure, and then the seventh barrier layer is etched away. Wherein, the sixth barrier layer and the seventh barrier layer are both silicon dioxide barrier layers.

[0096] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with some aspects of the present invention.

[0097] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

[0098] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art can understand and implement other changes to the disclosed embodiments by viewing the drawings and the disclosed content. In the description of the present invention, the term "comprising" does not exclude other components or steps, "one" or "an" does not exclude multiple situations, and "multiple" means two or more, unless otherwise clearly and specifically limited. In addition, certain measures are recorded in different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0099] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0100] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0101] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A silicon carbide PiN with an adjustable fin-type JTE structure, characterized in that: include: substrate; A drift layer, located on the substrate; Doping the drift layer to form a positive electrode doping region and a negative electrode doping region; A fin-type JTE structure is formed by etching a drift layer between the positive electrode doping region and the negative electrode doping region; A terminal oxide layer surrounding the fin-type JTE structure on three sides; A terminal metal layer covering the surface of the terminal oxide layer; A positive electrode metal layer located on the positive electrode doping region; A cathode metal layer is located on the cathode doped region.

2. The silicon carbide PiN with adjustable fin-type JTE structure according to claim 1, characterized in that: The substrate includes a silicon carbide substrate.

3. The silicon carbide PiN with adjustable fin-type JTE structure according to claim 1, characterized in that: The drift layer includes a silicon carbide drift layer.

4. The silicon carbide PiN with adjustable fin-type JTE structure according to claim 1, characterized in that: The terminal oxide layer comprises a silicon dioxide terminal oxide layer.

5. The silicon carbide PiN with adjustable fin-type JTE structure according to claim 1, characterized in that: The terminal metal layer comprises an aluminum terminal metal layer.

6. The silicon carbide PiN with adjustable fin-type JTE structure according to claim 1, characterized in that: The positive electrode metal layer includes an aluminum positive electrode metal layer; the negative electrode metal layer includes an aluminum negative electrode metal layer.

7. A method for preparing silicon carbide PiN with adjustable fin-type JTE structure, characterized in that: The method comprises: Selecting a substrate and forming a drift layer on the substrate; Performing ion implantation on the drift layer to form a positive electrode doping region and a negative electrode doping region respectively; Etching the drift layer between the positive electrode doping region and the negative electrode doping region to form a fin-type JTE structure; Depositing a terminal oxide layer around the fin-type JTE structure on three sides; Depositing a terminal metal layer on the surface of the terminal oxide layer; Depositing a positive electrode metal layer on the positive electrode doping region; A cathode metal layer is deposited on the cathode doped region.

8. The preparation method according to claim 7, characterized in that: Ion implantation is performed on the drift layer to form a positive electrode doping region and a negative electrode doping region respectively, including: Selecting a positive electrode region on the surface of the drift layer; forming a first barrier layer on the surface of the drift layer except the positive electrode region; Performing ion implantation on the anode region to form the anode doped region; Etching away the first barrier layer; A negative electrode region is selected on the surface of the drift layer; the negative electrode region and the positive electrode region are spaced a certain distance apart; forming a second barrier layer on the surface of the drift layer except the negative electrode region; Performing ion implantation on the cathode region to form the cathode doped region; The second barrier layer is etched away.

9. The preparation method according to claim 7, characterized in that: The step of etching the drift layer between the positive electrode doping region and the negative electrode doping region to form a fin-type JTE structure includes: forming a third barrier layer on the surfaces of the positive electrode doping region and the negative electrode doping region; Etching the drift layer between the positive electrode doping region and the negative electrode doping region to form the fin-type JTE structure; The third barrier layer is etched away.

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