Bulk silicon wet etching high-precision control method

By designing and integrating the corrosion stop reference structure in the bulk silicon wet corrosion process, combining hard masks and morphology detection equipment, the problem that the bulk silicon wet corrosion process is difficult to achieve high-precision control in mass production is solved, and high-precision longitudinal control and cost reduction are achieved.

CN119797271APending Publication Date: 2025-04-1158TH RES INST OF CETC
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Patent Information

Application Number
CN202411969105.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-30
Publication Date
2025-04-11

AI Technical Summary

Technical Problem

In integrated circuit manufacturing, it is difficult to achieve high-precision longitudinal control in mass production scenarios, resulting in large inter-chip deviations and inter-batch deviations, affecting the accuracy of MEMS-like devices.

Method used

A corrosion stop reference structure is designed and integrated into the bulk silicon wet corrosion process. A reference structure embedded in the surface of the substrate sheet is formed through deep groove etching, filling and planarization processes. Combined with hard masks and morphology detection equipment, high-precision wet corrosion control is achieved.

Benefits of technology

Through this method, high-precision control of the bulk silicon wet corrosion process is achieved, which reduces corrosion accuracy errors and reduces costs, while not relying on high-cost SOI materials.

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Abstract

The invention discloses a bulk silicon wet etching high-precision control method. The method comprises the steps of manufacturing an etching stop reference structure and performing high-precision etching process control, the process for manufacturing the corrosion stop reference structure comprises the following steps: preparing a substrate slice, performing deep groove etching, deep groove filling and planarization, and finally forming the corrosion stop reference structure embedded into the surface of the substrate slice; the high-precision corrosion process control comprises the steps of manufacturing a hard mask, performing a wet etching coarse stage and performing a wet etching fine stage. The corrosion stop reference structure is used as a process reference point, so that a production line can be helped to realize high-precision control of a bulk silicon wet etching process. Compared with an SOI bulk silicon wet etching process, the method has the advantage that the process cost is greatly reduced on the premise that the overall etching precision is approximately controlled. Compared with a method for monitoring the corrosion process by adopting optical detection equipment, the method disclosed by the invention has the advantages that the existing standard equipment configuration of a wafer factory is fully utilized, and extra special equipment and investment of operators are not needed.
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Description

Technical Field

[0001] The invention relates to the technical field of integrated circuit manufacturing, and in particular to a high-precision control method for bulk silicon wet etching. Background Art

[0002] In the field of integrated circuit manufacturing process technology, the precision control of bulk silicon wet etching process often faces large inter-chip and inter-batch deviations in mass production scenarios. The most affected product categories are mainly MEMS devices, including but not limited to MEMS pressure sensors, acceleration sensors, vibration sensors, gas sensors, CMUT transducers, bulk acoustic wave resonators, thermopiles and other core parts of various silicon-based micro-electromechanical chips.

[0003] The process of implementing precision control on 3D structures of common MEMS devices in the industry currently uses the surface of the wafer substrate as a reference, and mainly consists of plane precision control and longitudinal vertical precision control. Among them, plane precision control is mainly implemented by using advanced photolithography technology, combined with the optimization of lateral intrusion errors during etching to implement a comprehensive process solution design. At present, the plane precision control of MEMS devices can be well solved by implementing batch manufacturing on conventional production lines. On the contrary, the process precision in the longitudinal vertical direction, especially the bulk silicon wet etching process, still lacks a flexible and effective process control solution.

[0004] In general industrial practice, the bulk silicon wet etching process technology is precisely controlled, mainly by improving the uniformity of the etching surface by proportioning the etching solution, and combining the precise calculation of the etching rate and the precise control of the etching time to achieve the improvement of the vertical etching accuracy. If the precision consistency of wet etching between wafers and batches is to be further improved in mass production scenarios, the industry usually adopts SOI substrate wafers to achieve this. In this case, the device layer of the SOI substrate wafer is used in actual production to prepare the key MEMS structure, and the device structure is released by wet etching of the base layer. This solution makes full use of the high thickness precision of the device layer of the SOI wafer, and the buried oxide layer of the SOI wafer can act as an etching stop layer in the wet etching process, so that the final prepared MEMS structure has the same vertical precision as the SOI device layer. This solution greatly improves the control ability of wafer-to-wafer deviation and batch-to-batch deviation in mass production scenarios. However, the cost of SOI material wafers is generally one order of magnitude higher than that of ordinary single-crystal silicon material wafers, which greatly increases the cost pressure of this solution. Therefore, from the perspective of actual production, developing a new bulk silicon wet etching process can significantly improve the etching accuracy while avoiding the use of SOI wafers, which has significant economic significance.

[0005] In conventional integrated circuit bulk silicon processes, the main body of the preparation process for large-size MEMS structures controls the longitudinal dimension of the remaining structure by controlling the thickness of the silicon material etched away. At present, no publicly available information has been found to prove that the residual film thickness error can be effectively controlled within the sub-micron precision range through bulk silicon etching methods, and is suitable for mass production applications. Through further analysis, it can be found that the control error of the current bulk silicon wet etching process mainly comes from three sources: substrate thickness error, wet etching rate error, and wet etching time control error.

[0006] First, the thickness error of the substrate material sheet. At present, the thickness error of the wafer material substrate sheet itself is usually in the range of several microns to tens of microns. Secondly, the error of the wet etching rate of silicon material. Common etching solutions such as KOH solution and TMAH solution will have errors in the etching rate of silicon according to the size of the etching tank, the fluidity of the liquid in the tank, the liquid temperature, the etching process operation specifications and other specific conditions. At the same time, the etching rate of the etching solution will not only have intra-sheet errors and inter-sheet errors caused by the fluidity characteristics of the etching solution in the tank caused by the geometric shape of the tank in the same batch, but will also cause changes in the concentration of the etching solution and deterioration of the pollution situation as the number of batches increases, causing batch errors. Finally, the error in the control of the etching time. Compared with the first two sources of error, the impact of the error in the control of the etching time is relatively small, but compared with the dry etching process, the time control error of the wet etching is still large. The etching stop time is closely related to the process control of the transfer and rinsing of the material sheet between the liquid tanks. Different production lines have specific differences according to actual conditions, and there is a lack of unified evaluation standards for the control of the etching stop time. Summary of the invention

[0007] The object of the present invention is to provide a high-precision control method for bulk silicon wet etching to solve the problems in the background technology.

[0008] In order to solve the above technical problems, the present invention provides a method for high-precision control of bulk silicon wet etching, comprising: making an etching stop reference structure and high-precision etching process control;

[0009] The process of making the etching stop reference structure includes: preparing a substrate, performing deep trench etching, deep trench filling and planarization, and finally forming an etching stop reference structure embedded in the surface of the substrate;

[0010] High-precision etching process control includes: making a hard mask, performing a rough wet etching stage, and performing a fine wet etching stage.

[0011] In one embodiment, the preparation of the substrate sheet includes providing a substrate sheet and performing RCA cleaning, spin drying, and drying processes; the selection of the specific process for deep groove etching includes coating, exposure, development, solid glue, deep groove dry etching, and post-etching cleaning; the deep groove filling includes oxidation and thin film deposition processes, wherein the specific equipment used in the thin film deposition process includes LPCVD, PECVD, and PVD; the planarization includes a coating anti-corrosion process or a CMP mechanical chemical polishing process.

[0012] In one embodiment, the etch stop reference structure consists of a deep trench and a filling material in the deep trench.

[0013] In one embodiment, the depth of the deep trench etching determines the depth of the etching stop reference structure; and the depth of the etching stop reference structure is equal to the thickness of the remaining film layer after the bulk silicon wet etching process is completed.

[0014] In one embodiment, the accuracy of the deep trench etching determines the accuracy of the etch stop reference structure; and the specific material used in the thin film deposition process and the filling result inside the deep trench determine the reliability of the etch stop reference structure.

[0015] In one embodiment, the hard mask is formed on the back side of the substrate by photolithography and etching.

[0016] In one embodiment, the rough wet etching stage is used in conjunction with a morphology detection device. The time required for etching the AL depth is first calculated using an online process QC baseline, and the calculation time is strictly followed; wherein ΔL is calculated using the following formula: ΔL=L-(β+δ)×1.5, where L is the target etching depth, β is the substrate thickness error, and δ is the maximum etching rate error.

[0017] In one embodiment, the wet etching precision stage is used in conjunction with a morphology detection device, and the measurement frequency of the step meter is appropriately and gradually increased. By detecting the corrosion stop reference structure in the detection results, it is determined that the corrosion has reached the target accuracy, and the process ends.

[0018] In one embodiment, the wet etching fine stage uses optimized etching solution conditions and etching equipment conditions, including concentration, temperature, fluidity control, substrate sheet slot jitter mode, and rate.

[0019] The present invention provides a method for high-precision control of bulk silicon wet etching, designs a corrosion stop reference structure, and integrates it into the process control of bulk silicon wet etching, thereby achieving the purpose of high-precision control of wet etching in a low-cost manner. In the process of making the corrosion stop reference structure, the setting of the reference point fully utilizes the precision advantage of ICP dry etching. In the mass production application scenario, the corrosion stop reference structure can stably reach the sub-micron level. Using the corrosion stop reference structure of the present invention as a process reference point can help the production line achieve high-precision control of the bulk silicon wet etching process. Compared with the SOI bulk silicon wet etching process, the present invention achieves a significant reduction in process costs under the premise of similar overall corrosion accuracy control. Compared with the method of using optical detection equipment to monitor the corrosion process, the present invention makes full use of the existing standard equipment configuration of the wafer fab, without the need for additional special equipment and operating personnel. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a schematic flow chart of a high-precision control method for bulk silicon wet etching provided by the present invention.

[0021] Figure 2 It is a schematic diagram of the process of making the corrosion stop reference structure.

[0022] Figure 3 It is a flow chart of high-precision corrosion process control.

[0023] Figure 4 This is a schematic diagram of the back side bulk silicon wet etching process when using an SOI substrate. DETAILED DESCRIPTION

[0024] The following is a further detailed description of a high-precision control method for bulk silicon wet etching proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0025] The present invention provides a method for high-precision control of bulk silicon wet etching, which mainly achieves high-precision control of the etching process by designing and manufacturing an etching stop reference structure and integrating and detecting the etching stop reference structure during the etching process. The process of the present invention is mainly realized by combining two sub-processes: etching stop reference structure manufacturing and high-precision etching process control. The main process flow of the present invention is as follows Figure 1 shown.

[0026] The specific process of making the corrosion stop reference structure of the present invention can be combined with Figure 2 The case shown in is demonstrated.

[0027] The production of the corrosion stop reference structure mainly consists of four steps (a), (b), (c), and (d), which are: (a) substrate preparation, (b) deep trench etching, (c) deep trench filling, and (d) forming an corrosion stop reference structure embedded in the surface of the substrate by planarization. The substrate preparation includes providing a substrate 1 and performing conventional RCA cleaning, spin drying, and drying processes; the deep trench etching process includes conventional glue coating, exposure, development, glue solidification, deep trench dry etching, and post-etching cleaning processes to form a deep trench 2; the deep trench filling process includes conventional oxidation, thin film material 3 deposition, and other processes, wherein the specific equipment used in the thin film material deposition process includes but is not limited to LPCVD, PECVD, PVD, etc.; the planarization process is a conventional glue coating anti-corrosion process or a CMP mechanical chemical polishing process to form a corrosion stop reference structure 4 embedded in the surface of the substrate 1.

[0028] The accuracy of deep trench dry etching determines the accuracy of the etching stop reference structure, which further determines the accuracy of the bulk silicon wet etching process. The conventional deep trench etching process uses ICP etching technology, and sets the appropriate deep trench aspect ratio according to the characteristics of the etching equipment, that is, Figure 2 The h / w ratio value in process (b) is very important for the precision control of the final deep groove morphology. From the perspective of the deep groove filling process, the h / w ratio of the deep groove is also critical to the filling effect. Generally, a smaller h / w value will be specifically reflected in a wider deep groove width and a shallower depth, which may require unnecessary filling time or even an increase in filling rounds. At the same time, a larger h / w value is specifically reflected in a narrower deep groove width and a larger depth, which may pose a higher process challenge to complete filling and is prone to keyhole or void phenomena. The filling effect will affect the performance of the device from the perspective of stress distribution and reliability, and will not have a practical impact on the precision control of the bulk silicon wet etching disclosed in the present invention.

[0029] After the corrosion stop reference structure is completed, the process flow chart of high-precision corrosion process control is as follows: Figure 3 As shown:

[0030] The high-precision bulk silicon etching process control based on the etching stop reference structure is mainly composed of three core links: (a) pre-etching preparation, (b) rough etching process and (c) fine etching process. The specific process is as follows:

[0031] (a) Performing operations on the back side of the substrate material sheet 1, completing photolithography and etching and producing a wet etching hard mask 5. The specific relative position of the etching stop reference structure 4 in the entire device will not affect the realization of the function of the etching stop reference structure. The etching stop reference structure 4 produced on the front side is required to be arranged inside the etching area of ​​the back hard mask 5.

[0032] (b) Implement the rough etching step in the wet etching process. Roughly control the depth of the etching position 6 by referring to the conventional bulk silicon wet etching QC baseline. The rough etching process does not specifically affect the accuracy of the bulk silicon wet etching. On the contrary, the purpose of the rough etching process is to accelerate the etching rate and improve the online wafer throughput. According to the conventional bulk silicon wet etching process operating specifications, the rough etching step stops at a certain distance from the target depth. The specific control distance (ΔL) is given by the etching target depth (L), the substrate material sheet thickness error (β) and the online bulk silicon wet etching QC error (δ) according to the following formula:

[0033] ΔL=L-(β+δ)×1.5

[0034] In the actual production process, ΔL is given by the wet etching rate QC baseline and etching time, and is confirmed by the morphology detection equipment. The specific morphology detection equipment can be a step profiler, atomic force microscope, etc.

[0035] (c) Implement the fine corrosion link in the wet corrosion process. When the measured value of ΔL is close to the theoretical control value, the bulk silicon wet corrosion control process enters the fine corrosion stage. On the basis of the conventional bulk silicon wet control process operating specifications, optimized corrosion liquid conditions and control methods can be used in the fine corrosion stage, and the measurement frequency of the step profiler can be appropriately increased step by step until the morphology detection equipment detects the morphology of the corrosion stop reference structure, the corrosion process is completed, and the overall bulk silicon wet corrosion process is completed.

[0036] The extended application of the present invention in SOI-MEMS technology:

[0037] IC-MEMS monolithic integration process or other similar processes will inevitably use specific SOI substrates. Figure 4 As shown, a conventional SOI substrate sheet is usually composed of a base layer 11, a buried oxide layer 12 and a device layer 13. Due to specific process compatibility issues and manufacturability considerations, the device layer thickness of the SOI substrate sheet cannot simultaneously meet the respective requirements of IC and MEMS devices, so the selection of SOI substrate sheets usually tends to select substrate sheets based on IC requirements. In this case, the device layer thickness of SOI is relatively small, usually hundreds of nanometers, which cannot meet the requirements of MEMS devices for film layer thickness. Therefore, in this case, the overall thickness requirement of the MEMS main structure must be composed of the device layer 13, the buried oxide layer 12 and a part of the base layer 11.

[0038] In this case, the control of the thickness ΔH of the entire MEMS main structure needs to be performed according to the etching stop reference structure 15 disclosed in the present invention. Figure 3 The process is the same as shown in .

[0039] When manufacturing the corrosion stop reference structure 15, deep trench etching needs to be implemented through a multi-step process, that is, the etching operation of silicon-buried oxide-silicon is implemented through an ICP process, and the corrosion stop reference point is defined by the depth of the deep trench etching.

[0040] The key innovation of the present invention lies in the design of the corrosion stop reference structure and the high-precision control of the wet corrosion process achieved through its integration. In this case, therefore, selecting other types of SOI substrate wafers, such as double SOI substrate wafers, heterogeneous SOI substrate wafers, etc., to implement the corrosion stop reference process does not constitute a substantial difference to the present invention.

[0041] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A high-precision control method for bulk silicon wet etching, characterized in that: include: Fabrication of corrosion stop reference structures and high-precision corrosion process control; The process of making the etching stop reference structure includes: preparing a substrate, performing deep trench etching, deep trench filling and planarization, and finally forming an etching stop reference structure embedded in the surface of the substrate; High-precision etching process control includes: making a hard mask, performing a rough wet etching stage, and performing a fine wet etching stage.

2. The high-precision control method for bulk silicon wet etching according to claim 1, characterized in that: The preparation of the substrate sheet includes providing a substrate sheet and performing RCA cleaning, spin drying and drying processes; the selection of the specific process for deep groove etching includes coating, exposure, development, solid glue, deep groove dry etching and post-etching cleaning; the deep groove filling includes oxidation and thin film deposition processes, wherein the specific equipment used in the thin film deposition process includes LPCVD, PECVD, and PVD; the planarization includes a coating anti-corrosion process or a CMP mechanical chemical polishing process.

3. The high-precision control method for bulk silicon wet etching according to claim 2, characterized in that: The etch stop reference structure is composed of a deep trench and a filling material in the deep trench.

4. The high-precision control method for bulk silicon wet etching according to claim 2, characterized in that: The depth of the deep trench etching determines the depth of the etching stop reference structure; and the depth of the etching stop reference structure is equal to the thickness of the remaining film layer after the bulk silicon wet etching process is completed.

5. The high-precision control method for bulk silicon wet etching according to claim 2, characterized in that: The accuracy of the deep trench etching determines the accuracy of the etch-stop reference structure; and the specific materials used in the thin film deposition process and the filling results inside the deep trench determine the reliability of the etch-stop reference structure.

6. The high-precision control method for bulk silicon wet etching according to claim 1, characterized in that: The hard mask is formed on the back side of the substrate by photolithography and etching.

7. The high-precision control method for bulk silicon wet etching according to claim 1, characterized in that: The wet etching rough stage is used in conjunction with the morphology detection equipment. First, the time required for etching the AL depth is calculated through the online process QC baseline, and the calculation time is strictly followed; wherein, the calculation of ΔL is given by the following formula: ΔL=L-(β+δ)×1.5, L is the target etching depth, β is the substrate thickness error, and δ is the maximum etching rate error.

8. The high-precision control method for bulk silicon wet etching according to claim 1, characterized in that: The wet etching precision stage is used in conjunction with the morphology detection equipment, and the measurement frequency of the step meter is appropriately and gradually increased. By detecting the corrosion stop reference structure in the detection result, it is determined that the corrosion has reached the target accuracy, and the process ends.

9. The high-precision control method for bulk silicon wet etching according to claim 1, characterized in that: The wet etching refinement stage uses optimized etching solution conditions and etching equipment conditions, including concentration, temperature, fluidity control, substrate sheet slot jitter mode, and rate.