Multi-chip packaging process

Abstract

The invention relates to the technical field of chip packaging, in particular to a multi-chip packaging process, which comprises the following steps of: acquiring chip real-time video data on packaging equipment; identifying and judging the real-time video data based on preset data, if the real-time video data are normal, entering the next step, and if the real-time video data are abnormal, giving an alarm; the chip is packaged; and blanking the packaged chip and carrying out electrical detection on the packaged chip. According to the invention, errors caused by manual operation are reduced, and the accuracy and efficiency of packaging are improved. The monitoring and abnormity warning system can find and correct errors in the packaging process in time, the problems of neglected packaging and the like are effectively avoided, and the packaging qualification rate is remarkably improved. Manual intervention is reduced in the automatic packaging process, the production cost is reduced, and the production efficiency is improved. Therefore, the problem of neglected loading caused by work errors of operators when multiple chips are packaged is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a multi-chip packaging process. Background Art

[0002] For decades, integrated circuit packaging technology has been developing along with the development of chips, expanding from single-chip packaging to multi-chip packaging, and the packaging density has been continuously improved, which has strongly promoted the miniaturization and functionalization of electronic information products. Based on the comprehensive consideration of volume, processing speed and electrical characteristics, the development of system-level packaging has received extensive attention and attention. Multi-chip display packaging has become the mainstream of communication semiconductor device packaging technology due to its many significant advantages such as high-density integration and multi-functions, and is particularly suitable for flash control, mobile communications and mobile multimedia.

[0003] Currently, when packaging multiple chips, operators may miss chips due to fatigue, lack of concentration or improper operation, which in turn reduces the chip packaging qualification rate. Summary of the invention

[0004] The purpose of the present invention is to provide a multi-chip packaging process, aiming to solve the problem of missing chips due to operator errors when packaging multiple chips.

[0005] To achieve the above object, the present invention provides a multi-chip packaging process, comprising the following steps:

[0006] Arrange the chips on the packaging equipment;

[0007] Collect real-time video data of chips on packaging equipment;

[0008] Identify and judge the real-time video data based on the preset data. If it is normal, proceed to the next step. If it is abnormal, an alarm is issued.

[0009] Packaging the chip;

[0010] The packaged chips are cut and tested for electrical properties.

[0011] Among them, in “arranging chips on packaging equipment”, the following steps are included:

[0012] Placing the chip to be packaged on the packaging equipment;

[0013] Based on the adaptive control algorithm, the chip on the packaging equipment is corrected; Mean Square Error (MSE): measures the average square of the error of the algorithm on all samples. The smaller the MSE, the higher the accuracy of the algorithm; is the actual location, is the position predicted by the algorithm, and n is the number of samples;

[0014] The chip position is detected until the chip is in a preset position.

[0015] Among them, in "collecting real-time video data of chips on packaging equipment", the following steps are included:

[0016] Drive the high-definition camera to collect real-time video of the chip on the packaging equipment;

[0017] Perform clarity processing on the collected real-time video data;

[0018] The processed real-time video data is backed up and transmitted to the management background.

[0019] Among them, "identify and judge the real-time video data based on the preset data, if it is normal, proceed to the next step, if it is abnormal, issue an alarm", includes the following steps:

[0020] The management backend extracts features from real-time video data;

[0021] The feature extraction data is tested and judged based on the preset data. If it is normal, it proceeds to the next step. If it is abnormal, an alarm is issued.

[0022] Among them, in "extracting features of real-time video data in the management background", the feature extraction includes:

[0023] Decode and process real-time video data;

[0024] Scale, denoise and grayscale the decoded video;

[0025] The processed video is subjected to feature extraction based on the SIFT algorithm to obtain the number of chips and chip features.

[0026] Among them, in “detecting and judging the feature extraction data based on the preset data, if normal, proceeding to the next step, if abnormal, issuing an alarm”, the detection and judgment includes:

[0027] Set the number of chips and chip features according to production requirements, and generate training sets and test sets;

[0028] The training set is input into the training model for training, and the test set is used for testing to obtain the detection model;

[0029] The chip quantity and chip features are input into the detection model for detection and judgment. If they meet the requirements, it is normal; if they do not meet the requirements, it is abnormal.

[0030] The step of “packaging the chip” includes the following steps:

[0031] Pre-process the chip;

[0032] Pasting and curing the pre-treated chips to obtain semi-finished products;

[0033] The semi-finished product is plastic-sealed after pin welding.

[0034] Among them, in "pre-processing the chip", the following steps are included:

[0035] Thinning the wafer;

[0036] The thinned chips are cut by a dicing machine.

[0037] Among them, the process of “performing plastic sealing after pin welding on the semi-finished product” includes the following steps:

[0038] Performing pin welding on the semi-finished product;

[0039] Plastic sealing of the semi-finished products after welding;

[0040] The semi-finished products after plastic sealing are punched and the overflow is removed.

[0041] Among them, in “Extracting features from the processed video based on the SIFT algorithm to obtain the number of chips and chip features”, the SIFT algorithm

[0042] The scale space L(x,y,σ) is defined as the convolution result of the original image I(x,y) and the Gaussian function G(x,y,σ), that is:

[0043] L(x,y,σ)=G(x,y,σ)*I(x,y)

[0044] Among them, G(x,y,σ) is a Gaussian function, and its formula is:

[0045]

[0046] Here, (x, y) is the spatial coordinate, σ is the scale coordinate, which determines the degree of smoothing; the DOG operator is the difference between two Gaussian smoothed images of adjacent scales, and its formula is:

[0047] D(x,y,σ)=(G(x,y,kσ)-G(x,y,σ))*I(x,y)=L(x,y,kσ)-l(x,y,σ)where k is a constant factor, usually an integer power of √2 to ensure the continuity of the scale space. By comparing each pixel with its neighboring points in the image domain and the scale domain, it can be determined whether it is an extreme point;

[0048] The calculation formulas for the gradient value and direction are:

[0049] Gradient value:

[0050] direction:

[0051] Among them, Lx and Ly are the gradient values ​​of the key point in the x and y directions, respectively, which can be obtained by performing convolution operations on the scale space image.

[0052] A multi-chip packaging process of the present invention comprises the following steps: arranging chips on a packaging device; collecting real-time video data of the chips on the packaging device; identifying and judging the real-time video data based on preset data, if normal, proceeding to the next step, if abnormal, issuing an alarm; packaging the chips; unloading the packaged chips and conducting electrical testing. The present invention reduces errors caused by human operation and improves the accuracy and efficiency of packaging. The monitoring and abnormal alarm system can promptly detect and correct errors in the packaging process, effectively avoid problems such as missing installation, and significantly improve the packaging qualification rate. The automated packaging process reduces manual intervention, reduces production costs, and improves production efficiency. Finally, strict quality control and electrical testing methods ensure the performance and reliability of the product and enhance the market competitiveness of the product. This solves the problem of missing installation due to operator errors when packaging multiple chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0054] Figure 1 The present invention provides a flowchart of a multi-chip packaging process.

[0055] Figure 2 It is a flowchart for arranging chips on packaging equipment.

[0056] Figure 3 It is a flow chart for collecting real-time video data of chips on packaging equipment.

[0057] Figure 4 It is a flowchart that recognizes and judges real-time video data based on preset data. If it is normal, it proceeds to the next step. If it is abnormal, an alarm is issued.

[0058] Figure 5 This is a flowchart for chip packaging.

[0059] Figure 6 It is a flowchart for chip preprocessing.

[0060] Figure 7 This is a flow chart of performing plastic sealing after pin welding on the semi-finished product.

[0061] Figure 8 It is a flowchart of the management background for feature extraction of real-time video data.

[0062] Fig. 9 It is a flowchart that detects and judges the feature extraction data based on the preset data. If it is normal, it proceeds to the next step. If it is abnormal, an alarm is issued. DETAILED DESCRIPTION

[0063] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0064] See also Figures 1 to 9 The present invention provides a multi-chip packaging process, comprising the following steps:

[0065] S1 arranges the chips on the packaging equipment;

[0066] S11 places the chip to be packaged on the packaging equipment;

[0067] Specifically, the packaging equipment is calibrated before the chips are arranged, and then the chips to be packaged are placed on the calibrated packaging equipment.

[0068] S12 corrects the position of the chip on the packaging equipment based on the adaptive control algorithm;

[0069] Set the initial parameters of the algorithm;

[0070] Obtain the current position information of the chip in real time through the sensor;

[0071] Compare the current position of the chip with the target position and calculate the position error;

[0072] Using real-time data, the system parameters are updated in real time through parameter estimation methods;

[0073] Adjust the control strategy of the controller according to the error and the system parameters estimated in real time;

[0074] Based on the adjusted control strategy, a control signal is generated for driving the packaging device to perform position correction;

[0075] The actuator of the packaging equipment acts according to the control signal to adjust the position of the chip.

[0076] Specifically, the correction mechanism on the packaging equipment is based on an adaptive control algorithm, which obtains the current correction status by real-time monitoring of the chip's position information (position deviation, angle deviation, etc.). Based on the real-time monitoring results, the algorithm generates a feedback signal to guide the adjustment action of the correction mechanism to fine-tune the chip position. The horizontal position, vertical position, and rotation angle of the chip are adjusted to ensure that the center of the chip is aligned with the center of the packaging equipment to meet the preset accuracy requirements.

[0077] Mean Square Error (MSE): measures the average of the squares of the errors of the algorithm on all samples. The smaller the MSE, the higher the accuracy of the algorithm;

[0078]

[0079] yi is the actual location, is the position predicted by the algorithm and n is the number of samples.

[0080] S13 detects the chip position until the chip is at a preset position.

[0081] Specifically, the position of the chip is detected in real time by a sensor. When it is detected that the chip position deviates from the preset position, the correction mechanism automatically adjusts the chip position until the chip is completely at the preset position.

[0082] S2 collects real-time video data of chips on packaging equipment;

[0083] S21 drives the high-definition camera to collect real-time video of the chip on the packaging device;

[0084] Specifically, a high-definition camera on the packaging device is started, and the high-definition camera captures a video image of the chip on the packaging device.

[0085] S22 performs clarity processing on the collected real-time video data;

[0086] Specifically, the collected video data is subjected to denoising, contrast enhancement, and sharpening processing to improve the clarity of the video data.

[0087] S23 backs up the processed real-time video data and transmits it to the management background.

[0088] Specifically, the processed video data is backed up for later tracing, and the processed video data is transmitted to the management backend in real time through the transmission network.

[0089] S3 identifies and judges the real-time video data based on the preset data. If it is normal, it proceeds to the next step. If it is abnormal, it issues an alarm.

[0090] S31 management backend performs feature extraction on real-time video data;

[0091] S311 decodes and processes the real-time video data;

[0092] Specifically, the decoder receives real-time video data and stores it in a buffer to ensure the continuity and integrity of the data. The decoder calls the corresponding decoding algorithm for decoding according to the encoding format of the video data. The decoding algorithm includes steps such as entropy decoding, inverse transformation, and motion compensation to restore the original video image.

[0093] S312 performs scaling, denoising and gray-scaling processing on the decoded video;

[0094] Specifically, the size of the video image is adjusted through scaling. Interpolation algorithms, such as bilinear interpolation and bicubic interpolation, are used to ensure that the quality of the scaled image remains as intact as possible. De-noising the video through a temporal filter removes noise and interference from the video frame to improve the video quality. Grayscale processing: Grayscale processing converts a color video image into a grayscale image.

[0095] S313 performs feature extraction on the processed video based on the SIFT algorithm to obtain the chip quantity and chip features.

[0096] Specifically, first, the processed video frames are scale-space transformed. In the scale space, by comparing the pixel differences of adjacent scale images, local extreme points can be detected as candidate feature points. The positions and scales of these points are accurately determined by fitting a three-dimensional quadratic function. At the same time, points with low contrast or strong edge effects are screened out by setting a certain threshold to ensure the stability of the feature points. The direction of each feature point is calculated. The direction corresponding to the maximum value in the histogram is taken as the main direction of the feature point. For each feature point, a feature descriptor is generated to describe the image information around it. The histogram is combined into a vector as the feature descriptor of the feature point. After obtaining the feature descriptors of the video frames, these descriptors are used for feature matching. The matching feature point pairs are screened according to the set threshold to obtain the correspondence between the video frames.

[0097] The scale space L(x,y,σ) is defined as the convolution result of the original image I(x,y) and the Gaussian function G(x,y,σ), that is:

[0098] L(x,y,σ)=G(x,y,σ)*I(x,y)

[0099] Among them, G(x,y,σ) is a Gaussian function, and its formula is:

[0100]

[0101] Here, (x, y) is the spatial coordinate, σ is the scale coordinate, which determines the degree of smoothing; the DOG operator is the difference between two Gaussian smoothed images of adjacent scales, and its formula is:

[0102] D(x,y,σ)=(G(x,y,kσ)-G(x,y,σ))*I(x,y)=L(x,y,kσ)-l(x,y,σ)where k is a constant factor, usually an integer power of √2 to ensure the continuity of the scale space. By comparing each pixel with its neighboring points in the image domain and the scale domain, it can be determined whether it is an extreme point;

[0103] The calculation formulas for the gradient value and direction are:

[0104] Gradient value:

[0105] direction:

[0106] Among them, Lx and Ly are the gradient values ​​of the key point in the x and y directions, respectively, which can be obtained by performing convolution operations on the scale space image.

[0107] S32 detects and judges the feature extraction data based on the preset data. If it is normal, it proceeds to the next step. If it is abnormal, an alarm is issued.

[0108] S321 sets the chip quantity and chip characteristics according to production requirements, and generates a training set and a test set;

[0109] Specifically, the chip feature data and the number of chips in a single batch are determined according to the production plan and order requirements, and chip samples that meet the requirements are selected from the existing production data as the data source. These samples may include good and defective products so that the model can learn the feature differences of chips of different quality levels, clean and organize the collected data, remove duplicate, invalid or abnormal data, standardize or normalize the data to ensure the dimensional consistency and comparability between different features, and enhance the data. The enhancement processing includes rotation, scaling, flipping, etc., to increase the diversity of the data and the generalization ability of the model; the preprocessed data is divided into training sets and test sets in a ratio of 7:3, and each sample in the training set and test set is labeled with its corresponding category or label. For example, in the chip quality inspection task, good products can be labeled as "normal" and defective products can be labeled as "abnormal".

[0110] S322 inputs the training set into the training model for training, and tests the model through the test set to obtain the detection model;

[0111] Specifically, the deep learning model is trained using the training set data. The training set data should contain a large amount of feature data of known results (normal or abnormal). The mapping relationship between feature data and results is learned through the training model to obtain a semi-finished model, which is tested through the test set model. If it passes, a detection model is obtained. If it fails, retraining is performed.

[0112] S323 inputs the chip quantity and chip features into the detection model for detection and judgment. If they meet the requirements, it is normal; if they do not meet the requirements, it is abnormal.

[0113] Specifically, the number of chips and chip features are input into the detection model, and the number of chips and chip features are preprocessed, including data cleaning, data standardization, and data enhancement. The preprocessed feature data is input into the detection model. The model will process and analyze these data to determine whether they meet the preset standards or requirements. The detection model outputs the judgment result. If the features match and there are no omissions, the batch of chips is judged to be normal; if the features do not match or are missing, an alarm signal is issued. The alarm signal includes voice prompts, sound and light alarms, and abnormal data backup. The voice prompt will send clear alarm information to the operator; the sound and light alarm will attract the attention of the operator through lights and sounds, prompting the staff to supplement the missing chips; the abnormal data backup will store the abnormal data for subsequent analysis and processing.

[0114] S4 packages the chip;

[0115] S41 pre-processes the chip;

[0116] S411 performs wafer thinning process;

[0117] Specifically, the wafer is thinned using a grinding device, with a diamond wheel with a particle diameter of 30-40 μm used for the front-stage rough grinding, and a diamond wheel with a particle diameter of 4-6 μm used for the back-stage fine grinding; a diamond wheel with a particle diameter of 35 μm is used for the front-stage rough grinding, and a diamond wheel with a particle diameter of 5 μm is used for the back-stage fine grinding.

[0118] S412: cutting the thinned chip by a dicing machine.

[0119] Specifically, the cutting speed of the dicing machine is adjusted to a cutting speed of 22 mm / s to accurately cut the thinned wafer. The dicing machine used is a DAD651 dicing machine with a cutting speed of 20 mm / s-25 mm / s.

[0120] S42 pastes and solidifies the pre-treated chip to obtain a semi-finished product;

[0121] Specifically, the pre-treated chip is pasted to the designated position of the packaging equipment, and a conductive glue or an insulating glue is used for curing. The conditions for the first curing are: nitrogen protection, curing temperature of 180°C-220°C, and curing time of 30min-90min; the curing temperature used in this embodiment is 210°C, and the curing time is 65min. The conditions for the second curing are: nitrogen protection, curing temperature of 130°C-170°C, and curing time of 45min-90min; the curing temperature used in this embodiment is 165°C, and the curing time is 65min.

[0122] S43 performs pin welding on the semi-finished product and then performs plastic sealing.

[0123] S431 performs pin welding on the semi-finished product;

[0124] Specifically, the pins of the semi-finished product are precisely welded using automatic welding equipment. The pressure welding adopts a low arc pressure welding process, a high and low arc positive and negative wire bonding method, and the welding wire material is gold wire. The welding wire temperature is 170℃-220℃; in this embodiment, the welding wire temperature is 200℃.

[0125] S432 performs plastic sealing on the semi-finished products after welding;

[0126] Specifically, the semi-finished product after welding is encapsulated with a plastic encapsulation material, and the plastic encapsulation adopts a glue-filled plastic encapsulation. The specific steps are to first electroplate a layer of 6-12 μm copper, and then electroplate a layer of 12-16 μm tin; in this embodiment, a layer of 10 μm copper is first electroplated, and then a layer of 12 μm tin is electroplated.

[0127] S433 performs plastic punching on the semi-finished product after plastic sealing and removes the overflow.

[0128] Specifically, during the plastic encapsulation process, the semi-finished product after coating is sent to a heating device for heating and curing. During the heating process, the temperature is controlled at 50-100°C and the time is 5min-20min to ensure that the plastic encapsulation material can be fully softened and tightly attached to the chip and the packaging carrier. After the heating and curing is completed, the semi-finished product is sent to a cooling device for cooling treatment. To ensure that the plastic encapsulation material can be quickly cured and reach the required strength. After the cooling treatment is completed, the quality of the plastic encapsulated semi-finished product is inspected. The inspection content includes the thickness and uniformity of the plastic encapsulation layer, and whether there are defects such as bubbles or cracks. The plastic encapsulated semi-finished product is subjected to a plastic stamping process to remove excess plastic encapsulation material and overflow.

[0129] S5 unpacks the packaged chips and performs electrical testing.

[0130] Specifically, when the chip packaging is completed, the packaged chip is removed from the production line and a preliminary appearance inspection is carried out to ensure that the chip surface is not damaged and free of foreign matter. Prepare the equipment and fixtures required for the test to ensure that the equipment is in normal working condition. Connect multiple chips to the test channel of the test equipment through a fixture, set the test parameters of the test equipment, and the test parameters include test voltage, test current, test frequency, etc.; start the test equipment and start electrical testing. During the test, the equipment will apply a predetermined voltage and current to the chip and monitor the response of the chip. When passing, the test equipment records the key parameters of the chip such as voltage, current, power consumption, frequency, etc., and compares them with the preset qualified range. After the test is completed, the equipment will generate a test report showing the test results and whether each chip is qualified. The staff will analyze the test report to determine whether the chip meets the requirements of the specification. Unqualified chips will be marked and traced.

[0131] The present invention provides a multi-chip packaging process having the following beneficial effects:

[0132] 1. The present invention provides a multi-chip packaging process. Through chip arrangement and position correction in step S1, each chip can be accurately placed at a preset position of the packaging device. The implementation of this process not only improves the chip arrangement accuracy, but also greatly reduces the problem of missing installation caused by improper operation or lack of concentration.

[0133] Second, the present invention provides a multi-chip packaging process that realizes real-time video monitoring and identification of chips on packaging equipment through the introduction of S2 and S3 steps. The high-definition camera collects video data of the chip in real time, and extracts and compares features through the management background, so that any abnormal situation can be discovered and alarmed in time, including inconsistent chip quantity or feature mismatch. This mechanism effectively prevents the occurrence of missing chips and improves the reliability and accuracy of the packaging process.

[0134] 3. The present invention provides a multi-chip packaging process. In the entire packaging process, from chip arrangement, position correction, video monitoring to identification and judgment, and then to the final packaging and electrical testing, the production efficiency is improved and the risk of missing installation caused by human factors is significantly reduced.

[0135] Fourth, the present invention provides a multi-chip packaging process with strong traceability: by backing up the real-time video data after processing, the present invention realizes the full traceability of the packaging process. Once an abnormal situation such as missing assembly occurs, the link where the problem occurred can be quickly traced back through the video data, which is convenient for subsequent analysis and processing.

[0136] The above disclosure is only a preferred embodiment of the multi-chip packaging process of the present invention, and it certainly cannot be used to limit the scope of rights of the present invention. Ordinary technicians in this field can understand that all or part of the processes of the above embodiments and equivalent changes made according to the claims of the present invention still fall within the scope of the invention.

Claims

1. A multi-chip packaging process, characterized in that: The following steps are involved: Arrange the chips on the packaging equipment; Collect real-time video data of chips on packaging equipment; Identify and judge the real-time video data based on the preset data. If it is normal, proceed to the next step. If it is abnormal, an alarm is issued. Packaging the chip; The packaged chips are cut and tested for electrical properties.

2. The multi-chip packaging process according to claim 1, characterized in that: In "arranging the chips on the packaging equipment", the following steps are included: Placing the chip to be packaged on the packaging equipment; The chip position on the packaging equipment is corrected based on the adaptive control algorithm; Mean Square Error (MSE): measures the average square of the error of the algorithm on all samples; the smaller the MSE, the higher the accuracy of the algorithm; is the actual location, is the position predicted by the algorithm, and n is the number of samples; The chip position is detected until the chip is in a preset position.

3. The multi-chip packaging process according to claim 1, characterized in that: In "Collecting real-time video data of chips on packaging equipment", the following steps are included: Drive the high-definition camera to collect real-time video of the chip on the packaging equipment; Perform clarity processing on the collected real-time video data; The processed real-time video data is backed up and transmitted to the management background.

4. The multi-chip packaging process according to claim 1, characterized in that: In "recognize and judge the real-time video data based on the preset data, if it is normal, proceed to the next step, if it is abnormal, issue an alarm", the following steps are included: The management backend extracts features from real-time video data; The feature extraction data is tested and judged based on the preset data. If it is normal, it proceeds to the next step. If it is abnormal, an alarm is issued.

5. The multi-chip packaging process according to claim 4, characterized in that: In "Extracting features from real-time video data in the management background", the feature extraction includes: Decode and process real-time video data; Scale, denoise and grayscale the decoded video; The processed video is subjected to feature extraction based on the SIFT algorithm to obtain the number of chips and chip features.

6. The multi-chip packaging process according to claim 4, characterized in that: In "detecting and judging the feature extraction data based on the preset data, if normal, proceeding to the next step, if abnormal, issuing an alarm", the detection and judgment includes: Set the number of chips and chip features according to production requirements, and generate training sets and test sets; The training set is input into the training model for training, and the test set is used for testing to obtain the detection model; The chip quantity and chip features are input into the detection model for detection and judgment. If they meet the requirements, it is normal; if they do not meet the requirements, it is abnormal.

7. The multi-chip packaging process according to claim 1, characterized in that: In "packaging the chip", the following steps are included: Pre-process the chip; Pasting and curing the pre-treated chips to obtain semi-finished products; The semi-finished product is plastic-sealed after pin welding.

8. The multi-chip packaging process according to claim 7, characterized in that: In "Pre-processing the chip", the following steps are included: Thinning the wafer; The thinned chips are cut by a dicing machine.

9. The multi-chip packaging process according to claim 7, characterized in that: In "performing plastic sealing after pin welding on the semi-finished product", the following steps are included: Performing pin welding on the semi-finished product; Plastic sealing of the semi-finished products after welding; The semi-finished products after plastic sealing are punched and the overflow is removed.

10. The multi-chip packaging process according to claim 2, characterized in that: In "Extracting features from processed video based on SIFT algorithm to obtain chip quantity and chip features", the SIFT algorithm scale space L(x, y, σ) is defined as the convolution operation result of the original image I(x, y) and the Gaussian function G(x, y, σ), that is: L(x,y,σ)=G(x,y,σ)*I(x,y) Among them, G(x,y,σ) is a Gaussian function, and its formula is: Here, (x, y) is the spatial coordinate, σ is the scale coordinate, which determines the degree of smoothing; the DOG operator is the difference between two Gaussian smoothed images of adjacent scales, and its formula is: D(x,y,σ)=(G(x,y,kσ)-G(x,y,σ))*I(x,y)=L(x,y,kσ)-l(x,y,σ)where k is a constant factor, usually an integer power of √2 to ensure the continuity of the scale space. By comparing each pixel with its neighboring points in the image domain and the scale domain, it can be determined whether it is an extreme point; The calculation formulas for the gradient value and direction are: Gradient value: direction: Among them, Lx and Ly are the gradient values ​​of the key point in the x and y directions, respectively, which can be obtained by performing convolution operations on the scale space image.

Images