Data processing method based on flash memory, data processing device and storage medium

Abstract

This application discloses a flash memory-based data processing method, data processing device, and storage medium, relating to the field of flash memory technology. The disclosed flash memory-based data processing method includes: acquiring a failed error correction page of the flash memory after error detection and correction processing, and acquiring a successful error correction page adjacent to the failed error correction page; determining the target data corresponding to the corrected data of the successful error correction page within the failed error correction page; performing software decoding on the target data based on the corrected data and a preset decoding algorithm to identify and correct erroneous data bits in the failed error correction page, reducing the number of erroneous bits in the failed error correction page; and performing error detection and correction processing on the software-decoded failed error correction page to obtain the corrected target successful error correction page. After acquiring the failed error correction page, software decoding is performed on the failed error correction page using the error correction data of adjacent pages to reduce the number of errors, enabling the failed error correction page to undergo error correction processing and improving error correction reliability.

Description

Technical Field

[0001] This application relates to the field of flash memory technology, and in particular to flash memory-based data processing methods, data processing devices, and storage media. Background Technology

[0002] In the field of data storage, ECC (Error Checking and Correction) is an important error correction technology widely used in various storage systems to improve data integrity and reliability. ECC detects and corrects errors that may occur during data storage or transmission by adding redundant information, thereby ensuring data accuracy.

[0003] However, the error correction capability of ECC depends on the redundancy of its algorithm design and implementation. Different ECC algorithms and configurations have different error correction capabilities. Regardless of the algorithm and configuration used, the error correction range of ECC is limited. When the number of errors exceeds this range, ECC cannot correct these errors and can only report them as errors, resulting in low reliability of data error correction.

[0004] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The main objective of this application is to provide a flash-based data processing method, data processing device, and storage medium, aiming to solve the technical problem of low reliability in data error correction.

[0006] To achieve the above objectives, this application proposes a flash memory-based data processing method, comprising:

[0007] Retrieve the error correction failure page of the flash memory after performing error detection and correction processing, and retrieve the error correction success page adjacent to the error correction failure page;

[0008] The corrected data on the successful correction page corresponds to the target data on the failed correction page.

[0009] Based on the corrected data and the preset decoding algorithm, the target data is subjected to software decoding to identify and correct the erroneous data bits of the error-corrected pages and reduce the number of erroneous bits in the error-corrected pages.

[0010] Error detection and correction are performed on the error-corrected page after software decoding to obtain the corrected target error-corrected page.

[0011] In one embodiment, before the step of determining the target data corresponding to the corrected data in the page where the correction was successful, the method further includes:

[0012] Retrieve the data of the corrected pages from the pages where the correction was successful, as well as the data of the uncorrected pages before the correction.

[0013] Based on the data of corrected pages and uncorrected pages, determine the corrected data of pages that have been successfully corrected.

[0014] In one embodiment, the step of determining the corrected data of a successfully corrected page based on corrected page data and uncorrected page data includes:

[0015] Determine the XOR result of the corrected page data and the uncorrected page data;

[0016] The error bit information of the successfully corrected page is generated based on the XOR result, and the error bit information is set as the corrected data; or

[0017] Input the corrected page data and the uncorrected page data into the preset error correction model to obtain the error bit information of the successfully corrected page, and set the error bit information as the corrected data.

[0018] In one embodiment, before the step of determining the corrected data of a successfully corrected page based on corrected page data and uncorrected page data, the method further includes:

[0019] Write the corrected page data and the uncorrected page data to the temporary storage area;

[0020] The steps are performed based on the temporary storage area to determine the corrected data of successfully corrected pages, using both corrected and uncorrected page data.

[0021] In one embodiment, the steps of obtaining the error correction failure page of the flash memory after performing error detection and correction processing, and obtaining the error correction success page adjacent to the error correction failure page, include:

[0022] Obtain the memory page error correction information generated by the flash memory error correction module;

[0023] Based on the error correction results of the stored page error correction information, determine the pages that failed to correct errors;

[0024] Retrieve at least one page that was successfully corrected, adjacent to the page that failed to correct the error.

[0025] In one embodiment, the step of obtaining at least one page of successful error correction adjacent to the page that failed to correct the error includes:

[0026] Determine the storage block where the error correction failed page is located;

[0027] Retrieve at least one page that was successfully corrected, adjacent to the page that failed to correct the error, within the storage block.

[0028] In one embodiment, after the step of performing software decoding on the target data based on the corrected data and a preset decoding algorithm, the method further includes:

[0029] Get the number of errors on pages where error correction failed;

[0030] If the number of errors is less than or equal to the preset number associated with error detection and correction processing, perform error detection and correction processing on the error correction failure page after software decoding to obtain the corrected target error correction success page.

[0031] In one embodiment, after the step of performing error detection and correction processing on the error-corrected failed page based on the software decoding to obtain the corrected target error-corrected successful page, the method further includes:

[0032] Obtain the verification information from the target error correction success page;

[0033] If the verification information indicates that the verification passed, update the target error correction success page to the flash memory, or update the error correction status corresponding to the target error correction success page in the flash memory.

[0034] In addition, to achieve the above objectives, this application also proposes a data processing apparatus, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the flash memory-based data processing method described above.

[0035] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the flash memory-based data processing method described above.

[0036] One or more technical solutions proposed in this application have at least the following technical effects:

[0037] When there are failed error correction pages in a flash memory storage page whose number of errors exceeds the ECC error correction capability, the system obtains the successfully corrected error correction pages adjacent to the failed error correction pages and reads the corrected data from the successfully corrected pages. The system then uses this corrected data to perform software decoding on the failed error correction pages. By identifying the erroneous data bits of the failed error correction pages through known error data from pages with similar structures, the system performs error correction, thereby reducing the number of errors that need to be corrected by ECC. This allows flash memory storage pages with error information exceeding the ECC error correction capability to undergo ECC error correction, thus improving the reliability of data error correction in flash memory storage pages. Attached Figure Description

[0038] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a flowchart illustrating the first embodiment of the flash memory-based data processing method of this application;

[0041] Figure 2 This is a flowchart illustrating the second embodiment of the flash memory-based data processing method of this application;

[0042] Figure 3 This is a schematic diagram of the device structure of the hardware operating environment involved in the data processing method based on flash memory in the embodiments of this application.

[0043] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0044] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0045] The main solution of this application embodiment is: to obtain the error correction failure page of the flash memory after performing error detection and correction processing, and to obtain the error correction success page adjacent to the error correction failure page;

[0046] The corrected data on the successful correction page corresponds to the target data on the failed correction page.

[0047] Based on the corrected data and the preset decoding algorithm, the target data is subjected to software decoding to identify and correct the erroneous data bits of the error correction failure page, thereby reducing the number of erroneous bits in the error correction failure page.

[0048] Error detection and correction are performed on the error-corrected page after software decoding to obtain the corrected target error-corrected page.

[0049] During production and use, NAND Flash may develop bad blocks or bad columns. These bad blocks or bad columns may be caused by manufacturing defects, charge leakage, physical damage, etc. When consecutive bad columns dynamically appear in NAND Flash during operation (errors occur simultaneously on multiple data bits), it has a significant impact on error correction capabilities. LDPC codes (Low Density Parity-check Codes) rely on a parity-check matrix for error correction. When the number of error bits is large and continuously distributed, the parity-check matrix may not be able to effectively identify and correct these errors, leading to a decrease in error correction capability and reduced data error correction reliability.

[0050] Furthermore, when using ECC for error correction, regardless of the algorithm and configuration employed, the range of error correction provided by ECC is limited. When the number of errors exceeds this limit, ECC cannot correct these errors and can only report them as errors, resulting in low reliability of data error correction.

[0051] This application provides a solution where, when there is too much erroneous data that prevents flash memory pages from undergoing ECC processing, the solution first obtains the successfully corrected pages adjacent to the failed correction pages, and then performs software decoding on the corresponding data in the failed correction pages based on the corrected data of the successfully corrected pages. This reduces the number of errors that need to be corrected by ECC, enabling flash memory pages with error information exceeding the ECC correction capability to undergo ECC correction processing, thereby improving the reliability of data error correction for flash memory pages.

[0052] It's important to note that ECC primarily relies on the principle of redundant coding to detect and correct data errors. Specifically, when data is written to ECC memory, the ECC logic calculates a checksum based on the data bits using a specific algorithm. This calculated checksum is stored in additional check bits. When data is read from ECC memory, the ECC logic recalculates the checksum based on the read data bits. It then compares the calculated checksum with the one stored in memory. If the two checksums do not match, an error has occurred during data storage or transmission. In this case, the ECC logic triggers an error detection mechanism to determine if an error has occurred. If an error is detected, the ECC logic uses a specific algorithm to pinpoint the exact location of the error. A common approach is to compare the values ​​of different check bits and the relationships between these values. Once the error location is determined, the ECC logic automatically corrects the error by flipping the erroneous bits to their correct values. The corrected data is then rewritten to memory to ensure data accuracy and integrity.

[0053] Furthermore, ECC error correction is typically performed in real-time during data reading, and its error correction capability is determined based on specific algorithms and the design of redundant check bits. ECC error correction relies on comparing the checksum calculated during reading with the stored checksum to detect and correct errors. Therefore, ECC error correction is a real-time process and cannot be performed in batches. That is, when the amount of data errors exceeds the ECC error correction capability, page data will not be batched for ECC error correction. Implementing batch error correction requires complex technical support, including how to determine which errors can be corrected first, which need to be processed later, and how to ensure that no new errors are introduced in subsequent processing. These technical difficulties make batch error correction impractical in real-world applications. Moreover, each error correction requires time and resources, and if an interruption or error occurs during the error correction process, it may lead to data loss or corruption.

[0054] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0055] It should be noted that the executing entity in this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or an electronic device or data processing device capable of performing the above functions. The following description uses a data processing device as an example to illustrate this embodiment and the subsequent embodiments.

[0056] Based on this, the embodiments of this application provide a data processing method based on flash memory, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the data processing method based on flash memory in this application.

[0057] In this embodiment, the flash memory-based data processing method includes steps S10 to S40:

[0058] Step S10: Obtain the error correction failure page of the flash memory after performing error detection and correction processing, and obtain the error correction success page adjacent to the error correction failure page.

[0059] It should be noted that error detection and correction refers to ECC error correction processing, hereinafter referred to as ECC error correction processing. Error correction failure pages refer to flash memory storage pages that ECC cannot successfully correct. During data reading, due to various reasons (such as physical damage, electromagnetic interference, etc.), the number of errors in the data on these pages exceeds the error correction capability range of ECC, therefore ECC cannot effectively correct them. Error correction success pages are flash memory storage pages that have successfully undergone ECC error correction.

[0060] In this embodiment, when consecutive bad columns occur in the flash memory, all pages within the entire block exhibit the same bad column. Therefore, ECC error correction is required when writing data to a flash memory storage page. Obtaining a failed error correction page after ECC correction indicates that the data errors in some flash memory data pages within the consecutive bad columns exceed the ECC correction capability. Therefore, to ensure that this failed error correction page can undergo ECC correction, it needs to have the same physical / storage structure as the failed page, or logically consecutive adjacent page information. This allows the adjacent pages that have successfully undergone ECC correction to perform software decoding on the failed page, reducing errors during subsequent ECC processing.

[0061] Specifically, the error correction information of each flash memory storage page fed back by the detection module can be read to determine which flash memory storage pages are error correction failure pages and which are error correction success pages. Then, based on the determined information, the error correction failure pages are read, and simultaneously, adjacent error correction success pages are obtained. The number of adjacent error correction success pages obtained can be set according to actual needs. The more adjacent error correction success pages obtained, the better the effect of software decoding processing of the error correction failure pages based on the error correction success pages, and the higher the corresponding data error correction reliability. Therefore, after obtaining the error correction failure page, at least one adjacent error correction success page needs to be obtained so that software decoding processing of the error correction failure page can be performed based on the adjacent error correction success pages.

[0062] Adjacent pages refer to one or more adjacent flash memory pages within the same block. For example, if the page number of the page that failed to correct an error is 5, its adjacent pages that successfully corrected the error can be pages 4 and 6, or pages 1-4, 6-10, or more.

[0063] Optionally, data integrity can also be verified using redundant data (such as checksums and hash values) written to each flash memory storage page. If the redundant data matches the decoded data, the data correction for that page is considered successful; otherwise, the correction is considered to have failed.

[0064] Step S20: Determine the target data corresponding to the corrected data on the page where the correction was successful on the page where the correction failed.

[0065] It should be noted that corrected data can be used as software decoding data and to assist in software decoding of data in pages where error correction failed. Corrected data includes the data bits and padding information of successfully corrected bits. Since pages with successful and failed corrections are adjacent pages, their storage structures and error locations are similar. Therefore, the data bits of the corrected data are mapped to the corresponding target data in the page where error correction failed, and software decoding is performed based on this target data. Target data refers to data located at the same position on the data storage page as the corrected data or at a related position between storage pages.

[0066] In this embodiment, since adjacent flash memory data pages have similar storage structures, the target data of the ECC failure page can be directly determined from the location of the corrected data on the ECC correction page, either at the same location or at a location with a mapping relationship. For example, if the corrected data is located at the 3rd bit of the data bits on the successful correction page, the corresponding target data is the 3rd bit of the data on the failed correction page, or the nth bit that is associated with the 3rd bit.

[0067] Step S30: Perform software decoding on the target data based on the corrected data and the preset decoding algorithm.

[0068] It should be noted that software decoding refers to using already corrected data as software decoding data to identify the target data, i.e., the corrected data. The software decoding data reveals the preset decoding algorithm, and based on this algorithm, it identifies and attempts to correct erroneous data bits in pages that have failed to be corrected, thereby reducing the number of erroneous bits in those pages.

[0069] In this embodiment, the data processing device utilizes this software-decoded data and a preset software-decoding algorithm (such as a probability-based decoding algorithm, an iterative decoding algorithm, etc.) to perform in-depth analysis of the target data in the error correction failure page. Specifically, the software-decoding algorithm attempts to more accurately determine the correctness of each target data point based on the software decoding, and attempts to recover errors that the initial ECC decoding failed to correct, i.e., identify and correct some erroneous data bits. These corrected data bits are then updated back to the error correction failure page, thereby reducing the number of erroneous bits in that page. Therefore, by performing software decoding on the target data, erroneous data bits in the error correction failure page can be identified and corrected, thereby reducing the number of erroneous bits in the error correction failure page.

[0070] This embodiment uses a preset algorithm to perform soft decoding on the target data that needs to be soft-decoded in the error correction failure page, thereby reducing the number of errors in the error correction failure page and improving the reliability of subsequent ECC error correction processing of the error correction failure page.

[0071] Step S40: Based on the error correction failure page after software decoding, perform error detection and correction processing to obtain the corrected target error correction success page.

[0072] In this embodiment, after the error correction failure page undergoes software decoding, the number of errors that need to be corrected by ECC is reduced. This allows flash memory storage pages with error information exceeding the ECC correction capability to undergo ECC error correction processing, ultimately resulting in the target error-corrected success page after correction processing. Based on this, when dealing with consecutive bad columns in flash memory, the error correction failure page with a large number of error messages is software-decoded using data from adjacent error-corrected success pages to reduce the number of errors, enabling the error correction failure page to undergo subsequent ECC correction processing, thereby improving the reliability of data error correction.

[0073] Understandably, all error correction failure pages can be processed using the current method. If consecutive error correction failure pages occur, such as flash storage pages numbered 5-10 all being error correction failure pages, then page number 5 can be corrected first based on page number 4, or page numbers 1-4 being successfully corrected. Subsequently, after page number 5 completes ECC error correction and becomes a successfully corrected page, the subsequent error correction failure pages are processed, and so on, until all flash data pages within the block have completed ECC error correction, thus improving data write efficiency and data error correction reliability.

[0074] This embodiment provides a flash memory-based data processing method. When consecutive bad columns occur in the flash memory, if the number of errors exceeds the ECC error correction capability, the adjacent successfully corrected pages are directly acquired, and the corrected data of the successfully corrected pages is read. The failed pages are then software-decoded using the corrected data and a preset decoding algorithm, thereby reducing the number of errors that need to be corrected by ECC. This allows flash memory pages with error information exceeding the ECC error correction capability to undergo ECC error correction processing, ultimately obtaining the corrected target successfully corrected page, thus improving the data error correction reliability of the flash memory pages.

[0075] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in the first embodiment can be referred to the above description, and will not be repeated hereafter. On this basis, when performing error correction processing through the corrected data on the successful error correction page and the failed error correction page, it is necessary to first determine the content of the corrected data. Therefore, please refer to... Figure 2 Before step S20, the flash memory-based data processing method also includes steps S50 to S60:

[0076] Step S50: Obtain the corrected page data of the page with successful error correction, and the uncorrected page data before error correction.

[0077] In this embodiment, the corrected page data includes the data bits and padding information of the successfully corrected bits, while the uncorrected page data refers to data that has not yet been processed or checked by the ECC algorithm during data storage or transmission. In this embodiment, by comparing the corrected page data after ECC error correction with the uncorrected page data before ECC error correction, it can be determined which bit data positions have changed, and the changed data is then considered as corrected data.

[0078] Specifically, the system can directly read the corrected page data of the currently successfully corrected page, and simultaneously obtain the uncorrected page data before correction through the ECC correction history. By obtaining both corrected and uncorrected page data, it can accurately determine which data has changed, allowing for optimization of the failed correction pages based on the changed data.

[0079] Step S60: Based on the corrected page data and the uncorrected page data, determine the corrected data of the successfully corrected pages.

[0080] In this embodiment, the corrected data of successfully corrected pages can be found from both corrected and uncorrected page data using ECC error location. ECC error location methods may include XOR operations, error correction table lookups, large model lookups, and algorithm decoding.

[0081] Specifically, when determining the corrected data for a successfully corrected page, the data from the uncorrected page and the corrected page can be compared. The corrected data can be determined based on the differences between the two. Alternatively, two different page data sets can be input into a large model, and the differences can be analyzed based on the large model to determine the corrected data. After obtaining the corrected data, the processing action in step S20 is executed.

[0082] Optionally, besides determining corrected data through corrected and uncorrected page data, corrected data can also be determined by querying the error correction table. Specifically, during ECC error correction processing, the ECC error correction algorithm typically generates an error correction code table, which contains all possible error modes and their corresponding error correction codes. Therefore, upon receiving a successfully corrected page, the error correction code table can be directly consulted to find the changed data. Processing via table lookup improves computational efficiency.

[0083] Based on this, by acquiring the corrected page data and uncorrected page data of the successfully corrected page, the corrected data is calculated using the difference information between the two page data, thereby improving the accuracy of the corrected data and thus improving the effect of software decoding processing on the failed page based on the corrected data, thereby improving the reliability of error correction.

[0084] Based on the second embodiment described above, in the third embodiment of this application, step S60 may include: determining the XOR result of the corrected page data and the uncorrected page data, then generating error bit information of the successfully corrected page based on the XOR result, and setting the error bit information as the corrected data.

[0085] In this embodiment, by performing an XOR operation on the corrected and uncorrected page data, the differences between the two pages are extracted. The XOR process involves comparing each bit of the two pages. If the values ​​of a bit are different (one is 0 and the other is 1), the XOR result for that bit is 1; if the values ​​of a bit are the same (both are 0 or both are 1), the XOR result for that bit is 0. Based on this, the XOR result of 0 or 1 for each data bit in the currently successfully corrected page is obtained. The error bit information is the result of the data bit being 1 in the XOR result, indicating that the data bit has an error and has been corrected by ECC. Finally, the error bit information is set as corrected data so that the pages that failed to correct can be software decoded using the error bit information. Therefore, by performing an XOR operation between the uncorrected page data and the corrected page data (which already contains the ECC correction result), the location of the error can be effectively revealed.

[0086] Optionally, in step S60, the process of determining the corrected data based on the corrected page data and the uncorrected page data may further include: inputting the corrected page data and the uncorrected page data into a preset error correction model to obtain the error bit information of the successfully corrected page, and then setting the error bit information as the corrected data.

[0087] Specifically, a machine learning model is trained to learn the characteristics and error patterns of ECC error correction codes. Upon receiving a successfully corrected page, both the corrected and uncorrected page data, containing the corrected information, are input into the model. The model then outputs a decoding result, which includes the error bit information from the successfully corrected page. Understandably, this method requires substantial training data and computational resources, but it offers higher decoding performance and a lower error rate, effectively improving error correction reliability.

[0088] This embodiment improves the accuracy of the calculated corrected data by performing an XOR operation on the uncorrected page data and the corrected page data, or by processing based on a large model, thereby reducing subsequent data processing time.

[0089] Based on the second embodiment described above, in the fourth embodiment of this application, during the process of calculating the corrected data based on the corrected page data and the uncorrected page data, since the data has already been written into the flash memory, once the data is written to a certain block, the entire block needs to be erased to rewrite the new data. Furthermore, flash memory chips typically do not contain sufficient computing resources to perform complex data processing tasks. Performing data calculations within the flash memory can significantly impact the performance of the storage device, including increasing read and write latency, reducing throughput, and increasing power consumption. To avoid these performance issues, data calculations are generally not performed within the flash memory.

[0090] Therefore, in this embodiment, after obtaining the corrected page data and the uncorrected page data in step S50, and before determining the corrected data based on the corrected page data and the uncorrected page data in step S60, it is necessary to write the corrected page data and the uncorrected page data into a temporary storage area, and then perform the action of step S60 in the temporary storage area.

[0091] For example, after reading the corrected page data of the successfully corrected page, this data is written to RAM (Random Access Memory) via NAND Flash Bypass, which is equivalent to obtaining completely correct data when the data was written to Flash. At the same time, the uncorrected page data is written to RAM. Finally, when executing step S60, the completely correct data in RAM (corrected page data) is XORed with the data read from the uncorrected page data to obtain the error status of the successfully corrected page, i.e., the corrected data.

[0092] In this embodiment, the data to be compared is stored in a temporary storage area, and then data processing is performed in the temporary storage area. This effectively reduces the complexity of calculating the corrected data and the complexity of the flash memory chip, and improves the feasibility of calculating the corrected data.

[0093] Based on the first embodiment of this application, in the fifth embodiment of this application, the content that is the same as or similar to the first embodiment described above can be referred to the above description, and will not be repeated hereafter. In addition, step S10 further includes steps S11 to S13:

[0094] Step S11: Obtain the storage page error correction information generated by the flash memory error correction module.

[0095] In this embodiment, after ECC error correction processing, the hardware modules of the data processing device, such as the ECC error correction module, will generate error correction information for each storage page. Therefore, by obtaining the error correction information of the storage pages, it is possible to determine which flash memory data pages are error correction failure pages, which are error correction success pages, and which are normal pages.

[0096] By acquiring storage page error correction information, it is possible to accurately determine which flash memory pages contain correct data and which contain incorrect data, thereby improving data processing efficiency.

[0097] Step S12: Based on the error correction results of the stored page error correction information, determine the pages that failed to correct errors.

[0098] In this embodiment, the error correction result can be determined by the check bit or check code in the error correction information.

[0099] For example, in the error correction information fed back by the ECC error correction module, the check codes are 0, 1 and 2 respectively. When the check code is 0, it means that the flash memory data page is a page that failed to correct errors. When the check code is 1, it means that the page that successfully corrected errors is a page. When the check code is 2, it means that the page is a normal page.

[0100] After identifying the page that failed to correct errors, the corresponding page that succeeded in correcting errors is obtained from the page that failed to correct errors. Then, the page that failed to correct errors is processed by software decoding through the page that succeeded in correcting errors, thereby reducing the complexity of ECC error correction.

[0101] Step S13: Obtain at least one page that successfully corrected errors, adjacent to the page that failed to correct errors.

[0102] In this embodiment, at least one page of successfully corrected errors can be obtained using the page number information of adjacent pages. By obtaining at least one adjacent page of successfully corrected errors, the pages of pages that failed to correct errors can be software-decoded based on the data of similar structures of adjacent pages, thereby improving the reliability of the software decoding process.

[0103] This embodiment accurately obtains the error-correction failure page of ECC error correction failure and at least one adjacent error-correction success page through the error correction information of the hardware module, thereby improving the reliability of software decoding processing.

[0104] Based on the fifth embodiment of this application, the same content as in the fifth embodiment will not be described in detail in the sixth embodiment. In the physical layout of NAND flash memory, adjacent pages typically refer to logically contiguous pages, which may also physically reside within the same block. Therefore, if a successfully corrected page and a failed corrected page are considered adjacent, they are likely located within the same block. Thus, during the process of obtaining at least one successfully corrected page adjacent to a failed corrected page, the storage block containing the failed corrected page can be determined, and then at least one successfully corrected page adjacent to the failed corrected page can be obtained within that storage block. The storage block can be determined using the block number information of the failed corrected page.

[0105] In this embodiment, the storage structures of data pages within the same storage block are quite similar. Therefore, when the same error occurs, all data pages within the storage block will have the error in essentially the same location. Thus, when retrieving successfully corrected pages from adjacent blocks, it is necessary to retrieve the flash memory data pages within the same storage block. Based on the similar storage structures of data pages within the same storage block, the effectiveness of software decoding of failed error-corrected pages using successfully corrected pages can be effectively improved.

[0106] Based on the first embodiment of this application, in the seventh embodiment of this application, the same or similar content as the first embodiment can be referred to the above description, and will not be repeated hereafter. On this basis, under normal circumstances where bad columns occur, the number of data errors on adjacent pages usually does not differ significantly (usually not exceeding twice). Therefore, in the aforementioned embodiments, after performing software decoding on the data of the failed error correction page based on the data of the adjacent successfully corrected pages, it is considered that the remaining number of errors on the failed error correction page does not exceed the upper limit of the number of errors corrected by ECC error correction processing. That is, after step S30, the processing action of step S40 can be directly executed.

[0107] Therefore, in this embodiment, to avoid directly executing step S40 under special circumstances (where the number of errors on adjacent pages differs significantly), which could lead to ineffective error correction processing later, after executing step S30 and before step S40, it is necessary to obtain the number of errors on pages that failed to correct errors. If the number of errors is less than or equal to a preset number associated with error detection and correction processing, the processing action of step S40 is executed. Here, the preset number is the maximum number of errors that can be corrected by ECC error correction processing. If the number of errors is greater than the preset number, an error message is output, or the process jumps to the processing action of step S10 to select more adjacent pages that successfully corrected errors for software decoding processing, thereby improving the reliability of error correction.

[0108] Based on the first embodiment of this application, in the eighth embodiment of this application, the content that is the same as or similar to the first embodiment described above can be referred to the above description and will not be repeated hereafter. Based on this, after step S30, steps S60-S70 are also included:

[0109] Step S60: Obtain the verification information of the target error correction success page.

[0110] In this embodiment, after correcting a page that failed to correct an error, it is necessary to verify whether the corrected data is accurate. Verification is achieved by rereading the corrected page and applying the ECC algorithm. By obtaining verification information, it is possible to analyze and determine whether the page that failed to correct an error has been properly corrected, thereby improving the reliability of data error correction.

[0111] Step S70: If the verification information is successful, update the target error correction success page to the flash memory, or update the error correction status corresponding to the target error correction success page in the flash memory.

[0112] In this embodiment, if a failed page correction is successfully corrected, new data needs to be updated in the flash memory, such as updating the target successfully corrected page in the temporary storage area. Furthermore, if the error correction of a failed page is completed directly in the flash memory, the storage device's status information needs to be updated to reflect that the page has now returned to a normal state. Updating to the latest status information or the latest data helps in the management and maintenance of the storage device.

[0113] This application provides a data processing apparatus, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the flash-based data processing method in the first embodiment described above.

[0114] The following is for reference. Figure 3 It shows a schematic diagram of the structure of a data processing device suitable for implementing the embodiments of this application. Figure 3 The data processing device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0115] like Figure 3 As shown, the data processing device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 into a random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the data processing device. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touchscreen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 1003 including, for example, magnetic tape, hard disk, etc.; and communication devices 1009. Communication device 1009 allows the data processing device to communicate wirelessly or wiredly with other devices to exchange data. Although the figures show data processing devices with various systems, it should be understood that it is not required to implement or possess all of the systems shown. More or fewer systems may be implemented alternatively.

[0116] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0117] The data processing device provided in this application, employing the flash memory-based data processing method described in the above embodiments, can solve the technical problem of low reliability in data error correction. Compared with the prior art, the beneficial effects of the data processing device provided in this application are the same as those of the flash memory-based data processing method provided in the above embodiments, and other technical features of this data processing device are the same as those disclosed in the method of the previous embodiment, and will not be repeated here.

[0118] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0119] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0120] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, the computer-readable program instructions being used to execute the flash-based data processing method in the above embodiments.

[0121] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0122] The aforementioned computer-readable storage medium may be included in a data processing device or may exist independently without being assembled into a data processing device.

[0123] The aforementioned computer-readable storage medium carries one or more programs, which, when executed by a data processing device, cause the data processing device to:

[0124] Retrieve the error correction failure page of the flash memory after performing error detection and correction processing, and retrieve the error correction success page adjacent to the error correction failure page;

[0125] The corrected data on the successful correction page corresponds to the target data on the failed correction page.

[0126] Based on the corrected data and the preset decoding algorithm, the target data is subjected to software decoding to identify and correct the erroneous data bits of the error-corrected pages and reduce the number of erroneous bits in the error-corrected pages.

[0127] Error detection and correction are performed on the error-corrected page after software decoding to obtain the corrected target error-corrected page.

[0128] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0129] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0130] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0131] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described flash memory-based data processing method, thereby solving the technical problem of low reliability in data error correction. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the flash memory-based data processing method provided in the above embodiments, and will not be repeated here.

[0132] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A data processing method based on flash memory, characterized in that, The flash-based data processing method includes: Obtain the error correction failure page of the flash memory after performing error detection and correction processing, and obtain the error correction success page adjacent to the error correction failure page; Determine the target data corresponding to the corrected data of the successful correction page in the failed correction page. The target data is data that is in the same position on the data storage page or in an associated position between storage pages as the corrected data. Based on the corrected data and the preset decoding algorithm, the target data is subjected to software decoding to identify and correct the erroneous data bits of the error correction failure page, thereby reducing the number of erroneous bits in the error correction failure page. Error detection and correction are performed on the error-corrected page after software decoding to obtain the corrected target error-corrected page.

2. The flash memory-based data processing method as described in claim 1, characterized in that, Before the step of determining the target data corresponding to the corrected data of the successful correction page in the failed correction page, the method further includes: Obtain the corrected page data of the page with successful error correction, and the uncorrected page data before error correction; Based on the corrected page data and the uncorrected page data, the corrected data of the successfully corrected page is determined.

3. The flash memory-based data processing method as described in claim 2, characterized in that, The step of determining the corrected data of the successfully corrected page based on the corrected page data and the uncorrected page data includes: Determine the XOR result of the corrected page data and the uncorrected page data; Based on the XOR result, generate the error bit information of the successfully corrected page, and set the error bit information as the corrected data; or The corrected page data and the uncorrected page data are input into a preset error correction model to obtain the error bit information of the successfully corrected page, and the error bit information is set as the corrected data.

4. The flash memory-based data processing method as described in claim 2, characterized in that, Before the step of determining the corrected data of the successfully corrected page based on the corrected page data and the uncorrected page data, the method further includes: Write the corrected page data and the uncorrected page data into a temporary storage area; The step of determining the corrected data of the successfully corrected page based on the corrected page data and the uncorrected page data is performed based on the temporary storage area.

5. The flash memory-based data processing method as described in claim 1, characterized in that, The steps of obtaining the error correction failure page of the flash memory after error detection and correction processing, and obtaining the error correction success page adjacent to the error correction failure page, include: Obtain the storage page error correction information generated by the error correction module of the flash memory; Based on the error correction results of the stored page error correction information, the page that failed to correct the error is determined; Obtain at least one page of the error correction success page that is adjacent to the page that failed to correct the error.

6. The flash memory-based data processing method as described in claim 5, characterized in that, The step of obtaining at least one page of the error correction success page adjacent to the error correction failure page includes: Determine the storage block where the error correction failure page is located; Retrieve at least one page of the error correction success page that is adjacent to the error correction failure page within the storage block.

7. The flash memory-based data processing method as described in claim 1, characterized in that, After the step of performing software decoding on the target data based on the corrected data and the preset decoding algorithm, the method further includes: Obtain the number of errors on the page where the error correction failed; If the number of errors is less than or equal to the preset number associated with error detection and correction processing, the step of performing error detection and correction processing on the error correction failure page based on the software decoding processing is executed to obtain the corrected target error correction success page.

8. The flash memory-based data processing method as described in claim 1, characterized in that, After the step of performing error detection and correction processing on the error-corrected failed page based on the software decoding to obtain the corrected target error-corrected successful page, the method further includes: Obtain the verification information of the target error correction success page; If the verification information indicates that the verification is successful, the target error correction success page is updated to the flash memory, or the error correction status corresponding to the target error correction success page in the flash memory is updated.

9. A data processing device, characterized in that, The data processing device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the flash-based data processing method as described in any one of claims 1 to 8.

10. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the flash memory-based data processing method as described in any one of claims 1 to 8.

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