Digital-to-analog converter layout structure

Abstract

The invention discloses a digital-to-analog converter layout structure, in which a thermometer code resistor array comprises (2N-1) resistor groups, and the (2N-1) resistor groups are arranged in a rectangular area. (2N-1) resistor groups of the thermometer code resistor array are divided into odd groups and even groups, the odd groups are respectively arranged in the upper left area and the lower right area, and the even groups are respectively arranged in the upper right area and the lower left area. The odd-numbered resistor groups and the even-numbered resistor groups are of a central symmetry structure and are arranged from the outer side to the center. According to the layout structure of the digital-to-analog converter, the layout form of the thermometer code resistor array not only considers the matching between resistors, but also optimizes the wiring structure of the resistor array by means of odd-even grouping, so that the layout efficiency is improved, and under the conditions of the same resistor area and no increase of wiring, the layout efficiency is improved. And better matching performance can be obtained.

Description

Technical Field

[0001] The invention relates to a digital-to-analog converter technology, and in particular to a digital-to-analog converter layout structure. Background Art

[0002] Digital-to-Analog Converter (DAC) is a common analog circuit, commonly used in various audio devices and optical communication applications. Its working principle is to convert digital signals into corresponding voltage or current outputs. Common DAC structures include resistor network type, current steering type, capacitor type, etc. Among them, resistor network type DAC is a more common DAC type, which has the advantages of simple structure, low cost, and stable output voltage.

[0003] Among resistor network DACs, segmented resistor structure DAC is the most common resistor topology. Segmented resistor structure DAC consists of two parts: low-weight bits are controlled by binary code to save area, and high-weight bits are controlled by thermometer code to reduce differential nonlinearity (DNL) and integral nonlinearity (INL) and improve output performance. The basic structure of segmented resistor structure DAC is as follows: Figure 1 As shown, the low bit occupies M bits and the high bit occupies N bits:

[0004] Therefore, for resistor network DAC, the resistance controlled by the thermometer code directly affects the static parameters of the DAC. If you want to obtain better static parameters, you can increase N and reduce M. Take a 12-bit DAC as an example. If you only consider the random mismatch between resistors, under the same conditions, the INL and DNL obtained by different combinations of N and M are shown in Table 1.

[0005] Table 1

[0006] M(bit) N(bit) DNL(LSB) INL(LSB) 10 2 0.163 0.15 9 3 0.083 0.11 8 4 0.042 0.08 7 5 0.021 0.08 6 6 0.012 0.07

[0007] However, after N and M are determined, the upper limit of the static parameters of the segmented resistor structure DAC mainly depends on the mismatch between the resistors in the thermometer code resistor array. The reason is that when the thermometer code is high, the impact of the mismatch between the resistors in the thermometer code resistor array is greater than that of the low bit. In theory, without considering the on-resistance of the control switch, if each unit resistor in a segmented resistor structure DAC has the same resistance value, then the INL and DNL of the output signal are both 0LSB, that is, there is no error in the output.

[0008] Taking a 12-bit DAC as an example, assuming that the binary code is 7 bits and the thermometer code is 5 bits, then the thermometer code requires (2 5 -1) = 31 actual resistors. The existing R2R layout structure is shown in Figure 2 . Figure 2A total of 31 resistor groups need to be arranged in four rows. Since 31 cannot be divided by 4, one row will contain one more resistor group than the remaining rows. To ensure the matching between resistors and the symmetry of the layout, resistors are added at both ends of each row as placeholders or balancing resistors DM. The resistor groups are arranged from left to right and from top to bottom, so that the resistor array presents a regular rectangular or nearly rectangular shape on the layout. Although this layout has the shortest routing distance and a small area, it cannot eliminate the mismatch caused by doping concentration.

[0009] Chinese patent document CN117955499A discloses a digital-to-analog converter layout structure with a segmented resistor structure, wherein a resistor structure corresponding to a thermometer code is as follows: Figure 3 As shown, the thermometer code is 3 digits. Figure 4 is its corresponding layout. The principle is to expand the original resistor area by 4 times in exchange for symmetry. At the same time, the resistor of one code position is dispersed into eight areas, which will increase the routing area and thus increase the chip cost. If the number of bits of the thermometer code increases, the area required for the implementation of this solution will also increase exponentially, so it is no longer applicable. Summary of the invention

[0010] The technical problem to be solved by the present invention is to provide a digital-to-analog converter layout structure, which improves the layout efficiency and obtains better matching under the condition of the same resistance area and without increasing the routing.

[0011] In order to solve the above technical problems, the present invention provides a layout structure of a segmented resistor structure digital-to-analog converter, wherein the thermometer code resistor array includes (2 N -1) resistor group, N is the number of digits of the thermometer code;

[0012] (2 N -1) resistor groups are arranged in a rectangular area, which is divided into an upper left area (area1), an upper right area (area2), a lower left area (area3), and a lower right area (area4);

[0013] Each resistor group is composed of a front-area resistor block and a rear-area resistor block in series;

[0014] The (2 N -1) The resistor groups are divided into odd and even groups;

[0015] The front area resistor blocks of the odd-numbered resistor groups increase in size from left to right according to the resistor group numbers and are distributed in the upper left area (area1);

[0016] The rear area resistor blocks of the odd-numbered resistor groups decrease in order from left to right according to the resistor group numbers and are distributed in the lower right area (area 4);

[0017] The resistor blocks in the front area of ​​the even-numbered resistor group decrease in order from left to right according to the resistor group number and are distributed in the upper right area (area2);

[0018] The rear area resistor blocks of the even-numbered resistor groups increase in size from left to right according to the resistor group numbers and are distributed in the lower left area (area 3).

[0019] Preferably, each front-zone resistor block is formed by connecting E standard resistor blocks in series or in parallel, and each rear-zone resistor block is formed by connecting E standard resistor blocks in series or in parallel, where E is a positive integer;

[0020] The standard resistor blocks of each resistor group of the odd-numbered array in the upper left area (area1) and the standard resistor blocks of each resistor group of the even-numbered array in the upper right area (area2) are arranged in an E row in isolation from each other;

[0021] The standard resistor blocks of each resistor group of the even number group in the lower left area (area3) and the standard resistor blocks of each resistor group of the odd number group in the lower right area (area4) are arranged in E rows isolated from each other.

[0022] Preferably, each row of standard resistor blocks is aligned left to right.

[0023] Preferably, E is 1, 2, 3, 4, 8 or 16.

[0024] Preferably, E is 2 F ,F is a positive integer.

[0025] Preferably, N is 2, 3, 4, 5, 6 or 7.

[0026] Preferably, a balancing resistor is provided at the left and right ends of each row of standard resistor blocks.

[0027] Preferably, the segmented resistor structure digital-to-analog converter further includes a binary code resistor array.

[0028] The layout structure of the segmented resistor structure digital-to-analog converter of the present invention not only takes into account the matching between resistors in the layout of the thermometer code resistor array, but also optimizes the wiring structure of the resistor array by odd-even grouping, thereby improving the layout efficiency. Under the condition of the same resistor area and without increasing the wiring, better matching is obtained, thereby improving the static parameter performance of the R-2R digital-to-analog converter (DAC). BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings required for use in the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0030] Figure 1 It is the basic structure of segmented resistor structure DAC;

[0031] Figure 2 It is the currently existing R2R layout structure of the 5-bit thermometer code;

[0032] Figure 3 It is a resistance structure corresponding to a thermometer code of a thermometer code resistance network disclosed in CN117955499A;

[0033] Figure 4 It is a schematic diagram of a N-bit DAC resistor layout method disclosed in CN117955499A;

[0034] Figure 5 It is a schematic diagram of a thermometer code resistor array of a layout structure of an embodiment of a segmented resistor structure digital-to-analog converter of the present invention;

[0035] Figure 6 It is a schematic diagram of a 5-bit thermometer code resistor array of a first embodiment of the layout structure of a segmented resistor structure digital-to-analog converter of the present invention;

[0036] Figure 7 This is a comparison chart of the INL calculation results distribution;

[0037] Figure 8 It is a comparison chart of the distribution of DNL calculation results;

[0038] Fig. 9 This is a comparison chart of the INL calculation results after the same constant gradient 0.1% resistance error is introduced longitudinally;

[0039] Fig.10 This is a comparison chart of the DNL calculation results after the same constant gradient 0.1% resistance error is introduced longitudinally. DETAILED DESCRIPTION

[0040] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] A digital-to-analog converter layout structure, such as Figure 5 As shown, the thermometer code resistor array includes (2 N -1) resistor group, N is the number of bits of the thermometer code;

[0042] (2 N -1) a resistor group is arranged in a rectangular area, and the rectangular area is divided into an upper left area area1, an upper right area area2, a lower left area area3, and a lower right area area4;

[0043] Each resistor group is composed of a front-area resistor block and a rear-area resistor block in series;

[0044] The (2 N -1) The resistor groups are divided into odd and even groups;

[0045] The front area resistor blocks of the odd-numbered resistor groups increase in size from left to right according to the resistor group numbers and are distributed in the upper left area (area1);

[0046] The rear area resistor blocks of the odd-numbered resistor groups decrease in order from left to right according to the resistor group numbers and are distributed in the lower right area (area 4);

[0047] The resistor blocks in the front area of ​​the even-numbered resistor group decrease in order from left to right according to the resistor group number and are distributed in the upper right area (area2);

[0048] The rear area resistor blocks of the even-numbered resistor groups increase in size from left to right according to the resistor group numbers and are distributed in the lower left area (area 3).

[0049] Preferably, each front-zone resistor block is formed by connecting E standard resistor blocks in series or in parallel, and each rear-zone resistor block is formed by connecting E standard resistor blocks in series or in parallel, where E is a positive integer;

[0050] The standard resistor blocks of each resistor group of the odd-numbered array in the upper left area (area1) and the standard resistor blocks of each resistor group of the even-numbered array in the upper right area (area2) are arranged in an E row in isolation from each other;

[0051] The standard resistor blocks of each resistor group of the even number group in the lower left area (area3) and the standard resistor blocks of each resistor group of the odd number group in the lower right area (area4) are arranged in E rows isolated from each other.

[0052] Preferably, each row of standard resistor blocks is aligned left to right.

[0053] Preferably, E is 1, 2, 3, 4, 8 or 16, etc. Figure 6 Where E is 2.

[0054] Preferably, E is 2F ,F is a positive integer.

[0055] Preferably, N is 2, 3, 4, 5, 6 or 7, etc. Figure 6 Where N is 5.

[0056] Preferably, a balancing resistor DM is provided at the left and right ends of each row of standard resistor blocks, respectively, to ensure matching between resistors and symmetry of the layout.

[0057] Preferably, the segmented resistor structure digital-to-analog converter further includes a binary code resistor array.

[0058] The layout structure of the segmented resistor structure digital-to-analog converter of the present invention includes a thermometer code resistor array comprising 2 N - 1 resistor group, 2 N -1 resistor group is arranged in a rectangular area, which is divided into the upper left area (area1), the upper right area (area2), the lower left area (area3), and the lower right area (area4); 2 N -1 resistor group is divided into odd group and even group. The odd group is placed in the upper left area (area1) and the lower right area (area4), and the even group is placed in the upper right area (area2) and the lower left area (area3). The odd group and the even group of the resistor group are both centrally symmetrical and are placed from the outside to the center.

[0059] The layout structure of the segmented resistor structure digital-to-analog converter of the present invention not only takes into account the matching between resistors in the layout of the thermometer code resistor array, but also optimizes the wiring structure of the resistor array by odd-even grouping, thereby improving the layout efficiency. Under the condition of the same resistor area and without increasing the wiring, better matching is obtained, thereby improving the static parameter performance of the R-2R digital-to-analog converter (DAC).

[0060] Assuming the same equal gradient 0.1% resistance error is introduced horizontally, compared with the conventional method ( Figure 2 ) Placement and use of the present invention ( Figure 6 ) and the resistance values ​​(normalized) are shown in Table 2 (for the convenience of calculation, the low bits (binary bits) of the digital-to-analog converter are converted into R32).

[0061] Table 2

[0062]

[0063]

[0064] Since the output of the thermometer code is equivalent to the superposition of resistor values, the output values ​​corresponding to the corresponding 32 codes can be calculated according to the above table as shown in Table 3.

[0065] Table 3

[0066]

[0067] In this example, the decimal code corresponding to the highest code is 31. According to the formula:

[0068]

[0069] Among them, V x When the output code is x, the DAC outputs the corresponding code.

[0070] According to the above formula, the INL and DNL corresponding to each output code can be calculated in turn, and the maximum value is taken as the INL and DNL indicators of the DAC. Figure 7 , Figure 8 As shown, after calculation, when the lateral resistance concentration error is introduced, Figure 2 The maximum INL (gray dot line) occurs at code = 5, which is 0.03LSB. Figure 2 The maximum DNL (gray dot line) occurs at code=7, which is 0.57LSB. The use of the present invention (black dot line) will not introduce INL and DNL errors.

[0071] Since the two solutions actually use the same resistor value, and only have different corresponding relationships with codes, the gain errors are the same, both 1.5%.

[0072] Assuming that the same equal gradient 0.1% resistance error is introduced longitudinally, according to the above calculation method, the resistance values ​​(normalized) are shown in Table 4.

[0073] Table 4

[0074]

[0075] Since the output of the thermometer code is equivalent to the superposition of resistor values, the output values ​​corresponding to the 32 codes can be calculated according to the above table, as shown in Table 5.

[0076] Table 5

[0077]

[0078] According to the above formula, the INL and DNL corresponding to each output code can be calculated in turn, and the maximum value is taken as the INL and DNL indicators of the DAC. Fig. 9 , Fig.10 As shown, after calculation, when the longitudinal resistance concentration error is introduced, Figure 2The maximum INL (gray dot line) occurs at code = 16, which is 0.015LSB; Figure 2 The maximum DNL (blue line) occurs at code=25, which is 0.06LSB. However, the present invention (black dot line) will not introduce INL and DNL errors.

[0079] After the above discussion, no matter whether the actual resistance introduces lateral or longitudinal gradient errors, the INL and DNL errors caused by resistance mismatch will be completely eliminated by the present invention. In the above calculations, since the resistances are all normalized, even if the actual number of thermometer code bits changes, it will not affect the conclusions obtained by the calculations.

[0080] Compared with the solution disclosed in Chinese patent document CN117955499 A, the area of ​​the thermometer code part is about 25% of that, and no additional wiring area is introduced.

[0081] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A digital-to-analog converter layout structure, characterized in that: The thermometer code resistor array includes (2 N -1) resistor group, N is the number of digits of the thermometer code; (2 N -1) resistor groups are arranged in a rectangular area, which is divided into an upper left area (area1), an upper right area (area2), a lower left area (area3), and a lower right area (area4); Each resistor group is composed of a front-area resistor block and a rear-area resistor block in series; The (2 N -1) The resistor groups are divided into odd and even groups; The front area resistor blocks of the odd-numbered resistor groups increase in size from left to right according to the resistor group number and are distributed in the upper left area (area1); The rear area resistor blocks of the odd-numbered resistor groups decrease in order from left to right according to the resistor group numbers and are distributed in the lower right area (area 4); The resistor blocks in the front area of ​​the even-numbered resistor group decrease in order from left to right according to the resistor group number and are distributed in the upper right area (area2); The rear area resistor blocks of the even-numbered resistor groups increase in size from left to right according to the resistor group numbers and are distributed in the lower left area (area 3).

2. The layout structure of the segmented resistor structure digital-to-analog converter according to claim 1, characterized in that: Each front-zone resistor block is formed by connecting E standard resistor blocks in series or in parallel, and each rear-zone resistor block is formed by connecting E standard resistor blocks in series or in parallel, where E is a positive integer; The standard resistor blocks of each resistor group of the odd-numbered array in the upper left area (area1) and the standard resistor blocks of each resistor group of the even-numbered array in the upper right area (area2) are isolated from each other and arranged in row E; The standard resistor blocks of each resistor group of the even group in the lower left area (area3) and the standard resistor blocks of each resistor group of the odd group in the lower right area (area4) are isolated from each other and arranged in E rows.

3. The layout structure of the segmented resistor structure digital-to-analog converter according to claim 1, characterized in that: Each row of standard resistor blocks is aligned left and right.

4. The layout structure of the segmented resistor structure digital-to-analog converter according to claim 2, characterized in that: E is 1, 2, 3, 4, 8 or 11.

5. The layout structure of the segmented resistor structure digital-to-analog converter according to claim 2, characterized in that: E is 2 F ,F is a positive integer.

6. The layout structure of the segmented resistor structure digital-to-analog converter according to claim 6, characterized in that: N is 2, 3, 4, 5, 6 or 8.

7. The layout structure of the segmented resistor structure digital-to-analog converter according to claim 1, characterized in that: A balancing resistor is also provided at the left and right ends of each row of standard resistor blocks.

8. The layout structure of the segmented resistor structure digital-to-analog converter according to claim 1, characterized in that: The segmented resistance structure digital-to-analog converter also includes a binary code resistor array.

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