Infiltratable flank packaging substrate and manufacturing method thereof

By forming wetable flanges on the semiconductor packaging substrate, the problem of limited packaging area and inability to achieve vertical side assembly in the prior art is solved, and a high-quality multi-directional functional packaging is achieved.

CN119812003APending Publication Date: 2025-04-11ZHUHAI YUEXIN SEMICON LLC
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Patent Information

Application Number
CN202411867973.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-17
Publication Date
2025-04-11

AI Technical Summary

Technical Problem

The existing semiconductor packaging technology is difficult to meet the demand for increased I/O number, resulting in limited packaging area, reduced product yield, increased packaging cost, and the inability to realize vertical side assembly of the device, limiting the multi-directional transmission and reception function.

Method used

A method for making an immersible flange packaging substrate is proposed. By forming a conductive column and a sacrificial copper column on the carrier plate, laminating a dielectric material to form a dielectric layer, etching a sacrificial copper column to form a cavity structure, and forming a line layer on one side of the cavity structure, and cutting to form a wetable flange.

Benefits of technology

This method reduces process steps, improves product quality, realizes side assembly of devices, meets multi-directional transceiver and reception functions, and reduces production costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides an infiltratable side wing packaging substrate and a manufacturing method thereof. Specifically, the manufacturing method comprises the following steps: (a) preparing a bearing plate; (b) forming a first conduction column and a sacrificial copper column on the bearing plate; (c) laminating the dielectric material to form a first dielectric layer; (d) removing the bearing plate; (e) etching the sacrificial copper columns to form a semi-finished substrate with a cavity structure; (f) forming a first circuit layer on one side, with the cavity structure, of the semi-finished substrate, wherein the first circuit layer covers the inner surface of the cavity structure; and the cavity structure is cut to form an infiltratable side wing. According to the technical scheme, the sacrificial copper column is embedded in the first dielectric layer and is not in contact with other circuit layers, and an etching barrier layer does not need to be prepared, so that the process steps are reduced, and the product quality can be improved.
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Description

Technical Field

[0001] The present disclosure relates to the field of packaging technology, and more particularly to a wettable flank packaging substrate and a manufacturing method thereof. Background Art

[0002] In semiconductor packaging technology, whether it is flip-chip packaging technology based on metal bumps (also known as bumps), or packaging technologies such as pin mounting and insertion, wire bonding, etc., it is necessary to arrange metal bumps or leads on the chip as electrical connection points connected to the lead frame or IC substrate (Integrated Circuit, abbreviated as IC).

[0003] As the number of I / Os increases, the wire bonding packaging method can no longer meet the packaging requirements. The limited area packaging structure also limits the increase in the number of solder balls on the substrate. The relevant technology solves this problem by arranging a redistribution circuit layer on the chip to increase the spacing to create new electrical contacts, thereby forming a ball grid array package (BGA) or a land grid array package (LGA). However, this method will lead to a decrease in product yield and an increase in packaging costs. In addition, since the pads of the package are located at the bottom of the package, the device can only be vertically mounted on the printed packaging module by surface mounting. The heat dissipation of the device needs to be conducted downward through the circuit or actively dissipated from the back of the device. It cannot be applied to the scene of vertical side assembly and it is difficult to meet the multi-directional receiving and transmitting function requirements of specific semiconductor special devices. Summary of the invention

[0004] In view of this, an object of the present disclosure is to provide a wettable wing package substrate and a manufacturing method thereof.

[0005] Based on the above objectives, in a first aspect, the present disclosure provides a method for manufacturing a wettable flank package substrate, characterized by comprising:

[0006] A method for manufacturing a wettable wing package substrate, characterized by comprising:

[0007] (a) preparing a carrier plate;

[0008] (b) forming a first conductive pillar and a sacrificial copper pillar on the carrier board;

[0009] (c) laminating dielectric materials to form a first dielectric layer;

[0010] (d) removing the carrier plate;

[0011] (e) etching the sacrificial copper pillar to form a semi-finished substrate with a cavity structure;

[0012] (f) forming a first circuit layer on the side of the semi-finished substrate having the cavity structure, wherein the first circuit layer covers the inner surface of the cavity structure; and cutting the cavity structure to form wettable flanks. In some embodiments, step (b) further includes: forming a second conductive pillar on the first conductive pillar; wherein the first dielectric layer exposes the end surface of the second conductive pillar.

[0013] In some embodiments, step (c) also includes: the first dielectric layer exposes the end surfaces of the first conductive pillar and the sacrificial copper pillar; forming a second circuit layer and a second conductive pillar on the surface of the first dielectric layer; laminating dielectric materials to form a second dielectric layer; wherein the second dielectric layer exposes the end surfaces of the second conductive pillar.

[0014] In some embodiments, the following steps are also included:

[0015] (g) forming a second circuit layer on the opposite side of the cavity structure of the semi-finished substrate;

[0016] (h) forming a solder resist layer on the second circuit layer and the first circuit layer.

[0017] In some embodiments, after step (h), the following steps are further included:

[0018] (i) cutting the cavity structure in a direction perpendicular to the semi-finished substrate.

[0019] In a second aspect, the present invention provides another method for manufacturing a wettable flank package substrate, characterized by comprising:

[0020] (a') preparing a carrier plate;

[0021] (b′) forming a first circuit layer, a first conductive column, and a second conductive column on the first conductive column on the carrier board, wherein the first conductive column has a larger cross-sectional area than the second conductive column;

[0022] (c') laminating dielectric materials to form a first dielectric layer;

[0023] (d') removing the carrier plate;

[0024] (e') etching a portion of the first circuit layer and a portion of the first conductive pillar from one side to form a cavity structure formed by the side surfaces of the first circuit layer and the first conductive pillar and the first dielectric layer, and cutting the cavity structure, wherein the first dielectric layer covers the second conductive pillar, and the side surfaces of the first circuit layer and the second conductive pillar form wettable flanks.

[0025] In some embodiments, the step (c') further includes: exposing the end surface of the second conductive pillar by the first dielectric layer; and forming a second circuit layer on the first dielectric layer.

[0026] The step (d') further includes: forming a solder resist layer on the first circuit layer and the second circuit layer.

[0027] In some embodiments, the step (e') further includes: cutting the cavity structure along a preset path; wherein the preset path does not pass through the first circuit layer and the first conductive pillar.

[0028] Based on the same inventive concept, on the one hand, the present disclosure also provides a wettable flank packaging substrate, the packaging substrate comprising: a first circuit layer, a second circuit layer, an intermediate dielectric layer and at least one conductive column; wherein the first circuit layer and the second circuit layer are connected by the at least one conductive column and are located on both sides of the intermediate dielectric layer; the first circuit layer covers the side wall of the packaging substrate to form the wettable flank.

[0029] On the other hand, the present disclosure also provides another wettable flank packaging substrate, which includes: a first circuit layer, a second circuit layer, an intermediate dielectric layer, a first conductive column and a second conductive column connected to the first conductive column; wherein the first circuit layer and the second circuit layer are connected by the first conductive column and the second conductive column and are located on both sides of the intermediate dielectric layer; the exposed side edges of the first conductive column form the wettable flanks.

[0030] From the above, it can be seen that the method for manufacturing a wettable flank packaging substrate disclosed in the present invention, on the one hand, embeds the sacrificial copper column in the first dielectric layer, which has no contact with other circuit layers and does not require the preparation of an etching barrier layer, thereby reducing the process steps and helping to improve product quality. In addition, the first circuit layer is formed on the inner surface of the cavity structure formed by the sacrificial copper column. After cutting the cavity structure, the first circuit layer can be exposed on the flank of the packaging substrate to form a wettable flank, which helps to achieve the side assembly of the device. On the other hand, the cavity structure is formed by directly etching the first circuit layer and the first conductive column on the side part, without the need to form the cavity structure in advance, thus saving process steps. In addition, after cutting the cavity structure, the first circuit layer and the first conductive column can be exposed on the flank of the packaging substrate to form a wettable flank, which helps to achieve the side assembly of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 A schematic diagram of a process for manufacturing a packaging substrate provided for related technology;

[0033] Figure 2(a) to Figure 2(j) A schematic cross-sectional view of an intermediate structure in each step of a method for manufacturing a packaging structure provided by an embodiment of the present disclosure;

[0034] Figure 3(a) to Figure 3(h) A schematic cross-sectional view of an intermediate structure in each step of a method for manufacturing a packaging structure provided by an embodiment of the present disclosure;

[0035] Figure 4(a) to Figure 4(h) A schematic cross-sectional view of an intermediate structure in each step of a method for manufacturing a packaging structure provided by an embodiment of the present disclosure;

[0036] Figure 5 A schematic diagram of a packaging structure provided by an embodiment of the present disclosure;

[0037] Figure 6 A schematic diagram of another packaging structure provided by an embodiment of the present disclosure;

[0038] Figure 7 A schematic diagram of another packaging structure provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0040] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly. In the accompanying drawings, for better understanding and ease of description, the thickness and shape of some layers and regions may be exaggerated.

[0041] In the related art, in order to meet the requirements of vertical assembly on the side, the copper block is directly cut, which is difficult to eliminate cracks and burrs, and is prone to product quality problems. Figure 1 As shown, a sacrificial copper column is first made into a cavity, and then a metal layer is electroplated as an etching barrier layer. This method has a complicated process flow and high cost, and the etching barrier layer is prone to leakage plating, which leads to quality problems such as dents and etching perforations at the bottom of the cavity.

[0042] In view of this, the present disclosure provides a wettable flank packaging substrate and a manufacturing method. Specifically, the manufacturing method includes (a) preparing a carrier board; (b) forming a first conductive column and a sacrificial copper column on the carrier board; (c) laminating dielectric materials to form a first dielectric layer; (d) removing the carrier board; (e) etching the sacrificial copper column to form a semi-finished substrate with a cavity structure; (f) forming a first circuit layer on a side of the semi-finished substrate with a cavity structure, wherein the first circuit layer covers the inner surface of the cavity structure; and cutting the cavity structure to form a wettable flank. In such a technical solution, the sacrificial copper column is embedded in the first dielectric layer, has no contact with other circuit layers, and does not require the preparation of an etching stop layer. Reducing the process steps helps to improve product quality. In addition, the first circuit layer is formed in the cavity structure formed by the sacrificial copper column. After cutting the cavity structure, the first circuit layer can be exposed on the flank of the packaging substrate, which helps to achieve side assembly of the device.

[0043] Figure 2(a) to Figure 2(j) The cross-sectional schematic diagram of the intermediate structure of each step of the manufacturing method of a packaging structure provided by the embodiment of the present disclosure. Figure 2(a) to Figure 2(j) As shown, the manufacturing method comprises:

[0044] First, a carrier plate 100 is prepared—step (a), as shown in FIG. 2( a ).

[0045] In some embodiments, the carrier plate 100 includes a core layer 101, a first metal layer 102, a second metal layer 103, an etching stop layer 104, and a first metal seed layer 105. Optionally, the first metal layer 102 and the second metal layer 103 can be metal copper layers, which are physically combined and can be separated. Optionally, the material of the etching stop layer 104 can include at least one of nickel, titanium and tin. Optionally, the first metal seed layer 105 is usually selected from copper, with a thickness of 1 to 3 μm, which can serve as a conductive basis for subsequent electroplating.

[0046] It should be noted that after the first metal layer 102 and the second metal layer 103 are subsequently separated, when the second metal layer 103 is etched, the etching stop layer 104 can protect the circuit layer and the copper pillar of the substrate to prevent over-etching.

[0047] Next, a first conductive pillar 201 and a sacrificial copper pillar 203 are formed on the carrier board 100—step (b), as shown in FIG. 2( b ).

[0048] Exemplarily, step (b) may include: first, applying a film on the first metal seed layer 105 , exposing and developing to form a first pattern, then performing pattern electroplating, and finally stripping the film to obtain the first conductive pillar 201 and the sacrificial copper pillar 203 .

[0049] Then, dielectric materials are laminated to form a first dielectric layer 401 exposing the end faces of the first conductive pillar 201 and the sacrificial copper pillar 203—step (c), as shown in Fig. 2(c). Here, the end faces of the first conductive pillar 201 and the sacrificial copper pillar 203 can be exposed by mechanical grinding.

[0050] In some embodiments, the material of the first dielectric layer 401 may be a resin material that does not contain glass fiber, such as one selected from the group consisting of liquid crystal polymer, BT (bismaleimide triazine) resin, semi-cured prepreg, ABF (Ajinomoto Build-up) film, epoxy resin and polyimide resin, but the present invention is not limited to this.

[0051] Next, a third circuit layer 305 and a second conductive pillar 202 are sequentially formed on the first dielectric layer 401 (step (d), as shown in FIG2(d)). Here, the second conductive pillar 202 is located on a side of the third circuit layer 305 away from the first dielectric layer 401.

[0052] In some embodiments, step (d) can be performed by two pattern electroplating methods to respectively form the third circuit layer 305 and the second conductive pillar 202. Each pattern electroplating method includes metal seed layer preparation → film lamination → exposure → development → electroplating → film stripping → seed layer etching, which is as described above and will not be repeated. It should be noted that if a metal seed layer, such as the first metal seed layer 105, exists, it is not necessary to prepare the metal seed layer.

[0053] Then, dielectric materials are laminated to form a second dielectric layer 402 exposing the end surface of the second conductive pillar 202 (step (e), as shown in Fig. 2 (e)). The method of forming the second dielectric layer 402 is similar to that of the first dielectric layer 401, and will not be repeated here.

[0054] It should be noted that the materials of the first dielectric layer 401 and the second dielectric layer 402 may be the same or different, and the present disclosure does not limit this.

[0055] Next, the carrier plate 100 is removed and the metal seed layer 105 is etched—step (f), as shown in FIG2(f). As can be seen from FIG2(f), after step (f), the first dielectric layer 401 exposes the end faces of the sacrificial copper pillar 203 and the first conductive pillar 201. Except for the end faces, the surface of the sacrificial copper pillar 203 is in contact with the first dielectric layer 401, and has no contact with the third circuit layer 305 and the second conductive pillar 202. Such a structure can ensure that the sacrificial copper pillar 203 is completely etched without the need for an additional etching protection layer, and there are no dents, etching perforations, and other problems.

[0056] Then, the sacrificial copper pillar 203 is etched to form a cavity structure 601, and a semi-finished substrate 700 is obtained—step (g), as shown in FIG2(g). Exemplarily, step (g) may include: first, applying a film, exposing, and developing on the surface of the first dielectric layer 401 to protect the first conductive pillar 201; next, etching the cavity structure 601 on the sacrificial copper pillar 203, and finally, stripping the film to obtain the semi-finished substrate 700.

[0057] Next, a first circuit layer 301 and a second circuit layer 302 are formed on the surface of the semi-finished substrate 700—step (h), as shown in FIG. 2(h). For example, the first circuit layer 301 is located on the side of the semi-finished substrate 700 where the cavity structure 601 exists, that is, located on the surface of the first dielectric layer 401; the second circuit layer 302 is located on the side of the semi-finished substrate 700 where there is no cavity structure 601, that is, located on the surface of the second dielectric layer 402.

[0058] Furthermore, since the cavity structure 601 is located in the first dielectric layer 401, the first circuit layer 301 extends from the surface of the first dielectric layer 401 to the sidewall and bottom of the cavity structure 601. The first circuit layer 301 is not only located on the extension surface of the semi-finished substrate 700, but also in the thickness direction of the semi-finished substrate 700. Such a structure facilitates the vertical assembly of the package substrate on the side.

[0059] In some embodiments, the manufacturing process of the first circuit layer 301 and the second circuit layer 302 may include: first, manufacturing a metal seed layer; next, laminating, exposing, and developing to form a second pattern; then electroplating on the metal seed layer; and finally stripping the film and etching the metal seed layer to obtain the circuit layer.

[0060] Optionally, the preparation of the metal seed layer includes a sputtering process and a chemical copper plating process (PlatedThroughHole, PTH for short). With such a process, a metal seed layer can be formed on the surface of the cavity structure 601, thereby ensuring that a plated layer can be formed in the cavity structure 601 in a subsequent electroplating process, which helps the first circuit layer 301 to extend into the cavity structure 601.

[0061] Then, a solder resist layer 303 and a surface treatment layer 304 are made—step (i), as shown in FIG2(i). Here, the surface treatment layer 304 can be formed by a nickel-palladium-gold process (ENEPIG). Those skilled in the art can also use other surface treatment processes, which are not limited in the present disclosure.

[0062] Finally, the cavity structure 601 is cut along the preset path to form a wettable flank package substrate structure—step (j), as shown in FIG2(j). The preset path can refer to the dotted line position in FIG2(i), and the present disclosure does not limit this. The preset path does not pass through the first conductive pillar 201 and the second conductive pillar 202, thereby ensuring that the cutting will not damage the conductive pillar of the package substrate, avoiding cracks, burrs, etc.

[0063] After the cavity structure 601 is cut, the first circuit layer 301 on the sidewall and bottom of the cavity structure 601 is exposed to the side of the packaging structure, forming a wettable wing structure, which is helpful for side vertical assembly.

[0064] Figure 3(a) to Figure 3(h) A schematic cross-sectional view of an intermediate structure of each step of a method for manufacturing a packaging structure provided in an embodiment of the present disclosure. Figure 2(a) to Figure 2(j) The difference between the corresponding embodiments lies in the steps of making the semi-finished substrate 700, which are described in detail as follows:

[0065] First, prepare a carrier plate 100 (step (a), as shown in Fig. 3 (a) . The structure of the carrier plate 100 is similar to that described above and will not be described in detail.

[0066] Next, a first conductive pillar 201 and a sacrificial copper pillar 203 are formed on the carrier board 100 , and a second conductive pillar 202 is formed on the first conductive pillar—step (b), as shown in FIG. 3( b ).

[0067] In some embodiments, step (b) can be implemented by two pattern electroplating methods, the first pattern electroplating forms the first conductive pillar 201 and the sacrificial copper pillar 203; the second pattern electroplating forms the second conductive pillar 202. Each pattern electroplating method includes metal seed layer preparation → film application → exposure → development → electroplating → film stripping-seed layer etching, which is as described above and will not be repeated here. It should be noted that after the first electroplating, the film can be applied directly without film stripping, which helps save material costs.

[0068] Then, dielectric materials are laminated to form a first dielectric layer 401 exposing the end surface of the second conductive pillar 202—step (c), as shown in Fig. 3(c). Here, the end surface of the second conductive pillar 202 can be exposed by mechanical grinding.

[0069] Next, the carrier plate 100 is removed and the metal seed layer 105 is etched—step (f), as shown in FIG3(d). As can be seen from FIG3(f), after step (f), the first dielectric layer 401 exposes the end faces of the sacrificial copper pillar 203 and the first conductive pillar 201. Except for the end faces, the surface of the sacrificial copper pillar 203 is in contact with the first dielectric layer 401, and has no contact with the third circuit layer 305 and the second conductive pillar 202. Such a structure can ensure that the sacrificial copper pillar 203 is completely etched without the need for an additional etching protection layer, and there are no dents, etching perforations, and other problems.

[0070] Then, the sacrificial copper pillar 203 is etched to form a cavity structure 601, and a semi-finished substrate 700 is obtained—step (g), as shown in FIG3(e). Exemplarily, step (g) may include: first, applying a film, exposing, and developing on the surface of the first dielectric layer 401 to protect the first conductive pillar 201; next, etching the cavity structure 601 on the sacrificial copper pillar 203, and finally, stripping the film to obtain the semi-finished substrate 700.

[0071] at last, Figure 3(f) to Figure 3(h) It should be understood that steps (h) to (j) of this embodiment are similar to steps (h) to (j) of this embodiment. Figure 2(h) to Figure 2(j) Steps (h) to (j) are similar and will not be described in detail.

[0072] Figure 4(a) to Figure 4(h) The cross-sectional schematic diagram of the intermediate structure of each step of the manufacturing method of another packaging structure provided by the embodiment of the present disclosure. Figure 4(a) to Figure 4(h) As shown, the manufacturing method comprises:

[0073] First, prepare a carrier plate 100 (step (a), as shown in Fig. 4 (a) . The structure of the carrier plate 100 is similar to that described above and will not be described in detail.

[0074] Next, the first circuit layer 301, the first conductive column 201 and the second conductive column 202 on the first conductive column 201 are sequentially formed on the carrier board 100 - step (b), as shown in Figure 4(b), wherein the first conductive column 201 has a larger cross-sectional area than the second conductive column 202 to ensure that subsequent etching will not damage the second conductive column 202.

[0075] In some embodiments, step (b) can be performed by three pattern electroplating processes to respectively form the first circuit layer 301, the first conductive pillar 201 and the second conductive pillar 202. The pattern electroplating process for each time is as described above and will not be repeated here.

[0076] Then, dielectric materials are laminated to form a first dielectric layer 401 exposing the end surface of the second conductive pillar 202—step (c), as shown in FIG. 4( c ).

[0077] Next, a second circuit layer 302 is formed on the first dielectric layer 401—step (d), as shown in FIG. 4( d ).

[0078] Then, the carrier plate 100 is removed and the metal seed layer 105 is etched—step (e′), as shown in FIG. 4( e ).

[0079] Next, the solder resist layer 303 is made—step (f'), as shown in FIG4(f). Optionally, the process of making the solder resist layer 303 may include: first, the surfaces of the first dielectric layer 401, the first circuit layer 301 and the second circuit layer 302 are subjected to super-roughening treatment, followed by solder resist filming, exposure, and development; and finally, thermal curing and UV curing are performed to obtain the solder resist layer 303.

[0080] Then, a portion of the first circuit layer 301 and a portion of the first conductive pillar 201 are etched from one side to form a cavity structure 601 formed by the side of the first circuit layer 301 and the first conductive pillar 201 and the first dielectric layer 401, so that the side of the first circuit layer 301 and the first conductive pillar 201 can form a wettable flank structure—step (g'), as shown in FIG4(g). The cavity structure 601 is located on the side of the first circuit layer 301 and the first conductive pillar 201, and the first dielectric layer 401 covers the second conductive pillar 202 to protect the second conductive pillar 202. It should be noted that some layer structures, such as the solder resist layer 303, are omitted in FIG4(g).

[0081] Next, the cavity structure 601 is cut along a preset path—step (h'), as shown in FIG4(g). The preset path can refer to the dotted line position in FIG4(g), and the present disclosure does not limit this. It should be noted that the preset path does not pass through the first circuit layer 301, the first conductive column 201, and the second circuit layer 302, thereby ensuring that the cutting will not damage the circuit structure of the packaging substrate, avoiding cracks, burrs, etc. After cutting the cavity structure 601, the sides of the first circuit layer 301 and the first conductive column 201 are exposed to the side of the packaging structure, forming a wettable side wing structure, which is conducive to the vertical assembly of the side.

[0082] Finally, a surface treatment layer 304 is fabricated to form a wettable wing package substrate—step (i'), as shown in FIG. 4( h ).

[0083] It can be seen that the manufacturing method of the packaging substrate provided by the embodiment of the present disclosure does not require cutting of copper pillars during the entire process, which can effectively avoid problems such as cracks and burrs, omits the process of manufacturing a metal protective layer, and can avoid problems such as depressions and etching perforations at the bottom of the cavity caused by poor metal protective layers, thereby reducing production costs and improving product quality.

[0084] Figure 5 A schematic diagram of a packaging structure provided by an embodiment of the present disclosure; Figure 2(a) to Figure 2(j) The manufacturing method provided by the embodiment shown is obtained. Figure 6 A schematic diagram of another packaging structure provided by an embodiment of the present disclosure; Figure 3(a) to Figure 3(h) The manufacturing method provided by the embodiment shown is obtained. Figure 7 A schematic diagram of another packaging structure provided by an embodiment of the present disclosure; Figure 4(a) to Figure 4(h) The manufacturing method provided by the embodiment shown is obtained.

[0085] like Figure 6 As shown, the embodiment of the present disclosure further provides a wettable flank package substrate, the package substrate comprising: a first circuit layer 301, a second circuit layer 302, intermediate dielectric layers 401, 402 and at least one conductive pillar 201, 202; wherein the first circuit layer 301 and the second circuit layer 302 are connected by at least one conductive pillar 201, 202 and are located on both sides of the intermediate dielectric layers 401, 402; the side edge of the first circuit layer 301 is exposed to the side wall of the package substrate. In some embodiments, as Figure 5 As shown, a third wiring layer 303 is further provided between the first conductive pillar 201 and the second conductive pillar 202 to further improve the wiring freedom of the substrate.

[0086] In some embodiments, Figure 7As shown, the wettable flank packaging substrate includes: a first circuit layer 301, a second circuit layer 302, intermediate dielectric layers 401, 402, a first conductive column 201 and a second conductive column 202 connected to the first conductive column; wherein the first circuit layer 301 and the second circuit layer 302 are connected through the first conductive column 201 and the second conductive column 202 and are located on both sides of the intermediate dielectric layers 401, 402; a portion of the side edges of the first conductive column 201 are exposed to the side walls of the packaging substrate to form a wettable flank structure.

[0087] In some embodiments, Figure 5 and Figure 6 As shown, the intermediate dielectric layers 401 and 402 at the sidewalls of the package substrate include a recessed structure, and the first circuit layer 301 extends to the surface of the recessed structure.

[0088] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in detail for the sake of simplicity.

[0089] The embodiments of the present disclosure are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A method for manufacturing a wettable wing package substrate, characterized in that: include: (a) preparing a carrier plate; (b) forming a first conductive pillar and a sacrificial copper pillar on the carrier board; (c) laminating dielectric materials to form a first dielectric layer; (d) removing the carrier plate; (e) etching the sacrificial copper pillar to form a semi-finished substrate with a cavity structure; (f) forming a first circuit layer on a side of the semi-finished substrate having the cavity structure, wherein the first circuit layer covers an inner surface of the cavity structure; The cavity structure is cut to form wettable flanks.

2. The method according to claim 1, characterized in that: Step (b) further comprises: A second conducting column is formed on the first conducting column, wherein the first dielectric layer exposes an end surface of the second conducting column.

3. The method according to claim 1, characterized in that: Step (c) further comprises: The first dielectric layer exposes end surfaces of the first conductive pillar and the sacrificial copper pillar; forming a second circuit layer and a second conducting column on the surface of the first dielectric layer; A dielectric material is laminated to form a second dielectric layer; wherein the second dielectric layer exposes an end surface of the second conductive pillar.

4. The method according to claim 1, characterized in that: The following steps are also included: (g) forming a second circuit layer on the opposite side of the cavity structure of the semi-finished substrate; (h) forming a solder resist layer on the second circuit layer and the first circuit layer.

5. The method according to claim 4, characterized in that: After step (h), the method further comprises the following steps: (i) cutting the cavity structure in a direction perpendicular to the semi-finished substrate.

6. A method for manufacturing a wettable wing package substrate, characterized in that: include: (a') preparing a carrier plate; (b′) forming a first circuit layer, a first conductive column, and a second conductive column on the first conductive column on the carrier board, wherein the first conductive column has a larger cross-sectional area than the second conductive column; (c') laminating dielectric materials to form a first dielectric layer; (d') removing the carrier plate; (e') etching a portion of the first circuit layer and a portion of the first conductive pillar from one side to form a cavity structure formed by the side surfaces of the first circuit layer and the first conductive pillar and the first dielectric layer, and cutting the cavity structure, wherein the first dielectric layer covers the second conductive pillar, and the side surfaces of the first circuit layer and the second conductive pillar form wettable flanks.

7. The manufacturing method according to claim 6, characterized in that: The step (c') further comprises: The first dielectric layer exposes an end surface of the second conductive pillar; A second circuit layer is formed on the first dielectric layer.

8. The method according to claim 7, characterized in that: The step (d') further comprises: A solder resist layer is formed on the first circuit layer and the second circuit layer.

9. The manufacturing method according to claim 6, characterized in that: The step (e') further comprises: The cavity structure is cut along a preset path; wherein the preset path does not pass through the first circuit layer and the first conductive column.

10. A wettable flank package substrate, characterized in that: The packaging substrate includes: a first circuit layer, a second circuit layer, an intermediate dielectric layer and at least one conducting column; wherein the first circuit layer and the second circuit layer are connected by the at least one conducting column and are located on both sides of the intermediate dielectric layer; the first circuit layer covers the side wall of the packaging substrate to form the wettable flank.

11. The wettable flank package substrate according to claim 10, characterized in that: The intermediate dielectric layer at the side wall position of the packaging substrate includes a recessed structure, and the first circuit layer extends to the surface of the recessed structure.

12. The wettable flank package substrate according to claim 11, characterized in that: The packaging substrate further includes a third circuit layer; the at least one conductive pillar includes a first conductive pillar and a second conductive pillar that are stacked; and the third circuit layer is located between the first conductive pillar and the second conductive pillar.

13. A wettable flank package substrate, characterized in that: The packaging substrate includes: a first circuit layer, a second circuit layer, an intermediate dielectric layer, a first conductive column, and a second conductive column connected to the first conductive column; wherein the first circuit layer and the second circuit layer are connected through the first conductive column and the second conductive column and are located on both sides of the intermediate dielectric layer; the exposed side edges of the first conductive column form the wettable flanks.

Citation Information

Patent Citations

  • Package substrate manufacturing method

    CN111564374A

  • Method for cutting packaging substrate unit

    CN113838751A

  • Manufacturing method of embedded package substrate and embedded package substrate

    CN114927493A

  • Device substrate and manufacturing method thereof

    US20240186305A1