Packaging substrate capable of infiltrating side wings and manufacturing method

Abstract

The invention provides a packaging substrate capable of infiltrating side wings and a manufacturing method. The manufacturing method comprises the following steps: (a) preparing a bearing plate; wherein the bearing plate comprises an etching barrier layer and a first metal seed layer which are stacked; (b) forming a sacrificial copper pillar on the first metal seed layer; (c) laminating a dielectric material to cover the sacrificial copper columns to form a first dielectric layer, wherein the end faces of the sacrificial copper columns are exposed and are flush with the first surface of the first dielectric layer; (d) etching the sacrificial copper columns to form a cavity structure with the etching barrier layer as the bottom; (e) forming a first circuit layer on the first surface and the inner wall of the cavity structure; (f) removing the bearing plate to expose the second surface of the first dielectric layer; (g) forming a second circuit layer on the second surface of the first dielectric layer; wherein after the cavity structure is longitudinally cut, the packaging substrate with the wettable side wings formed by the first circuit layer is obtained. According to the scheme, the quality of the packaging substrate capable of infiltrating the side wings can be improved, the technological process is reduced, and the cost is reduced.

Description

Technical Field

[0001] The present disclosure relates to the field of packaging technology, and more particularly to a packaging substrate capable of wetting flanks and a manufacturing method thereof. Background Art

[0002] In semiconductor packaging technology, whether it is flip-chip packaging technology based on metal bumps (also known as bumps), or packaging technologies such as pin mounting and insertion, wire bonding, etc., it is necessary to arrange metal bumps or leads on the chip as electrical connection points connected to the lead frame or IC substrate (Integrated Circuit, abbreviated as IC).

[0003] As the number of I / Os increases, the wire bonding packaging method can no longer meet the packaging requirements. The limited area of ​​the packaging structure also limits the increase in the number of solder balls on the substrate. The relevant technology solves this problem by arranging a redistribution circuit layer on the chip to increase the spacing to manufacture new electrical contacts, thereby forming a ball grid array package (BGA) or a land grid array package (LGA). However, this method will lead to a decrease in product yield and an increase in packaging costs. In addition, since the pads of the package are located at the bottom of the package, the device can only be vertically mounted on the printed packaging module by surface mounting. The heat dissipation of the device needs to be conducted downward through the circuit or actively dissipated from the back of the device. It cannot be applied to the scene of vertical side assembly and it is difficult to meet the multi-directional receiving and transmitting function requirements of specific semiconductor devices. Summary of the invention

[0004] In view of this, an object of the present disclosure is to provide a packaging substrate with wettable flanks and a manufacturing method thereof.

[0005] Based on the above objectives, the present disclosure provides a method for manufacturing a packaging substrate capable of wetting flanks, comprising:

[0006] (a) preparing a carrier plate; wherein the carrier plate comprises a stacked etching stop layer and a first metal seed layer on the etching stop layer;

[0007] (b) forming a sacrificial copper pillar on the first metal seed layer;

[0008] (c) laminating a dielectric material to cover the sacrificial copper column to form a first dielectric layer, and exposing an end surface of the sacrificial copper column so that the end surface of the sacrificial copper column is flush with the first surface of the first dielectric layer;

[0009] (d) etching the sacrificial copper column to form a cavity structure with the etching stop layer as the bottom;

[0010] (e) forming a first circuit layer on the first surface and the inner wall of the cavity structure;

[0011] (f) removing the carrier plate to expose the second surface of the first dielectric layer;

[0012] (g) forming a second circuit layer on the second surface of the first dielectric layer;

[0013] After the cavity structure is cut longitudinally, a packaging substrate having wettable flanks formed by the first circuit layer can be obtained.

[0014] In some embodiments, it also includes:

[0015] (h) forming a surface treatment layer on the first circuit layer and the second circuit layer.

[0016] In some embodiments, the thickness of the first metal seed layer is 1-3 μm; and / or

[0017] The material of the first metal seed layer is copper.

[0018] In some embodiments, step (b) forms the sacrificial copper pillar by pattern electroplating.

[0019] In some embodiments, step (d) comprises:

[0020] Laminating, exposing, and developing the first surface of the first dielectric layer to form a first photoresist layer;

[0021] Etching the sacrificial copper column until the etching stop layer is exposed;

[0022] The first photoresist layer is removed.

[0023] In some embodiments, the carrier plate further comprises a first metal layer and a second metal layer that are physically combined; the etching stop layer is located on a side of the second metal layer away from the first metal layer;

[0024] The step (f) specifically comprises:

[0025] separating the first metal layer and the second metal layer;

[0026] The second metal layer and the etch stop layer are etched.

[0027] In some embodiments, before etching the second metal layer and the etching stop layer, the method further includes: forming a second photoresist layer on the first surface of the first dielectric layer to cover the first surface.

[0028] In some embodiments, the material of the etch stop layer includes at least one of nickel, titanium, and tin.

[0029] In some embodiments, step (g) comprises:

[0030] forming a second metal seed layer on the second surface of the first dielectric layer;

[0031] Laminating, exposing, and developing the surface of the second metal seed layer to form a second pattern layer;

[0032] electroplating a second circuit layer in the second pattern layer;

[0033] removing the second pattern layer;

[0034] The second metal seed layer is etched.

[0035] Based on the same inventive concept, the embodiments of the present disclosure also provide a packaging substrate manufactured by any of the aforementioned manufacturing methods.

[0036] In some embodiments, the packaging substrate includes a first dielectric layer, a first circuit layer, and a second circuit layer; wherein the first circuit layer and the second circuit layer are located on two surfaces of the first dielectric layer, and the first circuit layer extends to cover the side wall of the first dielectric layer to form a wettable flank.

[0037] As can be seen from the above, the present disclosure provides a package substrate and a manufacturing method for wettable flanks. Specifically, the manufacturing method uses the etching barrier layer of the carrier plate as a protective layer for etching the sacrificial copper column, without the need for an electroplated protective layer, fundamentally eliminating quality problems such as missed plating, dents, and etching perforations, and can obtain a smooth and regular cavity structure at the bottom, which helps to improve the quality of the package substrate for wettable flanks. In addition, the manufacturing method provided in the embodiment of the present disclosure reduces the process flow and helps to reduce costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0039] Figure 1 A schematic flow chart of a method for manufacturing a packaging substrate capable of wetting flanks provided in the related art;

[0040] Figure 2(a) to Figure 2(i) A schematic cross-sectional view of the intermediate structure of each step of a method for manufacturing a packaging substrate with wettable flanks provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0041] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0042] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0043] In the related art, in order to meet the requirements of vertical assembly on the side, the copper block is directly cut, which is difficult to eliminate cracks and burrs, and is prone to product quality problems. Figure 1 As shown, a method is adopted in which a sacrificial copper column is first made into a cavity, and then a metal layer is electroplated as an etching barrier layer. This method has a complicated process flow and high cost, and the etching barrier layer is prone to leakage plating, which leads to quality problems such as dents at the bottom of the cavity and etching perforations.

[0044] In view of this, the present disclosure provides a packaging substrate and manufacturing method for wettable flanks. Specifically, the manufacturing method includes (a) preparing a carrier board; wherein the carrier board includes a stacked etching barrier layer and a first metal seed layer on the etching barrier layer; (b) forming a sacrificial copper column on the first metal seed layer; (c) laminating dielectric materials to form a first dielectric layer exposing the end surface of the sacrificial copper column; (d) etching the sacrificial copper column to form a cavity structure with the etching barrier layer as the bottom; (e) forming a first circuit layer on the first surface of the first dielectric layer and the inner wall of the cavity structure; (f) removing the carrier board to expose the second surface of the first dielectric layer; (g) forming a second circuit layer on the second surface of the first dielectric layer; wherein the first circuit layer can form a wettable flank structure after cutting the cavity structure. Such a technical solution uses the etching barrier layer of the carrier plate as a protective layer for etching the sacrificial copper pillars, without the need for an electroplated protective layer, thereby fundamentally eliminating quality problems such as missed plating, dents, and etching perforations, and can obtain a smooth and regular cavity structure at the bottom, which helps to improve the quality of the package substrate that can wet the flanks. In addition, the manufacturing method provided by the embodiment of the present disclosure reduces the process flow and helps to reduce costs.

[0045] Figure 2(a) to Figure 2(i) A schematic cross-sectional view of the intermediate structure of each step of a method for manufacturing a packaging substrate with wettable flanks provided in an embodiment of the present disclosure.

[0046] like Figure 2(a) to Figure 2(i) As shown, the manufacturing method comprises:

[0047] First, a carrier plate 100 is prepared—step (a), as shown in FIG. 2( a ).

[0048] In some embodiments, the carrier board 100 sequentially includes a core layer 101 , a first metal layer 102 , a second metal layer 103 , an etching stop layer 104 , and a first metal seed layer 105 .

[0049] Optionally, the first metal layer 102 and the second metal layer 103 may be metal copper layers, which are physically combined and can be physically separated, such as by tearing.

[0050] Alternatively, the material of the etch stopper layer 104 may include at least one of nickel, titanium, and tin.

[0051] Optionally, the first metal seed layer 105 is usually made of copper, which can be used as a conductive basis for subsequent electroplating. Optionally, the first metal seed layer 105 has a thickness of 1 to 3 μm, such as 1 μm, 2 μm, or 3 μm.

[0052] Next, a sacrificial copper pillar 201 is formed on the first metal seed layer 105—step (b), as shown in FIG. 2( b ).

[0053] Exemplarily, step (b) may include: first, applying a film on the first metal seed layer 105 , exposing and developing to form a first pattern layer, then performing pattern electroplating, and finally stripping and etching the first metal seed layer 105 to obtain a sacrificial copper column 201 .

[0054] As can be seen from FIG. 2( b ), the sacrificial copper pillar 201 is located on the etching stop layer 104 , and the bottom of the sacrificial copper pillar is in direct contact with the etching stop layer 104 .

[0055] Then, dielectric materials are laminated to form a first dielectric layer 301, and the first surface A of the first dielectric layer 301 is exposed and flush with the end surface of the sacrificial copper pillar 201 - step (c), as shown in Figure 2 (c). Here, the end surface of the sacrificial copper pillar 201 can be exposed by mechanical grinding.

[0056] In some embodiments, the material of the first dielectric layer 301 may be a resin material that does not contain glass fiber, such as one selected from the group consisting of liquid crystal polymer, BT (bismaleimide triazine) resin, semi-cured prepreg, ABF (Ajinomoto Build-up) film, epoxy resin and polyimide resin, but the present disclosure is not limited to this.

[0057] Next, the sacrificial copper pillar 201 is etched to form a cavity structure 501 with the etching stop layer 104 as the bottom—step (d), as shown in FIG2(d). Here, the opening of the cavity structure 501 is located on the first surface A of the first dielectric layer 301, and the bottom of the cavity structure 501 is relative to the opening of the cavity structure 501, and the bottom and the opening are located at two ends of the cavity structure 501, respectively.

[0058] Exemplarily, step (d) may include: first, applying a film to the first surface A of the first dielectric layer 301, exposing, and developing to form a first photoresist layer; next, etching the sacrificial copper column 201 until the etching stop layer 104 is exposed to obtain the cavity structure 501, and finally removing the first photoresist layer.

[0059] In some embodiments, the step of forming the first photoresist layer may be omitted, and etching may be performed directly, which is not limited in the present disclosure.

[0060] It should be noted that the etching stop layer 104 can accurately control the etching progress of the sacrificial copper pillar 201, which can not only ensure that the sacrificial copper pillar 201 is completely etched, but also effectively protect the second metal layer 103. The bottom of the cavity structure 501 is the etching stop layer 104, and its surface is smooth and regular without dents or perforations, which is helpful for the subsequent production of the first circuit layer.

[0061] The etching stop layer 104 is a layer structure from the carrier plate 100, which not only reduces the process steps of the conventional electroplating etching stop layer, but also fundamentally solves the technical problems such as missed plating and the presence of dents caused by the electroplating etching stop layer. Furthermore, since there is no problem of missed plating, the problem of etching perforation caused by the lack of protection caused by missed plating is also avoided.

[0062] Then, a first circuit layer 302 is formed on the first surface of the first dielectric layer 301 and in the cavity structure 501—step (e), as shown in FIG. 2( e ).

[0063] In some embodiments, step (e) includes: first, making a third metal seed layer; next, laminating, exposing, and developing to form a third pattern layer; and then electroplating the first circuit layer 302 on the third pattern layer.

[0064] Optionally, the preparation of the third metal seed layer includes a sputtering process and a chemical copper plating process (PlatedThroughHole, PTH for short). With such a process, the third metal seed layer can be formed on the surface of the cavity structure 501, thereby ensuring that a plated layer can be formed in the cavity structure 501 in a subsequent electroplating process, which helps the first circuit layer 302 to extend and plate to the sidewall and bottom of the cavity structure 501.

[0065] The first circuit layer 302 extends from the surface of the first dielectric layer 301 to the sidewall and bottom of the cavity structure 501. The first circuit layer 302 is not only located on the surface of the first dielectric layer 301, but also extends to the thickness direction of the first dielectric layer 301. Such a structure helps the package substrate to be assembled vertically on the side.

[0066] Next, the carrier board 100 is removed to expose the second surface B of the first dielectric layer 301—step (f), as shown in FIG. 2( f ).

[0067] In some embodiments, step (f) specifically comprises:

[0068] Separating the first metal layer 102 and the second metal layer 103;

[0069] The second metal layer 103 and the etching stopper layer 104 are etched.

[0070] It should be noted that when etching the second metal layer 103 , the etching stop layer 104 can protect the first circuit layer 302 of the substrate to prevent over-etching.

[0071] Optionally, before etching the second metal layer 103 and etching the stop layer 104, the process further includes: forming a second photoresist layer 303 covering the entire surface of the first surface A of the first dielectric layer 301 to protect the second circuit layer 302. After etching the stop layer 104, the second photoresist layer 303 is removed.

[0072] Then, a second circuit layer 402 is formed on the second surface B of the first dielectric layer 301; wherein, referring to FIG2(i), the second circuit layer 402 can form a wettable wing structure together with the first circuit layer 302 after cutting the cavity structure 501 - step (g), as shown in FIG2(g).

[0073] In some embodiments, step (g) comprises:

[0074] A second metal seed layer is formed on the second surface B of the first dielectric layer 301 ; here, compared with the production of the third metal seed layer, the production of the second metal seed layer can omit the chemical copper plating process.

[0075] Laminating, exposing, and developing the surface of the second metal seed layer to form a second pattern layer;

[0076] Electroplating a second circuit layer 402 in the second pattern layer;

[0077] removing the second pattern layer; and etching the second metal seed layer.

[0078] Optionally, the second circuit layer 402 may be inspected by using Automatic Optical Inspection (AOI).

[0079] Then, a solder resist layer 403 and a surface treatment layer 401 are made—step (h), as shown in FIG2(h). Optionally, a surface treatment layer 401 is formed on the first circuit layer 302 and the second circuit layer 402. A solder resist layer 403 is formed on the first dielectric layer 301. It should be noted that the solder resist layer 403 may cover a portion of the first circuit layer 302 and the second circuit layer 402, which is not limited in the present disclosure.

[0080] In some embodiments, the surface treatment layer 401 may be formed by a nickel-palladium-gold process (ENEPIG). Those skilled in the art may also use other surface treatment processes, which are not limited in the present disclosure.

[0081] Finally, the cavity structure 501 is cut at a preset position to form a package substrate capable of wetting the flanks—step (i), as shown in FIG2(i). The preset position can refer to the dotted line position in FIG2(i), which is not limited in the present disclosure.

[0082] After the cavity structure 501 is cut, the first circuit layer 302 or the second circuit layer 402 at the sidewall and bottom of the cavity structure 501 are exposed to the side of the package substrate, forming a wettable wing structure, which is helpful for side vertical assembly.

[0083] Based on the same inventive concept, the disclosed embodiment also provides a package substrate with wettable flanks prepared by any of the above-mentioned manufacturing methods. As shown in FIG2(i), the package substrate includes a first dielectric layer 301, a first circuit layer 402, and a second circuit layer 302; wherein the first circuit layer 402 and the second circuit layer 302 are located on two surfaces of the first dielectric layer 301, and the first circuit layer 302 extends to the side wall of the first dielectric layer 301 to form a wettable side wall. Such a structure facilitates the vertical assembly of components on the side.

[0084] Optionally, the first circuit layer 302 is electrically connected to the second circuit layer 402 at a side wall of the first dielectric layer 301 .

[0085] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in detail for the sake of simplicity.

[0086] The embodiments of the present disclosure are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A method for manufacturing a packaging substrate capable of wetting flanks, characterized in that: include: (a) preparing a carrier plate; wherein the carrier plate comprises a stacked etching stop layer and a first metal seed layer on the etching stop layer; (b) forming a sacrificial copper pillar on the first metal seed layer; (c) laminating a dielectric material to cover the sacrificial copper column to form a first dielectric layer, and exposing an end surface of the sacrificial copper column so that the end surface of the sacrificial copper column is flush with the first surface of the first dielectric layer; (d) etching the sacrificial copper column to form a cavity structure with the etching stop layer as the bottom; (e) forming a first circuit layer on the first surface and the inner wall of the cavity structure; (f) removing the carrier plate to expose the second surface of the first dielectric layer; (g) forming a second circuit layer on the second surface of the first dielectric layer; After the cavity structure is cut longitudinally, a packaging substrate having wettable flanks formed by the first circuit layer is obtained.

2. The method according to claim 1, characterized in that: Also includes: (h) forming a surface treatment layer on the first circuit layer and the second circuit layer.

3. The method according to claim 1, characterized in that: The thickness of the first metal seed layer is 1 to 3 μm; and / or The material of the first metal seed layer is copper.

4. The method according to claim 1, characterized in that: Step (b) forms the sacrificial copper column by pattern electroplating.

5. The method according to claim 1, characterized in that: Step (d) comprises: Laminating, exposing, and developing the first surface of the first dielectric layer to form a first photoresist layer; Etching the sacrificial copper column until the etching stop layer is exposed; The first photoresist layer is removed.

6. The method according to claim 1, characterized in that: The carrier plate further comprises a first metal layer and a second metal layer that are physically combined; the etching stop layer is located on a side of the second metal layer away from the first metal layer; The step (f) specifically comprises: separating the first metal layer and the second metal layer; The second metal layer and the etch stop layer are etched.

7. The manufacturing method according to claim 6, characterized in that: Before etching the second metal layer and the etching stop layer, the method further includes: forming a second photoresist layer on the first surface of the first dielectric layer and covering the first surface.

8. The manufacturing method according to claim 1, characterized in that: The material of the etching stopper layer includes at least one of nickel, titanium and tin.

9. The manufacturing method according to claim 1, characterized in that: Step (g) comprises: forming a second metal seed layer on the second surface of the first dielectric layer; Laminating, exposing, and developing the surface of the second metal seed layer to form a second pattern layer; electroplating a second circuit layer in the second pattern layer; removing the second pattern layer; The second metal seed layer is etched. 10 . A packaging substrate with wettable flanks manufactured according to the manufacturing method according to claim 1 .

11. The package substrate with wettable flanks according to claim 10, characterized in that: The packaging substrate includes a first dielectric layer, a first circuit layer and a second circuit layer; wherein the first circuit layer and the second circuit layer are located on two surfaces of the first dielectric layer, and the first circuit layer extends to cover the side wall of the first dielectric layer to form a wettable flank.

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