A laser bonding interconnect process

Abstract

A kind of laser bonding interconnection process, comprising the following steps: step one, select certain specification substrate and chip, and after the substrate and the chip are cleaned, it is pretreated;Step two, using a chip suction and laser emission integrated device with light transmission and high-temperature resistant material is extracted from the top chip, and interconnection material is placed between chip and substrate as interconnection layer, align chip and substrate, so that it forms the interconnection structure of chip, interconnection material, substrate;Step three, pass in protective gas, using the device selects appropriate laser parameters, and applies pressure and ultrasonic, controls welding time and carries out welding to the interconnection structure;Step four, after cooling at room temperature, the interconnection structure is obtained.The interconnection of detail pitch and chip die bonding are included, and better performance, higher efficiency and lower cost interconnection are simultaneously realized, meet the requirements of advanced packaging, for solving the above technical problems.

Description

Technical Field

[0001] The present invention relates to the technical field of component packaging and interconnection, and in particular to a laser bonding interconnection process. Background Art

[0002] In the field of advanced packaging interconnects, the integration of various components into a single package is becoming increasingly important. The soldering method used for this structure significantly impacts its reliability. Traditional reflow soldering requires the entire "interconnect sandwich" to be exposed to a relatively high temperature, potentially impacting product performance and reliability. Furthermore, reflow oven operation is complex, and improper soldering parameters and temperature zones can easily lead to defects such as cold solder joints, poor solder joints, and bridging.

[0003] To improve reflow soldering's shortcomings, hot pressing and sintering are currently being used. However, this method requires long heating and cooling cycles throughout the soldering process, which reduces production efficiency, resulting in low UPH and high costs. Therefore, traditional soldering methods are no longer able to meet the requirements of advanced packaging. Summary of the Invention

[0004] In response to the above-mentioned defects, the purpose of the present invention is to propose a laser bonding interconnection process, including fine-pitch interconnection and chip bonding, while achieving better performance, higher efficiency and lower cost interconnection, meeting advanced packaging requirements, and solving the above-mentioned technical problems.

[0005] To achieve this object, the present invention adopts the following technical solutions:

[0006] A laser bonding interconnection process comprises the following steps:

[0007] Step 1: Select a substrate and chip of a certain specification, clean the substrate and chip, and then pre-treat them;

[0008] Step 2: Using an integrated chip suction and laser emission device with a light-transmitting and high-temperature resistant material to suck the chip from directly above, and placing an interconnection material between the chip and the substrate as an interconnection layer, aligning the chip and the substrate to form an interconnection structure of the chip, the interconnection material, and the substrate;

[0009] Step 3: introducing a protective gas, using the device to select appropriate laser parameters, applying pressure and ultrasound, and controlling the welding time to weld the interconnected structure;

[0010] Step 4: Cooling at room temperature to obtain the interconnected structure.

[0011] Preferably, in step 1, the size of the chip and the substrate is 1 μm-300 mm, wherein the pitch of the chip is 1 μm-200 μm; and the pretreatment includes using one or more of SAM, acid treatment and plasma treatment.

[0012] Preferably, in step 2, the light-transmitting, high-temperature-resistant material includes one of quartz glass, transparent fiberglass, and yttrium oxide transparent ceramic.

[0013] Preferably, in step 2, the laser light source of the chip absorption and laser emission integrated device includes one of a CO2 laser, a Nd:YAG laser, a fiber laser, and a semiconductor laser.

[0014] Furthermore, in step 2, the interconnection material includes nano-metal slurries such as gold, silver, copper, and tin, and various alloy nano-materials such as silver / copper, gold / tin, and tin / silver, as well as one or more of solder paste, die-bonding glue, and conductive glue.

[0015] Furthermore, in step 2, the interconnect material placement method includes one of dipping, screen printing, and direct deposition.

[0016] Furthermore, in step three, the protective gas includes one or more of air, nitrogen, argon, and helium.

[0017] Furthermore, in step three, the laser parameters include a laser power of 1-3000W and a laser wavelength of 0.7-10.6 μm.

[0018] Furthermore, in step three, the pressure is 0-40 MPa, the ultrasonic driving frequency is 0-100 kHz, and the welding time is 1-3600 s.

[0019] One of the above technical solutions includes the following beneficial effects: the present invention completes the chip-substrate interconnection process through laser bonding, selects a substrate and chip of certain specifications, cleans the substrate and chip, and then pre-treats them; uses a chip suction and laser emission integrated device with a light-transmitting and high-temperature resistant material to suck the chip from directly above, places the interconnection material between the chip and the substrate as an interconnection layer, aligns the chip and the substrate to form an interconnection structure of the chip, interconnection material, and substrate; introduces a protective gas, uses the device to select appropriate laser parameters, applies pressure and ultrasound, and controls the welding time to weld the interconnection structure; and cools to room temperature to obtain the interconnection structure. The present invention uses the integrated chip suction and laser bonding process to reduce the process of aligning the laser spot with the solder joint during the laser bonding process, and can also significantly reduce the heating and cooling time period of the entire chip bonding process, thereby reducing the cost of the chip bonding process and significantly improving the efficiency of the chip bonding process, achieving the effect of improving chip packaging efficiency and quality. This new chip interconnection process can achieve more efficient and reliable chip interconnection and meet the requirements of advanced packaging interconnection. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a flow chart of a laser bonding interconnection process according to the present invention;

[0021] Figure 2 Schematic diagram of laser bonding application in flip chip ultra-fine pitch all-copper interconnection process;

[0022] Figure 3 Schematic diagram of laser bonding application in chip die attach process. DETAILED DESCRIPTION

[0023] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0024] like Figure 1-3 As shown, a laser bonding interconnection process is characterized by comprising the following steps:

[0025] Step 1: Select a substrate and chip of a certain specification, clean the substrate and chip, and then pre-treat them;

[0026] Step 2: Using an integrated chip suction and laser emission device with a light-transmitting and high-temperature resistant material to suck the chip from directly above, and placing an interconnection material between the chip and the substrate as an interconnection layer, aligning the chip and the substrate to form an interconnection structure of the chip, the interconnection material, and the substrate;

[0027] Step three, protective gas is introduced, appropriate laser parameters are selected using the device, pressure and ultrasonic are applied, and the interconnection structure is welded by controlling welding time;

[0028] Step four, the interconnection structure is obtained after cooling at room temperature.

[0029] The chip and substrate interconnection process is completed by laser bonding in the present application, a certain specification of substrate and chip are selected, and the substrate and chip are cleaned and pretreated; a chip suction and laser emission integrated device with light transmission and high-temperature resistant material is used to suction the chip from the top, and the interconnection material is placed between the chip and the substrate as an interconnection layer, the chip and the substrate are aligned to form an interconnection structure of chip, interconnection material and substrate; protective gas is introduced, appropriate laser parameters are selected using the device, pressure and ultrasonic are applied, and the interconnection structure is welded by controlling welding time; the interconnection structure is obtained after cooling at room temperature. The chip suction and laser bonding integration used in the present application can reduce the process of aligning the laser spot and the welding spot in the laser bonding process, and can also greatly reduce the heating and cooling time period of the entire chip bonding process, thereby reducing the cost in the chip bonding process and achieving a great improvement in the efficiency of the chip bonding process, achieving the effect of improving the efficiency and quality of chip packaging. This new chip interconnection process can achieve more efficient and reliable chip interconnection, and can meet the requirements of advanced packaging interconnection.

[0030] In step one, the size of the chip and the substrate is 1 μm-300 mm, wherein the pitch of the chip is 1 μm-200 μm; the pretreatment includes one or more of SAM, acid treatment and plasma treatment.

[0031] The method can be used on chips and substrates in a larger size range, and has a wide application range; and the pretreatment can clean the surface of the chip and the substrate, and achieve the effect of removing impurities.

[0032] In step two, the light transmission and high-temperature resistant material includes one of quartz glass, transparent glass steel and yttrium oxide transparent ceramic.

[0033] The method has strong applicability to various light transmission and high-temperature resistant materials, and can meet normal use under various conditions and scenes.

[0034] In step two, the laser light source of the chip suction and laser emission integrated device includes one of CO2 laser, Nd:YAG laser, fiber laser and semiconductor laser.

[0035] This method can be used under a variety of laser light sources, so that different materials can choose a more suitable laser light source to form a more adaptive effect, thereby obtaining better performance.

[0036] In addition, in step 2, the interconnection material includes nano-metal slurries such as gold, silver, copper, and tin, and various alloy nano-materials such as silver / copper, gold / tin, and tin / silver, as well as one or more of solder paste, die-bonding glue, and conductive glue.

[0037] This method has a wide range of material applications and can meet the use of a variety of materials.

[0038] In addition, in step 2, the interconnect material placement method includes one of dipping, screen printing, and direct deposition.

[0039] In addition, in step three, the protective gas includes one or more of air, nitrogen, argon, and helium.

[0040] This method can be used in an air atmosphere, which reduces the use of protective gas, expands the scope of application and reduces costs; it also meets the requirements of normal use under protective gas.

[0041] In addition, in step three, the laser parameters include a laser power of 1-3000W and a laser wavelength of 0.7-10.6μm.

[0042] This method can be used in a larger laser power range and a wider laser wavelength range, and can better meet the requirements of different materials for laser power and wavelength, thereby expanding the application range of the method.

[0043] In addition, in step three, the pressure is 0-40 MPa, the ultrasonic driving frequency is 0-100 kHz, and the welding time is 1-3600 s.

[0044] This method can be used under pressure and ultrasonic drive, and can also be used under pressureless and non-ultrasonic drive, and has a wider range of applications; this method can complete sintering in a very short time, achieving the effect of saving time and cost.

[0045] Example 1

[0046] The present invention provides a laser bonding interconnection process, comprising the following steps:

[0047] Step 1: Select a chip and substrate with a copper pillar diameter of 40 μm, a copper pillar spacing of 40 μm, 10 copper pillar bumps, and a size of 2 mm*2 mm and 3 mm*3 mm, and clean the substrate and the chip and then pre-treat them with dilute sulfuric acid ultrasonic cleaning;

[0048] Step 2: Copper nano-paste is placed between the chip and the substrate as an interconnection layer by dipping, so as to form an interconnection structure of chip-copper nano-paste-substrate;

[0049] Step 3: nitrogen is introduced, and a laser welding machine with an Nd:YAG laser is used, and the laser power is set to 16 W, the laser wavelength is set to 1.06 μm, a pressure of 4 MPa, an ultrasonic drive of 0 kHz, and a welding time of 7 seconds, and then the interconnection structure is welded;

[0050] Step 4: After cooling at room temperature, a flip-chip interconnection structure is obtained. The overall shear strength is 33.2 MPa obtained by shearing with a push-pull testing machine, and the resistivity is 9.1 μΩ·cm measured by a four-point probe method.

[0051] Example 2

[0052] The present invention provides a laser bonding interconnection process, comprising the following steps:

[0053] Step 1: Select a chip and substrate with a copper pillar diameter of 60 μm, a copper pillar spacing of 60 μm, 12 copper pillar bumps, and a size of 3 mm * 3 mm and 4 mm * 4 mm, and clean the substrate and the chip and then pre-treat them with dilute sulfuric acid ultrasonic cleaning;

[0054] Step 2: Copper nano-paste is placed between the chip and the substrate as an interconnection layer by dipping, so as to form an interconnection structure of chip-copper nano-paste-substrate;

[0055] Step 3: nitrogen is introduced, and a laser welding machine with a fiber laser is used, and the laser power is set to 14 W, the laser wavelength is set to 0.97 μm, 4 MPa pressure and 0 kHz ultrasonic drive are applied, and the welding time is controlled to 9 s to weld the interconnection structure;

[0056] Step 4: After cooling at room temperature, a flip-chip interconnection structure is obtained. The overall shear strength is 37.2 MPa obtained by shearing with a push-pull test machine, and the resistivity is 6.4 μΩ·cm measured by a four-point probe method.

[0057] Example 3

[0058] The present invention provides a laser bonding interconnection process, comprising the following steps:

[0059] Step 1: Select a chip with a size of 3mm*3mm and a substrate with a size of 5mm*5mm, clean the substrate and the chip, and then perform pretreatment with plasma cleaning;

[0060] Step 2: Solder paste is placed between the chip and the substrate by screen printing as an interconnection layer to form a chip-solder paste-substrate interconnection structure;

[0061] Step 3: Using a laser welding machine with an Nd:YAG laser, setting the laser power to 14 W, the laser wavelength to 1.06 μm, applying a pressure of 1 MPa, a 30 kHz ultrasonic drive, and controlling the welding time to 4 seconds, the interconnection structure is welded;

[0062] Step 4: After cooling at room temperature, a chip die-bonding structure with solder paste as the interconnection material is obtained. The overall shear strength is 36.7 MPa obtained by shearing with a push-pull testing machine, and the resistivity is 15.3 μΩ·cm measured by a four-point probe method.

[0063] Example 4

[0064] The present invention provides a laser bonding interconnection process, comprising the following steps:

[0065] Step 1: Select a chip with a size of 10mm*10mm and a substrate with a size of 15mm*15mm, clean the substrate and the chip, and then perform pretreatment with plasma cleaning;

[0066] Step 2: Solder paste is placed between the chip and the substrate by screen printing as an interconnection layer to form a chip-solder paste-substrate interconnection structure;

[0067] Step 3: Use a laser welding machine with a fiber laser, set the laser power to 12 W, the laser wavelength to 0.97 μm, apply a pressure of 1 MPa, a 30 kHz ultrasonic drive, and control the welding time to 6 seconds to weld the interconnection structure;

[0068] Step 4: After cooling at room temperature, a chip die-bonding structure with solder paste as the interconnection material is obtained. The overall shear strength is 38.1 MPa obtained by shearing with a push-pull testing machine, and the resistivity is 14.5 μΩ·cm measured by a four-point probe method.

[0069] The technical principles of the present invention have been described above with reference to specific embodiments. These descriptions are intended solely to illustrate the principles of the present invention and are not to be construed in any way as limiting the scope of protection of the present invention. Based on the explanations herein, those skilled in the art will readily conceive of other specific embodiments of the present invention without inventive effort, and such embodiments will fall within the scope of protection of the present invention.

Claims

1. A laser bonding interconnection process, characterized in that: The following steps are involved: Step 1: Select a substrate and chip of a certain specification, clean the substrate and chip, and then pre-treat them; Step 2: Using an integrated chip suction and laser emission device with a light-transmitting and high-temperature resistant material to suck the chip from directly above, and placing an interconnection material between the chip and the substrate as an interconnection layer, aligning the chip and the substrate to form an interconnection structure of the chip, the interconnection material, and the substrate; Step 3: introducing a protective gas, using the device to select appropriate laser parameters, applying pressure and ultrasound, and controlling the welding time to weld the interconnected structure; Step 4, cooling at room temperature to obtain the interconnected structure; In step 1, the size of the chip and substrate is 1 -300mm, wherein the chip pitch is 1 -200 The pretreatment comprises using one or more of SAM, acid treatment and plasma treatment; In step 2, the light-transmitting and high-temperature-resistant material includes one of quartz glass, transparent fiberglass, and yttrium oxide transparent ceramics; In step 2, the laser light source of the chip absorption and laser emission integrated device includes one of a CO2 laser, a Nd:YAG laser, a fiber laser, and a semiconductor laser; In step 3, the laser parameters include laser power of 1-3000W, laser wavelength of 0.7-10.6 ; The pressure is 0-40 MPa, the ultrasonic driving frequency is 0-100 kHz, and the welding time is 1-3600 s.

2. The laser bonding interconnection process according to claim 1, characterized in that: In step 2, the interconnection material includes nano-metal slurries such as gold, silver, copper, and tin, various alloy nano-materials such as silver / copper, gold / tin, and tin / silver, and one or more of solder paste, die-bonding glue, and conductive glue.

3. The laser bonding interconnection process according to claim 1, characterized in that: In step 2, the interconnect material placement method includes one of dipping, screen printing, and direct deposition.

4. The laser bonding interconnection process according to claim 1, characterized in that: In step three, the protective gas includes one or more of air, nitrogen, argon, and helium.

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