Miniature light-emitting structure and preparation method of miniature light-emitting structure

Abstract

The embodiment of the invention provides a miniature light-emitting structure and a preparation method of the miniature light-emitting structure. The miniature light-emitting structure comprises a substrate, an epitaxy and a current diffusion layer, the epitaxy is arranged on one side of the substrate, the epitaxy comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer which are stacked in the direction away from the substrate, a plurality of table tops and a plurality of channels which are alternately adjacent are formed on the side, away from the substrate, of the epitaxy, and the channels penetrate to the N-type semiconductor layer; the current diffusion layers are arranged on the sides, away from the substrate, of the table tops, a groove penetrating through the corresponding current diffusion layer by partial thickness is formed in the middle area of the side, away from the substrate, of each current diffusion layer, and a reflection structure is arranged in each groove.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of display technology, and in particular, to a micro-light-emitting structure and a method for preparing the micro-light-emitting structure. Background Art

[0002] As a new display technology in the current market, Micro LED has attracted more and more attention from the industry for its tiny pixel size and ultra-high luminous brightness in terms of application prospects.

[0003] In the structure of Micro LED chips, designing a reflective layer is beneficial to improving reflectivity and thus improving the overall light extraction efficiency. However, due to the small size of Micro LED chips and the limitations of the overall chip design, the production of the reflective layer faces high difficulty. Summary of the invention

[0004] The embodiments described herein provide a micro-light emitting structure and a method for preparing the micro-light emitting structure.

[0005] According to the first aspect of the present disclosure, a micro-light-emitting structure is provided, which includes a substrate, an epitaxy, and a current diffusion layer; the epitaxy is arranged on one side of the substrate, and the epitaxy includes an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer stacked in a direction away from the substrate, and the epitaxy forms a plurality of alternating adjacent mesas and a plurality of channels on the side away from the substrate, and the plurality of channels penetrates into the N-type semiconductor layer; the current diffusion layer is arranged on the side of the plurality of mesas away from the substrate, and a groove that penetrates a portion of the thickness of the corresponding current diffusion layer is formed in the middle region of the side away from the substrate, and a reflective structure is arranged in the groove.

[0006] In some embodiments of the present disclosure, a reflective metal layer is arranged in the groove between adjacent mesas, the height of the surface of the reflective metal layer facing away from the substrate from the bottom of the groove is smaller than the height of the surface of the light-emitting layer facing away from the substrate from the bottom of the groove, and a light-blocking adhesive layer is arranged on the side of the reflective metal layer facing away from the substrate.

[0007] In some embodiments of the present disclosure, the micro-light emitting structure further includes a blocking layer, which is disposed on a side of the current diffusion layer facing away from the substrate and covers the opening of the groove.

[0008] In some embodiments of the present disclosure, the micro-light-emitting structure further includes an electrode layer, a passivation layer, and a bonding layer. The electrode layer includes a plurality of N electrodes and a plurality of P electrodes, each of which is disposed at a channel in an edge region of the epitaxial layer on a side away from the substrate, and each of which is disposed at a side of the barrier layer away from the substrate; the passivation layer covers the exposed areas of the N-type semiconductor layer, the light-emitting layer, the P-type semiconductor layer, the current diffusion layer, the barrier layer, and the electrode layer, and the passivation layer is provided with openings at the N electrodes and the P electrodes; the bonding layer is disposed at the openings on the side of the passivation layer away from the substrate, and is electrically connected to the electrode layer.

[0009] In some embodiments of the present disclosure, the passivation layer includes a first passivation layer structure and a second passivation layer structure stacked in a direction away from the substrate, and the first passivation layer structure includes a dense dielectric film formed by atomic layer deposition.

[0010] In some embodiments of the present disclosure, the distance between the surface of the N-electrode facing away from the substrate and the bottom of the channel is equal to the distance between the surface of the P-electrode facing away from the substrate and the bottom of the channel.

[0011] According to a second aspect of the present disclosure, a method for preparing a micro-light-emitting structure is provided, the preparation method comprising: providing a substrate and an epitaxial structure formed on one side of the substrate, the epitaxial structure comprising an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer stacked in a direction away from the substrate; on a side of the epitaxial structure away from the substrate, making a plurality of channels penetrating into the N-type semiconductor layer to form a plurality of alternating adjacent mesas and a plurality of channels; making a current diffusion layer on a side of the plurality of mesas away from the substrate; making a groove penetrating a portion of the thickness of the current diffusion layer in a middle region on a side of each current diffusion layer away from the substrate; and making a reflective structure in the groove.

[0012] In some embodiments of the present disclosure, the preparation method also includes: forming a reflective metal layer in the groove between adjacent table tops, the height of the surface of the reflective metal layer facing away from the substrate from the bottom of the groove is less than the height of the surface of the light-emitting layer facing away from the substrate from the bottom of the groove; and forming a light-blocking adhesive layer on the side of the reflective metal layer facing away from the substrate.

[0013] In some embodiments of the present disclosure, the preparation method further includes: forming a barrier layer covering the groove opening on a side of each current diffusion layer facing away from the substrate.

[0014] In some embodiments of the present disclosure, the preparation method also includes: forming a P electrode on the side of each barrier layer facing away from the substrate; forming an N electrode on the side of multiple channels in the edge area of ​​the epitaxial layer facing away from the substrate to form an electrode layer including multiple N electrodes and multiple P electrodes; forming a passivation layer covering the exposed areas of the N-type semiconductor layer, the light-emitting layer, the P-type semiconductor layer, the current diffusion layer, the barrier layer and the electrode layer; making holes at the N electrode and the P electrode of the passivation layer, and forming a bonding layer electrically connected to the N electrode and the P electrode at the opening.

[0015] In various embodiments of the present disclosure, a reflective structure is provided in the groove of the current diffusion layer in the micro-light-emitting structure, and the side thickness and bottom thickness of the current diffusion layer protect the side and bottom of the reflective structure respectively, so as to prevent the material in the reflective structure from migrating from the side and bottom to other areas and causing device failure. That is, while making full use of the reflective structure to improve the light extraction efficiency, the probability of device failure caused by the migration of the material of the reflective structure is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It should be noted that the drawings described below only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure, wherein:

[0017] Figures 1A-1D is a schematic structural diagram of a micro-light-emitting structure provided according to various embodiments of the present disclosure;

[0018] Figure 2A-2C is a schematic flow chart of a method for preparing a micro display device according to various embodiments of the present disclosure;

[0019] It should be noted that the elements in the drawings are schematic and not drawn to scale. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.

[0021] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as those commonly understood by those skilled in the art to which the subject matter of the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the specification and the relevant technology, and will not be interpreted in an idealized or overly formal form unless otherwise clearly defined herein. As used herein, statements that two or more parts are "connected" or "coupled" together should refer to these parts being directly combined together or combined through one or more intermediate components. In addition, terms such as "first" and "second" are only used to distinguish one component (or a part of a component) from another component (or another part of a component).

[0022] For ease of description, spatially relative terms such as "upper", "lower", "left", "right", "top", "bottom", etc. may be used here to describe the spatial positional relationship between a device or element and other devices or elements as shown in the figure. For example, the terms "on...", "above...", "above...", "on the upper surface of...", "above", "positioned on..." or "positioned on top of..." etc. mean that a first element such as a first structure exists on a second element such as a second structure, wherein there may or may not be an intermediate element between the first element and the second element. The term "contact" means connecting a first element such as a first structure and a second element such as a second structure, and there may or may not be other elements at the interface of the two elements. It should be understood that spatially relative terms are intended to include different orientations in use or operation other than the orientation of the device described in the figure. For example, if the device in the figure is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures" afterwards. Thus, the exemplary term "above..." may include both "above..." and "below..." orientations. The device may be otherwise oriented, rotated 90 degrees or at other orientations and the spatially relative descriptors used herein interpreted accordingly.

[0023] In existing micro-display technologies, designing a reflective structure is beneficial to improving reflectivity and thus improving overall light extraction efficiency. However, due to the small size of Micro LED chips and the limitations of overall chip design, the production of reflective structures faces high difficulty.

[0024] The embodiments of the present disclosure propose a micro-light-emitting structure, which designs a groove in the current diffusion layer of the Micro LED chip and sets a reflective structure in the groove. On the one hand, the reflectivity of the reflective structure is used to enhance the luminous efficiency of the overall device. On the other hand, the reflective structure is set in the groove of the current diffusion layer to protect the reflective structure by using the side thickness and bottom thickness, thereby reducing the risk of device failure caused by the easy migration of the reflective structure material.

[0025] Figure 1A A schematic side view of a micro-light emitting structure 100 according to an embodiment of the present disclosure is shown. The micro-light emitting structure 100 may include a substrate 101 , an epitaxial layer 102 , and a current diffusion layer 103 .

[0026] In this embodiment, the substrate 101 may be a sapphire material or a silicon-based material. The epitaxy 102 is disposed on one side of the substrate 101. The epitaxy 102 may include an N-type semiconductor layer 1021, a light-emitting layer 1022, and a P-type semiconductor layer 1023 stacked away from the substrate 101. A plurality of alternately adjacent channels 1024 and a plurality of mesas 1025 are formed on the side of the epitaxy 102 away from the substrate 101, and each channel 1024 penetrates into the N-type semiconductor layer 1021. That is, the channel 1024 sequentially penetrates a portion of the thickness of the P-type semiconductor layer 1023, the light-emitting layer 1022, and the N-type semiconductor layer 1021. In the formed structure, the N-type semiconductor layer 1021, the light-emitting layer 1022 and the P-type semiconductor layer 1023 are arranged at the mesa 1025 of the epitaxial 102; only the N-type semiconductor layer 1021 is arranged at the channel 1024 of the epitaxial 102, and the light-emitting layer 1022 and the P-type semiconductor layer 1023 are not arranged. Optionally, the thickness of the N-type semiconductor layer 1021 at the channel 1024 is less than the thickness of the N-type semiconductor layer 1021 at the mesa 1025. Among these channels 1024, some channels 1024 are located at the edge region of the epitaxial 102, and some channels 1024 are located between adjacent mesas 1025.

[0027] In this embodiment, the current diffusion layer 103 is disposed on the side of the plurality of mesas 1025 away from the substrate 101, and a groove 104 penetrating a portion of the thickness of the corresponding current diffusion layer 103 is formed in the middle region of the side of the current diffusion layer 103 away from the substrate 101. Figure 1A As shown, the groove 104 penetrates a portion of the thickness of the current diffusion layer 103, that is, there is a portion of the thickness at the bottom of the current diffusion layer 103 that is not penetrated by the groove 104. The current diffusion layer 103 can be set to a relatively thick thickness, so that the portion of the thickness that is not penetrated by the groove 104, that is, the bottom area, is retained, so that it can contact the P-type semiconductor layer 1023 as an ohmic contact layer, and the remaining portion is used as a groove sacrificial layer to set the groove 104. In addition, the groove 104 is set in the middle area of ​​the current diffusion layer 103 on the side away from the substrate 101, so that the thickness of the surrounding area of ​​the current diffusion layer 103 is not penetrated by the groove 104 and is retained.

[0028] In this embodiment, a reflective structure 105 is disposed in the groove 104, such as Figure 1A As shown. The reflective structure 105 is provided in the micro-light emitting structure, which can reflect back the photons that originally propagated toward the substrate 101 and may be absorbed or trapped in the substrate 101, so that they can be emitted from the upper surface of the device, thereby improving the light extraction efficiency and the luminous intensity of the device. The reflective structure 105 can be made of various materials with reflective functions. When the material used in the reflective structure migrates, it is easy to cause device failure.

[0029] In the micro-light emitting structure 100 of this embodiment, a reflective structure 105 is arranged in the groove 104 of the current diffusion layer 103. The side thickness and bottom thickness of the current diffusion layer 103 respectively protect the side and bottom of the reflective structure 105, and can prevent the reflective metal layer 109 material from migrating from the side and bottom to other areas to cause possible device failure as much as possible. That is, while making full use of the reflective structure to improve the light extraction efficiency, the possibility of device failure caused by the migration of materials in the reflective structure is reduced.

[0030] In some embodiments, the reflective structure 105 may be a silver reflector. The silver reflector is an optical film with high reflectivity, usually composed of a polymer film surface coated with a highly conductive silver metal, etc. This structure enables the silver reflector to have high reflectivity in the visible light wavelength range, while having good processing performance and cost-effectiveness. In Micro-LED devices, due to the large difference in refractive index between semiconductor materials and air, light will undergo total internal reflection at the interface, causing most of the light energy to be trapped inside the semiconductor. But at the same time, the easy migration property of silver materials can easily cause device failure. Optionally, the silver reflector may include structures such as a reflective layer, a protective layer, a stress buffer layer, a blocking etching layer, and an adhesion layer. The reflective layer is usually a silver (Ag) layer with a high reflectivity; the protective layer may be a nickel (Ni) layer, etc., used to prevent the silver layer from being oxidized; the stress buffer layer may be composed of a periodic structure in which a titanium (Ti) layer and a platinum (Pt) layer are stacked in sequence. In the solution of this embodiment, the thickness of the side and bottom of the current diffusion layer 103 respectively forms a closed protection for the side and bottom of the silver reflector, which can prevent the easily migrated silver material from migrating from all directions to other areas and causing possible device failure. That is, while fully utilizing the reflector made of silver material to improve the light extraction efficiency, the possibility of device failure caused by the outward migration of silver material is reduced.

[0031] In some embodiments, the structure of the micro-light emitting structure 100 is as follows: Figure 1BAs shown. A reflective metal layer 109 may be provided at the channel 1024 between adjacent table surfaces 1025, and the height of the surface of the reflective metal layer 109 on the side facing away from the substrate 101 from the bottom surface of the channel 1024 is less than the height of the surface of the light-emitting layer on the side facing away from the substrate 101 from the bottom surface of the channel, and a light-blocking adhesive layer 110 is provided on the side of the reflective metal layer 109 facing away from the substrate 101. That is, the height of the upper surface of the reflective metal layer 109 is lower than the height of the upper surface of the light-emitting layer 1022. In these embodiments, a reflective metal layer 109 and a light-blocking adhesive layer 110 are provided at the channel 1024 between the table surfaces 1025, and the reflective metal layer 109 can reflect the light deviated to the channel to improve the overall light extraction efficiency, and the light-blocking adhesive layer 110 can prevent the light from irradiating from the channel to form crosstalk, thereby further improving the overall optical performance of the device. Optionally, the reflective metal layer may include at least one of an aluminum (Al) metal material and a titanium (Ti) metal material. When the reflective metal layer includes aluminum material and titanium material, the aluminum material may be the main material and the titanium material may be the auxiliary material. Optionally, the light-blocking adhesive layer 110 may be a black adhesive structure. The light-blocking adhesive layer uses black adhesive material, which has better light-blocking performance than other materials and can better prevent light crosstalk.

[0032] In some embodiments, the structure of the micro-light emitting structure 100 is as follows: Figure 1C As shown, the micro-light emitting structure 100 further includes a barrier layer 106, which is disposed on the side of the current diffusion layer 103 away from the substrate and covers the opening of the groove 104. In the technical solution of this embodiment, in addition to using the groove to protect the side and bottom surfaces of the reflective structure, the barrier layer 106 covers the opening of the groove 104 to shield the reflective structure 105 from above, preventing the material in the reflective structure 105 from migrating out from above and causing device failure. That is, the barrier layer 106 combined with the groove 104 can achieve closed protection of the reflective structure 105, further prevent the migration of materials in the reflective structure 105, and reduce the probability of device failure.

[0033] In some embodiments, the structure of the micro-light emitting structure 100 is as follows: Figure 1DAs shown. The micro-light emitting structure 100 further includes an electrode layer 107, a passivation layer 111 and a bonding layer 108. In the present embodiment, the electrode layer 107 includes a plurality of N electrodes 1071 and a plurality of P electrodes 1072. The N electrodes 1071 are arranged at the side of the channel in the edge region away from the substrate, and the P electrodes 1072 are arranged at the side of the barrier layer 106 away from the substrate 101. The passivation layer 111 covers the exposed areas of the N-type semiconductor layer 1021, the light emitting layer 1022, the P-type semiconductor layer 1023, the current diffusion layer 103, the barrier layer 106, and the electrode layer 107, i.e., the N electrodes 1071 and the P electrodes 1072. The passivation layer 111 is provided with openings at the N electrodes 1071 and the P electrodes 1072, and the N electrodes 1071 and the P electrodes 1072 can be exposed through the openings. Specifically, the passivation layer 111 can cover the exposed areas of each layer structure away from the substrate 101 and the exposed areas of the sidewalls. Optionally, the material used for the passivation layer 111 may include one or more of silicon oxide, silicon nitride and silicon oxynitride. The bonding layer 108 may be electrically connected to the exposed N electrode 1071 and P electrode 1072 at the opening. The bonding layer 108 may be used to bond the micro-light emitting structure 100 to other components such as a driver chip. In the overall structure of the micro-light emitting structure 100, at the table 1025 where the light emitting layer 1022 and the P-type semiconductor layer 1023 are retained, the current diffusion layer 103, the blocking layer 106, the P-electrode 1072, the passivation layer 111 and the bonding layer 108 are stacked; and in the channel where only the N-type semiconductor layer is retained, the channel located in the edge area is stacked with the N electrode 1071, the passivation layer 111 and the bonding layer 108. In the technical solution of this embodiment, the design of the passivation layer can further block and protect the migration of the reflective structure material and improve the overall yield.

[0034] In some embodiments, Figure 1D As shown, the passivation layer 111 includes a first passivation layer structure 1111 and a second passivation layer structure 1112 stacked in a direction away from the substrate, and the first passivation layer structure 1111 includes a dense dielectric film formed by atomic layer deposition. In the technical solution in this embodiment, a double-layer passivation layer is adopted, wherein the inner layer is a dense dielectric film formed by an atomic layer deposition process. In this embodiment, the double-layer passivation layer can not only further enhance the barrier protection effect on the migration of materials such as silver in the reflective structure, but also repair the side walls of each layer structure covered, which is beneficial to restore or even enhance the luminous intensity of the micro-light-emitting structure.

[0035] In some embodiments, the distance between the surface of the N-electrode 1071 facing away from the substrate and the bottom of the channel is equal to the distance between the surface of the P-electrode 1072 facing away from the substrate and the bottom of the channel. Since the N-electrode 1071 is located at the edge region of the channel, the lower surface of the N-electrode 1071 is closer to the channel; while the P-electrode 1072 is located at the barrier layer 106, the distance between the lower surface of the P-electrode 1072 and the channel at least includes the sum of the thickness of the multi-layer structure including the N-type semiconductor layer 1021, the light emitting layer 1022, the P-type semiconductor layer 1023, the current diffusion layer 103, and the barrier layer 106. It can be seen that the lower surface of the N-electrode 1071 is closer to the channel 1024 than the lower surface of the P-electrode 1072. In order to achieve the distance between the upper surface of the N electrode 1071 and the bottom of the channel 1024 to be equal to the distance between the upper surface of the P electrode 1072 and the bottom of the channel 1024, when designing the thickness of the N electrode, the N electrode 1071 can be designed as a metal pad layer structure to increase the thickness of the N electrode 1071, so that the thickness difference of the N electrode 1071 beyond the P electrode 1072 makes up for the distance difference between the lower surface and the bottom of the channel. In this embodiment, the distance between the surface of the N electrode facing away from the substrate and the bottom of the channel is equal to the distance between the surface of the P electrode facing away from the substrate and the bottom of the channel, so that the bonding layer 108 can be at the same level. When the micro-light-emitting structure 100 is bonded to other structures using the bonding layer 108, the bonding difficulty is small and the yield is higher. Optionally, the metal materials used for the P electrode and the N electrode include but are not limited to Ti, Au, Pt, Ni, Al, etc.

[0036] In some embodiments, the current diffusion layer 103 may be a semiconductor oxide material, such as indium tin oxide ITO. Optionally, the thickness of the current diffusion layer 103 is not less than 200 nm. When the thickness is less than 200 nm, the design space for setting the groove is relatively small, and it is difficult to set a reflective structure in the groove or it is difficult to reserve enough thickness at the bottom of the groove to protect the material of the reflective structure from migration, which may cause device failure. That is, designing the thickness of the current diffusion layer to be not less than 200 nm is conducive to improving the device yield.

[0037] Optionally, a U-shaped semiconductor layer 112 is further disposed between the substrate 101 and the N-type semiconductor layer 1021 . The U-shaped semiconductor layer 112 can be used as a buffer between the substrate 101 and the N-type semiconductor layer 1021 .

[0038] The present disclosure also provides a display module, which includes a micro-light emitting structure. The structure of the micro-light emitting structure can refer to Figures 1A-1D In addition, the display module may also include other components, which are not limited here. The display device can be applied to any product with a display function, such as electronic paper, mobile phones, tablet computers, televisions, laptops, digital photo frames, wearable devices or navigators.

[0039] Figure 2A A schematic flow chart of a method 20 for preparing a micro-light emitting structure according to an embodiment of the present disclosure is shown.

[0040] In step 201, a substrate and an epitaxial layer formed on one side of the substrate are provided, wherein the epitaxial layer includes an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer stacked in a direction away from the substrate.

[0041] In this embodiment, the provided epitaxy may be pre-grown and fabricated on one side of the substrate. Optionally, the provided substrate may be a sapphire or silicon-based substrate.

[0042] In step 202, a plurality of channels penetrating into the N-type semiconductor layer are fabricated on a side of the epitaxial layer facing away from the substrate, forming a plurality of alternately adjacent mesas and a plurality of channels.

[0043] In this embodiment, the epitaxy can be patterned to produce multiple channels penetrating into the N-type semiconductor layer, and the epitaxy can be processed into a Mesa structure, that is, multiple adjacent mesas and multiple channels are formed. That is, each channel sequentially penetrates the P-type semiconductor layer, the light-emitting layer, and a portion of the thickness of the N-type semiconductor layer. Optionally, an etching process can be used when making the channel. For example, a layer of etching mask layer can be first deposited on the surface of the epitaxial P-type semiconductor layer facing away from the substrate side, and then the etching mask layer at the position where the channel needs to be made is removed and the P-type semiconductor layer, the light-emitting layer, and a portion of the thickness of the N-type semiconductor layer at this position are etched, thereby forming the required Mesa structure. Optionally, the material of the etching mask layer includes but is not limited to etching-resistant substances such as photoresists, metals, insulating layers, or combinations of these substances.

[0044] In step 203, a current spreading layer is formed on a side of the plurality of mesas facing away from the substrate.

[0045] In this embodiment, there are unpenetrated P-type semiconductor layers and light-emitting layers at each mesa, and a current diffusion layer is made on the side of each P-type semiconductor layer away from the substrate. Optionally, the current diffusion layer can be made by processes such as photolithography and deposition. For example, the current diffusion layer can be made by evaporating semiconductor oxide to form current conduction. Optionally, the evaporated semiconductor oxide can be ITO (Indium Tin Oxide). Among metal compound semiconductor materials, indium tin oxide (Indium Tin Oxide) ITO is a transparent oxide conductive thin film material that is currently widely used, with high conductivity, high visible light transmittance, high mechanical hardness and good chemical stability.

[0046] In step 204, a groove penetrating a portion of the thickness of each current diffusion layer is formed in the middle region of the side of each current diffusion layer facing away from the substrate.

[0047] In this embodiment, the groove is located in the middle area of ​​the current diffusion layer and penetrates part of the thickness of the current diffusion layer. The groove has a certain depth so that a reflective structure can be made in the groove in the subsequent steps. In addition, since the groove is located in the middle area of ​​the current diffusion layer, the current diffusion layer still retains a certain thickness around the groove; the groove penetrates part of the thickness of the current diffusion layer, that is, the current diffusion layer also retains a certain thickness at the bottom of the groove. In this way, it can be ensured that the groove is not directly exposed to the edge of the diffusion layer, and does not affect the ohmic contact between the current diffusion layer and the P-type semiconductor layer.

[0048] The etched portion of the current diffusion layer is used as a groove sacrificial layer for subsequent fabrication of a reflective structure; meanwhile, the unetched thickness can be used as an ohmic contact layer in contact with the P-type semiconductor layer.

[0049] Specifically, an etching process can be used to make the groove. For example, if ITO is used as the material for the current diffusion layer, photoresist can be used as a mask to etch part of the ITO using yellow light, thereby etching a groove of a certain depth in the middle of the ITO, and a certain thickness of ITO should be retained at the bottom and around the groove. After etching, the photoresist is removed by organic cleaning.

[0050] In step 205, a reflective structure is fabricated in the groove.

[0051] In this embodiment, a reflective structure may be fabricated in the groove formed in step 204. Specifically, a reflective material may be deposited in the groove by yellow light to form the reflective structure.

[0052] In the technical solution of this embodiment, a reflective structure is set in the groove of the current diffusion layer in the prepared micro-light-emitting structure, and the side thickness and bottom thickness of the current diffusion layer respectively seal and protect the side and bottom of the reflective structure to prevent the material in the reflective structure from migrating to other areas and causing possible device failure. That is, while making full use of the reflective structure to improve the light extraction efficiency, the possibility of device failure caused by the migration of materials in the reflective structure is reduced.

[0053] Optionally, the thickness of the current diffusion layer is greater than a set threshold, for example, not less than 200 nm. If the thickness of the current diffusion layer is less than 200 nm, there may not be enough space to accommodate the reflective structure when the groove is subsequently made, and it may not be possible to provide a sufficiently thick groove bottom to effectively protect the migration of materials in the reflective structure, resulting in device failure.

[0054] In some embodiments, making a reflective structure in the groove in step 205 may specifically include: depositing silver material in the groove to form a silver reflector by yellow light. That is, the reflective structure uses a silver reflector. When depositing, the overlay offset of the yellow light needs to be considered to ensure that the evaporated silver is completely inside the groove of the current diffusion layer.

[0055] In some embodiments, the preparation method 20 of the micro-light-emitting structure also includes: making a barrier layer covering the opening of the groove on the side of each current diffusion layer away from the substrate. In this embodiment, the size of the barrier layer made can be larger than the opening area of ​​the groove, so that the barrier layer can cover the opening of the groove. In this way, the groove and the reflective structure made in the groove can be in the closed protection of the side thickness, bottom thickness and barrier layer of the current diffusion layer, which fundamentally solves the risk of material migration outward from all directions in the reflective structure. That is, while making full use of the reflective structure to improve the light output efficiency, the possibility of device failure caused by material migration in the reflective structure is reduced. Optionally, a deposition process can be used when making the barrier layer. For example, a metal such as Ti / TiW can be deposited on the surface of the reflective structure away from the substrate by yellow light to form a barrier layer.

[0056] In some embodiments of the present disclosure, the preparation method 20 may further include: Figure 2B The following steps are shown: Step 206, making a reflective metal layer in the trench between adjacent mesas, the height of the reflective metal layer surface facing away from the substrate from the trench bottom surface is less than the height of the light-emitting layer surface facing away from the substrate from the trench bottom surface; Step 207, making a light-blocking adhesive layer on the side of the reflective metal layer facing away from the substrate. Optionally, the light-blocking adhesive layer can be a black adhesive structure.

[0057] In some embodiments of the present disclosure, the preparation method 20 may also include Figure 2C The following steps are shown:

[0058] Step 208 , forming a P electrode on a side of the plurality of barrier layers facing away from the substrate.

[0059] In this embodiment, the electrode layer can be manufactured by a process such as metal deposition. Optionally, the deposited metal includes but is not limited to Au, Sn, In, Cn, etc.

[0060] Step 209 , forming N electrodes at a side of a plurality of channels in the edge region of the epitaxial growth away from the substrate, to form an electrode layer including a plurality of N electrodes and a plurality of P electrodes.

[0061] In this embodiment, for the channel in the epitaxial edge region, an N electrode is formed on the side of the corresponding channel away from the substrate. The metal material used to make the N electrode may include but is not limited to Ti, Au, Pt, Ni, Al, etc.

[0062] Step 210 , forming a passivation layer covering the exposed areas of the N-type semiconductor layer, the light emitting layer, the P-type semiconductor layer, the current diffusion layer, the barrier layer and the electrode layer.

[0063] In this embodiment, the passivation layer can be made by using a deposition process. After the passivation layer is made, holes can be opened at the N electrode and the P electrode of the passivation layer, and the N electrode and the P electrode can be exposed from the opening position after the holes are opened. Optionally, when opening the holes, the passivation layer can be etched by using a deposition mask and a photolithography process to realize the opening.

[0064] In step 211, holes are opened at the N-electrode and the P-electrode of the passivation layer, and a bonding layer electrically connected to the N-electrode and the P-electrode is formed at the openings.

[0065] In this embodiment, for each opening of the N electrode and the P electrode, a bonding layer electrically connected to the N electrode and the P electrode can be formed at the opening. Through the opening, the bonding layer can be electrically connected to the corresponding P electrode or N electrode.

[0066] In these embodiments, a passivation layer is formed to passivate and protect the exposed areas of the epitaxial layer, current diffusion layer, barrier layer and electrode layer, thereby further blocking and protecting the migration of materials in the reflective structure and reducing the possibility of device failure due to material migration.

[0067] In some embodiments of the present disclosure, step 210 may specifically include: preparing a first passivation layer structure and a second passivation layer structure in sequence in a direction away from the substrate, and manufacturing the first passivation layer structure by atomic layer deposition of a dense dielectric film. Among them, the dense dielectric film formed by atomic layer deposition in the first passivation layer structure can further play a role in repairing the sidewalls of the covered layers. The second passivation layer structure can use one or more of silicon oxide, silicon nitride and silicon oxynitride, which can also further enhance the overall passivation protection effect.

[0068] Atomic layer deposition (ALD) technology is a thin film preparation technology that grows layer by layer at the atomic level. In the ideal ALD growth process, different precursors are exposed to the surface of the substrate through selective alternation, and chemical adsorption and reaction on the surface form a deposited film. In the Micro LED chip, each pixel unit is very small, and its fine nano-scale structure is easily damaged during etching and other production steps, which in turn leads to loss of light intensity. In particular, when the size of the Micro LED is reduced to a certain extent, the ratio of the sidewall area to the surface area increases significantly (i.e., surface area / sidewall area), which can cause surface defects such as structural damage, contamination, or dangling bonds, thereby reducing the internal quantum efficiency (IQE).

[0069] In this embodiment, the first passivation layer structure uses a dense dielectric film formed by atomic layer deposition. In addition to having the function of blocking the diffusion of the bonding layer 108 material, it can also effectively repair the damage that the covered structure may encounter during the etching process, and can restore or even improve its luminous intensity. For example, when the first passivation layer structure is made by plating a SiO2 passivation layer on the side wall using an atomic layer deposition method, side wall defects can be suppressed and luminous brightness can be improved.

[0070] In some embodiments, the distance between the surface of the N electrode facing away from the substrate and the bottom of the channel is equal to the distance between the surface of the P electrode facing away from the substrate and the bottom of the channel. In this embodiment, when manufacturing the N electrode, the N electrode can be made into a metal pad layer, that is, made thicker, so that the difference in thickness between the N electrode and the P electrode makes up for the difference in distance between the lower surfaces of the two and the bottom of the channel, and finally the upper surfaces of the two are at the same height.

[0071] In some embodiments of the present disclosure, the preparation method 20 may further include: performing rapid thermal processing on the current diffusion layer. Rapid thermal processing (RTP), that is, annealing treatment is performed through a rapid annealing furnace, which can repair the material properties and rearrange the interior of the crystal. For example, when the current diffusion layer is an ITO film, the bottom portion of the groove of the current diffusion layer is easily damaged during the etching process, resulting in poor electrical contact between the current diffusion layer and the reflective structure. Using a rapid thermal processing process, the damage to the current diffusion layer of the ITO film during the etching process can be repaired to improve the performance, improve the quality and light transmittance of the ITO film, and especially improve the ohmic contact between the ITO film and the epitaxial.

[0072] In some embodiments of the present disclosure, the barrier layer and the P electrode can be fabricated in one step by a metal deposition process. In this embodiment, the barrier layer and the electrode layer can be fabricated by a one-step process, thereby reducing the overall process steps, which is beneficial to reducing the overall fabrication difficulty and improving the overall efficiency. For example, a one-step process is used to deposit metals such as Ti / TiW as a barrier layer and deposit metals such as Al, Au as an electrode layer on the surface of the reflective structure using yellow light.

[0073] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the device and method according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, a program segment or an instruction, and a part of the module, a program segment or an instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0074] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0075] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present application can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended for purposes of illustration only and are not intended to limit the scope of the present application.

[0076] Several embodiments of the present disclosure are described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the attached claims.

Claims

1. A micro-light emitting structure, characterized in that: The micro-light emitting structure includes a substrate, an epitaxial layer, and a current diffusion layer; The epitaxy is arranged on one side of the substrate, and the epitaxy includes an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer stacked and arranged away from the substrate. The epitaxy forms a plurality of alternately adjacent mesas and a plurality of channels on the side away from the substrate, and the plurality of channels penetrates into the N-type semiconductor layer; The current diffusion layer is arranged on the side of the multiple mesas away from the substrate, and a groove penetrating a portion of the thickness of the corresponding current diffusion layer is formed in the middle area of ​​each current diffusion layer away from the substrate, and a reflection structure is arranged in the groove.

2. The micro-light emitting structure according to claim 1, characterized in that: A reflective metal layer is arranged in the groove between adjacent mesas, and the height of the reflective metal layer surface away from the substrate from the bottom of the groove is less than the height of the light-emitting layer surface away from the substrate from the bottom of the groove. A light-blocking adhesive layer is arranged on the side of the reflective metal layer away from the substrate.

3. The micro-light emitting structure according to claim 1 or 2, characterized in that: The micro-light emitting structure further includes a barrier layer, which is disposed on a side of the current diffusion layer away from the substrate and covers an opening of the groove.

4. The micro-light emitting structure according to claim 3, characterized in that: The micro-light emitting structure further includes an electrode layer, a passivation layer and a bonding layer; The electrode layer includes a plurality of N electrodes and a plurality of P electrodes, each N electrode is arranged at a side of the channel in the edge region of the epitaxial layer away from the substrate, and each P electrode is arranged at a side of the barrier layer away from the substrate; The passivation layer covers the N-type semiconductor layer, the light-emitting layer, the P-type semiconductor layer, the current diffusion layer, the blocking layer and the exposed area of ​​the electrode layer, and the passivation layer is provided with openings at the N-electrode and the P-electrode; The bonding layer is arranged at the opening of the passivation layer on the side away from the substrate and is electrically connected to the electrode layer.

5. The micro-light emitting structure according to claim 4, characterized in that: The passivation layer includes a first passivation layer structure and a second passivation layer structure stacked in a direction away from the substrate, and the first passivation layer structure includes a dense dielectric film formed by atomic layer deposition.

6. The micro-light emitting structure according to claim 4, characterized in that: The distance between the surface of the N-electrode facing away from the substrate and the bottom of the channel is equal to the distance between the surface of the P-electrode facing away from the substrate and the bottom of the channel.

7. A method for preparing a micro-luminescent structure, characterized in that: The preparation method comprises: Providing a substrate and an epitaxial layer formed on one side of the substrate, wherein the epitaxial layer includes an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer stacked in a direction away from the substrate; On a side of the epitaxy away from the substrate, a plurality of channels penetrating into the N-type semiconductor layer are formed to form a plurality of alternately adjacent mesas and a plurality of channels; forming a current diffusion layer at a side of the plurality of mesas facing away from the substrate; In the middle area of ​​each current diffusion layer on a side away from the substrate, a groove is formed that penetrates a portion of the thickness of the current diffusion layer; A reflective structure is fabricated in the groove.

8. The preparation method according to claim 7, characterized in that: The preparation method further comprises: A reflective metal layer is formed in the trench between adjacent mesas, wherein the height of the reflective metal layer from the side facing away from the substrate to the bottom of the trench is less than the height of the light-emitting layer from the side facing away from the substrate to the bottom of the trench; A light-blocking adhesive layer is formed on the side of the reflective metal layer facing away from the substrate.

9. The preparation method according to claim 7 or 8, characterized in that: The preparation method further comprises: A barrier layer covering the groove opening is formed on a side of each current spreading layer facing away from the substrate.

10. The preparation method according to claim 9, characterized in that: The preparation method further comprises: Forming a P electrode on a side of each barrier layer away from the substrate; Making N electrodes at a side away from the substrate at a plurality of channels in the edge region of the epitaxial extension to form an electrode layer including a plurality of N electrodes and a plurality of P electrodes; Making a passivation layer covering the exposed areas of the N-type semiconductor layer, the light-emitting layer, the P-type semiconductor layer, the current diffusion layer, the blocking layer and the electrode layer; Holes are opened at the N-electrode and the P-electrode of the passivation layer, and bonding layers electrically connected to the N-electrode and the P-electrode are made at the holes.

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