A method and system for controlling assembly parameters in chip manufacturing

By setting up environmental monitoring points and assessing the environmental impact of each step in the chip manufacturing process, the quality control challenges caused by different environmental requirements in chip manufacturing have been solved, resulting in more accurate quality assessment and improved yield.

CN119828615BActive Publication Date: 2025-11-14JIANGSU XINWANG ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411885886.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-20
Publication Date
2025-11-14
Estimated Expiration
2044-12-20

AI Technical Summary

Technical Problem

Existing technologies make it difficult to determine the impact of the environment on chip production based on the different environmental requirements of each chip manufacturing step, which makes it difficult to determine testing requirements and understand chip quality.

Method used

Environmental monitoring points are set up at the operation locations of each production step to detect air cleanliness, air temperature and vibration data. The environmental impact of each step is evaluated through a scoring system, and the chip partitions are transferred to different test partitions for quality testing.

Benefits of technology

By assessing the environmental impact from multiple perspectives, the yield rate of chips was improved, ensuring that chips with quality problems were fully tested, and enhancing the quality control capabilities of chip production.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention provides a method and system for controlling chip manufacturing assembly parameters, relating to the field of chip manufacturing control technology. The method includes: assigning sequence numbers to multiple steps in chip manufacturing assembly; detecting air cleanliness, air temperature, air humidity, and vibration data at the operating positions of each step; determining a processing environment impact score, a cleanliness impact score, and a vibration impact score, and determining a processing impact effect score. If the processing impact effect score is higher than a preset impact threshold, the chip is transferred to a first testing zone; otherwise, the chip is transferred to a second testing zone. After testing, a chip product is obtained. According to this invention, processing environment impact scores, cleanliness impact scores, and vibration impact scores can be determined based on the environmental requirements of each step, thereby evaluating the impact of the environment on processing quality from multiple perspectives. This facilitates a comprehensive understanding of the chip's quality status and improves the chip yield.
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Description

Technical Field

[0001] This invention relates to the field of chip manufacturing control technology, and in particular to a method and system for controlling chip manufacturing assembly parameters. Background Technology

[0002] In related technologies, the chip manufacturing process can include multiple steps such as wafer fabrication, oxidation, photolithography, etching, ion implantation, thin film deposition, interconnection, testing, packaging, and final testing. Each step has different environmental requirements. Steps with higher environmental requirements have stricter requirements for temperature, humidity, air cleanliness, and vibration at their operating locations. Failure to meet these requirements may affect processing accuracy or even prevent the manufacture of qualified chips. However, related technologies struggle to determine the impact of the environment on chip production based on the different environmental requirements of each step, making it difficult to determine the chip testing requirements and understand the chip's quality.

[0003] The information disclosed in the background section of this application is intended only to enhance the understanding of the general background of this application and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0004] This invention provides a method and system for controlling assembly parameters in chip manufacturing, which can solve the technical problem that previous technologies could not determine the impact of the environment on chip manufacturing for different environmental requirements at each step.

[0005] According to a first aspect of the present invention, a method for controlling assembly parameters in chip manufacturing is provided, comprising:

[0006] Assign sequence numbers to multiple steps in chip manufacturing and assembly, based on the order of chip production and assembly.

[0007] Environmental monitoring points are set at the operation locations of each production assembly step, wherein the environmental monitoring points are used to detect air cleanliness, air temperature, air humidity and vibration data;

[0008] The environmental monitoring points at various points in the production and assembly process of multiple chips belonging to the same wafer were identified to detect air cleanliness, air temperature, air humidity, and vibration data at multiple moments during the process.

[0009] The processing environment impact score is determined based on the air temperature and humidity detected at multiple times in each step and the sequence number of each step.

[0010] The cleanliness impact score is determined based on the air humidity, air cleanliness detected at multiple times in each step, and the sequence number of each step.

[0011] The vibration impact score is determined based on the vibration data detected at multiple times in each step and the sequence number of each step.

[0012] The processing impact score is determined based on the processing environment impact score, the cleanliness impact score, and the vibration impact score.

[0013] If the processing impact score is higher than the preset impact threshold, the multiple chips belonging to the same wafer are transferred to the first test partition; otherwise, the multiple chips belonging to the same wafer are transferred to the second test partition. The chips in the first test partition are subjected to individual quality testing, while the chips in the second test partition are subjected to sampling quality testing.

[0014] After the testing was completed, multiple chip products were obtained.

[0015] According to a second aspect of the present invention, a chip manufacturing assembly parameter control system is provided, comprising:

[0016] The sequence number module is used to set sequence numbers for multiple steps in chip production and assembly according to the order of chip production and assembly.

[0017] The module is used to set environmental monitoring points at the operation locations of each production assembly step, wherein the environmental monitoring points are used to detect air cleanliness, air temperature, air humidity and vibration data;

[0018] The detection module is used to determine the air cleanliness, air temperature, air humidity, and vibration data detected at multiple moments during the production and assembly process of multiple chips belonging to the same wafer at various environmental monitoring points.

[0019] The processing environment impact assessment module is used to determine the processing environment impact score based on the air temperature, air humidity detected at multiple times in each step and the sequence number of each step.

[0020] The cleanliness impact scoring module is used to determine the cleanliness impact score based on the air humidity, air cleanliness detected at multiple times in each step and the sequence number of each step.

[0021] The vibration impact scoring module is used to determine the vibration impact score based on the vibration data detected at multiple times in each step and the sequence number of each step.

[0022] The processing impact effect scoring module is used to determine the processing impact effect score based on the processing environment impact score, the cleanliness impact score, and the vibration impact score.

[0023] The testing module is used to transfer multiple chips belonging to the same wafer to a first testing partition if the processing impact score is higher than a preset impact threshold; otherwise, it transfers multiple chips belonging to the same wafer to a second testing partition. The chips in the first testing partition are subjected to individual quality testing, while the chips in the second testing partition are subjected to sampling quality testing.

[0024] The product module is used to obtain multiple chip products after testing is completed.

[0025] Technical Effects: According to the present invention, environmental monitoring points can be set at the operation location of each step, thereby detecting air cleanliness, air temperature, air humidity, and vibration data at each operation location. Furthermore, based on the environmental requirements of each step, processing environment impact scores, cleanliness impact scores, and vibration impact scores are determined. This allows for a multi-faceted assessment of the environmental impact of each step on processing quality. Chips with significantly affected processes are then transferred to the first testing zone for comprehensive testing, facilitating a thorough understanding of chip quality and improving chip yield. When determining the temperature impact score, the average value of the impact caused by the relative deviation between the detected air temperature and the preset temperature at multiple times, as well as the average value of the impact caused by the change in the deviation between the air temperature and the preset temperature, can be obtained. The maximum value of these two values ​​is used to describe the impact of the temperature deviation on chip quality. Temperature weights can be set based on the different temperature requirements of each step, and sequence weights can be set based on the fact that the impact of earlier steps tends to accumulate and have a greater impact on chip quality in subsequent steps. Thus, a temperature impact score can be obtained. Similarly, a humidity impact score can be obtained, and the processing environment impact score is obtained after weighted summation. This accurately and objectively describes the impact of the air temperature and humidity environment at each step's operating location on chip quality. When determining the first relationship function, a set of equations for the first undetermined coefficients can be set based on the inverse correlation between air humidity and electrostatic voltage and its half-life. These undetermined coefficients are then solved using air humidity settings and measured electrostatic voltage and its half-life during multiple tests to obtain the first relationship function. This function concisely and accurately represents the electrostatic activity of the silicon dioxide layer under specific air humidity conditions and its susceptibility to particulate matter adsorption, thus accurately expressing the impact of air cleanliness and humidity on chip quality. When determining the cleanliness impact score, the influence of air humidity on the electrostatic activity generated by the silicon dioxide layer on the wafer surface, and the influence of electrostatic activity on the adsorption of airborne particulate matter, can be determined. This identifies the additional impact of air humidity on the chip quality caused by airborne particulate matter. Furthermore, the impact of air cleanliness on chip quality can be determined. Therefore, the overall impact of airborne particulate matter on chip quality can be determined jointly from both air cleanliness and air humidity perspectives, improving the accuracy and objectivity of the cleanliness impact score. When determining the processing impact score, the impact of vibration on the chip processing accuracy in each step can be described by the ratio between the maximum vibration value detected during each step and the preset maximum amplitude value. Then, the impact is weighted and summed based on the vibration weight and the sequence weight to obtain the vibration impact score, thereby accurately and objectively describing the overall impact of vibration at the operation position of each step on the chip quality.

[0026] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Other features and aspects of the invention will become clearer from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0028] Figure 1 An exemplary flowchart of a chip manufacturing assembly parameter control method according to an embodiment of the present invention is shown.

[0029] Figure 2 A block diagram of a chip manufacturing assembly parameter control system according to an embodiment of the present invention is shown as an example. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0031] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0032] Figure 1 An exemplary flowchart illustrates a chip manufacturing assembly parameter control method according to an embodiment of the present invention, the method comprising:

[0033] Step S101: Set sequence numbers for multiple steps in chip production and assembly according to the order of chip production and assembly.

[0034] Step S102: Set up environmental monitoring points at the operation positions of each production assembly step, wherein the environmental monitoring points are used to detect air cleanliness, air temperature, air humidity and vibration data;

[0035] Step S103: Determine the air cleanliness, air temperature, air humidity, and vibration data detected at multiple moments during the production and assembly process of multiple chips belonging to the same wafer at various environmental monitoring points in each step of the process.

[0036] Step S104: Determine the processing environment impact score based on the air temperature, air humidity detected at multiple times in each step and the sequence number of each step.

[0037] Step S105: Determine the cleanliness impact score based on the air humidity, air cleanliness detected at multiple times in each step and the sequence number of each step.

[0038] Step S106: Determine the vibration impact score based on the vibration data detected at multiple times in each step and the sequence number of each step.

[0039] Step S107: Determine the processing impact score based on the processing environment impact score, the cleanliness impact score, and the vibration impact score;

[0040] Step S108: If the processing impact score is higher than the preset impact threshold, the multiple chips belonging to the same wafer are transferred to the first test partition; otherwise, the multiple chips belonging to the same wafer are transferred to the second test partition. The chips in the first test partition are subjected to individual quality testing, and the chips in the second test partition are subjected to sampling quality testing.

[0041] Step S109: After the test is completed, multiple chip products are obtained.

[0042] According to an embodiment of the chip manufacturing assembly parameter control method of the present invention, environmental monitoring points can be set at the operation positions of each step to detect air cleanliness, air temperature, air humidity, and vibration data at each operation position. Based on the environmental requirements of each step, a processing environment impact score, a cleanliness impact score, and a vibration impact score are determined. This allows for a multi-faceted assessment of the environmental impact of each step on processing quality. Chips with significant environmental impact are then transferred to a first testing zone for comprehensive testing, facilitating a thorough understanding of chip quality and improving chip yield.

[0043] According to one embodiment of the present invention, the chip manufacturing process may include multiple steps such as wafer fabrication, oxidation, photolithography, etching, ion implantation, thin film deposition, interconnection, testing, packaging, and final testing. Each step has different environmental requirements. For example, the photolithography step has high environmental requirements, with strict requirements on temperature, humidity, air cleanliness, and vibration, while the packaging step has lower environmental requirements. To distinguish the data collected at each step's operational location, a sequence number can be set for each step in step S101, that is, a sequence number can be set for each step according to the chip manufacturing and assembly sequence.

[0044] According to one embodiment of the present invention, in step S102, an environmental monitoring point may be set at the operating position of each production assembly step. The environmental monitoring point can detect air cleanliness, air temperature, air humidity, and vibration data. For example, the environmental monitoring point may be equipped with measuring devices such as thermometers, hygrometers, particulate matter detectors, and vibration sensors to detect the above-mentioned data at the operating position respectively.

[0045] According to one embodiment of the present invention, in step S103, during the production assembly process, a single wafer obtained in the wafer fabrication step can be used to manufacture multiple chips. Therefore, the environmental impact on the same wafer in multiple steps can be tracked, thereby determining the environmental impact on all chips on the wafer. Thus, the air cleanliness, air temperature, air humidity, and vibration data detected at multiple moments during the process of each step at environmental monitoring points on the same wafer can be determined. These data represent the data of the multiple chips belonging to the wafer at multiple moments during the process of each step.

[0046] According to one embodiment of the present invention, in step S104, the requirements for air temperature and humidity differ for each step. For example, the oxidation step requires strict temperature control to improve the uniformity of the oxide layer on the wafer surface, and the photolithography step requires strict temperature control to ensure that the solubility of the photoresist meets expectations. Similarly, the oxidation step also requires strict humidity control to improve the uniformity of the oxide layer on the wafer surface, and the ion implantation step requires strict humidity control, as air humidity affects the implantation accuracy of the dopant, thereby affecting the electrical properties of the chip. Therefore, the sequence numbers of different steps can be used to distinguish the requirements for air temperature and humidity for each step, thereby determining the impact of air temperature and humidity on the quality of this batch of chips and obtaining a processing environment impact score.

[0047] According to one embodiment of the present invention, a processing environment impact score is determined based on the air temperature and humidity detected at multiple times in each step and the sequence number of each step, including: before each step begins, acquiring the initial air temperature and initial air humidity at the operation location of each step, and determining whether the air conditioning equipment at the operation location of each step needs to be turned on; if there is a target operation location where the air conditioning equipment needs to be turned on, then after turning on the air conditioning equipment at the target operation location and waiting for the air temperature and air humidity to meet preset conditions, the step corresponding to the target operation location is executed, and the air temperature and air humidity at multiple times are acquired; the processing environment impact score is determined based on the air temperature and air humidity at multiple times and the sequence number of each step.

[0048] According to one embodiment of the present invention, before each step begins, a preset temperature and preset humidity can be set for the operating position of each step. If the relative deviation between the initial air temperature and the preset temperature is detected to be greater than or equal to a preset temperature deviation threshold, or the relative deviation between the dehumidified air humidity and the preset humidity is greater than or equal to a preset humidity deviation threshold, it is determined that the air conditioning equipment needs to be turned on. The operating position where the air conditioning equipment needs to be turned on is the target operating position. The air conditioning equipment can be turned on so that the relative deviation between the air humidity and the preset humidity at the target operating position is less than the preset humidity deviation threshold, and the relative deviation between the air temperature and the preset temperature at the target operating position is less than the preset temperature deviation threshold, that is, the preset conditions are met. Then, the step corresponding to the target operating position is executed, so that at the time the step begins execution, the air humidity and air temperature meet the preset conditions. Subsequently, during the execution of the steps, the air temperature and air humidity may change, for example, deviating from the preset temperature and preset humidity again. Therefore, the air temperature and air humidity at the operating position of each step can be continuously monitored to determine the impact of air temperature and air humidity on chip quality and obtain a processing environment impact score.

[0049] According to one embodiment of the present invention, a processing environment impact score is determined based on air temperature and humidity at multiple times and the sequence number of each step, including: determining the processing environment impact score S according to formula (1). E ,

[0050]

[0051] Among them, T i,j Let T be the air temperature detected at time j during the i-th step. i,p n is the preset temperature for the operation position of the i-th step. i T represents the number of time points in the process of the i-th step. i,j-1 The air temperature detected at the (j-1)th time during the i-th step, Ni Let α be the sequence number of the i-th step. i H is the temperature weight for the i-th step. i,j H represents the air humidity detected at the j-th moment during the i-th step. i,p H is the preset humidity for the operation position in the i-th step. i,j-1 Let β be the air humidity detected at time j-1 during the i-th step. i Let w be the humidity weight for the i-th step, N be the number of steps in chip manufacturing and assembly, and w be the humidity weight for the i-th step. T and w H The preset weights are defined, and max(*) is the function to find the maximum value, where i, j, and n are the weights. i , N and N i All are positive integers.

[0052] According to an embodiment of the present invention, in formula (1), Let be the relative deviation between the air temperature detected at time j during the i-th step and the preset temperature of the operation position in the i-th step. Since both higher and lower detected air temperatures may affect chip quality, the absolute value of this relative deviation can be obtained to represent the impact of the relative deviation between the detected air temperature and the preset temperature. This represents the average value of the impact caused by the relative deviation between the air temperature detected at multiple times in the i-th step and the preset temperature. This represents the relative change between the deviation between the air temperature detected at time j and the preset temperature of the operating position in step i, and the deviation between the air temperature detected at time j-1 and the preset temperature of the operating position in step i. Specifically, if the deviation between the air temperature detected at time j and the preset temperature is greater than the deviation detected at time j-1, then this term is larger. Therefore, this relative change can be used to represent the trend of the deviation. If the trend of the deviation is increasing, then the value of this term increases, indicating that the deviation between the air temperature and the preset temperature is becoming larger, and the impact on chip quality is also greater. The average value of this term can be calculated. The average value is used to represent the impact of the deviation between the air temperature and the preset temperature. Further, the maximum of the two average values ​​can be taken as the impact of the temperature deviation between the air temperature and the preset temperature on the chip quality in the i-th step.

[0053] According to one embodiment of the present invention, This can be used as part of the weighting of the impact of the temperature deviation from the preset temperature in the i-th step on chip quality. Since a smaller step number indicates an earlier step and an earlier exposure to environmental influences, the environmental impact on chip quality in that step is more likely to accumulate in subsequent steps, thus having a greater impact on chip quality. Therefore, steps with smaller step numbers can be assigned a higher weight to the impact of the temperature deviation from the preset temperature on chip quality; that is, this item can be used as part of the weighting of the impact of the temperature deviation from the preset temperature in the i-th step on chip quality. In other words, this item can be used as a sequence weight. On the other hand, the temperature requirements for each step are different. Some steps have strict temperature requirements, such as photolithography, while others have lower requirements, such as packaging. Therefore, temperature weights can be set for each step; that is, higher temperature weights are assigned to steps with strict temperature requirements, and lower temperature weights are assigned to steps with lower requirements. The specific values ​​of the temperature weights can be determined through expert experience. The product of the sequence weight and the temperature weight can be used as the weighting of the impact of the temperature deviation from the preset temperature in the i-th step on chip quality. A temperature impact score can be obtained by weighted averaging the effects of temperature deviations from the preset temperature in each step on chip quality.

[0054] According to one embodiment of the present invention, a humidity effect score can be obtained similarly to the temperature effect score. By weighting and summing the temperature and humidity impact scores, a processing environment impact score can be obtained, which can be used to describe the impact of air temperature and humidity at each step of the operation on chip quality.

[0055] In this way, the average value of the relative deviation between the detected air temperature and the preset temperature at multiple moments, as well as the average value of the change in the deviation between the air temperature and the preset temperature, can be obtained. The maximum value of these two values ​​is used to describe the impact of the temperature deviation on chip quality. Temperature weights can be set based on the different temperature requirements of each step, and sequence weights can be set based on the fact that the influence of earlier steps tends to accumulate and have a greater impact on chip quality in subsequent steps. Thus, a temperature influence score can be obtained. Similarly, a humidity influence score can be obtained, and the processing environment influence score is obtained after weighted summation. This accurately and objectively describes the impact of air temperature and humidity environment at each step's operating position on chip quality.

[0056] According to one embodiment of the present invention, in step S105, the cleanliness of the air also has a certain impact on some steps. Therefore, steps such as photolithography, ion implantation, and thin film deposition have high requirements for air cleanliness to reduce the impact of pollutants such as particulate matter in the air on these steps. In addition, air humidity may also affect the adhesion of particulate matter in the air. For example, if the air humidity is too low, that is, the air is too dry, static electricity is easily generated, causing particulate matter in the air to easily adhere to the chip, affecting the chip quality.

[0057] According to one embodiment of the present invention, a cleanliness impact score is determined based on air humidity, air cleanliness detected at multiple times in each step and the sequence number of each step, including: sampling and testing the silicon dioxide layer on the wafer surface to determine a first relationship function between the layer air humidity and the electrostatic voltage and electrostatic half-life generated by the silicon dioxide; setting a lower limit for air humidity; and determining a cleanliness impact score based on the first relationship function, the lower limit for air humidity, the air humidity, the air cleanliness, and the sequence number of each step.

[0058] According to one embodiment of the present invention, as described above, if the air humidity is too low, static electricity may be generated, which makes it easy for particulate matter in the air to adhere to the chip and affect the chip quality. Different materials have different degrees of difficulty in generating static electricity under the same environmental conditions. Here, only the silicon dioxide layer on the wafer surface is sampled and tested to determine whether the silicon dioxide layer is easy to generate static electricity and whether it is easy to adsorb particulate matter.

[0059] According to one embodiment of the present invention, sampling and testing a silicon dioxide layer on a wafer surface to determine a first relationship function between the layer air humidity and the electrostatic voltage and electrostatic half-life generated by the silicon dioxide includes: setting a test humidity of the test environment; rubbing a sampled silicon dioxide layer using a preset friction force and a preset friction speed, and detecting the test electrostatic voltage generated by the silicon dioxide layer sample; monitoring the test electrostatic voltage and determining the half-life of the test electrostatic voltage; and obtaining the first relationship function based on the test humidity, the test electrostatic voltage, and the half-life of the test electrostatic voltage.

[0060] According to one embodiment of the present invention, after setting the test humidity of the environment, two silica layer samples can be rubbed together with a preset friction force and a preset friction speed. After the rubbing action continues for a preset duration, the electrostatic voltage generated by either silica layer sample is measured to determine the electrostatic voltage at the end of the rubbing action. The electrostatic voltage is continuously monitored until it drops to half of the test electrostatic voltage, and the time interval between this moment and the end of the rubbing action is recorded as the half-life of the test electrostatic voltage. Multiple tests can be performed according to the above steps. In each test, only the test humidity of the test environment is adjusted, and the test electrostatic voltage and the half-life of the test electrostatic voltage are recorded in each test.

[0061] According to one embodiment of the present invention, obtaining a first relationship function based on the test humidity, the test electrostatic voltage, and the half-life of the test electrostatic voltage includes: determining a first set of undetermined coefficient equations for the first relationship function according to formula (2).

[0062]

[0063] Among them, V test To test the electrostatic voltage, Δt test To test the half-life of electrostatic voltage, H test For testing humidity, θ1, θ2, θ3, and θ4 are undetermined coefficients; based on the test humidity, test electrostatic voltage, and the half-life of the test electrostatic voltage from multiple tests, the undetermined coefficients are solved to obtain the solution values ​​of the undetermined coefficients; based on the solution values ​​of the undetermined coefficients and the first set of equations for the undetermined coefficients, the first relational function is obtained.

[0064] According to one embodiment of the present invention, both the test electrostatic voltage and the half-life of the test electrostatic voltage are inversely correlated with the test humidity. That is, the lower the test humidity of the test environment, the drier the air, and the easier it is to generate static electricity. Under such circumstances, it is easy to cause the accumulation of charge and generate static electricity with a higher voltage. In other words, the test electrostatic voltage is higher. Furthermore, the low moisture content in the air makes it difficult for the generated charge to be captured and neutralized by water molecules, making the charge easier to accumulate and less easy to dissipate. That is, the half-life of the test electrostatic voltage is longer.

[0065] According to an embodiment of the present invention, based on the above analysis, a first set of equations with undetermined coefficients can be set in formula (2) to represent the inverse correlation between the test electrostatic voltage and humidity, and the inverse correlation between the half-life of the test electrostatic voltage, respectively. Both equations in the first set of equations with undetermined coefficients are univariate linear equations, thus allowing the relationship between the test electrostatic voltage and humidity, and the relationship between the half-life of the test electrostatic voltage, to be described by a simple linear relationship. For example, the solution values ​​of θ1 and θ3 are negative, thereby representing the aforementioned inverse correlation.

[0066] According to one embodiment of the present invention, the undetermined coefficients in the two univariate linear equations of the first set of undetermined coefficient equations can be solved by using the test humidity set during multiple tests, as well as the measured test electrostatic voltage and the half-life of the test electrostatic voltage, to obtain the solution values ​​of the undetermined coefficients. For example, the solution values ​​of the undetermined coefficients can be obtained by fitting. The solution values ​​of the undetermined coefficients are then substituted into the first set of undetermined coefficient equations to obtain the first relational function.

[0067] In this way, the first set of equations with undetermined coefficients for the first relational function can be set based on the inverse correlation between air humidity and electrostatic voltage and the half-life of electrostatic voltage. The first set of undetermined coefficients can be solved by setting the air humidity and measuring the electrostatic voltage and the half-life of electrostatic voltage during multiple tests, thereby obtaining the first relational function. This function can concisely and accurately represent the state of electrostatic generation of the silicon dioxide layer under specific air humidity conditions and its ease of adsorbing particulate matter, thus accurately expressing the impact of air cleanliness and humidity on chip quality.

[0068] According to one embodiment of the present invention, after determining the first relationship function, the lower limit of air humidity can be determined. If the measured air humidity is lower than the lower limit of air humidity, it is easier to generate static electricity and adsorb particulate matter in the air, thereby affecting the chip quality.

[0069] According to an embodiment of the present invention, a cleanliness impact score is determined based on the first relational function, the lower limit of air humidity, the air humidity, the air cleanliness, and the sequence number of each step, including: determining the cleanliness impact score S according to formula (3). C ,

[0070]

[0071] Among them, C i,j Let Cx be the air cleanliness detected at time j during the i-th step. ,p H is the air cleanliness threshold for the operation position in the i-th step. i,j V represents the air humidity detected at the j-th moment during the i-th step. maxTo preset the maximum electrostatic voltage, Δt max To preset the maximum electrostatic half-life, H min θ is the lower limit of air humidity. 1,F Let θ1 be the solution value, and θ be the solution value. 2,F Let θ be the solution value of θ2, θ 3,F Let θ3 be the solution value, and θ be the solution value. 4,F Let γ be the solution value of θ4. i Let n be the cleanliness weight for the i-th step. i N represents the number of time points in the process of the i-th step. i Let i be the sequence number of the i-th step, N be the number of steps in chip manufacturing and assembly, and if[*] be a conditional function, where i, j, and n are the steps. i , N and N i All are positive integers.

[0072] According to one embodiment of the present invention, in formula (3), This is the ratio between the air cleanliness detected at time j during the i-th step and the air cleanliness threshold at the operation position of the i-th step. The larger this ratio is, the more particulate matter there is in the air at time j during the i-th step, and the more likely it is to affect the chip quality. Let H be a conditional function, and let its value be such that the condition H is satisfied. i,j ≤H min In the case of Otherwise, the conditional function has a value of 1. That is, if the air humidity detected at time j during the i-th step is lower than or equal to the lower limit of air humidity, the air is relatively dry, more prone to static electricity generation, and more likely to adsorb particulate matter from the air. Furthermore, the higher the static voltage, the easier it is to adsorb more particulate matter; the longer the half-life of the static voltage, the longer the static electricity exists, and the easier it is to adsorb more particulate matter. Under this condition, the effect of air humidity is... In other words, due to the ease with which static electricity is generated and particulate matter is easily adsorbed, the factors affecting chip quality are more pronounced compared to conditions with higher air humidity. Where, θ 1,F H i,j +θ 2,F The electrostatic voltage generated on the silicon dioxide layer of the wafer surface, determined based on a first relational function, is represented by the ratio of this electrostatic voltage to a preset maximum electrostatic voltage (e.g., the maximum test electrostatic voltage generated in each test is used as the preset maximum electrostatic voltage). θ represents the additive effect of the electrostatic voltage on the adsorbed particulate matter. 3,F H i,j +θ 4,FThe half-life of the electrostatic voltage generated on the silicon dioxide layer of the wafer surface, determined based on the first relational function, is represented by the ratio of this half-life to a preset maximum electrostatic half-life (e.g., the maximum half-life of the test electrostatic voltage generated in each test is used as the preset maximum electrostatic half-life). This ratio represents the additive effect of the electrostatic half-life on adsorbed particulate matter. Multiplying these two additive effects gives the additional impact of low air humidity on chip quality. The sum of 1 and this additional impact represents the impact of low air humidity on chip quality. If the air humidity detected at time j during the i-th step is higher than the lower limit of air humidity, it indicates that the air humidity is within a reasonable range, and the impact of air humidity on chip quality is also within an acceptable range, with no additional impact. Therefore, the conditional function is 1. Thus, the above conditional function can represent the effect of electrostatic discharge caused by air humidity on adsorbed particulate matter, or it can represent the impact of air humidity on chip quality. The conditional function value can be used as... By assigning weights to the values ​​and performing a weighted average, the impact of air cleanliness and humidity measured in the i-th step on chip quality can be obtained.

[0073] According to one embodiment of the present invention, different steps have different requirements for air cleanliness. A higher cleanliness weight can be set for steps with higher air cleanliness requirements. The setting method is similar to the setting method of temperature weight, and will not be described in detail here. The meaning of is as described above and will not be repeated here. The cleanliness weight and The product of the two values ​​is used as the weight of the impact of air cleanliness and humidity measured in the i-th step on chip quality. A weighted average is then performed to obtain a cleanliness impact score, which is used to represent the overall impact of air cleanliness and humidity at the operation location of each step on chip quality.

[0074] This method allows us to determine the impact of air humidity on the static electricity generated by the silicon dioxide layer on the wafer surface, and the effect of static electricity on the adsorption of airborne particles, thereby identifying the additional impact of air humidity on chip quality. It also allows us to determine the impact of air cleanliness on chip quality, and ultimately, to jointly determine the overall impact of airborne particles on chip quality from both air cleanliness and air humidity perspectives, improving the accuracy and objectivity of cleanliness impact scoring.

[0075] According to an embodiment of the present invention, in step S106, during the chip manufacturing and assembly process, vibration may also affect the chip's processing accuracy and quality. Furthermore, different steps have different requirements for vibration resistance. For example, the photolithography step has higher requirements for vibration resistance, while the packaging and other steps have lower requirements for vibration resistance. Therefore, the impact of vibration occurring during the manufacturing and assembly process on chip quality can be determined based on the vibration resistance requirements of different steps.

[0076] According to an embodiment of the present invention, a vibration impact score is determined based on vibration data detected at multiple times in each step and the sequence number of each step, including: determining the processing impact effect score S according to formula (4). V ,

[0077]

[0078] Among them, A i,j Let A be the amplitude of the vibration data detected at the j-th moment during the i-th step. i,max δ is the preset maximum amplitude value for the i-th step. i Let n be the vibration weight for the i-th step. i N represents the number of time points in the process of the i-th step. i Let i be the sequence number of the i-th step, N be the number of steps in chip manufacturing and assembly, and max(*) be the function to find the maximum value. i , N and N i All are positive integers.

[0079] According to one embodiment of the present invention, a maximum allowable amplitude value can be set for each step as a preset maximum amplitude value for each step, and the ratio of the amplitude of the vibration data detected at each moment to the preset maximum amplitude value can be determined. The maximum value of this ratio at multiple moments can then be calculated to describe the impact of vibration on the chip's processing accuracy in that step. Furthermore, vibration weights can be set. Different steps have different requirements for vibration resistance; higher vibration weights can be set for steps with higher vibration resistance requirements. The setting method is similar to that of temperature weights and will not be described further here. The meaning of is as described above and will not be repeated here. The vibration weight and The product of the values ​​is used as the weight of the influence of the maximum vibration value measured in the i-th step on the chip processing accuracy in that step, and a weighted average is performed to obtain a vibration influence score, which is used to represent the overall influence of vibration at the operation position of each step on the chip quality.

[0080] In this way, the impact of vibration on the chip's processing accuracy in each step can be described by the ratio between the maximum vibration value detected during each step and the preset maximum amplitude value. Then, the impact is weighted and summed based on the vibration weight and the sequence weight to obtain a vibration impact score, thereby accurately and objectively describing the overall impact of vibration at the operation position of each step on the chip quality.

[0081] According to an embodiment of the present invention, in step S107, the processing environment impact score, cleanliness impact score and vibration impact score obtained above can be weighted and summed to obtain the processing impact effect score, thereby describing the overall impact of various environmental factors on the processing quality of the chip.

[0082] According to one embodiment of the present invention, in step S108, if the processing impact effect score is higher than a preset impact threshold, multiple chips belonging to the same wafer are transferred to a first test partition. Since the processing impact effect score is high, these chips are more susceptible to environmental influences and have a higher probability of quality problems. Therefore, the chips in the first test partition can be subjected to individual quality tests. Chips that pass the test can be used as chip products; those that fail are recycled as defective products. If the processing impact effect score is lower than or equal to the preset impact threshold, multiple chips belonging to the same wafer are transferred to a second test partition. Since the chips in the second test partition are less affected by environmental factors and have a lower probability of quality problems, the chips in the second test partition can be sampled for testing. If the sampling test passes, all chips in the second test partition are used as chip products.

[0083] According to one embodiment of the present invention, in step S109, after completing the above test, multiple chip products can be obtained, and the chip products can be considered to be qualified chips.

[0084] According to an embodiment of the chip manufacturing assembly parameter control method of the present invention, environmental monitoring points can be set at the operation positions of each step to detect air cleanliness, air temperature, air humidity, and vibration data at each operation position. Based on the environmental requirements of each step, a processing environment impact score, a cleanliness impact score, and a vibration impact score are determined. This allows for a multi-faceted assessment of the environmental impact of each step on processing quality. Chips with significant environmental impact are then transferred to a first testing zone for comprehensive testing, facilitating a thorough understanding of chip quality and improving chip yield. When determining the temperature impact score, the average value of the impact caused by the relative deviation between the detected air temperature and the preset temperature at multiple times, as well as the average value of the impact caused by the change in the deviation between the air temperature and the preset temperature, can be obtained. The maximum value of these two values ​​is used to describe the impact of the temperature deviation on chip quality. Temperature weights can be set based on the different temperature requirements of each step, and sequence weights can be set based on the fact that the impact of earlier steps tends to accumulate and have a greater impact on chip quality in subsequent steps. Thus, a temperature impact score can be obtained. Similarly, a humidity impact score can be obtained, and the processing environment impact score is obtained after weighted summation. This accurately and objectively describes the impact of the air temperature and humidity environment at each step's operating location on chip quality. When determining the first relationship function, a set of equations for the first undetermined coefficients can be set based on the inverse correlation between air humidity and electrostatic voltage and its half-life. These undetermined coefficients are then solved using air humidity settings and measured electrostatic voltage and its half-life during multiple tests to obtain the first relationship function. This function concisely and accurately represents the electrostatic activity of the silicon dioxide layer under specific air humidity conditions and its susceptibility to particulate matter adsorption, thus accurately expressing the impact of air cleanliness and humidity on chip quality. When determining the cleanliness impact score, the influence of air humidity on the electrostatic activity generated by the silicon dioxide layer on the wafer surface, and the influence of electrostatic activity on the adsorption of airborne particulate matter, can be determined. This identifies the additional impact of air humidity on the chip quality caused by airborne particulate matter. Furthermore, the impact of air cleanliness on chip quality can be determined. Therefore, the overall impact of airborne particulate matter on chip quality can be determined jointly from both air cleanliness and air humidity perspectives, improving the accuracy and objectivity of the cleanliness impact score. When determining the processing impact score, the impact of vibration on the chip processing accuracy in each step can be described by the ratio between the maximum vibration value detected during each step and the preset maximum amplitude value. Then, the impact is weighted and summed based on the vibration weight and the sequence weight to obtain the vibration impact score, thereby accurately and objectively describing the overall impact of vibration at the operation position of each step on the chip quality.

[0085] Figure 2An exemplary block diagram of a chip manufacturing assembly parameter control system according to an embodiment of the present invention is shown, the system comprising:

[0086] The sequence number module is used to set sequence numbers for multiple steps in chip production and assembly according to the order of chip production and assembly.

[0087] The module is used to set environmental monitoring points at the operation locations of each production assembly step, wherein the environmental monitoring points are used to detect air cleanliness, air temperature, air humidity and vibration data;

[0088] The detection module is used to determine the air cleanliness, air temperature, air humidity, and vibration data detected at multiple moments during the production and assembly process of multiple chips belonging to the same wafer at various environmental monitoring points.

[0089] The processing environment impact assessment module is used to determine the processing environment impact score based on the air temperature, air humidity detected at multiple times in each step and the sequence number of each step.

[0090] The cleanliness impact scoring module is used to determine the cleanliness impact score based on the air humidity, air cleanliness detected at multiple times in each step and the sequence number of each step.

[0091] The vibration impact scoring module is used to determine the vibration impact score based on the vibration data detected at multiple times in each step and the sequence number of each step.

[0092] The processing impact effect scoring module is used to determine the processing impact effect score based on the processing environment impact score, the cleanliness impact score, and the vibration impact score.

[0093] The testing module is used to transfer multiple chips belonging to the same wafer to a first testing partition if the processing impact score is higher than a preset impact threshold; otherwise, it transfers multiple chips belonging to the same wafer to a second testing partition. The chips in the first testing partition are subjected to individual quality testing, while the chips in the second testing partition are subjected to sampling quality testing.

[0094] The product module is used to obtain multiple chip products after testing is completed.

[0095] Those skilled in the art should understand that the embodiments of the present invention described above and shown in the accompanying drawings are merely examples and do not limit the present invention. The objectives of the present invention have been fully and effectively achieved. The functions and structural principles of the present invention have been demonstrated and explained in the embodiments, and any variations or modifications may be made to the implementation of the present invention without departing from the stated principles.

[0096] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for controlling assembly parameters in chip manufacturing, characterized in that, include: Assign sequence numbers to multiple steps in chip manufacturing and assembly, based on the order of chip production and assembly. Environmental monitoring points are set at the operation locations of each production assembly step, wherein the environmental monitoring points are used to detect air cleanliness, air temperature, air humidity and vibration data; The environmental monitoring points at various points in the production and assembly process of multiple chips belonging to the same wafer were identified to detect air cleanliness, air temperature, air humidity, and vibration data at multiple moments during the process. The processing environment impact score is determined based on the air temperature and humidity detected at multiple times in each step and the sequence number of each step. The cleanliness impact score is determined based on the air humidity, air cleanliness detected at multiple times in each step, and the sequence number of each step. Based on the vibration data detected at multiple moments in each step and the sequence number of each step, the vibration impact score is determined. The processing impact score is determined based on the processing environment impact score, the cleanliness impact score, and the vibration impact score. If the processing impact score is higher than the preset impact threshold, the multiple chips belonging to the same wafer are transferred to the first test partition; otherwise, the multiple chips belonging to the same wafer are transferred to the second test partition. The chips in the first test partition are subjected to individual quality testing, while the chips in the second test partition are subjected to sampling quality testing. After the testing was completed, multiple chip products were obtained; Based on vibration data detected at multiple moments in each step and the sequence number of each step, a vibration impact score is determined, including: According to the formula Determine the processing effect score S V , where A i,j Let A be the amplitude of the vibration data detected at the j-th moment during the i-th step. i,max δ is the preset maximum amplitude value for the i-th step. i Let n be the vibration weight for the i-th step. i N represents the number of time points in the process of the i-th step. i Let i be the sequence number of the i-th step, N be the number of steps in chip manufacturing and assembly, and max(*) be the function to find the maximum value. i , N and N i All are positive integers.

2. The chip manufacturing assembly parameter control method according to claim 1, characterized in that, Based on the air temperature and humidity detected at multiple times during each step, and the sequence number of each step, a processing environment impact score is determined, including: Before each step begins, obtain the initial air temperature and initial air humidity at the operation location of each step, and determine whether the air conditioning equipment at the operation location of each step needs to be turned on. If there is a target operating location where the air conditioning equipment needs to be turned on, after turning on the air conditioning equipment at the target operating location and waiting for the air temperature and air humidity to meet the preset conditions, the steps corresponding to the target operating location will be executed, and the air temperature and air humidity at multiple times will be obtained. The environmental impact score for processing is determined based on air temperature and humidity at multiple times and the sequence number of each step.

3. The chip manufacturing assembly parameter control method according to claim 2, characterized in that, Based on air temperature and humidity at multiple times, and the sequence number of each step, the environmental impact score for the processing is determined, including: According to the formula Determine the environmental impact score S for processing E , among which, T i,j Let T be the air temperature detected at time j during the i-th step. i,p n is the preset temperature for the operation position of the i-th step. i T represents the number of time points in the process of the i-th step. i,j-1 The air temperature detected at the (j-1)th time during the i-th step, N i Let α be the sequence number of the i-th step. i H is the temperature weight for the i-th step. i,j H represents the air humidity detected at the j-th moment during the i-th step. i,p H is the preset humidity for the operation position in the i-th step. i,j-1 Let β be the air humidity detected at time j-1 during the i-th step. i Let w be the humidity weight for the i-th step, N be the number of steps in chip manufacturing and assembly, and w be the humidity weight for the i-th step. T and w H The preset weights are defined, and max(*) is the function to find the maximum value, where i, j, and n are the weights. i , N and N i All are positive integers.

4. The chip manufacturing assembly parameter control method according to claim 1, characterized in that, Based on the air humidity and air cleanliness detected at multiple times during each step, and the sequence number of each step, a cleanliness impact score is determined, including: The silicon dioxide layer on the wafer surface was sampled and tested to determine the first functional relationship between the layer air humidity and the electrostatic voltage and electrostatic half-life generated by the silicon dioxide. Set a lower limit for air humidity; The cleanliness impact score is determined based on the first relational function, the lower limit of air humidity, the air humidity, the air cleanliness, and the sequence number of each step.

5. The chip manufacturing assembly parameter control method according to claim 4, characterized in that, Sampling and testing of the silicon dioxide layer on the wafer surface were performed to determine the first functional relationship between the layer's air humidity and the electrostatic voltage and electrostatic half-life generated by the silicon dioxide, including: Set the test humidity of the test environment; Using preset friction force and preset friction speed, the sampled silica layer is rubbed, and the electrostatic voltage generated by the silica layer sample is detected. The test electrostatic voltage is monitored to determine its half-life; A first relationship function is obtained based on the test humidity, the test electrostatic voltage, and the half-life of the test electrostatic voltage.

6. The chip manufacturing assembly parameter control method according to claim 5, characterized in that, Based on the test humidity, the test electrostatic voltage, and the half-life of the test electrostatic voltage, a first relationship function is obtained, including: According to the formula Determine the first system of equations with undetermined coefficients for the first relational function, where V test To test the electrostatic voltage, Δt test To test the half-life of electrostatic voltage, H test For humidity testing, θ1, θ2, θ3, and θ4 are coefficients to be determined; Based on the test humidity, test electrostatic voltage, and test electrostatic voltage half-life from multiple tests, the undetermined coefficients are solved to obtain the solution values ​​of the undetermined coefficients. Based on the solved values ​​of the undetermined coefficients and the first set of equations with undetermined coefficients, a first relational function is obtained.

7. The chip manufacturing assembly parameter control method according to claim 6, characterized in that, Based on the first relational function, the lower limit of air humidity, the air humidity, the air cleanliness, and the sequence number of each step, the cleanliness impact score is determined, including: According to the formula Determine the impact of cleanliness on the score S C Among them, C i,j Let C be the air cleanliness detected at time j during the i-th step. i,p H is the air cleanliness threshold for the operation position in the i-th step. i,j V represents the air humidity detected at the j-th moment during the i-th step. max To preset the maximum electrostatic voltage, Δt max To preset the maximum electrostatic half-life, H min θ is the lower limit of air humidity. 1,F Let θ1 be the solution value, and θ be the solution value. 2,F Let θ be the solution value of θ2, θ 3,F Let θ3 be the solution value, and θ be the solution value. 4,F Let γ be the solution value of θ4. i Let n be the cleanliness weight for the i-th step. i N represents the number of time points in the process of the i-th step. i Let i be the sequence number of the i-th step, N be the number of steps in chip manufacturing and assembly, and if[*] be a conditional function, where i, j, and n are the steps. i , N and N i All are positive integers.

8. A chip manufacturing assembly parameter control system, characterized in that, include: The sequence number module is used to set sequence numbers for multiple steps in chip production and assembly according to the order of chip production and assembly. The module is used to set environmental monitoring points at the operation locations of each production assembly step, wherein the environmental monitoring points are used to detect air cleanliness, air temperature, air humidity and vibration data; The detection module is used to determine the air cleanliness, air temperature, air humidity, and vibration data detected at multiple moments during the production and assembly process of multiple chips belonging to the same wafer at various environmental monitoring points. The processing environment impact assessment module is used to determine the processing environment impact assessment based on the air temperature, air humidity detected at multiple times in each step and the sequence number of each step. The cleanliness impact scoring module is used to determine the cleanliness impact score based on the air humidity, air cleanliness detected at multiple times in each step and the sequence number of each step. The vibration impact scoring module is used to determine the vibration impact score based on the vibration data detected at multiple times in each step and the sequence number of each step. The processing impact effect scoring module is used to determine the processing impact effect score based on the processing environment impact score, the cleanliness impact score, and the vibration impact score. The testing module is used to transfer multiple chips belonging to the same wafer to a first testing partition if the processing impact score is higher than a preset impact threshold; otherwise, it transfers multiple chips belonging to the same wafer to a second testing partition. The chips in the first testing partition are subjected to individual quality testing, while the chips in the second testing partition are subjected to sampling quality testing. The product module is used to obtain multiple chip products after testing is completed; Based on vibration data detected at multiple moments in each step and the sequence number of each step, a vibration impact score is determined, including: According to the formula Determine the processing effect score S V , where A i,j Let A be the amplitude of the vibration data detected at the j-th moment during the i-th step. i,max δ is the preset maximum amplitude value for the i-th step. i Let n be the vibration weight for the i-th step. i N represents the number of time points in the process of the i-th step. i Let i be the sequence number of the i-th step, N be the number of steps in chip manufacturing and assembly, and max(*) be the function to find the maximum value. i , N and N i All are positive integers.

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