Wafer acceptance test substrate

Abstract

The embodiment of the invention provides a wafer acceptance test substrate, which mainly comprises an upper ceramic substrate and a lower ceramic substrate, and a circuit substrate is arranged between the upper ceramic substrate and the lower ceramic substrate to form a test substrate; therefore, the substrate is applied to a semiconductor process and a leakage current test in a wafer acceptance test process before a wafer enters the process, the flatness of the ceramic substrate is high, impedance and leakage current generated during detection can be reduced, wafer quality detection is improved, and the quality and stability of the wafer manufacturing process are ensured.

Description

Technical Field

[0001] The present application relates to the field of testing substrates, and in particular to a substrate used for detecting electrical parameters of a wafer. Background Art

[0002] The manufacturing process of the semiconductor industry can be divided into four major steps: IC design, wafer processing, wafer testing and wafer packaging. The so-called wafer testing step is to test the electrical characteristics of each die on the wafer to detect and eliminate unqualified die on the wafer.

[0003] See also Figure 1 As shown, wafers need to undergo "wafer acceptance testing" (WAT) as needed before entering the complex semiconductor process chip manufacturing process and during the chip manufacturing process. This is mainly done before the wafer enters the semiconductor process chip production process. According to the characteristics of the final product, the wafer thickness and electrical properties will be adjusted. The purpose of WAT is to test the electrical parameters of specific test structures on the wafer (including leakage current / voltage / resistance / capacitance and other characteristic tests), detect the process conditions of each wafer product, evaluate the quality and stability of the semiconductor manufacturing process, and determine whether the wafer product meets the specifications for entering semiconductor process production. In addition, WAT data can also reflect the actual production conditions of the production line. By collecting and analyzing WAT data, the production line conditions can be monitored, and the trend of production line changes can be determined, and warnings for possible situations can be issued.

[0004] When the raw material wafer is put into production, it enters the extremely complex semiconductor process, and various WATs are also required in the process. When performing wafer testing, the initial wafer is placed on a chip leakage current test substrate (Probe Card) made of a specific printed circuit board, and the substrate is connected to the test system. After selecting the required leakage current measurement method, the leakage current characteristics of the wafer are measured. The traditional wafer test substrate is made of epoxy resin material mixed with glass fiber as the base material, and the test substrate is made according to a specific circuit pattern using printed circuit technology. However, in the long-term use process in the industry, it is found that the test substrate has the following defects:

[0005] 1. High impedance - The substrate made of epoxy resin mixed with glass fiber will produce a high impedance of about 5Ω.

[0006] 2. High leakage current (Ground and Power ≦ 60nA; Trace ≦ 15nA)

[0007] 3. The substrate is warped and has poor flatness (0.15-0.25mil / inch).

[0008] Therefore, the inventor, based on his rich experience in design, development and actual production in the relevant industry for many years, has further developed and researched in the spirit of continuous improvement, and has specially provided a wafer acceptance test substrate in order to achieve the purpose of having better practical value. Summary of the invention

[0009] The main purpose of the present application is to provide a wafer acceptance test substrate, in particular, a substrate technology used to detect wafer electrical parameters, and its purpose is to effectively reduce detection errors by using a test substrate with a ceramic material as the base material.

[0010] The main purpose and function of the wafer acceptance test substrate of this application are achieved by the following specific technical means.

[0011] It mainly includes an upper ceramic substrate and a lower ceramic substrate, and a circuit substrate is arranged between the upper and lower ceramic substrates to form a test substrate; thereby, the substrate is used in semiconductor technology to perform leakage current testing in a wafer acceptance test process before the wafer enters the process. The ceramic substrate has high flatness, which can reduce the impedance and leakage current generated during testing. At the same time, it can provide a variety of high and low impedance leakage current tests to improve wafer quality testing and ensure the quality and stability of the wafer manufacturing process.

[0012] A preferred embodiment of the wafer acceptance test substrate of the present application, wherein the circuit substrate is made by printed circuit technology.

[0013] In a preferred embodiment of the wafer acceptance test substrate of the present application, the upper and lower ceramic substrates are made of a ceramic material selected from metal oxides, metal nitrides, metal carbides, borides, and silicides; among which aluminum oxide, zirconium oxide, silicon carbide, and silicon nitride are the best. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0015] Figure 1 It is a three-dimensional exploded schematic diagram in an embodiment of the present application;

[0016] Figure 2 is a schematic top view of a ceramic substrate in an embodiment of the present application;

[0017] Figure 3 is a schematic top view of a circuit substrate in an embodiment of the present application;

[0018] Figure 4 Schematic diagram of the wafer process in the embodiment of the present application.

[0019] [Explanation of symbols]

[0020] 1: Test substrate

[0021] 11: Circuit board

[0022] 111: Circuit Graphics

[0023] 12: Ceramic substrate

[0024] 121: Upper conductor

[0025] 13: Lower ceramic substrate

[0026] 131: Lower conductor DETAILED DESCRIPTION

[0027] In order to make the technical content, invention purpose and effect achieved by this application more complete and clear, it is described in detail below, and please refer to the disclosed drawings and figure numbers:

[0028] First, please refer to the actual application technology and means of this application. Figures 2 to 3 As shown, it is a three-dimensional decomposition and top view schematic diagram of the wafer acceptance test substrate of the present application, which is mainly used for carrying and conducting leakage current test on a test substrate of a wafer acceptance test process before the wafer enters the semiconductor process, wherein the test substrate (1) comprises:

[0029] A circuit substrate (11) having a circuit pattern (111) for testing printed thereon using printed circuit technology;

[0030] An upper ceramic substrate (12) is made of ceramic material and covers and is bonded to the upper end surface of the circuit substrate (11); an upper conductive wire portion (121) that is interconnected is provided inside the upper ceramic substrate (12) corresponding to the circuit pattern (111) of the circuit substrate (11);

[0031] A lower ceramic substrate (13) is made of ceramic material and covers and is bonded to the lower end surface of the circuit substrate (11); a lower conductive wire portion (131) that is interconnected is provided inside the lower ceramic substrate (13) corresponding to the circuit pattern (111) of the circuit substrate (11).

[0032] When actually implementing this, please refer to Figures 1 to 4As shown, wafers need to undergo wafer acceptance testing (i.e. wafer IQC acceptance) based on demand before entering the complex semiconductor process chip manufacturing process and during the chip manufacturing process; before the wafer enters the semiconductor process chip production process, it will undergo preliminary processing to adjust the thickness and electrical properties (including leakage rate) of the wafer based on the final product requirements and characteristics. The main purpose of the wafer acceptance test (WAT test) stage is to confirm the basic electrical properties of the wafer before it goes into production, including leakage current / breakdown voltage / resistance / capacitance and other characteristic tests, to ensure that the wafer raw materials for producing chips meet the specifications for entering the semiconductor process cycle.

[0033] When the wafer is put into production, it enters an extremely complex semiconductor process. Various wafer acceptance tests (WAT) will be carried out during the process to ensure that any parameter conditions in the process are correct and to ensure the yield of each process. When the wafer is completed, an electrical inspection (circuit probing) will be carried out on the entire wafer. After the defective wafer products are picked out, they will enter the packaging process and the chip product will be completed after the final inspection.

[0034] However, when performing a wafer acceptance test (WAT) process, the wafer is tested by the test substrate of the present application. The test substrate (1) of the present application covers the circuit substrate (11) with the upper and lower ceramic substrates (12) and (13), and is heated at a temperature of 7 to 8° C., so that the circuit substrate (11) is combined with the upper and lower ceramic substrates (12) and (13). Furthermore, the upper and lower ceramic substrates (12) and (13) are made of a ceramic material selected from metal oxides, metal nitrides, metal carbides, borides and silicides. Among them, aluminum oxide, zirconium oxide, silicon carbide and silicon nitride are the best. The ceramic material has high temperature stability, corrosion resistance, high compressive strength and wear resistance. At the same time, it also has excellent electrical insulation performance, high thermal conductivity, excellent soft soldering and high adhesion strength. It can be etched with various patterns like a circuit board and has a large current carrying capacity. The present application uses a ceramic substrate [experimental group] and a conventional test substrate [control group] using epoxy resin and glass fiber as the base material for comparison. Please refer to the following table:

[0035] The test conditions include:

[0036]

[0037]

[0038] The results of three measurements are:

[0039]

[0040] From the above measurement results, it can be seen that when the measured value [A] is higher, the surface impedance coefficient is better and the leakage current is smaller; therefore, the present application uses the heat dissipation characteristics of the ceramic substrate, and the advantages of the ceramic substrate such as high heat dissipation, low thermal resistance, long life, and voltage resistance, so that the test substrate can achieve high flatness [0.05-0.15mil / inch], which can reduce the impedance [3Ω] and leakage current [Ground and Power <50nA; Trace <10nA] generated during the test. At the same time, it can provide a variety of high and low impedance leakage current tests to improve wafer quality detection and ensure the quality and stability of the wafer manufacturing process.

[0041] Through the above description of the composition and use of the system of the present application, it can be seen that compared with the existing structure, the present application has the following advantages:

[0042] 1. The wafer acceptance test substrate of this application adopts the technology of using ceramic materials in the test substrate, so that the test substrate can achieve high flatness.

[0043] 2. The wafer acceptance test substrate of this application adopts the technology of using ceramic materials in the test substrate, so that the test substrate can effectively reduce the impedance and leakage current generated during the test, thereby improving the wafer quality inspection to ensure the quality and stability of the wafer manufacturing process.

Claims

1. A wafer acceptance test substrate, characterized in that: The test substrate is mainly used to carry and perform leakage current test on the wafer before the wafer enters the semiconductor process. The test substrate includes: A circuit substrate having a circuit pattern for testing printed thereon by printed circuit technology; An upper ceramic substrate, which is made of ceramic material and covers and is combined with the upper end surface of the circuit substrate, and an upper conductive line portion connected to each other is provided inside the upper ceramic substrate corresponding to the circuit pattern of the circuit substrate; A lower ceramic substrate is made of ceramic material and covers and is combined with the lower end surface of the circuit substrate. A lower conductive line portion connected to each other is arranged inside the lower ceramic substrate corresponding to the circuit pattern of the circuit substrate.

2. The wafer acceptance test substrate according to claim 1, characterized in that The circuit substrate and the upper and lower ceramic substrates are heated and combined together at a temperature of 7 to 8°C.

3. The wafer acceptance test substrate according to claim 1 or 2, characterized in that: The circuit substrate is made by printed circuit technology.

4. The wafer acceptance test substrate according to claim 1 or 2, characterized in that: The upper and lower ceramic substrates are made of a ceramic material selected from metal oxide, metal nitride, metal carbide, boride and silicide.

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