Electric injection germanium tin laser chip and manufacturing method thereof

Abstract

The invention belongs to the technical field of lasers, and discloses an electric injection germanium tin laser chip and a manufacturing method thereof. The laser chip comprises the following steps: providing a GOI wafer; forming an epitaxial structure on the surface of the GOI wafer, wherein the epitaxial structure comprises a first electrode layer, a germanium tin active layer and a second electrode layer which are sequentially stacked on the GOI wafer; etching a groove on the epitaxial structure to form a mesa structure; forming a passivation layer on the side wall of the groove; a first opening is formed in the passivation layer located on the first electrode layer, and a bottom electrode is formed in the first opening; and forming a second opening in the passivation layer located on the second electrode layer, and forming a top electrode in the second opening. According to the laser chip, the threshold current density at the interface can be reduced, and the light output performance of the laser is enhanced.

Description

Technical Field

[0001] The present application relates to the field of laser technology, and in particular to an electrically injected germanium-tin laser chip and a manufacturing method thereof. Background Art

[0002] The light source on silicon substrate is the core component of silicon photonic integrated circuits and is crucial to building a complete silicon photonics integrated system. This light source can make up for the shortcomings of silicon-based photonics in active devices, promote the development of silicon photonics from integrating only passive devices to fully integrating active and passive devices at the same time, and realize a true silicon photonic chip. In order to solve the problem of the lack of light source on silicon substrate, researchers proposed to use germanium-tin alloy materials as light-emitting materials. By changing the tin content, the quasi-direct bandgap germanium material can be converted into a direct bandgap germanium-tin material. However, when silicon and germanium are used as substrate materials and buffer layer materials respectively, due to the large number of mismatch defects in the heterogeneous interface formed by germanium and silicon, this situation causes the threshold current density of the electrically injected germanium-tin laser to be at a high level. The high threshold current density seriously restricts the normal operation of the laser at room temperature and has become one of the key factors hindering its further development and wide application. This problem caused by material interface mismatch not only affects the performance of the laser, but also poses severe challenges to the optimization and innovation of subsequent related technologies. Researchers are urgently needed to explore effective solutions for room temperature electrically injected germanium-tin lasers. Summary of the invention

[0003] To this end, the embodiments of the present application provide an electrically injected germanium-tin laser chip and a method for manufacturing the same, which can reduce the threshold current density at the interface and enhance the optical output performance of the laser.

[0004] In a first aspect, the present application provides a method for manufacturing an electrically injected germanium-tin laser chip.

[0005] This application is achieved through the following technical solutions:

[0006] A method for manufacturing an electrically injected germanium-tin laser chip, comprising:

[0007] Providing a GOI wafer;

[0008] forming an epitaxial structure on the surface of the GOI wafer, wherein the epitaxial structure comprises a first electrode layer, a germanium tin active layer and a second electrode layer sequentially stacked on the GOI wafer;

[0009] Etching a groove on the epitaxial structure to form a mesa structure;

[0010] forming a passivation layer on the surface of the mesa structure;

[0011] forming a first opening on the passivation layer located at the first electrode layer, and forming a bottom electrode in the first opening;

[0012] A second opening is formed on the passivation layer located on the second electrode layer, and a top electrode is formed in the second opening.

[0013] In a preferred example of the present application, it can be further configured that an epitaxial structure is formed on the surface of the GOI wafer, including:

[0014] An epitaxial structure is formed on the surface of the GOI wafer, comprising:

[0015] Forming an N-type electrode layer on the surface of the GOI wafer by chemical vapor deposition;

[0016] forming a germanium-tin active layer on the surface of the N-type electrode layer by chemical vapor deposition;

[0017] A P-type electrode layer is formed on the surface of the germanium-tin active layer by chemical vapor deposition.

[0018] In a preferred example of the present application, it can be further configured that an epitaxial structure is formed on the surface of the GOI wafer, including:

[0019] forming a P-type electrode layer on the surface of the GOI wafer by chemical vapor deposition;

[0020] forming a germanium-tin active layer on the surface of the P-type electrode layer by chemical vapor deposition;

[0021] An N-type electrode layer is formed on the surface of the germanium-tin active layer by chemical vapor deposition.

[0022] In a preferred example of the present application, it can be further configured that the germanium-tin active layer includes germanium-tin / germanium quantum well or germanium-tin / silicon-germanium-tin quantum well.

[0023] In a preferred example of the present application, it can be further configured that a groove is etched on the epitaxial structure to form a mesa structure, including:

[0024] A groove is formed on the epitaxial structure by dry etching or wet etching, and the groove is located in the second electrode layer, the active layer and a part of the first electrode layer.

[0025] In a second aspect, the present application provides an electrically injected germanium-tin laser chip.

[0026] This application is achieved through the following technical solutions:

[0027] An electrically injected germanium-tin laser chip is prepared by using the manufacturing method of an electrically injected germanium-tin laser chip described in the first aspect, comprising:

[0028] A substrate, wherein the substrate is a GOI wafer;

[0029] A first electrode layer, located on the surface of the GOI wafer, wherein the first electrode layer is a P-type electrode layer or an N-type electrode layer;

[0030] A germanium-tin active layer, located on the surface of the first electrode layer;

[0031] A second electrode layer, located on the surface of the germanium-tin active layer, the second electrode layer is a P-type electrode layer or an N-type electrode layer, and the second electrode layer and the first electrode layer have different structures;

[0032] A passivation layer, wherein grooves are provided on the first electrode layer, the germanium-tin active layer and the second electrode layer, and the passivation layer covers the surfaces of the grooves and the second electrode layer;

[0033] A bottom electrode, located on the first electrode layer;

[0034] The top electrode is located on the second electrode layer.

[0035] In a preferred example of the present application, it can be further configured that the germanium-tin active layer includes germanium-tin / germanium quantum well or germanium-tin / silicon-germanium-tin quantum well.

[0036] In a preferred example of the present application, it can be further configured that the N-type electrode layer is a distributed Bragg reflector structure doped with N-type ions, wherein the N-type ions include at least one of phosphorus, arsenic, silicon, carbon or germanium.

[0037] In a preferred example of the present application, it can be further configured that the P-type electrode layer is a distributed Bragg reflector structure doped with P-type ions, wherein the P-type ions include at least one of boron, zinc or beryllium.

[0038] In a third aspect, the present application provides an optoelectronic device.

[0039] This application is achieved through the following technical solutions:

[0040] A photoelectric device comprises a laser chip prepared by the preparation method as described in the first aspect, or the laser chip as described in the second aspect.

[0041] In summary, compared with the prior art, the technical solution provided in the embodiment of the present application has at least the following beneficial effects: the laser chip includes providing a GOI wafer; forming an epitaxial structure on the surface of the GOI wafer, the epitaxial structure including a first electrode layer, an active layer and a second electrode layer stacked in sequence on the GOI wafer; etching a groove on the epitaxial structure to form a mesa structure; forming a passivation layer on the sidewall of the groove; forming a first opening on the passivation layer located on the first electrode layer, and forming a bottom electrode in the first opening; forming a second opening on the passivation layer located on the second electrode layer, and forming a top electrode in the second opening. The present application adopts GOI wafer as substrate. The flat surface and high crystal quality of GOI wafer can provide good initial conditions for the growth of germanium tin epitaxial layer, which is conducive to the growth of high-quality, low-defect density germanium tin film, thereby reducing non-radiative recombination centers caused by material defects and improving the internal quantum efficiency and reliability of the laser; in addition, the interface electrical properties between the GOI wafer and the epitaxially grown germanium tin layer are good, and a good interface can reduce charge accumulation and scattering phenomena at the interface, thereby reducing the threshold current density; in addition, using GOI wafer as substrate can reduce the preparation steps of the buffer layer in some cases. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 A schematic diagram of a process for manufacturing an electrically injected germanium-tin laser chip provided in an embodiment of the present application;

[0043] Figure 2 A schematic diagram of the structures of the steps in the manufacturing process of the electrically injected germanium tin laser chip provided in one embodiment of the present application;

[0044] Figure 3 A schematic diagram of the structure of an electrically injected germanium-tin laser chip provided in one embodiment of the present application;

[0045] Description of reference numerals:

[0046] Substrate 1 , first electrode layer 2 , germanium-tin active layer 3 , second electrode layer 4 , groove 20 , passivation layer 201 , bottom electrode 5 , top electrode 6 . DETAILED DESCRIPTION

[0047] This specific embodiment is merely an explanation of the present application and is not a limitation of the present application. After reading this specification, those skilled in the art may make modifications to the present embodiment without any creative contribution as needed, but such modifications are protected by the patent law as long as they are within the scope of the claims of the present application.

[0048] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0049] In addition, the term "and / or" in this application is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this application, unless otherwise specified, generally indicates that the associated objects before and after are in an "or" relationship.

[0050] In this application, the terms "first", "second", etc. are used to distinguish identical or similar items with basically the same effects and functions. It should be understood that there is no logical or temporal dependency between "first", "second", and "nth", nor is there any limitation on quantity and execution order.

[0051] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0052] The embodiments of the present application are further described in detail below in conjunction with the drawings in the specification.

[0053] like Figure 1 The figure shows a method for manufacturing an electrically injected germanium tin laser chip provided by the first exemplary embodiment of the present application, which comprises:

[0054] S1: Provide a GOI wafer.

[0055] GOI wafer, that is, Germanium-On-Insulator wafer, is a new type of semiconductor material that combines the advantages of germanium material and SOI (Silicon-on-Insulator) structure. GOI wafer includes a top germanium layer, a silicon oxide buried oxygen layer and a silicon substrate, which removes a large number of mismatch defects existing in the heterogeneous interface between germanium and silicon. The use of GOI wafer is beneficial to reduce the threshold current density level of the electrically injected germanium tin laser and increase its operating temperature laser. Commercial GOI wafers are used in this application.

[0056] Because the structure and material properties of the GOI wafer itself can provide a good electrical and material performance transition when combined with the germanium tin epitaxial layer, the growth and processing steps of the buffer layer can be omitted or simplified in some designs. In addition, due to the stable electrical properties of the GOI wafer, a relatively simple metallization process can also be used in the preparation of the electrical contact of the device, for example, conventional metal deposition and annealing processes can be used to form a good ohmic contact without the need for complex multi-layer metal structures or special contact materials to improve electrical properties, further simplifying the manufacturing process.

[0057] S2: forming an epitaxial structure on the surface of the GOI wafer, wherein the epitaxial structure comprises a first electrode layer, a germanium tin active layer and a second electrode layer sequentially stacked on the GOI wafer.

[0058] Specifically, the epitaxial structure includes three layers, namely, the first electrode layer, the germanium tin active layer and the second electrode layer from bottom to top on the surface of the top germanium layer of the GOI wafer. Figure 2 As shown in a, from bottom to top are substrate 1 (GOI wafer), first electrode layer 2, germanium tin active layer 3 and second electrode layer 4.

[0059] The surface flatness and crystal quality of commercial GOI wafers are usually high, which can provide good initial conditions for the growth of the germanium tin epitaxial layer, and is conducive to the growth of high-quality, low-defect density germanium tin thin films, thereby reducing non-radiative recombination centers caused by material defects and improving the internal quantum efficiency and reliability of the laser; in addition, the interface electrical properties between the GOI wafer and the epitaxially grown germanium tin layer are good. A good interface can reduce charge accumulation and scattering at the interface. Forming an epitaxial structure on the surface of the GOI wafer helps to reduce the threshold current density of the device, which means that the laser can achieve laser output under low current injection conditions. This can not only reduce the energy consumption of the device during operation and extend the service life of the device, but also reduce the requirements for supporting equipment such as power supply to a certain extent, and improve the practicality and economy of the device. Forming an epitaxial structure directly on the substrate simplifies the processing of the buffer layer and reduces the complex steps and process difficulty in the manufacturing process. This makes the manufacturing process more controllable, reduces the product defect rate caused by complex processes, improves the production quality and consistency of the product, and also shortens the product research and development and production cycle, and speeds up the speed of product introduction to the market.

[0060] S3: Etching a groove on the epitaxial structure to form a mesa structure.

[0061] like Figure 2As shown in Fig. 2b, a groove 20 is etched on the epitaxial structure, and the semi-finished product formed is called a mesa structure. The groove is etched from the top of the epitaxial structure, i.e., the second electrode layer, and passes through the second electrode layer and the germanium tin active layer in sequence, and finally etches away part of the first electrode layer, but does not penetrate the first electrode layer. The width and depth of the groove can be set according to the actual needs of the laser. The width of the groove will affect the mode and beam quality of the laser, and the depth will affect the threshold current and efficiency of the laser.

[0062] S4: forming a passivation layer on the surface of the mesa structure.

[0063] like Figure 2 As shown in Figure c, after the groove etching is completed, a passivation layer 201 is formed on the surface of the mesa structure, specifically on the sidewall of the groove and the surface of the second electrode layer. The passivation layer 201 can protect the sidewall and reduce the influence of the surface state on the carrier. Among them, the passivation layer can be made of inorganic materials, such as silicon dioxide (SiO2), silicon nitride (Si3N4), aluminum nitride (AlN). It can also be made of organic materials, such as polyimide (PI), benzocyclobutene (BCB), etc.

[0064] Specifically, the semi-finished product prepared in step S3 is placed in a vacuum environment for ion bombardment to remove surface pollutants; then the reaction source is deposited on the surface of the clean mesa structure using atomic layer deposition technology to form a passivation layer.

[0065] S5: forming a first opening on the passivation layer located on the first electrode layer, and forming a bottom electrode in the first opening.

[0066] like Figure 2 d, the bottom electrode 5 is used to provide an electrical connection to supply an external power supply to the active area of ​​the laser to stimulate the generation of laser light. The first opening can be a square area or a circular area. In this embodiment, it is a circular area, and the diameter of the circular area satisfies 8μm to 15μm. The bottom electrode is selected from a material having thermal conductivity and electrical conductivity, such as copper, aluminum, foamed graphite copper, carbon fiber, etc.

[0067] S6: forming a second opening in the passivation layer located at the second electrode layer, and forming a top electrode in the second opening.

[0068] like Figure 2As shown in FIG. 5 , the top electrode 6 is used to provide an electrical connection to supply an external power supply to the active area of ​​the laser to stimulate the generation of laser light. Specifically, the second opening can be a square area or a circular area. In this embodiment, it is a circular area, and the diameter of the circular area satisfies 8 μm to 15 μm. In a specific implementation, a top electrode can be formed at the second opening by a metal deposition method. Among them, the metal deposition method includes one of evaporation, sputtering or electroplating.

[0069] The manufacturing method proposed in this application can be produced using existing mature CMOS processes and related equipment, without the need to invest a large amount of additional resources to develop a new special process specifically for germanium-tin lasers. This greatly reduces production costs and improves production efficiency, which is conducive to large-scale production and industrial development.

[0070] In one embodiment, in step S2, an N-type electrode layer, a germanium-tin active layer and a P-type electrode layer are sequentially formed on the surface of the GOI wafer by chemical vapor deposition: an N-type electrode layer is formed on the surface of the GOI wafer by chemical vapor deposition; a germanium-tin active layer is formed on the surface of the N-type electrode layer by chemical vapor deposition; and a P-type electrode layer is formed on the surface of the germanium-tin active layer by chemical vapor deposition.

[0071] Specifically, firstly, an N-type electrode layer is formed on the surface of the GOI wafer by chemical vapor deposition. A silicon source can be used to dope an N-type dopant (such as phosphorus or arsenic) to form the N-type electrode layer; a germanium-tin active layer is formed on the surface of the N-type electrode layer by chemical vapor deposition. A deposition precursor gas mixture containing germane (GeH4) can be used as a germanium source. At the same time, tin tetrachloride (SnCl4) can be used as a tin source to form a germanium-tin alloy layer, i.e., an active layer, on the N-type electrode layer by controlling the deposition conditions; finally, a gas containing a P-type dopant (such as boron) is used to deposit together with a silicon hydride source to form a P-type electrode layer on the surface of the germanium-tin active layer. During the deposition process, parameters such as temperature, pressure, and gas flow rate need to be precisely controlled to ensure the quality and uniformity of the material.

[0072] In another embodiment, in step S2, a P-type electrode layer, a germanium-tin active layer and an N-type electrode layer are sequentially formed on the surface of the GOI wafer by chemical vapor deposition: a P-type electrode layer is formed on the surface of the GOI wafer by chemical vapor deposition; a germanium-tin active layer is formed on the surface of the P-type electrode layer by chemical vapor deposition; and an N-type electrode layer is formed on the surface of the germanium-tin active layer by chemical vapor deposition.

[0073] Specifically, a gas containing a P-type dopant (such as boron) is used to perform chemical vapor deposition together with a silicon hydride source to form a P-type electrode layer on the surface of the GOI wafer; a deposition precursor gas mixture containing germane (GeH4) is used as a germanium source, and tin tetrachloride (SnCl4) can be used as a tin source to form a germanium-tin active layer on the surface of the P-type electrode layer through chemical vapor deposition; finally, a silicon source is used to perform chemical vapor deposition together with an N-type dopant (such as phosphorus or arsenic) to form an N-type electrode layer on the surface of the germanium-tin active layer.

[0074] The N-type electrode layer is a multi-layer N-type semiconductor layer, which constitutes a distributed Bragg reflector structure; the P-type electrode layer is a multi-layer P-type semiconductor layer, which constitutes a distributed Bragg reflector structure.

[0075] Optionally, the germanium-tin active layer includes germanium-tin / germanium quantum well or germanium-tin / silicon-germanium-tin quantum well.

[0076] GeSn / Ge Quantum Wells are composed of alternately stacked GeSn and Ge layers to form quantum wells. The GeSn layer has a narrow band gap due to the presence of Sn, while the Ge layer has a wider band gap. Using GeSn / Ge quantum wells as active layers can enhance the quantum confinement effect, thereby improving the optoelectronic properties of the device, such as light absorption and emission efficiency.

[0077] GeSn / SiGeSn Quantum Wells consist of alternately stacked GeSn and SiGeSn layers to form quantum wells. The introduction of SiGeSn layers can further adjust the band gap and strain to optimize device performance, such as increasing optical gain and reducing threshold current.

[0078] Optionally, etching a groove on the epitaxial structure to form a mesa structure includes:

[0079] A groove is formed on the epitaxial structure by dry etching or wet etching, and the groove is located in the second electrode layer, the active layer and part of the first electrode layer. Preferably, a dry etching process is selected.

[0080] The manufacturing method of the present application realizes the germanium tin laser electrically injected at room temperature, and overcomes the problem that the germanium tin laser is difficult to work normally at room temperature in the past. This greatly broadens the application scope of the germanium tin laser, so that it can operate stably under conventional room temperature environment, without special conditions such as additional cryogenic cooling equipment, reduces the complexity and cost of the system, and lays the foundation for its wide application in more fields, and provides an effective solution to solve the problem of the lack of light source on silicon substrate, which has long plagued the development of related fields. The light source on silicon substrate is crucial to the development of silicon photonics. The emergence of this technical solution fills this key gap, promotes the development of silicon photonics from passive device integration to active passive full integration, and promotes the construction and improvement of silicon photonic chips. It lays a solid foundation for the construction of silicon photonic chips in the true sense. A stable and efficient light source is one of the key elements for silicon photonic chips to play their functions. The germanium tin laser prepared by this technical solution can meet the requirements of silicon photonic chips in optical performance, device compatibility and other aspects, and provides a strong guarantee for the application and development of silicon photonic chips in many fields such as high-speed optical communication, optical computing, and optical sensing in the future.

[0081] A second exemplary embodiment of the present application provides an electrically injected germanium tin laser chip, such as Figure 3 As shown, the laser chip includes:

[0082] Substrate 1, the substrate is a GOI wafer;

[0083] A first electrode layer 2, located on the surface of the GOI wafer, the first electrode layer is a P-type electrode layer or an N-type electrode layer;

[0084] A germanium-tin active layer 3 is located on the surface of the first electrode layer 2;

[0085] A second electrode layer 4 is located on the surface of the germanium-tin active layer 3. The second electrode layer 4 is a P-type electrode layer or an N-type electrode layer. The second electrode layer 4 and the first electrode layer 2 have different structures.

[0086] A passivation layer 201 is provided with grooves in the first electrode layer 2, the germanium-tin active layer 3 and the second electrode layer 4, and the passivation layer 201 covers the grooves and the surface of the second electrode layer 4;

[0087] A bottom electrode 5, located on the first electrode layer 2;

[0088] The top electrode 6 is located on the second electrode layer 4 .

[0089] The laser chip prepared in this application can effectively improve the optical limitation and constraint capabilities of the electrically injected germanium tin laser, so that the light can be better controlled and guided inside the laser. This helps to reduce the loss of light during propagation and concentrate the light energy more concentratedly in the active area, thereby improving the output power and efficiency of the laser. It can perform better in application scenarios such as optical communications and optical sensing; in addition, by improving the optical limitation and constraint capabilities, the epitaxial quality of the germanium tin active area is improved. High-quality epitaxial layers can reduce defects and impurities inside the material and reduce the number of non-radiative recombination centers, thereby improving the internal quantum efficiency of the laser, further optimizing the optical performance of the laser, and enabling it to output more stable, high-quality lasers.

[0090] Optionally, the germanium-tin active layer includes germanium-tin / germanium quantum well or germanium-tin / silicon-germanium-tin quantum well.

[0091] Optionally, the N-type electrode layer is a distributed Bragg reflector structure doped with N-type ions, wherein the N-type ions include at least one of phosphorus, arsenic, silicon, carbon or germanium.

[0092] Optionally, the P-type electrode layer is a distributed Bragg reflector structure doped with P-type ions, wherein the P-type ions include at least one of boron, zinc or beryllium.

[0093] A third exemplary embodiment of the present application provides an optoelectronic device, which includes a laser chip manufactured by the method for preparing an electrically injected germanium-tin laser chip of the present application or includes the laser chip of the present application.

[0094] Specifically, the optoelectronic device may be an optical waveguide, an optical modulator, or a photodetector.

[0095] The laser chip prepared in the present application can be easily integrated with other optoelectronic devices. This enables multiple optoelectronic devices with different functions to be integrated on the same chip when constructing an optoelectronic system, achieving a high degree of system integration, helping to reduce the volume of the entire system, reduce power consumption, and improve the overall performance and stability of the system, meeting the urgent needs of modern optical communications, optical computing and other fields for miniaturized, high-performance optoelectronic systems.

[0096] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0097] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the system described in the present application is divided into different functional units or modules to complete all or part of the functions described above.

Claims

1. A method for manufacturing an electrically injected germanium tin laser chip, characterized in that: include: Providing a GOI wafer; forming an epitaxial structure on the surface of the GOI wafer, wherein the epitaxial structure comprises a first electrode layer, a germanium tin active layer and a second electrode layer sequentially stacked on the GOI wafer; Etching a groove on the epitaxial structure to form a mesa structure; forming a passivation layer on the surface of the mesa structure; forming a first opening on the passivation layer located at the first electrode layer, and forming a bottom electrode in the first opening; A second opening is formed on the passivation layer located on the second electrode layer, and a top electrode is formed in the second opening.

2. The method for manufacturing an electrically injected germanium-tin laser chip according to claim 1, characterized in that: An epitaxial structure is formed on the surface of the GOI wafer, comprising: Forming an N-type electrode layer on the surface of the GOI wafer by chemical vapor deposition; forming a germanium-tin active layer on the surface of the N-type electrode layer by chemical vapor deposition; A P-type electrode layer is formed on the surface of the germanium-tin active layer by chemical vapor deposition.

3. The method for manufacturing an electrically injected germanium-tin laser chip according to claim 1, characterized in that: An epitaxial structure is formed on the surface of the GOI wafer, comprising: forming a P-type electrode layer on the surface of the GOI wafer by chemical vapor deposition; forming a germanium-tin active layer on the surface of the P-type electrode layer by chemical vapor deposition; An N-type electrode layer is formed on the surface of the germanium-tin active layer by chemical vapor deposition.

4. The method for manufacturing an electrically injected germanium-tin laser chip according to any one of claims 1 to 3, characterized in that: The germanium-tin active layer includes germanium-tin / germanium quantum well or germanium-tin / silicon-germanium-tin quantum well.

5. The method for manufacturing an electrically injected germanium-tin laser chip according to claim 1, characterized in that: Etching a groove on the epitaxial structure to form a mesa structure, comprising: A groove is formed on the epitaxial structure by dry etching or wet etching, and the groove is located in the second electrode layer, the active layer and a part of the first electrode layer.

6. An electrically injected germanium-tin laser chip, characterized in that: include: A substrate, wherein the substrate is a GOI wafer; A first electrode layer, located on the surface of the GOI wafer, wherein the first electrode layer is a P-type electrode layer or an N-type electrode layer; A germanium-tin active layer, located on the surface of the first electrode layer; A second electrode layer, located on the surface of the germanium-tin active layer, the second electrode layer is a P-type electrode layer or an N-type electrode layer, and the second electrode layer and the first electrode layer have different structures; A passivation layer, wherein grooves are provided on the first electrode layer, the germanium-tin active layer and the second electrode layer, and the passivation layer covers the surfaces of the grooves and the second electrode layer; A bottom electrode, located on the first electrode layer; The top electrode is located on the second electrode layer.

7. The electrically injected germanium-tin laser chip according to claim 6, characterized in that: The germanium-tin active layer includes germanium-tin / germanium quantum well or germanium-tin / silicon-germanium-tin quantum well.

8. The electrically injected germanium-tin laser chip according to claim 6, characterized in that: The N-type electrode layer is a distributed Bragg reflector structure doped with N-type ions, wherein the N-type ions include at least one of phosphorus, arsenic, silicon, carbon or germanium.

9. The electrically injected germanium-tin laser chip according to claim 6, characterized in that: The P-type electrode layer is a distributed Bragg reflector structure doped with P-type ions, wherein the P-type ions include at least one of boron, zinc or beryllium.

10. A photoelectric device, characterized in that: The optoelectronic device comprises a laser chip prepared by the preparation method according to any one of claims 1 to 5, or a laser chip according to any one of claims 6 to 9.

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