Back magnetism elimination circuit and method applied to wheel speed sensor

Abstract

The invention discloses a back magnetic elimination circuit and method applied to a wheel speed sensor, the back magnetic elimination circuit comprises a Hall disc HallR, a Hall disc HallC, a Hall disc HallL, a first signal link and a second signal link, a difference value output signal of the Hall disc HallR and a difference value output signal of the Hall disc HallC are connected with an input end of the first signal link, and a difference value output signal of the Hall disc HallL is connected with an output end of the second signal link. And a difference value output signal of the Hall disc HallL and a difference value output signal of the Hall disc HallC are connected with the input end of the second signal link. According to the invention, only two digital-to-analog converters DAC are needed to eliminate the back magnetism of the Hall disc, the circuit is simplified, and the situation that the programmable gain amplifiers PGAR and PGAL are repeatedly adjusted to the minimum magnification times to eliminate the back magnetism imbalance and influence the output current signal of the wheel speed sensor can be avoided.

Description

Technical Field

[0001] The present invention relates to a back-magnetic elimination circuit and method, in particular to a back-magnetic elimination circuit and method applied to a wheel speed sensor, belonging to the technical field of semiconductor integrated circuits. Background Art

[0002] As the core device for measuring speed, direction and anti-lock braking system of automobiles, wheel speed sensor chip plays a vital role in the safe driving of automobiles. However, under different installation conditions, the back magnetism sensed by the Hall disk in the wheel speed sensor chip varies greatly. When the sensed back magnetism is large, the amplifier output to the subsequent stage will be saturated and cannot amplify the useful signal normally. As a result, the wheel speed sensor chip outputs wrong speed and direction information, which greatly affects the safe driving of the car. Therefore, in order to amplify the useful signal normally, it is necessary to eliminate the back magnetism sensed by the Hall disk in the chip, thereby ensuring the performance of the wheel speed sensor chip.

[0003] The back magnetic elimination circuit traditionally used in wheel speed sensors is as follows: Figure 3 As shown, the entire wheel speed sensor chip includes three Hall disks Hall_R, Hall_C, and Hall_L, amplifiers Gain_R, Gain_C, and Gain_L, digital-to-analog converters DAC_R, DAC_C, and DAC_L, analog signal processing units Analog signal processing unit 1 and Analog signal processing unit 2, digital processing unit Digital signal processing unit, and current signal output module IOUT. The three Hall disks convert the external sinusoidal magnetic signal into an electrical signal that is easy for the chip to process. The electrical signal SI_R sensed by Hall_R is input into the amplifier Gain_R for linear amplification, and the output signal is SO_R. The electrical signal SI_C sensed by Hall_C is input into the amplifier Gain_C for linear amplification, and the output signal is SO_C. The electrical signal SI_L sensed by Hall_L is input into the amplifier Gain_L for linear amplification, and the output signal is SO_L.

[0004] The output signal SO_R and the output signal SO_L are further amplified and quantized by the analog signal processing unit 1 to obtain the digital code value DO1. The digital processing unit performs corresponding algorithm processing on them to calculate the corresponding back magnetism information and the digital code values ​​DDAC_R and DDAC_L for eliminating the back magnetism, the amplitude information and the gain adjustment code value DGAIN_1. The digital code value DDAC_R for eliminating the back magnetism is input into the digital-to-analog converter DAC_R, and the digital-to-analog converter DAC_R outputs the analog signal SDAC_R to the amplifier Gain_R to eliminate the back magnetism of the Hall disk Hall_R. The digital code value DDAC_L for eliminating the back magnetism is input into the digital-to-analog converter DAC_L, and the digital-to-analog converter DAC_L outputs the analog signal SDAC_L to the amplifier Gain_L to eliminate the back magnetism of the Hall disk Hall_L. The gain adjustment code value DGAIN_1 is input into the analog signal processing unit 1, and the gain is adjusted to amplify the signal to a suitable size. The output signal SO_C is further amplified and quantized by the analog signal processing unit 2 to obtain the digital code value DO2. The digital signal processing unit performs algorithmic processing on it to calculate the corresponding back magnetism information and the digital code value DDAC_C for eliminating the back magnetism, the amplitude information and the gain adjustment code value DGAIN_2. The digital code value DDAC_C for eliminating the back magnetism is input into the digital-to-analog converter DAC_C, and the digital-to-analog converter DAC_C outputs the analog signal SDAC_C to the amplifier Gain_C to eliminate the back magnetism of the Hall disk Hall_C. The gain adjustment code value DGAIN_2 is input into the analog signal processing unit 2, and the gain is adjusted to amplify the signal to a suitable size. The digital code value DO1 is used to represent the speed information, control the current signal output module IOUT, and transmit the speed information to the outside world in the form of current through encoding. The digital code value DO2 is used to represent the direction information, control the current signal output module IOUT, and transmit the direction information to the outside world in the form of current through encoding.

[0005] Since the back magnetic signals of the three Hall plates Hall_R, Hall_C, and Hall_L need to be eliminated separately, three amplifiers Gain_R, Gain_C, and Gain_L are required. Three digital-to-analog converters DAC_R, DAC_C, and DAC_L increase the complexity of the chip, which is unfavorable to the cost of the wheel speed sensor chip. Summary of the invention

[0006] The technical problem to be solved by the present invention is to provide a back-magnetic elimination circuit and method applied to a wheel speed sensor, and simplify the structure of the back-magnetic elimination circuit.

[0007] In order to solve the above technical problems, the technical solution adopted by the present invention is: A back-magnetic elimination circuit applied to a wheel speed sensor comprises a Hall disk Hall_R, a Hall disk Hall_C, a Hall disk Hall_L, a first signal chain and a second signal chain, wherein a difference output signal of the Hall disk Hall_R and a difference output signal of the Hall disk Hall_C are connected to an input end of the first signal chain, and a difference output signal of the Hall disk Hall_L and a difference output signal of the Hall disk Hall_C are connected to an input end of the second signal chain.

[0008] Furthermore, the output signal VR+ and the output signal VR- of the Hall disk Hall_R constitute the difference output signal of the Hall disk Hall_R, the output signal VC+ and the output signal VC- of the Hall disk Hall_C constitute the difference output signal of the Hall disk Hall_C, and the output signal VL+ and the output signal VL- of the Hall disk Hall_L constitute the difference output signal of the Hall disk Hall_L.

[0009] Further, the first signal chain includes a differential difference amplifier DDA_R, a programmable gain amplifier PGA_R, a successive approximation analog-to-digital converter SARADC_R, a digital processing unit DSPU, a digital-to-analog converter DAC_R and a current signal output module IOUT, the first input end of the differential difference amplifier DDA_R is connected to the output signal VR+, the second input end of the differential difference amplifier DDA_R is connected to the output signal VR-, the third input end of the differential difference amplifier DDA_R is connected to the output signal VC+, the fourth input end of the differential difference amplifier DDA_R is connected to the output signal VC-, the first output end of the differential difference amplifier DDA_R is connected to the first input end of the programmable gain amplifier PGA_R, the differential difference amplifier DDA_ The second output end of R is connected to the second input end of the programmable gain amplifier PGA_R, the output end of the programmable gain amplifier PGA_R is connected to the first input end of the digital processing unit DSPU and generates a digital code stream DO_R, the first output end of the digital processing unit DSPU is connected to the input end of the digital-to-analog converter DAC_R and generates a digital code value DDAC_R, the output end of the digital-to-analog converter DAC_R is connected to the second input end of the programmable gain amplifier PGA_R and generates an analog signal SDAC_R, the second output end of the digital processing unit DSPU is connected to the first control end of the programmable gain amplifier PGA_R and generates a gain adjustment code value DGAIN_R, and the third output end of the digital processing unit DSPU is connected to the input end of the current signal output module IOUT.

[0010] Further, the second signal chain includes a differential difference amplifier DDA_L, a programmable gain amplifier PGA_L, a successive approximation analog-to-digital converter SARADC_L, a digital processing unit DSPU, a digital-to-analog converter DAC_L and a current signal output module IOUT, a first input end of the differential difference amplifier DDA_L is connected to the output signal VL-, a second input end of the differential difference amplifier DDA_L is connected to the output signal VL+, a third input end of the differential difference amplifier DDA_L is connected to the output signal VC-, a fourth input end of the differential difference amplifier DDA_L is connected to the output signal VC+, a first output end of the differential difference amplifier DDA_L is connected to the first input end of the programmable gain amplifier PGA_L, and the differential difference amplifier DDA_ The second output end of L is connected to the second input end of the programmable gain amplifier PGA_L, the output end of the programmable gain amplifier PGA_L is connected to the second input end of the digital processing unit DSPU and generates a digital code stream DO_L, the fourth output end of the digital processing unit DSPU is connected to the first control end of the programmable gain amplifier PGA_L and generates a gain adjustment code value DGAIN_L, the fifth output end of the digital processing unit DSPU is connected to the input end of the digital-to-analog converter DAC_L and generates a digital code value DDAC_L, the output end of the digital-to-analog converter DAC_L is connected to the second input end of the programmable gain amplifier PGA_L and generates an analog signal SDAC_L, and the third output end of the digital processing unit DSPU is connected to the input end of the current signal output module IOUT.

[0011] A back-magnetic elimination method for a back-magnetic elimination circuit of a wheel speed sensor comprises the following steps: Hall plates Hall_R, Hall_C and Hall_L convert external sinusoidal magnetic signals into electrical signals that are easy for the chip to process. The output signals VR+, VR-, VC+ and VC- are input into the differential difference amplifier DDA_R of the first signal chain, the electrical signals induced by the Hall disk Hall_R and the Hall disk Hall_C are subtracted, and the signals and the back magnetic offset are preliminarily amplified; the signal amplified by the differential difference amplifier DDA_R is input into the programmable gain amplifier PGA_R for further amplification; the output signal of the programmable gain amplifier PGA_R is input into the successive approximation analog-to-digital converter SARADC_R for quantization to obtain a digital code stream DO_R that is easy for the digital processing unit DSPU to process; the digital processing unit DSPU performs calculations on the digital code stream DO_R , calculate the corresponding back magnetic offset information and the digital code value DDAC_R for eliminating the back magnetic offset, and calculate the amplitude information and the gain adjustment code value DGAIN_R; the digital code value DDAC_R for eliminating the back magnetic offset is input into the digital-to-analog converter DAC_R, and the digital-to-analog converter DAC_R outputs the analog signal SDAC_R to the programmable gain amplifier PGA_R to eliminate the back magnetic offset of the Hall disk Hall_R and the Hall disk Hall_C; the gain adjustment code value DGAIN_R is input into the programmable gain amplifier PGA_R, and the gain is adjusted to amplify the signal to a suitable size; the digital code value DO_R is used to represent the speed information, control the current signal output module IOUT, and transmit the speed information to the outside world in the form of current through encoding; The output signals VC+, VC-, VL+ and VL- are input into the second signal chain differential amplifier DDA_L, the electrical signals sensed by the Hall disk Hall_C and the Hall disk Hall_L are subtracted, and the signals and the back magnetic offset are preliminarily amplified; the signal amplified by the differential amplifier DDA_L is input into the programmable gain amplifier PGA_L for further amplification; the output signal of the programmable gain amplifier PGA_L is input into the successive approximation analog-to-digital converter SARADC_L for quantization, and a digital code stream DO_L that is easy to process by the digital processing unit DSPU is obtained; the digital processing unit DSP U calculates and processes the digital code stream DO_L, calculates the corresponding back magnetic offset information and the digital code value DDAC_L for eliminating the back magnetic offset, and calculates the amplitude information and the gain adjustment code value DGAIN_L; the digital code value DDAC_L for eliminating the back magnetic offset is input into the digital-to-analog converter DAC_L, and the digital-to-analog converter DAC_L outputs the analog signal SDAC_L to the programmable gain amplifier PGA_L to eliminate the back magnetic offset of the Hall disk Hall_C and the Hall disk Hall_L; the gain adjustment code value DGAIN_L is input into the programmable gain amplifier PGA_L, and the gain is adjusted to amplify the signal to a suitable size; The digital code value DO_R and the digital code value DO_L are calculated and processed to obtain direction information, and the current signal output module IOUT is controlled to transmit the direction information to the outside world in the form of current through encoding.

[0012] Furthermore, after the wheel speed sensor is powered on, the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L are at the minimum amplification factor by default; after the back magnetic offset is eliminated when the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L are at the minimum amplification factor, the gain is adjusted according to the signal amplitude to amplify the signal to an appropriate size; when the back magnetic offset changes, the current digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset cannot completely eliminate the offset, and there is residual back magnetic offset; in order to avoid re-adjusting the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L to the minimum amplification factor to eliminate the back magnetic offset, the residual back magnetic offset is compared with the acceptable back magnetic offset. When the residual back magnetic offset changes, the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset cannot completely eliminate the offset, and there is residual back magnetic offset. When the magnetic offset is less than the acceptable back magnetic offset, it will not affect the judgment of speed and direction; the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset are not adjusted, or the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset are fine-tuned in small steps; when the residual back magnetic offset is greater than the acceptable back magnetic offset, the judgment of speed and direction is affected; the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L are readjusted to the minimum amplification factor, and the digital processing unit DSPU recalculates and processes them to calculate the corresponding back magnetic offset information and the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset, the amplitude information and the gain adjustment code value DGAIN_R and the gain adjustment code value DGAIN_L.

[0013] Compared with the prior art, the present invention has the following advantages and effects: the present invention provides a back magnetism elimination circuit and method applied to a wheel speed sensor, which only requires two digital-to-analog converters to eliminate the back magnetism of a Hall disk, thereby simplifying the structure of the back magnetism elimination circuit; and the present invention compares the residual back magnetism offset with the acceptable back magnetism offset by presetting an acceptable back magnetism offset, thereby avoiding repeatedly re-adjusting the programmable gain amplifiers PGA_R and PGA_L to the minimum amplification factor to eliminate the back magnetism offset and thus affecting the output current signal of the wheel speed sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 The diagram is a schematic diagram of a back-magnetic elimination circuit applied to a wheel speed sensor according to the present invention.

[0015] Figure 2 The present invention is a flow chart of a back magnetization elimination method applied to a wheel speed sensor.

[0016] Figure 3 The diagram is a schematic diagram of a back-magnetic elimination circuit applied to a wheel speed sensor in the prior art. DETAILED DESCRIPTION

[0017] In order to elaborate on the technical scheme adopted by the present invention to achieve the predetermined technical purpose, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only partial embodiments of the present invention, rather than all embodiments, and the technical means or technical features in the embodiments of the present invention can be replaced without paying creative work. The present invention will be described in detail below with reference to the drawings and in conjunction with the embodiments.

[0018] like Figure 1 As shown, a back-magnetic elimination circuit applied to a wheel speed sensor of the present invention comprises a Hall disk Hall_R, a Hall disk Hall_C, a Hall disk Hall_L, a first signal chain and a second signal chain, the difference output signal of the Hall disk Hall_R and the difference output signal of the Hall disk Hall_C are connected to the input end of the first signal chain, and the difference output signal of the Hall disk Hall_L and the difference output signal of the Hall disk Hall_C are connected to the input end of the second signal chain.

[0019] The output signal VR+ and the output signal VR- of the Hall disk Hall_R constitute the difference output signal of the Hall disk Hall_R, the output signal VC+ and the output signal VC- of the Hall disk Hall_C constitute the difference output signal of the Hall disk Hall_C, and the output signal VL+ and the output signal VL- of the Hall disk Hall_L constitute the difference output signal of the Hall disk Hall_L.

[0020] The first signal chain includes a differential difference amplifier DDA_R, a programmable gain amplifier PGA_R, a successive approximation analog-to-digital converter SARADC_R, a digital processing unit DSPU, a digital-to-analog converter DAC_R and a current signal output module IOUT, a first input end of the differential difference amplifier DDA_R is connected to an output signal VR+, a second input end of the differential difference amplifier DDA_R is connected to an output signal VR-, a third input end of the differential difference amplifier DDA_R is connected to an output signal VC+, a fourth input end of the differential difference amplifier DDA_R is connected to an output signal VC-, a first output end of the differential difference amplifier DDA_R is connected to a first input end of the programmable gain amplifier PGA_R, a second input end of the differential difference amplifier DDA_R is connected to an output signal VR-, The output end is connected to the second input end of the programmable gain amplifier PGA_R, the output end of the programmable gain amplifier PGA_R is connected to the first input end of the digital processing unit DSPU and generates a digital code stream DO_R, the first output end of the digital processing unit DSPU is connected to the input end of the digital-to-analog converter DAC_R and generates a digital code value DDAC_R, the output end of the digital-to-analog converter DAC_R is connected to the second input end of the programmable gain amplifier PGA_R and generates an analog signal SDAC_R, the second output end of the digital processing unit DSPU is connected to the first control end of the programmable gain amplifier PGA_R and generates a gain adjustment code value DGAIN_R, and the third output end of the digital processing unit DSPU is connected to the input end of the current signal output module IOUT.

[0021] The second signal chain includes a differential difference amplifier DDA_L, a programmable gain amplifier PGA_L, a successive approximation analog-to-digital converter SARADC_L, a digital processing unit DSPU, a digital-to-analog converter DAC_L and a current signal output module IOUT, wherein a first input terminal of the differential difference amplifier DDA_L is connected to an output signal VL-, a second input terminal of the differential difference amplifier DDA_L is connected to an output signal VL+, a third input terminal of the differential difference amplifier DDA_L is connected to an output signal VC-, a fourth input terminal of the differential difference amplifier DDA_L is connected to an output signal VC+, a first output terminal of the differential difference amplifier DDA_L is connected to a first input terminal of the programmable gain amplifier PGA_L, and a second input terminal of the differential difference amplifier DDA_L is connected to an output signal VC-. The output end is connected to the second input end of the programmable gain amplifier PGA_L, the output end of the programmable gain amplifier PGA_L is connected to the second input end of the digital processing unit DSPU and generates a digital code stream DO_L, the fourth output end of the digital processing unit DSPU is connected to the first control end of the programmable gain amplifier PGA_L and generates a gain adjustment code value DGAIN_L, the fifth output end of the digital processing unit DSPU is connected to the input end of the digital-to-analog converter DAC_L and generates a digital code value DDAC_L, the output end of the digital-to-analog converter DAC_L is connected to the second input end of the programmable gain amplifier PGA_L and generates an analog signal SDAC_L, and the third output end of the digital processing unit DSPU is connected to the input end of the current signal output module IOUT.

[0022] like Figure 2 As shown, a back-magnetic elimination method for a back-magnetic elimination circuit applied to a wheel speed sensor comprises the following steps: The Hall plates Hall_R, Hall_C and Hall_L convert external sinusoidal magnetic signals into electrical signals that are easy for the chip to process.

[0023] The output signals VR+, VR-, VC+ and VC- are input into the differential difference amplifier DDA_R of the first signal chain, and the electrical signals induced by the Hall disk Hall_R and the Hall disk Hall_C are subtracted to eliminate most of the back magnetism, and the signal and the back magnetism offset are initially amplified; the signal amplified by the differential difference amplifier DDA_R is input into the programmable gain amplifier PGA_R for further amplification; the output signal of the programmable gain amplifier PGA_R is input into the successive approximation analog-to-digital converter SARADC_R for quantization to obtain a digital code stream DO_R that is easy for the digital processing unit DSPU to process; the digital processing unit DSPU processes the digital code stream DO_R Calculation is performed to calculate the corresponding back magnetic offset information and the digital code value DDAC_R for eliminating the back magnetic offset, and the amplitude information and the gain adjustment code value DGAIN_R are calculated; the digital code value DDAC_R for eliminating the back magnetic offset is input into the digital-to-analog converter DAC_R, and the digital-to-analog converter DAC_R outputs the analog signal SDAC_R to the programmable gain amplifier PGA_R to eliminate the back magnetic offset of the Hall disk Hall_R and the Hall disk Hall_C; the gain adjustment code value DGAIN_R is input into the programmable gain amplifier PGA_R, and the gain is adjusted to amplify the signal to a suitable size; the digital code value DO_R is used to represent the speed information, control the current signal output module IOUT, and transmit the speed information to the outside world in the form of current through encoding.

[0024] The output signals VC+, VC-, VL+ and VL- are input into the second signal chain differential amplifier DDA_L, and the electrical signals induced by the Hall disk Hall_C and the Hall disk Hall_L are subtracted to eliminate most of the back magnetism, and the signal and the back magnetism offset are initially amplified; the signal amplified by the differential amplifier DDA_L is input into the programmable gain amplifier PGA_L for further amplification; the output signal of the programmable gain amplifier PGA_L is input into the successive approximation analog-to-digital converter SARADC_L for quantization, and a digital code stream DO_L that is easy to process by the digital processing unit DSPU is obtained; the digital processing The unit DSPU calculates and processes the digital code stream DO_L, calculates the corresponding back magnetic offset information and the digital code value DDAC_L for eliminating the back magnetic offset, and calculates the amplitude information and the gain adjustment code value DGAIN_L; the digital code value DDAC_L for eliminating the back magnetic offset is input into the digital-to-analog converter DAC_L, and the digital-to-analog converter DAC_L outputs the analog signal SDAC_L to the programmable gain amplifier PGA_L to eliminate the back magnetic offset of the Hall disk Hall_C and the Hall disk Hall_L; the gain adjustment code value DGAIN_L is input into the programmable gain amplifier PGA_L, and the gain is adjusted to amplify the signal to an appropriate size.

[0025] The digital code value DO_R and the digital code value DO_L are calculated and processed to obtain direction information, and the current signal output module IOUT is controlled to transmit the direction information to the outside world in the form of current through encoding.

[0026] After the wheel speed sensor is powered on, in order to avoid excessive back magnetic offset causing saturation distortion of programmable gain amplifiers PGA_R and PGA_L, which affects further quantization, digital processing, and elimination of back magnetic offset, the programmable gain amplifiers PGA_R and PGA_L are at the minimum amplification factor by default; after the back magnetic offset is eliminated when the programmable gain amplifiers PGA_R and PGA_L are at the minimum amplification factor, the gain is adjusted according to the signal amplitude to amplify the signal to an appropriate size; when the back magnetic offset changes, the current digital code value DDAC_R and digital code value DDAC_L for eliminating the back magnetic offset cannot completely eliminate the offset, and there is residual back magnetic offset; in order to avoid re-adjusting the programmable gain amplifiers PGA_R and PGA_L to the minimum amplification factor to eliminate the back magnetic offset, which affects the wheel speed sensor The output current signal of the sensor is used to compare the residual back magnetic offset with the acceptable back magnetic offset. When the residual back magnetic offset is less than the acceptable back magnetic offset, it will not affect the judgment of speed and direction; the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset are not adjusted, or the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset are fine-tuned in small steps; when the residual back magnetic offset is greater than the acceptable back magnetic offset, the judgment of speed and direction is affected; the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L are readjusted to the minimum amplification factor, and the digital processing unit DSPU recalculates and processes it to calculate the corresponding back magnetic offset information and the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset, the amplitude information and the gain adjustment code value DGAIN_R and the gain adjustment code value DGAIN_L.

[0027] The differential output signals VR+, VR-, VC+, and VC- sensed by Hall_R and Hall_C are input into the differential difference amplifier DDA_R of the first signal chain, and the electrical signals sensed by Hall_R and Hall_C are subtracted to eliminate most of the back magnetism, and the digital-to-analog converter DAC_R eliminates the back magnetism offset. The differential output signals VC+, VC-, VL+, and VL- sensed by Hall_C and Hall_L are input into the differential difference amplifier DDA_L of the second signal chain, and the electrical signals sensed by Hall_C and Hall_L are subtracted to eliminate most of the back magnetism, and the digital-to-analog converter DAC_L eliminates the back magnetism offset. Only two digital-to-analog converters DAC are needed to eliminate the back magnetism of the Hall disk, simplifying the circuit. By presetting the acceptable back magnetism offset and comparing the residual back magnetism offset with it, it is avoided to repeatedly readjust the programmable gain amplifiers PGA_R and PGA_L to the minimum amplification factor to eliminate the back magnetism offset, which affects the output current signal of the wheel speed sensor.

[0028] The above is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent replacement and improvement made to the above embodiments without departing from the content of the technical solution of the present invention, based on the technical essence of the present invention, within the spirit and principles of the present invention, still fall within the protection scope of the technical solution of the present invention.

Claims

1. A back magnetic elimination circuit applied to a wheel speed sensor, characterized in that: It includes Hall disk Hall_R, Hall disk Hall_C, Hall disk Hall_L, a first signal chain and a second signal chain, the difference output signal of Hall disk Hall_R and the difference output signal of Hall disk Hall_C are connected to the input end of the first signal chain, and the difference output signal of Hall disk Hall_L and the difference output signal of Hall disk Hall_C are connected to the input end of the second signal chain.

2. The back-magnetic elimination circuit for a wheel speed sensor according to claim 1, characterized in that: The output signal VR+ and the output signal VR- of the Hall disk Hall_R constitute the difference output signal of the Hall disk Hall_R, the output signal VC+ and the output signal VC- of the Hall disk Hall_C constitute the difference output signal of the Hall disk Hall_C, and the output signal VL+ and the output signal VL- of the Hall disk Hall_L constitute the difference output signal of the Hall disk Hall_L.

3. The back-magnetic elimination circuit for a wheel speed sensor according to claim 2, characterized in that: The first signal chain includes a differential difference amplifier DDA_R, a programmable gain amplifier PGA_R, a successive approximation analog-to-digital converter SARADC_R, a digital processing unit DSPU, a digital-to-analog converter DAC_R and a current signal output module IOUT, a first input end of the differential difference amplifier DDA_R is connected to an output signal VR+, a second input end of the differential difference amplifier DDA_R is connected to an output signal VR-, a third input end of the differential difference amplifier DDA_R is connected to an output signal VC+, a fourth input end of the differential difference amplifier DDA_R is connected to an output signal VC-, a first output end of the differential difference amplifier DDA_R is connected to a first input end of the programmable gain amplifier PGA_R, and a first output end of the differential difference amplifier DDA_R is connected to a first input end of the programmable gain amplifier PGA_R. The second output end is connected to the second input end of the programmable gain amplifier PGA_R, the output end of the programmable gain amplifier PGA_R is connected to the first input end of the digital processing unit DSPU and generates a digital code stream DO_R, the first output end of the digital processing unit DSPU is connected to the input end of the digital-to-analog converter DAC_R and generates a digital code value DDAC_R, the output end of the digital-to-analog converter DAC_R is connected to the second input end of the programmable gain amplifier PGA_R and generates an analog signal SDAC_R, the second output end of the digital processing unit DSPU is connected to the first control end of the programmable gain amplifier PGA_R and generates a gain adjustment code value DGAIN_R, and the third output end of the digital processing unit DSPU is connected to the input end of the current signal output module IOUT.

4. The back-magnetic elimination circuit for a wheel speed sensor according to claim 2, characterized in that: The second signal chain includes a differential difference amplifier DDA_L, a programmable gain amplifier PGA_L, a successive approximation analog-to-digital converter SARADC_L, a digital processing unit DSPU, a digital-to-analog converter DAC_L and a current signal output module IOUT, a first input end of the differential difference amplifier DDA_L is connected to an output signal VL-, a second input end of the differential difference amplifier DDA_L is connected to an output signal VL+, a third input end of the differential difference amplifier DDA_L is connected to an output signal VC-, a fourth input end of the differential difference amplifier DDA_L is connected to an output signal VC+, a first output end of the differential difference amplifier DDA_L is connected to a first input end of the programmable gain amplifier PGA_L, and a first output end of the differential difference amplifier DDA_L is connected to a first input end of the programmable gain amplifier PGA_L. The second output end is connected to the second input end of the programmable gain amplifier PGA_L, the output end of the programmable gain amplifier PGA_L is connected to the second input end of the digital processing unit DSPU and generates a digital code stream DO_L, the fourth output end of the digital processing unit DSPU is connected to the first control end of the programmable gain amplifier PGA_L and generates a gain adjustment code value DGAIN_L, the fifth output end of the digital processing unit DSPU is connected to the input end of the digital-to-analog converter DAC_L and generates a digital code value DDAC_L, the output end of the digital-to-analog converter DAC_L is connected to the second input end of the programmable gain amplifier PGA_L and generates an analog signal SDAC_L, and the third output end of the digital processing unit DSPU is connected to the input end of the current signal output module IOUT.

5. A back-magnetic elimination method for a back-magnetic elimination circuit applied to a wheel speed sensor according to any one of claims 1 to 4, characterized in that The following steps are involved: Hall plates Hall_R, Hall_C and Hall_L convert external sinusoidal magnetic signals into electrical signals that are easy for the chip to process. The output signals VR+, VR-, VC+ and VC- are input into the differential difference amplifier DDA_R of the first signal chain, the electrical signals induced by the Hall disk Hall_R and the Hall disk Hall_C are subtracted, and the signals and the back magnetic offset are preliminarily amplified; the signal amplified by the differential difference amplifier DDA_R is input into the programmable gain amplifier PGA_R for further amplification; the output signal of the programmable gain amplifier PGA_R is input into the successive approximation analog-to-digital converter SARADC_R for quantization to obtain a digital code stream DO_R that is easy for the digital processing unit DSPU to process; the digital processing unit DSPU performs calculations on the digital code stream DO_R , calculate the corresponding back magnetic offset information and the digital code value DDAC_R for eliminating the back magnetic offset, and calculate the amplitude information and the gain adjustment code value DGAIN_R; the digital code value DDAC_R for eliminating the back magnetic offset is input into the digital-to-analog converter DAC_R, and the digital-to-analog converter DAC_R outputs the analog signal SDAC_R to the programmable gain amplifier PGA_R to eliminate the back magnetic offset of the Hall disk Hall_R and the Hall disk Hall_C; the gain adjustment code value DGAIN_R is input into the programmable gain amplifier PGA_R, and the gain is adjusted to amplify the signal to a suitable size; the digital code value DO_R is used to represent the speed information, control the current signal output module IOUT, and transmit the speed information to the outside world in the form of current through encoding; The output signals VC+, VC-, VL+ and VL- are input into the second signal chain differential amplifier DDA_L, the electrical signals sensed by the Hall disk Hall_C and the Hall disk Hall_L are subtracted, and the signals and the back magnetic offset are preliminarily amplified; the signal amplified by the differential amplifier DDA_L is input into the programmable gain amplifier PGA_L for further amplification; the output signal of the programmable gain amplifier PGA_L is input into the successive approximation analog-to-digital converter SARADC_L for quantization, and a digital code stream DO_L that is easy to process by the digital processing unit DSPU is obtained; the digital processing unit DSP U calculates and processes the digital code stream DO_L, calculates the corresponding back magnetic offset information and the digital code value DDAC_L for eliminating the back magnetic offset, and calculates the amplitude information and the gain adjustment code value DGAIN_L; the digital code value DDAC_L for eliminating the back magnetic offset is input into the digital-to-analog converter DAC_L, and the digital-to-analog converter DAC_L outputs the analog signal SDAC_L to the programmable gain amplifier PGA_L to eliminate the back magnetic offset of the Hall disk Hall_C and the Hall disk Hall_L; the gain adjustment code value DGAIN_L is input into the programmable gain amplifier PGA_L, and the gain is adjusted to amplify the signal to a suitable size; The digital code value DO_R and the digital code value DO_L are calculated and processed to obtain direction information, and the current signal output module IOUT is controlled to transmit the direction information to the outside world in the form of current through encoding.

6. The back magnetic elimination method according to claim 5, characterized in that: After the wheel speed sensor is powered on, the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L are at the minimum amplification factor by default; after the back magnetic offset is eliminated when the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L are at the minimum amplification factor, the gain is adjusted according to the signal amplitude to amplify the signal to an appropriate size; when the back magnetic offset changes, the current digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset cannot completely eliminate the offset, and there is residual back magnetic offset; in order to avoid re-adjusting the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L to the minimum amplification factor to eliminate the back magnetic offset, the residual back magnetic offset is compared with the acceptable back magnetic offset. When the residual back magnetic offset changes, the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset cannot completely eliminate the offset, and there is residual back magnetic offset. When the residual back magnetic offset is adjusted to be less than the acceptable back magnetic offset, the judgment of speed and direction will not be affected; the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset are not adjusted, or the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset are fine-tuned in small steps; when the residual back magnetic offset is greater than the acceptable back magnetic offset, the judgment of speed and direction is affected; the programmable gain amplifier PGA_R and the programmable gain amplifier PGA_L are readjusted to the minimum amplification factor, and the digital processing unit DSPU recalculates and processes them to calculate the corresponding back magnetic offset information and the digital code value DDAC_R and the digital code value DDAC_L for eliminating the back magnetic offset, the amplitude information and the gain adjustment code value DGAIN_R and the gain adjustment code value DGAIN_L.

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