Superlattice infrared detector electrode preparation method and superlattice infrared detector

Abstract

The invention discloses a superlattice infrared detector electrode preparation method and an electrode hole. The method comprises the following steps: spin-coating a layer of photoresist on the surface of a superlattice material as an etching mask layer, and preparing an area array pattern; using ICP dry etching equipment to transfer the area array pattern to the superlattice material to form a mesa structure; depositing a passivation layer on the surface of the superlattice mesa by using plasma enhanced chemical vapor deposition equipment; spin-coating another layer of photoresist as an etching mask layer and preparing an electrode hole pattern; by controlling parameters of ICP dry etching equipment, transferring an electrode hole pattern to the superlattice mesa to prepare an electrode hole of which the side wall has a set inclination angle; spin-coating a layer of photoresist as a mask layer and preparing an electrode pattern; and sputtering a metallization system in an electrode hole area and completing electrode preparation through a stripping process. By controlling the etching inclination angle of the side wall of the electrode hole, the prepared electrode is good in continuous covering effect, so that the dark current of the superlattice device is reduced, and the performance and the stability of the device are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor materials and devices, and in particular to a method for preparing a superlattice infrared detector electrode and a superlattice infrared detector. Background Art

[0002] High-performance infrared detectors and focal plane arrays are widely used in the fields of medicine, astronomy, environmental monitoring, etc. Among them, the periodic quantum structure formed by the alternating growth of III-V semiconductor materials - type II superlattice materials - is one of the candidate materials for preparing high-performance infrared focal planes. The band structure of type II superlattice materials can be adjusted from short-wave infrared to very long-wave infrared. It has the characteristics of large effective mass, long Auger recombination lifetime, and easy dark current suppression. It is the preferred material for the new generation of infrared focal plane detectors.

[0003] Although type II superlattice materials have significant advantages in theory and technology, their actual detector performance has not yet reached the expected theoretical value. The dark current of superlattice infrared detection devices is usually high, which introduces large noise and blind pixel rate, reduces device sensitivity, and also affects the uniformity of the focal plane, thus limiting the application performance of superlattice detectors. Therefore, how to reduce the dark current is the key to the development and preparation of superlattice infrared detectors.

[0004] In terms of the superlattice detector chip preparation process, in addition to table etching, thin film growth and passivation processes, electrode contact hole etching is also the key to reducing the dark current of the device. The preparation of electrode holes is a prerequisite for achieving ohmic contact of electrodes. In order to maximize the output of the electrical signal generated by the superlattice material and read it through the readout circuit, it is usually necessary to open holes (electrode holes) in the passivation layer grown on the superlattice table so that the subsequently deposited metal can conduct electrical signals.

[0005] In the related art, the preparation of electrode holes includes two methods: wet etching and dry etching. However:

[0006] The wet etching process is prone to serious undercutting between the passivation layer and the superlattice table, and has disadvantages such as poor uniformity and poor repeatability of etching depth, resulting in poor metal coverage on the electrode holes and large dark current of the prepared focal plane array. Therefore, in comparison, the dry etching process is more widely used in the preparation of superlattice electrode holes.

[0007] In the dry etching process, inductively coupled plasma etching technology (ICP) is the mainstream process used in dry etching at this stage. The side walls of the electrode holes prepared by this process are relatively steep, and it is difficult for the subsequent sputtered metal to form a good continuous coverage effect on the side walls, and it often shows a certain degree of fracture, which seriously affects the subsequent flip-chip interconnection with the integrated circuit; and as time goes by, the indium column will gradually penetrate into the superlattice material to generate leakage, resulting in an increase in dark current, affecting the performance and stability of the superlattice device. Summary of the invention

[0008] The present invention provides a superlattice infrared detector electrode preparation method and a superlattice infrared detector, which solves the problem of poor continuous metal coverage of the side wall of the electrode contact hole prepared by the superlattice infrared detector through a dry etching process.

[0009] In order to achieve the above objectives, this application adopts the following technical solutions:

[0010] In a first aspect, a method for preparing a superlattice infrared detector electrode is provided, comprising:

[0011] Spin coating a photoresist with a thickness of 2 μm to 8 μm on the surface of the superlattice material as an etching mask layer, and further preparing a planar array pattern;

[0012] Presetting the isolation groove spacing parameters, using ICP dry etching equipment to transfer the surface array pattern to the superlattice material to form a mesa structure;

[0013] Depositing a passivation layer with a thickness of 500 nm to 1000 nm on the surface of the superlattice table using a plasma enhanced chemical vapor deposition device;

[0014] Spin coating another layer of photoresist with a thickness of 2 μm to 4 μm on the surface of the superlattice terrace covered by the passivation layer as an etching mask layer, and further preparing an electrode hole pattern; wherein the electrode hole diameter is 2 μm to 5 μm;

[0015] The electrode hole pattern is transferred to the superlattice table by the ICP dry etching equipment to prepare an electrode hole with a set inclination angle on the side wall; during the etching process, CHF3 and Ar are used as etching gases, the etching gas flow rates are 5-30sccm and 10-30sccm respectively, the ICP power is 200-800W, the RF power is 40-200W, and the chamber pressure is 10-50mTorr;

[0016] After completing the etching of the electrode holes, spin-coating a photoresist with a thickness of 4 μm to 8 μm as a mask layer, and preparing an electrode pattern;

[0017] The metallization system is sputtered in the electrode hole area and the electrode preparation is completed by a lift-off process.

[0018] In a first possible implementation manner of the first aspect, the inclination angle of the electrode hole side wall ranges from 70° to 90°.

[0019] Based on the first possible implementation of the first aspect, in a second possible implementation of the first aspect, according to different tilt angles, the ratio of physical etching to chemical etching of the ICP dry etching equipment varies between 0.75:1 and 1:0.75.

[0020] In a third possible implementation manner of the first aspect, the etching gas flow rate is 15 sccm or 20 sccm, the ICP power is 600 W, the RF power is 80 W, and the chamber pressure is 30 mTorr.

[0021] In a fourth possible implementation manner of the first aspect, the spacing between the isolation grooves is in a range of 2 μm-10 μm.

[0022] In a fifth possible implementation of the first aspect, it also includes: placing the superlattice focal plane device with completed electrode preparation into a 77K liquid nitrogen environment, measuring the IV curve, obtaining a current-voltage diagram, and obtaining the electrical characteristics of the focal plane.

[0023] In a sixth possible implementation of the first aspect, after the electrode hole etching is completed, a confocal microscope is used to measure the etching depth of the sample and the etching rate is calculated; a scanning electron microscope is used to measure the etching angle of the sample and obtain the electrode hole sidewall morphology.

[0024] In a second aspect, a superlattice infrared detector electrode hole is provided, wherein the side wall of the electrode hole has a set inclination angle.

[0025] In a first possible implementation manner of the second aspect, the inclination angle of the sidewall of the electrode hole ranges from 70° to 90°.

[0026] The method for preparing the superlattice infrared detector electrode of the present invention has the following advantages:

[0027] The above-mentioned dry etching process is used to prepare the electrode contact holes and electrodes of the superlattice infrared detection device, that is, the ICP power, RF power, reactant flow rate and chamber pressure are adjusted at the same time, which can break the balance between the physical process and the chemical process in the etching system and control the degree of isotropic etching. This new preparation process can achieve the change of the etching inclination angle of the electrode hole sidewall (from 90° to 70°), and the obtained electrode holes have good uniformity, uniform size and etching depth, high repeatability, and no wet etching drilling phenomenon. The electrode obtained by further preparation has a good continuous coverage effect, so that the superlattice reduces the dark current of the device and improves the performance and stability of the device.

[0028] To avoid repetition, the technical effects of the superlattice infrared detector electrode hole corresponding to the superlattice infrared detector electrode preparation method of the present invention will not be described here. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic flow chart of a method for preparing a superlattice infrared detector electrode provided in an embodiment of the present application;

[0030] Figure 2 A scanning electron microscope image of the electrode hole morphology prepared with different etching parameters provided in the embodiment of the present application;

[0031] Figure 3 A scanning electron microscope image of the electrode hole morphology prepared by adjusting the etching balance provided in an embodiment of the present application;

[0032] Figure 4 A schematic diagram of a type II superlattice infrared detector provided in an embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined purpose, the technical solutions in the embodiments of the present application are clearly described. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0034] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the terms used in this way are interchangeable where appropriate, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0035] The description of the method flow in the specification of the present application and the steps of the flowchart in the drawings of the present specification do not have to be strictly executed according to the step numbers, and the method steps can be executed in a different order. Moreover, some steps can be omitted, multiple steps can be combined into one step, and / or one step can be decomposed into multiple steps.

[0036] A superlattice infrared detector electrode preparation method and a superlattice infrared detector provided in the embodiments of the present application are described in detail below in combination with the accompanying drawings and preferred embodiments.

[0037] First, the application scenario of the method for preparing a superlattice infrared detector electrode in an embodiment of the present application is described in detail.

[0038] The wet etching process easily causes serious undercutting between the passivation layer and the superlattice table, and has disadvantages such as poor uniformity and poor repeatability of etching depth, resulting in poor metal coverage on the electrode holes and large dark current of the prepared focal plane array.

[0039] Different from wet etching, dry etching has the advantages of low damage, high processing accuracy, good etching uniformity, stable and controllable process, etc., and can be used in the preparation process of superlattice electrode holes. Inductively coupled plasma etching technology (ICP) is the mainstream process used in dry etching at this stage, and its etching of materials is divided into physical etching and chemical etching.

[0040] Inductively Coupled Plasma (ICP) etching technology is an advanced dry etching method that is widely used in semiconductor manufacturing, micro-electromechanical systems (MEMS), optoelectronic devices and other precision structures. ICP etching ionizes the gas in the process chamber by inductively coupling radio frequency (RF) energy to the gas in the process chamber through a coil. This plasma contains a large number of high-energy free radicals and charged particles, which can be used for precise physical or chemical etching of materials. By adjusting various process parameters, the etching characteristics can be flexibly changed to meet the needs of different applications. However, there are relatively few studies on the etching of superlattice electrode holes. How to adjust the balance between physical etching and chemical etching, prepare electrode holes with good metal coverage, and reduce the dark current of superlattice devices requires further research.

[0041] Based on this, the present application proposes a method for preparing electrodes of a superlattice infrared detector. By adjusting the balance between physical etching and chemical etching, an electrode hole with good metal coverage is prepared to reduce the dark current of the superlattice device. The present application has developed a dry etching process for preparing electrode holes with inclined side walls for superlattice devices, so that the metal electrode can completely cover the surface of the electrode hole and efficiently output the electrical signal generated by the focal plane. Reasonable design of process parameters such as ICP ion source power, RF power, chamber pressure, etching gas type and flow rate during dry etching can break the balance between physical etching and chemical etching in the etching system, realize process control of the inclination angle of the electrode hole side wall, obtain smooth electrode hole side walls and suitable inclination angles, and provide the best deposition conditions for the growth of metal electrodes of superlattice infrared detectors, avoiding metal coverage fractures caused by steep side walls or drilling. The present application can be applied to the preparation of large-scale infrared detectors.

[0042] See also Figure 1 , the present application embodiment provides a method for preparing a superlattice infrared detector electrode, such as Figure 1 As shown, the preparation method of the embodiment of the present application includes:

[0043] Step S1, spin-coating a photoresist with a thickness of 2 μm to 8 μm on the surface of the superlattice material as an etching mask layer, and further preparing a planar array pattern.

[0044] When this step is implemented, a photoresist with a thickness of 2μm / 4μm / 6μm / 8μm can be spin-coated on the surface of the superlattice material as an etching mask layer. Preferably, the thickness in the embodiment of the present application is 4μm. After pre-baking, photolithography, development, fixing, post-baking and other steps, a surface array pattern of the photoresist mask is obtained.

[0045] Step S2, presetting the isolation groove spacing parameters, using ICP dry etching equipment, transferring the area array pattern to the superlattice material to form a mesa structure.

[0046] The isolation groove spacing is in the range of 2μm-10μm. Preferably, the embodiment of the present application uses a 5μm isolation groove spacing. In infrared detectors, in order to improve detection efficiency and reduce interference between adjacent detection units, independent "tables" are etched from the base material to form a three-dimensional structure. Each table corresponds to a separate detection unit or pixel to ensure that each detection unit can work independently and achieve physical isolation between pixels. The isolation groove spacing refers to the distance between two adjacent table surfaces (i.e., two pixels).

[0047] Step S3, using plasma enhanced chemical vapor deposition (PECVD) equipment, depositing a passivation layer with a thickness of 500nm to 1000nm on the surface of the superlattice table.

[0048] After the mesa is prepared, the surface is passivated by plasma enhanced chemical vapor deposition (PECVD) equipment to prevent the superlattice material from being affected by the external environment. The passivation layer can improve the stability, oxidation resistance and thermal shock resistance of the device. The thickness of the passivation layer can be 500nm / 800nm / 1000nm. Preferably, the thickness of the passivation layer in the embodiment of the present application is 800nm.

[0049] Step S4, spin-coating another layer of photoresist with a thickness of 2 μm to 4 μm on the surface of the superlattice terrace covered with the passivation layer as an etching mask layer, and further preparing an electrode hole pattern; wherein the electrode hole diameter is 2 μm to 5 μm.

[0050] On the surface of the superlattice terrace covered with the passivation layer, a photoresist with a thickness of 2 μm / 3 μm / 4 μm is spin-coated as an etching mask layer. Preferably, the embodiment of the present application uses a 4 μm thick layer. After pre-baking, photolithography, development, fixing, post-baking and other steps, the electrode hole pattern of the photoresist mask is obtained. Preferably, the embodiment of the present application makes the electrode hole diameter 3 μm.

[0051] Step S5, transferring the electrode hole pattern to the superlattice table through ICP dry etching equipment to prepare an electrode hole with a set inclination angle on the side wall; during the etching process, CHF3 and Ar are used as etching gases, and the etching gas flow rates are 5-30sccm and 10-30sccm respectively, the ICP power is 200-800W, the RF power is 40-200W, and the chamber pressure is 10-50mTorr.

[0052] During the electrode hole etching process, the ICP power is controlled so that the ICP radio frequency source can fully ionize the input reaction gas to avoid excessive unionized gas in the chamber, which affects the etching rate; the RF power is controlled so that the ionized ions can vertically bombard the surface of the material sample to avoid the electrode hole from not being able to be etched; at the same time, the etching ratio of the chemical etching of the ICP ionized gas and the physical etching of the RF vertical bombardment is adjusted so that the side wall of the electrode hole presents a certain inclination angle.

[0053] See also Figure 2 , SEM images of electrode hole morphology prepared for different etching parameters; by setting the etching parameters, the best coordination between physical bombardment and chemical etching is achieved during the etching process. Preferably, the etching gas flow rate of the embodiment of the present application is 15sccm or 20sccm, the ICP power is 600W, the RF power is 80W, and the chamber pressure is 30mTorr.

[0054] In some possible implementations, the inclination angle of the electrode hole sidewall ranges from 70° to 90°.

[0055] A tilt angle of 70° to 90° is beneficial for good continuous coverage of subsequent metal layers, thereby reducing dark current and improving electrical performance.

[0056] In some possible implementations, the ratio of physical etching to chemical etching of the ICP dry etching device varies between 0.75:1 and 1:0.75, depending on the tilt angle. For example, the ratio of physical etching to chemical etching can vary from 0.75:1, 1:1, and 1:0.75, depending on the tilt angle.

[0057] In some possible implementations, after the electrode hole etching is completed, a confocal microscope is used to measure the etching depth of the sample and calculate the etching rate; a scanning electron microscope is used to measure the etching angle of the sample and obtain the electrode hole sidewall morphology. Thus, the etching quality is evaluated. Figure 3 , SEM image of electrode pore morphology prepared to adjust etching balance.

[0058] Step S6, after completing the electrode hole etching, spin-coat a photoresist with a thickness of 4 μm to 8 μm as a mask layer, and prepare an electrode pattern.

[0059] After the electrode holes are obtained by dry etching, a photoresist with a thickness of 4μm / 6μm / 8μm is once again spin-coated as a mask layer. Preferably, the embodiment of the present application uses a 4μm thick photoresist mask, and after pre-baking, photolithography, development, fixing and other steps, an electrode pattern of the photoresist mask is obtained.

[0060] Step S7, sputtering a metallization system in the electrode hole area and completing electrode preparation through a lift-off process.

[0061] Step S8, placing the superlattice focal plane device with completed electrode preparation into a 77K liquid nitrogen environment, measuring the IV curve, obtaining a current-voltage diagram, and obtaining the electrical characteristics of the focal plane.

[0062] The above has the following beneficial effects and advantages:

[0063] The above-mentioned dry etching process is used to prepare the electrode contact holes of the superlattice infrared detection device, that is, the ICP power, RF power, reactant flow rate and chamber pressure are adjusted simultaneously, which can break the balance between the physical process and the chemical process in the etching system and control the degree of isotropic etching. This new preparation process can achieve the change of the electrode hole sidewall etching angle from 90° to 70°, and the obtained electrode holes have good uniformity, uniform size and etching depth, high repeatability, and no drilling phenomenon of wet etching. The etching parameters of the invention are applied to the preparation of electrode holes of superlattice materials. It is found that the electrode holes with a sidewall inclination angle of 70° have better electrode coverage than the devices with other sidewall inclination angles of electrode holes. The focal plane array device shows low dark current, and the corresponding hybrid chip measured performance signal value, average peak detection rate and noise equivalent temperature difference are also significantly better than the other electrode hole etching conditions. The results show that reasonable design of ICP power, RF power, etching gas flow rate and chamber pressure can realize the process technology that combines physical bombardment with chemical etching, balance the effects of isotropy and anisotropy in the etching system, obtain good etching effect, and achieve good coverage of superlattice electrodes. This study lays the foundation for the selection of process routes for superlattice infrared focal plane devices.

[0064] See also Figure 4 Corresponding to the above-mentioned embodiment of the method for preparing a superlattice infrared detector electrode, the embodiment of the present application provides a superlattice infrared detector electrode hole, wherein the side wall of the electrode hole has a set inclination angle. The inclination angle of the side wall of the electrode hole ranges from 70° to 90°.

[0065] The above-mentioned superlattice infrared detector electrode holes can achieve the same technical effects as above, and will not be described again here to avoid repetition.

[0066] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0067] It can be understood that the embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific embodiments, which are merely illustrative and not restrictive, and those skilled in the art are aware that various changes or equivalent replacements can be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, those of ordinary skill in the art can modify these features and embodiments to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention under the inspiration or teaching of the present application. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of the present application belong to the scope protected by the present invention.

Claims

1. A method for preparing a superlattice infrared detector electrode, characterized in that: include: Spin coating a photoresist with a thickness of 2 μm to 8 μm on the surface of the superlattice material as an etching mask layer, and further preparing a planar array pattern; Presetting the isolation groove spacing parameters, using ICP dry etching equipment to transfer the surface array pattern to the superlattice material to form a mesa structure; Depositing a passivation layer with a thickness of 500 nm to 1000 nm on the surface of the superlattice table using a plasma enhanced chemical vapor deposition device; Spin coating another layer of photoresist with a thickness of 2 μm to 4 μm on the surface of the superlattice terrace covered by the passivation layer as an etching mask layer, and further preparing an electrode hole pattern; wherein the electrode hole diameter is 2 μm to 5 μm; The electrode hole pattern is transferred to the superlattice table by the ICP dry etching equipment to prepare an electrode hole with a set inclination angle on the side wall; during the etching process, CHF3 and Ar are used as etching gases, the etching gas flow rates are 5-30sccm and 10-30sccm respectively, the ICP power is 200-800W, the RF power is 40-200W, and the chamber pressure is 10-50mTorr; After completing the etching of the electrode holes, spin-coating a photoresist with a thickness of 4 μm to 8 μm as a mask layer, and preparing an electrode pattern; The metallization system is sputtered in the electrode hole area and the electrode preparation is completed by a lift-off process.

2. The method for preparing a superlattice infrared detector electrode according to claim 1, characterized in that: The inclination angle of the electrode hole side wall ranges from 70° to 90°.

3. The method for preparing a superlattice infrared detector electrode according to claim 2, characterized in that: Depending on the tilt angle, the ratio of physical etching to chemical etching of the ICP dry etching equipment varies between 0.75:1 and 1:0.

75.

4. The method for preparing a superlattice infrared detector electrode according to claim 1, characterized in that: The etching gas flow rate is 15 sccm or 20 sccm, the ICP power is 600 W, the RF power is 80 W, and the chamber pressure is 30 mTorr.

5. The method for preparing a superlattice infrared detector electrode according to claim 1, characterized in that: The spacing between the isolation grooves ranges from 2 μm to 10 μm.

6. The method for preparing a superlattice infrared detector electrode according to claim 1, characterized in that: Also includes: The superlattice focal plane device with completed electrode preparation was placed in a liquid nitrogen environment at 77K, and the IV curve was measured to obtain the current-voltage diagram and the electrical characteristics of the focal plane.

7. The method for preparing a superlattice infrared detector electrode according to claim 1, characterized in that: After the electrode hole etching is completed, a confocal microscope is used to measure the etching depth of the sample and calculate the etching rate; a scanning electron microscope is used to measure the etching angle of the sample and obtain the electrode hole sidewall morphology.

8. A superlattice infrared detector, characterized in that: The side wall of the electrode hole of the superlattice infrared detector has a set inclination angle.

9. The superlattice infrared detector according to claim 8, characterized in that: The inclination angle of the side wall of the electrode hole ranges from 70° to 90°.

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