Vertical exchange bias structure and preparation method thereof
By adjusting the characteristics and growth conditions of the interface magnetic layer and controlling the exchange bias effect of the magnetic film, the problem of the smaller exchange bias field of magnetic electronic devices at high temperatures is solved, and its thermal stability is improved. It is suitable for the development of high-performance spintronic devices.
Patent Information
- Application Number
- CN202510047728.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-13
- Publication Date
- 2025-04-15
AI Technical Summary
In the prior art, under the action of high temperature or magnetic field, the exchange bias field of magnetic electronic devices will become smaller, resulting in a degradation in use performance and insufficient thermal stability.
By changing the characteristics and growth conditions of the interface magnetic layer, the exchange bias effect of the magnetic film is regulated and its thermal stability is improved. The specific method includes adjusting the sputtering pressure and power of the interface magnetic layer Pt/CoFe, controlling the interface roughness, and promoting the structure and optimal orientation of the antiferromagnetic layer.
It improves the thermal stability of magnetic thin film exchange bias, so that it maintains high performance stability in high temperature environments, and is suitable for the development of high-performance and high-stability spintronic devices.
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Figure CN119836216A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of information technology and spin electronics, and particularly relates to a vertical exchange bias structure and a preparation method thereof. Background Art
[0002] The exchange bias originates from the interfacial exchange coupling of the ferromagnetic / antiferromagnetic bilayer system, which is specifically manifested as the deviation of the hysteresis loop of the ferromagnetic layer from the zero point of the magnetic field axis. The deviation is called the exchange bias field, and it is also accompanied by an increase in coercive force. The exchange bias effect has good application prospects in magnetic recording read heads, magnetic sensors, magnetic random access memories, etc. The perpendicular exchange bias combines the characteristics of exchange bias and perpendicular magnetic anisotropy. The introduction of the perpendicular exchange bias effect helps to further understand the spin alignment behavior at the ferromagnetic / antiferromagnetic interface, and also provides a new way for applications in information storage. In recent years, studies have found that by regulating the perpendicular exchange bias field in the film, the head noise can be well reduced, the adverse effects of the edge effect can be overcome, and the miniaturized electronic devices can still maintain a high sensitivity, so the perpendicular exchange bias effect has gradually been taken seriously.
[0003] During the processing or use of magnetoelectronic devices, they need to withstand certain high temperatures or magnetic fields, which will cause the exchange bias field of the device to become smaller and the performance to decline. The thermal stability of the exchange bias has a great impact on the reliability of magnetoelectronic devices. Therefore, studying the thermal stability of the exchange bias will help the design and use of electronic devices. In addition, the study of thermal stability will also help to reveal the nature of the exchange bias more deeply. Summary of the invention
[0004] The object of the present invention is to provide a method for improving the thermal stability of a vertical exchange bias structure to solve the above problems in the prior art.
[0005] One of the technical solutions provided by the present invention:
[0006] A method for preparing a vertical exchange bias structure comprises the following steps: fixing a substrate on a substrate stage of a vacuum sputtering chamber, adjusting the vacuum degree, and sputtering a buffer layer on the upper surface of the substrate; and then sequentially sputtering a seed layer, a magnetic layer, an interface magnetic layer, an antiferromagnetic layer, and a protective layer on the upper surface of the buffer layer to obtain the vertical exchange bias structure; the interface magnetic layer is Pt / CoFe, the period is 1, wherein the sputtering power of the CoFe layer is 10W, and the sputtering gas pressure is 0.7Pa.
[0007] Preferably, the buffer layer is a tantalum buffer layer, the sputtering gas pressure of the buffer layer is 0.2 Pa, the sputtering power is 10 W, and the sputtering time is controlled to achieve a thickness of 5 nm on the substrate.
[0008] Preferably, the seed layer is a platinum seed layer, the sputtering gas pressure of the seed layer is 0.3 Pa, the sputtering power is 20 W, and the time is controlled to sputter and grow the seed layer on the buffer layer to a thickness of 5 nm.
[0009] Preferably, the magnetic layer is [Pt / Co]2, with a period number of 2, wherein the Pt sputtering pressure is 0.3Pa, the sputtering power is 20W, and the thickness of the Pt layer grown by controlling the sputtering time is 2nm, the Co sputtering pressure is 0.3Pa, the sputtering power is 10W, and the thickness of the Co layer grown by controlling the sputtering time is 1nm.
[0010] Preferably, the sputtering gas pressure of Pt in the interface magnetic layer is 0.3 Pa, the sputtering power is 20 W, the thickness of the Pt layer sputtered on the magnetic layer is controlled to be 2 nm, the thickness of the CoFe layer sputtered on the Pt layer is 1 mm, and the atomic ratio of Co and Fe in the CoFe is 0.35:0.65.
[0011] Preferably, the antiferromagnetic layer is an IrMn antiferromagnetic layer, the sputtering gas pressure of the antiferromagnetic layer is 0.3 Pa, the sputtering power is 20 W, and the thickness of the IrMn layer sputtered on the interface magnetic layer is controlled to be 15 nm.
[0012] Preferably, the protective layer is a Ta protective layer, the sputtering gas pressure of the protective layer is 0.2 Pa, the sputtering power is 10 W, and the thickness of the time-controlled protective layer is 5 nm.
[0013] The second technical solution provided by the present invention is:
[0014] A vertical exchange bias structure is prepared by the above preparation method. The vertical exchange bias structure includes a substrate, a buffer layer, a seed layer, a ferromagnetic layer, an interface ferromagnetic layer, an antiferromagnetic layer and a protective layer from bottom to top; wherein the thickness of the buffer layer is 5nm, the thickness of the seed layer is 5nm, the thickness of the ferromagnetic layer is 6nm, the thickness of the interface magnetic layer is 3nm, the thickness of the antiferromagnetic layer is 15nm, and the thickness of the protective layer is 5nm.
[0015] The third technical solution provided by the present invention is:
[0016] A use of the vertical exchange bias structure in preparing electronic devices.
[0017] Preferably, the electronic device is a spin electronic device.
[0018] Compared with the prior art, the present invention has the following advantages and technical effects:
[0019] The invention regulates the exchange bias effect of the magnetic film by changing the characteristics and growth conditions of the interface magnetic layer, keeping the overall magnetism of the magnetic layer unchanged, which has important guiding significance for designing the structure of magnetic materials and devices. The invention improves the thermal stability of the exchange bias of the magnetic film, and can keep the magnetic film at a high performance stability in a high temperature environment, which is of great significance for the development of high-performance and high-stability spin electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0021] Figure 1 Magnetic hysteresis loops of the perpendicular exchange bias structures prepared in Example 1 and Comparative Examples 1-4.
[0022] Figure 2 This is a relationship diagram between the exchange bias field and annealing temperature of the vertical exchange bias structure prepared in Example 1. DETAILED DESCRIPTION
[0023] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as limiting the present invention, but should be understood as a more detailed description of certain aspects, features, and embodiments of the present invention.
[0024] It should be understood that the terms described in the present invention are only for describing special embodiments and are not intended to limit the present invention. In addition, for the numerical range in the present invention, it should be understood that each intermediate value between the upper and lower limits of the scope is also specifically disclosed. Each smaller range between the intermediate value in any stated value or stated range and any other stated value or intermediate value in the described range is also included in the present invention. The upper and lower limits of these smaller ranges can be independently included or excluded in the scope.
[0025] Unless otherwise indicated, all technical and scientific terms used herein have the same meanings as those generally understood by those skilled in the art. Although the present invention describes only preferred methods and materials, any methods and materials similar or equivalent to those described herein may also be used in the implementation or testing of the present invention. All documents mentioned in this specification are incorporated by reference to disclose and describe the methods and / or materials associated with the documents. In the event of a conflict with any incorporated document, the content of this specification shall prevail.
[0026] It will be apparent to those skilled in the art that various modifications and variations may be made to the specific embodiments of the present invention description without departing from the scope or spirit of the present invention. Other embodiments derived from the present invention description will be apparent to the skilled artisan. The present invention description and examples are exemplary only.
[0027] The words “include,” “including,” “have,” “contain,” etc. used in this document are open-ended terms, meaning including but not limited to.
[0028] Exchange bias field, usually denoted as H EB or H E , refers to the situation in a ferromagnetic (FM) / antiferromagnetic (AFM) system when the system is placed in an external magnetic field at a temperature above the antiferromagnetic Neel temperature (T N ) and lower than the Curie temperature (T C ) When the ferromagnetic layer is cooled to below the Neel temperature, the hysteresis loop of the ferromagnetic layer will deviate from the origin along the direction of the magnetic field. This deviation is called the exchange bias field. At the same time, this phenomenon is accompanied by an increase in coercive force, which is called the exchange bias effect.
[0029] The hysteresis loop describes the relationship between the magnetization intensity M or magnetic induction intensity B and the magnetic field intensity H during the repeated magnetization process of ferromagnetic materials (including ferromagnetic and ferrimagnetic materials).
[0030] DC magnetron sputtering is a high-speed, low-temperature sputtering technology. DC magnetron sputtering equipment usually consists of a sputtering chamber, a target material, a substrate, a power supply, a magnetic field, and other parts. Its working principle is as follows: In DC magnetron sputtering, the target material acts as a cathode and the substrate acts as an anode, and a DC voltage is applied between the two. When the voltage is high enough, the atoms on the surface of the target material will be ionized to form a plasma. Under the action of the electric field, the positive ions in these plasmas will accelerate to bombard the surface of the target material and sputter out the target atoms. At the same time, the secondary electrons generated by sputtering are accelerated in the electric field, and bend and spiral under the action of the magnetic field, thereby increasing the number of collisions with working gas molecules (such as argon atoms). These collisions not only increase the density of the plasma, but also cause the secondary electrons to gradually lose energy, and eventually deposit on the substrate or be absorbed by the inner wall of the vacuum chamber and the target source anode.
[0031] The embodiment of the present invention provides a method for preparing a vertical exchange bias structure. The prepared magnetic film structure is sequentially as follows from bottom to top: substrate, buffer layer, seed layer, ferromagnetic layer, interface ferromagnetic layer, antiferromagnetic layer and protective layer; the interface ferromagnetic layer is [Pt / CoFe], the atomic ratio of CoFe is 0.35∶0.65, and the exchange bias effect is regulated by changing the number and state of the interface uncompensated magnetic moment; the gas pressure of the interface ferromagnetic layer CoFe changes from 0.1Pa-0.9Pa, and the interface roughness is reduced by changing the film growth conditions, the structure and preferred orientation of the antiferromagnetic layer are promoted, and the size and thermal stability of the exchange bias field are changed. For the uncompensated interface, as the roughness decreases, the direction distribution of the arrangement of the interface magnetic moment of the antiferromagnetic layer becomes more concentrated, so that the net magnetic moment of the antiferromagnetic layer at the interface increases, and the exchange bias field increases.
[0032] Example 1
[0033] 1) Fix the cleaned and dried SiO2 substrate on the substrate stage of the vacuum sputtering chamber and adjust the vacuum degree to 8.0×10 -6 Pa;
[0034] 2) A tantalum buffer layer with a thickness of 5 nm is sputtered on the substrate by direct current magnetron sputtering with a sputtering gas pressure of 0.2 Pa and a sputtering power of 10 W in a controlled time.
[0035] 3) Sputtering a platinum seed layer with a thickness of 5 nm on the tantalum buffer layer by direct current magnetron sputtering with a sputtering gas pressure of 0.3 Pa and a sputtering power of 20 W, controlling the time;
[0036] 4) A magnetic layer [Pt / Co]2 is formed on the platinum seed layer by DC magnetron sputtering, with a period of 2, a Pt sputtering pressure of 0.3 Pa, a sputtering power of 20 W, and a thickness of 2 nm; a Co sputtering pressure of 0.3 Pa, a sputtering power of 10 W, and a thickness of 1 nm.
[0037] 5) Sputter the interface magnetic layer [Pt / CoFe]1 on the magnetic layer [Pt / Co] by DC magnetron sputtering, with a period of 1, a Pt sputtering pressure of 0.3 Pa, a sputtering power of 20 W, and a thickness of 2 nm; Co 0.35 Fe 0.65 The thickness is fixed at 1 nm, the sputtering power is 10 W, and the sputtering pressure is 0.7 Pa;
[0038] 6) By direct current magnetron sputtering, the sputtering gas pressure is 0.3 Pa, the sputtering power is 20 W, and the time is controlled to sputter an IrMn antiferromagnetic layer on the interface magnetic layer [Pt / CoFe], and the thickness of the IrMn antiferromagnetic layer is 15 nm.
[0039] 7) A Ta protective layer is sputtered and grown on the IrMn antiferromagnetic layer by direct current magnetron sputtering with a sputtering gas pressure of 0.2 Pa and a sputtering power of 10 W under controlled time. The thickness of the Ta protective layer is 5 nm.
[0040] The vertical exchange bias structure prepared in this embodiment is:
[0041] Ta(5nm) / Pt(5nm) / [Pt / (2nm) / Co(1nm) / ]2 / [Pt(2nm) / CoFe(1nm)] / IrMn(15nm) / Ta(5nm)
[0042] Comparative Example 1
[0043] Same as Example 1, except that, in step 5), an interface magnetic layer [Pt / CoFe]1 is sputtered on the magnetic layer [Pt / Co] by DC magnetron sputtering, the period is 1, the Pt sputtering pressure is 0.3 Pa, the sputtering power is 20 W, and the thickness is 2 nm; Co 0.35 Fe 0.65 The thickness is fixed at 1 nm, the sputtering power is 10 W, and the sputtering pressure is 0.1 Pa.
[0044] The vertical exchange bias structure prepared in this comparative example is:
[0045] Ta(5nm) / Pt(5nm) / [Pt / (2nm) / Co(1nm) / ]2 / [Pt(2nm) / CoFe(1nm)] / IrMn(15nm) / Ta(5nm).
[0046] Comparative Example 2
[0047] Same as Example 1, except that, in step 5), an interface magnetic layer [Pt / CoFe]1 is sputtered on the magnetic layer [Pt / Co] by DC magnetron sputtering, the period is 1, the Pt sputtering pressure is 0.3 Pa, the sputtering power is 20 W, and the thickness is 2 nm; Co 0.35 Fe 0.65 The thickness is fixed at 1 nm, the sputtering power is 10 W, and the sputtering pressure is 0.3 Pa.
[0048] The vertical exchange bias structure prepared in this comparative example is:
[0049] Ta(5nm) / Pt(5nm) / [Pt / (2nm) / Co(1nm) / ]2 / [Pt(2nm) / CoFe(1nm)] / IrMn(15nm) / Ta(5nm).
[0050] Comparative Example 3
[0051] Same as Example 1, except that, in step 5), an interface magnetic layer [Pt / CoFe]1 is sputtered on the magnetic layer [Pt / Co] by DC magnetron sputtering, the period is 1, the Pt sputtering pressure is 0.3 Pa, the sputtering power is 20 W, and the thickness is 2 nm; Co 0.35 Fe 0.65 The thickness is fixed at 1 nm, the sputtering power is 10 W, and the sputtering pressure is 0.5 Pa.
[0052] The vertical exchange bias structure prepared in this comparative example is:
[0053] Ta(5nm) / Pt(5nm) / [Pt / (2nm) / Co(1nm) / ]2 / [Pt(2nm) / CoFe(1nm)] / IrMn(15nm) / Ta(5nm).
[0054] Comparative Example 4
[0055] Same as Example 1, except that, in step 5), an interface magnetic layer [Pt / CoFe]1 is sputtered on the magnetic layer [Pt / Co] by DC magnetron sputtering, the period is 1, the Pt sputtering pressure is 0.3 Pa, the sputtering power is 20 W, and the thickness is 2 nm; Co 0.35 Fe 0.65 The thickness is fixed at 1 nm, the sputtering power is 10 W, and the sputtering pressure is 0.9 Pa.
[0056] The vertical exchange bias structure prepared in this comparative example is:
[0057] Ta(5nm) / Pt(5nm) / [Pt / (2nm) / Co(1nm) / ]2 / [Pt(2nm) / CoFe(1nm)] / IrMn(15nm) / Ta(5nm).
[0058] Performance test experiment:
[0059] The vertical exchange bias structures prepared in Example 1 and Comparative Examples 1-4 were subjected to hysteresis loop measurement. Figure 1 The out-of-plane normalized hysteresis loops of the perpendicular exchange bias structures prepared in Example 1 and Comparative Examples 1-4. Exchange bias field H EB =(H L +H R ) / 2, where H L is the coercive field of the descending branch of the hysteresis loop, H R is the coercive field of the rising branch of the hysteresis loop. Figure 1It can be seen that the exchange bias fields of the samples with structures of 0.1Pa (Comparative Example 1), 0.3Pa (Comparative Example 2), 0.5Pa (Comparative Example 3), 0.7Pa (Example 1) and 0.9Pa (Comparative Example 4) are 180Oe, 520Oe, 530Oe, 570Oe and 350Oe respectively.
[0060] The vertical exchange bias structure with the largest exchange bias field, i.e., the sample with the interface magnetic layer pressure of 0.7 Pa (Example 1), was selected. The thin film structure prepared in Example 1 was annealed at 100°C, 150°C, 200°C, 250°C, 300°C, 350°C, and 400°C for 30 min, and the hysteresis loop was measured. The relationship between the exchange bias field and the annealing temperature obtained from the hysteresis loop measurement results is shown in FIG. Figure 2 As shown, Figure 2 The figure is the relationship between the exchange bias field of the magnetic film and the annealing temperature. The exchange bias field of the film is 570Oe before annealing. After annealing at 400°C, the exchange bias field is 250Oe. The exchange bias field of the magnetic film is reduced under high temperature environment, but it can meet the requirements of device operation. It proves that the preparation method of the vertical exchange bias structure provided by the present invention can improve the thermal stability of the vertical exchange bias structure, which is of great significance for the development of high-performance and high-stability spin electronic devices.
[0061] The above are only preferred specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
Claims
1. A method for preparing a vertical exchange bias structure, characterized in that: The following steps are involved: Fixing the substrate on a substrate stage of a vacuum sputtering chamber, adjusting the vacuum degree, and sputtering a buffer layer on the upper surface of the substrate; A seed layer, a magnetic layer, an interface magnetic layer, an antiferromagnetic layer and a protective layer are sequentially sputtered on the upper surface of the buffer layer to obtain the vertical exchange bias structure; the interface magnetic layer is Pt / CoFe with a period of 1, wherein the sputtering power of the CoFe layer is 10W and the sputtering pressure is 0.7Pa.
2. The method for preparing a vertical exchange bias structure according to claim 1, characterized in that: The buffer layer is a tantalum buffer layer, the sputtering gas pressure of the buffer layer is 0.2 Pa, the sputtering power is 10 W, and the thickness is 5 nm.
3. The method for preparing a vertical exchange bias structure according to claim 1, characterized in that: The seed layer is a platinum seed layer with a thickness of 5 nm; the sputtering pressure of the seed layer is 0.3 Pa, and the sputtering power is 20 W.
4. The method for preparing a vertical exchange bias structure according to claim 1, characterized in that: The magnetic layer is [Pt / Co]2, with a period number of 2, wherein the Pt sputtering pressure is 0.3Pa, the sputtering power is 20W, and the thickness of the Pt layer grown by controlling the sputtering time is 2nm, the Co sputtering pressure is 0.3Pa, the sputtering power is 10W, and the thickness of the Co layer grown by controlling the sputtering time is 1nm.
5. The method for preparing a vertical exchange bias structure according to claim 1, characterized in that: The sputtering gas pressure of Pt in the interface magnetic layer is 0.3Pa, the sputtering power is 20W, the thickness of the Pt layer sputtered on the magnetic layer is controlled to be 2nm, the thickness of the CoFe layer sputtered on the Pt layer is 1mm, and the atomic ratio of Co and Fe in the CoFe is 0.35:0.
65.
6. The method for preparing a vertical exchange bias structure according to claim 1, characterized in that: The antiferromagnetic layer is an IrMn antiferromagnetic layer, the sputtering pressure of the antiferromagnetic layer is 0.3 Pa, the sputtering power is 20 W, and the thickness of the IrMn layer is 15 nm.
7. The method for preparing a vertical exchange bias structure according to claim 1, characterized in that: The protective layer is a Ta protective layer, the sputtering gas pressure of the protective layer is 0.2 Pa, the sputtering power is 10 W, and the thickness of the protective layer is 5 nm.
8. A vertical exchange bias structure, characterized in that: It is prepared by the preparation method according to any one of claims 1 to 7.
9. Use of the vertical exchange bias structure according to claim 8 in preparing electronic devices.
10. The use according to claim 9, characterized in that The electronic device is a spin electronic device.
Citation Information
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