Substrate processing method

Abstract

There is provided a method of forming a conformal film on a recess of a substrate in a reaction chamber by repeating a cycle including forming a first film including supplying a silicon source and a reactant, and applying a first power from a power supply unit to the reaction chamber while supplying the silicon source and the reactant, the first membrane is processed by applying a second power to the reaction chamber from a power supply unit while supplying the reactant, where the first power is applied in a pulsed mode, where the power supply unit comprises a matching network comprising an electronically variable capacitor.

Description

Technical Field

[0001] The present invention relates to a method for forming a film on a concave portion, and more particularly, to a method for forming a film on a concave portion quickly and conformally. Background Art

[0002] As the line width of integrated circuits such as semiconductor devices continues to shrink, the films formed on the device structures become thinner and the thermal budget thereon degrades the device performance. Therefore, the need for low temperature processes and more precise control of the conformality of the films has increased. To this end, plasma enhanced atomic layer deposition (PEALD) methods have been introduced to form conformal films on device structures such as recesses at low temperatures.

[0003] The PEALD method introduces plasma into an atomic layer deposition (ALD) process to activate at least one of a source gas, a reactant, and a purge gas, thereby enabling conformal formation of a film along a surface of a device structure at a low temperature.

[0004] In the PEALD method, unlike a plasma enhanced chemical vapor deposition (PECVD) method in which a source gas and a reactant are supplied simultaneously, a source gas and a reactant are supplied sequentially and intermittently. Therefore, the PEALD method has a longer processing time than the existing PECVD method.

[0005] In order to apply power and generate plasma in the PEALD method, a matching network is used to match the impedance between the power generator and the reaction chamber to prevent reflected power and generate stable plasma in the reaction chamber.

[0006] Figure 1 A simplified view of a substrate processing apparatus is shown.

[0007] exist Figure 1 In the embodiment, the substrate processing apparatus 1 may include a reaction chamber 2, a gas supply unit 3, a substrate support unit 4 supporting a substrate 5, and an exhaust unit 6. The gas supply unit 3 may be a showerhead plate, and the substrate support unit 4 may include a heating block (not shown) heating the substrate 5.

[0008] The substrate processing apparatus 1 may further include a power supply unit 7. The power supply unit 7 may include a generator 8 and a matching network 9. The power supply unit 7 may be connected to at least one of the gas supply unit 3 and the substrate support unit 4 to supply power thereto. Thus, the gas supply unit 3 and the substrate support unit 4 may act as electrodes (upper and lower electrodes, respectively).

[0009] Figure 2 shows the configuration of a conventional mechanical matching network. Figure 2In the embodiment, the matching network 9 may include a first variable vacuum capacitor (VVC) 10, a second variable vacuum capacitor (VVC) 11, a first drive motor 12 driving the first VVC 10, a second drive motor 13 driving the second VVC 11, an inductor 14, and a control unit 15 in which software or firmware is installed.

[0010] Matching is achieved by mechanical movement of the first VVC 10 and the second VVC 11 driven by the drive motors 12 and 13, respectively. The VVCs require a certain amount of time to move to a position where the impedance is matched, and thus there is a limit to further reducing the matching time and the processing time.

[0011] Figure 3 The change of forward power and reflected power when impedance is matched by moving the variable vacuum capacitor (VVC) of a conventional mechanical matching network is shown.

[0012] exist Figure 3 In the process, when power (i.e., forward power) is applied, reflected power is also generated during the period P1. The reflected power is power that does not contribute to the process, and as a result, the quality of the process may deteriorate. During the period P1, impedance matching is performed between the power supply unit and the reaction chamber by the matching network. That is, Figure 2 The first VVC 10 and the second VVC 11 are shown to move to find an impedance matching position that eliminates the reflected power. In other words, the period P1 may be referred to as an impedance matching time.

[0013] After impedance matching is completed, there is no reflected power and the plasma becomes stable during period P2. During period P2, full forward power helps to activate the gas. Therefore, the quality of the process and its efficiency can be further improved.

[0014] like Figure 3 As shown, reducing the period P1 (i.e., impedance matching time) can lead to fast substrate processing as well as efficient substrate processing. However, as described above, since the mechanical and physical movement of the VVC in the mechanical matching network requires some time (e.g., longer than 0.3 seconds), there is a limit in reducing the impedance matching time and achieving a short processing time. In addition, the mechanical matching network includes mechanical components that are prone to frequent failures during impedance matching.

[0015] Therefore, a new method is needed to reduce the impedance matching time, achieve a short processing time, and stably operate the matching network in a fast process. Summary of the invention

[0016] The present disclosure relates to a method of forming a film on a recessed portion, and more particularly, to a method of rapidly and conformally forming a film along a recessed surface of a substrate.

[0017] In one or more embodiments, a method for forming a film may include: loading a substrate including a recess into a reaction chamber including a gas supply unit; forming a first film on the substrate by supplying a silicon source and a reactant from a source container to the substrate through the gas supply unit while applying a first power to the reaction chamber from a power supply unit; and processing the first film by applying a second power greater than the first power to the reaction chamber from the power supply unit while supplying the reactant.

[0018] In one or more embodiments, forming the first film and treating the first film may be repeated multiple times.

[0019] In one or more embodiments, the power supply unit may include a matching network including an electronically variable capacitor to match impedance between the power supply unit and the reaction chamber.

[0020] In one or more embodiments, a matching time between the power supply unit and the reaction chamber while supplying the first power and supplying the second power may be 5 milliseconds or less.

[0021] In one or more embodiments, the method may further include purging the reaction chamber after forming the first film and before treating the first film.

[0022] In one or more embodiments, the silicon source may be supplied for 0.1 seconds or less.

[0023] In one or more embodiments, the first power may be between 10W and about 2000W, more specifically, between about 20W and about 500W.

[0024] In one or more embodiments, the first power may be applied in a pulsed mode.

[0025] In one or more embodiments, the duty cycle of the first power may be between about 5% and about 50%, and more specifically, between about 10% and about 30%.

[0026] In one or more embodiments, the pulse frequency of the first power may be between about 100 Hz and about 3000 Hz, and more specifically, between about 300 Hz and about 1000 Hz.

[0027] In one or more embodiments, the first power may be applied for 0.1 seconds or less.

[0028] In one or more embodiments, the second power may be applied in a dual-frequency continuous mode and may include a high-frequency power and a low-frequency power.

[0029] In one or more embodiments, the high frequency power of the second power may be between about 500W and about 3000W, more specifically, between about 1000W and about 2000W, and the low frequency power of the second power may be between about 50W and about 1000W, more specifically, between about 100W and about 800W.

[0030] In one or more embodiments, the second power may be applied for 0.2 seconds or less.

[0031] In one or more embodiments, the source container may be maintained at 50° C. or less.

[0032] In one or more embodiments, the thickness of the gas supply unit may be 10 mm or less.

[0033] In one or more embodiments, the method may further include forming a second film on the first film by repeating a cycle, the cycle comprising: supplying a silicon source to a reaction chamber; applying a first power to the reaction chamber to form the second film, wherein reactants may be supplied throughout the cycle, wherein forming the first film and forming the second film may include a super cycle, wherein the super cycle may be repeated multiple times.

[0034] In one or more embodiments, the first film may be thicker at an upper portion of the recess, and the second film may be thicker at a lower portion of the recess, wherein the film including the first film and the second film may be conformal from an upper portion to a lower portion of the recess.

[0035] In one or more embodiments, the first film and the second film may include at least one of silicon oxide, silicon oxycarbide, silicon nitride, silicon carbonitride, silicon carbon oxynitride, or a combination thereof.

[0036] In one or more embodiments, the silicon source may include at least one of the following: TSA, (SiH3)3N; DSO, (SiH3)2; DSMA, (SiH3)2NMe; DSEA, (SiH3)2NEt; DSIPA, (SiH3)2N(iPr); DSTBA, (SiH3)2N(tBu); DEAS, SiH3NEt2; DTBAS, SiH3N(tBu)2; BDEAS, SiH2(NEt2)2; BDMAS, SiH2(NMe2)2; BTB AS, SiH2(NHtBu)2; BITS, SiH2(NHSiMe3)2; DIPAS, SiH3N(iPr)2; TEOS, Si(OEt)4; SiCl4; HCD, Si2Cl6; 3DMAS, SiH(N( Me)2)3; BEMAS, SiH2[N(Et)(Me)]2; AHEAD, Si2(NHEt)6; TEAS, Si(NHEt)4; Si3H8; DCS, SiH2Cl2; SiHI3; SiH2I2 or mixtures thereof.

[0037] In one or more embodiments, the reactants may include at least one of: O2, O3, CO2, H2O, NO2, N2O, N2, NH3, NH4, N2H2, N2H4, free radicals thereof; or mixtures thereof.

[0038] This summary is provided to introduce some concepts in a simplified form. These concepts are further described in detail in the detailed description of the example embodiments disclosed below. This summary is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A simplified view of a substrate processing apparatus is shown.

[0040] Figure 2 The configuration of a conventional matching network is shown.

[0041] Figure 3 Shown are the changes in forward power and reflected power when using a conventional matching network using a variable vacuum capacitor (VVC).

[0042] Figure 4 A substrate processing method according to an embodiment of the present disclosure is shown.

[0043] Figure 5 Shown is the change in forward power and reflected power when an EVC matching network is used.

[0044] Figure 6The duty cycle and pulse frequency in pulse mode are shown.

[0045] Figure 7 A substrate processing method according to an embodiment of the present disclosure is shown.

[0046] Figure 8 A timing diagram according to an embodiment of the present disclosure is shown.

[0047] Fig. 9A and Fig. 9B TEM images showing film conformality when using a conventional matching network and a thick showerhead plate and when using an EVC matching network and a thin showerhead plate in forming a SiO2 film.

[0048] Fig.10 It is shown that the second film is formed on the first film, resulting in better step coverage features.

[0049] Fig.11A and Fig. 11B It is shown how the film profile of the second film is non-conformal, where the second film is thicker in the upper part of the recess.

[0050] Fig.12 is a cross-sectional view of the reaction chamber.

[0051] It should be understood that the elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the size of some elements in the drawings may be exaggerated relative to other elements to help improve the understanding of the illustrated embodiments of the present disclosure. DETAILED DESCRIPTION

[0052] Although certain embodiments and examples are disclosed below, it will be appreciated by those skilled in the art that the invention extends beyond the specifically disclosed embodiments and / or uses of the invention and their obvious modifications and equivalents. Therefore, it is intended that the scope of the disclosed invention should not be limited by the specifically disclosed embodiments described below.

[0053] As used herein, the term "substrate" may refer to any one or more underlying materials, including any one or more underlying materials that may be modified or on which a device, circuit, or film may be formed. A "substrate" may be continuous or non-continuous; rigid or flexible; solid or porous; and combinations thereof. A substrate may be in any form, such as a powder, a plate, or a workpiece. A plate-like substrate may include wafers of various shapes and sizes. A substrate may be made of semiconductor materials, including, for example, silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride, and silicon carbide.

[0054] The continuous substrate may extend beyond the boundaries of the processing chamber in which the deposition process occurs. In some processes, the continuous substrate may be moved through the processing chamber so that the process continues until the end of the substrate is reached. The continuous substrate may be provided from a continuous substrate feed system to allow the continuous substrate to be manufactured and output in any suitable form.

[0055] The illustrations presented herein are not meant to be actual views of any particular material, structure, or device but are merely idealized representations used to describe embodiments of the present disclosure.

[0056] The specific embodiments shown and described are illustrations of the present invention and its best mode and are not intended to limit the scope of these aspects and embodiments in any way. In fact, for the sake of brevity, the traditional manufacturing, connection, preparation and other functional aspects of the system may not be described in detail. In addition, the connecting lines shown in the various figures are intended to represent exemplary functional relationships and / or physical connections between various elements. Many alternative or additional functional relationships or physical connections may exist in actual systems, and / or may not exist in some embodiments.

[0057] Figure 4 A substrate processing method according to an embodiment of the present disclosure is shown.

[0058] In step 100, a substrate is loaded into a reaction chamber. Figure 1 As shown, the reaction chamber may be provided with a gas supply unit 3 connected to a power supply unit 7. The power supply unit may include a generator 8 and a matching network 9. The substrate may include complex structures such as recesses and 3D gate structures.

[0059] In step 110, a first film may be formed on the substrate. The first film may be formed by supplying a silicon source and a reactant from a source container to the substrate through a gas supply unit while applying a first power from a power supply unit to the reaction chamber. The silicon source and the first power may be supplied simultaneously.

[0060] The silicon source may be supplied for 0.1 seconds or less, and the first power applied simultaneously may be applied for 0.1 seconds or less accordingly. The first power may be between about 10 W and about 2000 W, more specifically, between about 20 W and 500 W, and the frequency of the first power may be between about 1 MHz and about 30 MHz, more specifically, between about 10 MHz and about 20 MHz.

[0061] The silicon source may include at least one of the following: TSA, (SiH3)3N; DSO, (SiH3)2; DSMA, (SiH3)2NMe; DSEA, (SiH3)2NEt; DSIPA, (SiH3)2N(iPr); DSTBA, (SiH3)2N(tBu); DEAS, SiH3NEt2; DTBAS, SiH3N(tBu)2; BDEAS, SiH2(NEt2)2; BDMAS, SiH2(NMe2)2; BTBAS, SiH 2(NHtBu)2; BITS, SiH2(NHSiMe3)2; DIPAS, SiH3N(iPr)2; TEOS, Si(OEt)4; SiCl4; HCD, Si2Cl6; 3DMAS, SiH(N(Me)2)3; BEMAS, SiH2[N(Et)(Me)]2; AHEAD, Si2(NHEt)6; TEAS, Si(NHEt)4; Si3H8; DCS, SiH2Cl2; SiHI3; SiH2I2 or mixtures thereof.

[0062] The reactants may include at least one of: O2, O3, CO2, H2O, NO2, N2O, N2, NH3, NH4, N2H2, N2H4, free radicals thereof; or mixtures thereof.

[0063] The first film may include: silicon, carbon, nitrogen or oxygen. The carbon and nitrogen may come from silicon source molecules. Therefore, the first film may be at least one of the following: silicon oxide, silicon oxycarbide, silicon nitride, silicon carbonitride, silicon carbon oxynitride or a combination thereof.

[0064] According to an embodiment of the present disclosure, during the application of the first power, impedance matching may be performed between the power supply unit and the reaction chamber. The power supply unit may include a matching network and a generator.

[0065] The matching network in the present disclosure may include an array of electronically variable discrete capacitors (EVCs), a common bottom electrode, a separate top electrode connected to each EVC, and a switching mechanism including a PIN diode. When impedance matching is performed, various combinations between capacitors can be performed quickly. Therefore, compared with existing variable vacuum capacitors (VVCs), it is possible to quickly find a matching position. U.S. Patent No. 7,251,121 (incorporated by reference) describes the mechanism of the EVC matching network in detail. By using the EVC matching network, the impedance matching time can be significantly reduced, and the reflected power can also be significantly eliminated.

[0066] Figure 5 The change in forward power and reflected power when using the EVC matching network is shown. Figure 5In the embodiment of the present invention, the period P1 (ie, the impedance matching time) is significantly reduced, and the reflected power is also significantly eliminated. For example, the impedance matching time can be 5 milliseconds or shorter.

[0067] In an embodiment of the present disclosure, the first power may be applied in a pulse mode. The duty cycle of the first power may be between about 5% and about 50%, more specifically, between about 10% and about 30%. The pulse frequency of the first power may be between about 100 Hz and 3000 Hz, more specifically, between about 300 Hz and 1000 Hz.

[0068] Figure 6 The duty cycle and pulse frequency in pulse mode are shown. Figure 6 In , the duty cycle can be defined as the ratio of B to A (B / A), and the pulse frequency can be defined as the interval between pulses, as shown in C.

[0069] Applying power in a pulsed mode can enable free radicals to diffuse deeply into the lower part of the recess. During the period when the power is turned on and an electric field is generated, active substances such as electrons and ions prevent free radicals (e.g., dissociated source molecules and reactant molecules) from diffusing, but during the period when the power is turned off and the electric field disappears, the active substances become neutral. Therefore, free radicals can diffuse deeply into the lower part of the recess with less interruption and chemically react with the substrate to form a film. In addition, during the period when the power is turned off, damage to the substrate from ion bombardment can be reduced. Therefore, the film conformality can be improved from the upper part to the lower part of the recess, and damage to the substrate can be reduced.

[0070] exist Figure 4 In step 120, the first film may be treated by applying a second power while supplying a reactant and / or an inert gas. The treatment may be performed to adjust film properties, such as wet etching ratio (WER) and density. For example, a film formed on the surface of a recess may be densified by the treatment.

[0071] In step 120, the second power may be applied in a dual frequency continuous mode. However, in another embodiment, the second power may be applied in a pulsed mode. The second power may include a high frequency power and a low frequency power. The high frequency power may be between about 1000 W and about 2000 W, and the low frequency power may be between about 100 W and about 800 W. The high frequency may be between about 10 MHz and about 20 MHz, and the low frequency may be between about 300 KHz and about 500 KHz. The second power may be supplied for 0.2 seconds or less.

[0072] Similar to step 110, during the application of the second power, impedance matching may be performed by using an EVC matching network in step 120. Therefore, impedance matching time may be significantly reduced and reflected power may be significantly eliminated, resulting in a short processing time.

[0073] In one embodiment, a purge step may be provided to purge the reaction chamber after forming the first film and before processing the first film (ie, after step 110 and before step 120 ).

[0074] In step 130, it may be determined whether a target thickness of the first film is achieved. If the target thickness is achieved, the substrate processing may end in step 140. Otherwise, steps 110 and 120 may be repeated multiple times.

[0075] Alternatively, if Figure 7 As shown, the substrate processing may be further performed to form a second film on the first film.

[0076] Figure 7 The substrate processing method according to the embodiment of the present disclosure is shown. Steps 200 to 230 are Figure 4 Steps 100 to 130 of FIG. 1 are the same, so a repeated description of each step will be briefly provided.

[0077] In step 200, a substrate is loaded into a reaction chamber. The substrate may include complex structures, such as recesses and 3D gate structures.

[0078] In step 210, a first film may be formed on a substrate. The first film may be formed by supplying a silicon source and a reactant from a source container to the substrate through a gas supply unit while applying a first power from a power supply unit to a reaction chamber. The silicon source and the first power may be supplied simultaneously.

[0079] In step 220, the first film may be treated by applying a second power while supplying a reactant and / or an inert gas. The treatment may be performed to adjust film properties, such as wet etching ratio (WER) and density. For example, a film formed on a recessed surface may be densified by the treatment.

[0080] In step 220, the second power may be applied in a dual-frequency continuous mode. However, in another embodiment, the second power may be applied in a pulsed mode. The second power may include a high-frequency power and a low-frequency power.

[0081] In one embodiment, a purge step may be provided to purge the reaction chamber after forming the first film and before processing the first film (ie, after step 210 and before step 220 ).

[0082] The first film may include silicon, carbon, nitrogen or oxygen. The carbon and nitrogen may come from silicon source molecules. Therefore, the first film may be at least one of the following: silicon oxide, silicon oxycarbide, silicon nitride, silicon carbonitride, silicon carbon oxynitride or a combination thereof.

[0083] In step 230, it may be determined whether the target thickness of the first film is achieved. If the target thickness of the first film is not achieved, steps 210 and 220 may be repeated multiple times.

[0084] In step 240, if the target thickness of the first film is achieved, a second film may be formed on the first film. The second film may be formed by a conventional PEALD method, in which a silicon source and a third power may be supplied sequentially and intermittently. The reactants may be supplied continuously throughout the cycle.

[0085] In step 240, the silicon source may be supplied for 0.1 seconds or less, and the power may be applied for 0.2 seconds or less. The third power may be a dual-frequency power. For example, in step 240, a high-frequency power of about 500 W to about 1500 W and a low-frequency power of about 500 W to about 1500 W may be applied.

[0086] The silicon source may include at least one of the following: TSA, (SiH3)3N; DSO, (SiH3)2; DSMA, (SiH3)2NMe; DSEA, (SiH3)2NEt; DSIPA, (SiH3)2N(iPr); DSTBA, (SiH3)2N(tBu); DEAS, SiH3NEt2; DTBAS, SiH3N(tBu)2; BDEAS, SiH2(NEt2)2; BDMAS, SiH2(NMe2)2; BTBAS, SiH 2(NHtBu)2; BITS, SiH2(NHSiMe3)2; DIPAS, SiH3N(iPr)2; TEOS, Si(OEt)4; SiCl4; HCD, Si2Cl6; 3DMAS, SiH(N(Me)2)3; BEMAS, SiH2[N(Et)(Me)]2; AHEAD, Si2(NHEt)6; TEAS, Si(NHEt)4; Si3H8; DCS, SiH2Cl2; SiHI3; SiH2I2 or mixtures thereof.

[0087] The reactants may include at least one of: O2, O3, CO2, H2O, NO2, N2O, N2, NH3, NH4, N2H2, N2H4, free radicals thereof; or mixtures thereof.

[0088] The second film may include silicon, carbon, nitrogen or oxygen. The carbon and nitrogen may come from silicon source molecules. Thus, the first film may be at least one of: silicon oxide, silicon oxycarbide, silicon nitride, silicon carbonitride, silicon carbon oxynitride or a combination thereof.

[0089] In step 250, it may be determined whether a target thickness of the second film is achieved. If the target thickness is achieved, the substrate processing may end in step 260. Otherwise, step 240 may be repeated multiple times.

[0090] In steps 210, 220, and 240, impedance matching between the power supply unit and the reaction chamber may be performed by the EVC matching network during power application. For example, the impedance matching time may be 5 milliseconds or less. Therefore, impedance matching may be achieved quickly.

[0091] In one embodiment, the first film forming steps 210 to 220 and the second film forming step 240 may form a super cycle, and the super cycle may be repeated a plurality of times.

[0092] Figure 8 A timing diagram according to an embodiment of the present disclosure is shown.

[0093] exist Figure 8 In the embodiment, steps T1 to T5 are steps for forming a first film and correspond to Figure 4 Steps 110 and 120 and Figure 7 In step T2, the silicon source and the reactant may be supplied simultaneously, and power (ie, the first power) may be applied simultaneously. Therefore, the film growth rate may be increased, and a thick film may be formed.

[0094] Alternatively, the silicon source may be supplied in step T1 and step T2. By supplying the silicon source to the reaction chamber in advance in step T1, the silicon source may be uniformly distributed in the reaction chamber, and the process may become stable in step T2, in which a film may be formed by a chemical reaction between the silicon source and the reactant.

[0095] When forming the first film on the concave portion, a conformal film needs to be formed along the surface of the concave portion. Therefore, the intensity of the power (i.e., the first power) may not be high, and the silicon source supply time may be short, so as to less activate the silicon precursor and reactant and prevent the formation of a thick film on the upper part of the concave portion. For example, the power in step T2 may be between about 10 W and about 2000 W, more specifically, between about 20 W and about 500 W, and the silicon source may be supplied for 0.1 seconds or less.

[0096] In one embodiment of the present disclosure, power may be applied in a pulse mode in step T2 with a duty cycle between about 5% and about 50%, more specifically, between about 10% and about 30%.

[0097] In addition to low power intensity and short silicon source supply time, silicon source vapor pressure can be adjusted to prevent excessive silicon source supply and thick film formation on the upper portion of the recess. For example, the temperature of the silicon source container containing the silicon source can be 50°C or lower.

[0098] As described above, the silicon source and the power are supplied for a very short time (i.e., 0.1 seconds or less for the silicon source and the first power, and 0.2 seconds or less for the second power). Therefore, fast gas switching is required in the reaction chamber, otherwise residual gas may cause the formation of an unwanted film, resulting in poor film conformality on the recessed portion. To this end, the thickness of the gas supply unit (e.g., showerhead plate) can be very thin so that the gas stays in the reaction space for a short time. For example, the thickness of the showerhead plate can be 10 mm or less.

[0099] In step T4, the first film may be treated by applying power (i.e., the second power) while supplying reactants and / or inert gases. This treatment may be performed to adjust film properties, such as wet etching ratio (WER) and density. For example, a film formed on the surface of a recess may be densified by the treatment.

[0100] The power in step T4 may be a dual-frequency power including a high-frequency power and a low-frequency power. The second power may be applied for 0.2 seconds or less.

[0101] exist Figure 8 In the embodiment, steps T6 to T9 are steps for forming a second film and correspond to Figure 7 Step 240. The second film can be formed by a conventional PEALD method, in which the silicon source and the power (i.e., the third power) can be supplied sequentially and intermittently. The reactants can be supplied continuously throughout the cycle. In step T6, the silicon source can be supplied for 0.1 seconds or less, and in step T8, the power can be applied for 0.2 seconds or less.

[0102] The first film and the second film may contain silicon, carbon, nitrogen and oxygen. Carbon and nitrogen may come from silicon source molecules. Therefore, the first film and the second film may be at least one of the following: silicon oxide (SiO), silicon oxycarbide (SiCO), silicon nitride (SiN), silicon carbonitride (SiCN), silicon oxycarbonitride (SiCON) or a combination thereof.

[0103] The first film formation stage may be repeated multiple times (M cycles), and the second film formation stage may be repeated multiple times (N cycles). In addition, the first film formation stage and the second film formation stage may include a super cycle and may be repeated multiple times (X cycles).

[0104] In steps T2, T4 and T8, during the application of power, impedance matching can be performed by using an EVC matching network. Therefore, the impedance matching time can be significantly reduced and the reflected power can be significantly eliminated, resulting in a short processing time.

[0105] Fig. 9A and Fig. 9B is a SEM image showing the use of a conventional matching network and a thick showerhead plate ( Fig. 9A ) and using EVC matching network and thin showerhead plate ( Fig. 9B ). The SiO2 film is formed by supplying a silicon source and a reactant while applying a first power in a pulsed mode, and then the SiO2 film is processed by supplying a second power. Table 1 shows the film conformality when the SiO2 film is formed by supplying a silicon source and a reactant while applying a first power in a pulsed mode. Fig. 9A and Fig. 9B The conformality of the SiO2 film formed on the recessed portion is shown. The aspect ratio of the recessed portion can be 1:10 or greater.

[0106] Table 1 - Conformality of SiO2 films formed on recessed areas

[0107]

[0108] As shown in Table 1, when using the EVC matching network and thin showerhead board Fig. 9B The sidewall conformality and step coverage are better than those using existing mechanical matching networks and thick showerheads. Fig. 9A The good, even if Fig. 9B The ratio of silicon source supply time to power application time Fig. 9A This indicates that EVC matching and thin showerhead plate can lead to short process time and better process performance by reducing impedance matching time and improving gas switching.

[0109] Table 1 also shows that Fig. 9B In the case of Fig. 9A Therefore, more efficient substrate processing can be achieved and the CoO (cost of ownership) for operating substrate processing equipment can be significantly reduced.

[0110] Fig.10 It is shown that the second film is formed on the first film, resulting in better step coverage features.

[0111] exist Fig.10 In the embodiment, the first film 18 may be formed on the surface of the recess 17 of the substrate 16. The first film 18 may be formed according to Figure 7 Steps 210 to 220 (or Figure 8 The film profile of the first film 18 may have a negative slope. Thereafter, the second film 19 may be formed on the first film 18 by a PEALD method. Figure 7 Step 240 (or Figure 8 Steps T6 to T9) form a second film.

[0112] exist Fig.10, the first film 18 may be thicker at the upper portion of the recess 17. Conversely, the second film 19 formed on the first film 18 may be thicker at the lower portion of the recess 17. Therefore, the film including the first film 18 and the second film 19 may be conformal from the upper portion to the lower portion of the recess, resulting in improved step coverage on the recess 17.

[0113] Fig.11A and Fig. 11B It is shown how the film profile of the second film is non-conformal, where the second film is thicker in the upper part of the recess.

[0114] During the application of power to the deposition process, deposition by free radicals and sputtering by ions can occur simultaneously. As the power increases, the sputtering rate increases. The sputtering rate in the upper part of the recess can be higher than the sputtering rate in the lower part of the recess.

[0115] exist Fig.11A In the embodiment, the deposition rate is constant regardless of the depth of the recess even if the power (e.g., RF power) is increased. Fig. 11B In the PEALD process, the sputtering rate increases with the increase of power (e.g., RF power), especially in the upper part of the recess. Therefore, within a certain power range, the sputtering rate in the upper part of the recess may be higher than the deposition rate, resulting in a film thickness in the upper part of the recess being smaller than that in the lower part of the recess during the PEALD process.

[0116] According to an embodiment of the present disclosure, a high frequency power between about 50 W and about 2000 W, more specifically, between about 50 W and about 1500 W, and a low frequency power between about 50 W and about 2000 W, more specifically, between about 50 W and about 1500 W, are applied to form a non-conformal second film on the first film by PEALD.

[0117] Table 2 shows the film conformality and step coverage characteristics of a single film (ie, the first film) and a double film (ie, the first film and the second film formed thereon) according to an embodiment of the present invention. In Table 2, the film conformality and step coverage characteristics in the double film are improved.

[0118] Table 2 - Film Conformality and Step Coverage Characteristics

[0119] Single film Double membrane Conformity 90％ 95％ Step coverage 85％ 100％

[0120] Table 3 shows the test conditions according to the embodiment of the present disclosure.

[0121] Table 3 - Test conditions used to form films

[0122]

[0123]

[0124] Fig.12is a cross-sectional view of the reaction chamber. The reaction chamber 20 may correspond to Figure 1 Reaction chamber 2.

[0125] The reaction chamber 20 may include a gas channel 21, a gas supply unit 22, a substrate support unit 23 supporting a substrate 28, and an exhaust pipe 24. The gas supply unit 22 may be a showerhead plate made of metal, and may be connected to a power supply unit including an EVC matching network (not shown). The gas channel 21 and the exhaust pipe 24 may be formed of an insulating material, so that during application of power to the gas supply unit 22, the gas supply unit 22 may be electrically isolated from the surrounding environment.

[0126] A gas flow channel 26 may be formed between the gas channel 21 and the gas supply unit 22. A reaction space 25 in which a chemical reaction may occur between a gas and a substrate 28 may be formed between the gas supply unit 22 and the substrate support unit 23. An exhaust pipe 24 may surround the reaction space 25, and a gas in the reaction space 25 may be discharged to an exhaust path 27 through a gap 29 formed between the exhaust pipe 24 and the reaction space 25.

[0127] The present disclosure can realize fast gas exchange in a short processing time. To this end, the gas supply unit 22 can be thin, and the volume of the gas flow channel 26 and the reaction space 25 can be small for fast gas switching. For example, the thickness of the gas supply unit 22 can be 10 mm or less, and the distance between the gas channel 21 and the gas supply unit 22 (i.e., the height of the gas flow channel 26) can be 5 mm or less. The distance between the gas supply unit 22 and the substrate support unit 23 (i.e., the height of the reaction space 25) can be 5 mm or less.

[0128] It should be understood that the configuration and / or method described herein are exemplary in nature, and these specific embodiments or examples should not be considered restrictive, because many variations are possible. The specific routine or method described herein can represent one or more of any number of processing strategies. Therefore, the various actions shown can be performed in the order shown, in other orders, or omitted in some cases.

[0129] The subject matter of the present disclosure includes all novel and nonobvious combinations and subcombinations of the various processes, systems and configurations, and other features, functions, acts and / or properties disclosed herein, and any and all equivalents thereof.

Claims

1. A method for forming a film, comprising: loading a substrate including a recess into a reaction chamber, wherein a gas supply unit is connected to the reaction chamber; forming a first film on the substrate by simultaneously supplying a silicon source and a reactant from a source container to the substrate through a gas supply unit while applying a first power to the reaction chamber from a power supply unit; as well as processing the first film by applying a second power from a power supply unit to the reaction chamber while supplying a reactant; wherein forming the first film and treating the first film are repeated multiple times; wherein the power supply unit comprises a matching network, the matching network comprising a plurality of electronically variable discrete capacitors to match the impedance between the power supply unit and the reaction chamber; and The second power is greater than the first power.

2. The method according to claim 1, wherein: The silicon source is supplied for 0.1 seconds or less.

3. The method according to claim 1, wherein: A matching time between the power supply unit and the reaction chamber while supplying the first power and supplying the second power is 5 milliseconds or less. 4 . The method of claim 1 , further comprising purging the reaction chamber after forming the first film and before processing the first film.

5. The method according to claim 4, wherein: The reaction chamber is purged for 0.2 seconds or less.

6. The method according to claim 1, wherein: The first power is a high frequency power between about 20W and about 500W.

7. The method according to claim 1, wherein: The first power is applied in a pulse mode.

8. The method according to claim 7, wherein: The duty cycle of the first power is between about 5% and about 50%.

9. The method according to claim 8, wherein: The duty cycle of the first power is between about 10% and about 30%.

10. The method according to claim 7, wherein: The pulse frequency of the first power is between about 100 Hz and about 3000 Hz.

11. The method according to claim 10, wherein: The pulse frequency of the first power is between about 300 Hz and about 1000 Hz.

12. The method according to claim 1, wherein: The first power is applied for 0.1 second or less.

13. The method according to claim 1, wherein: The second power is applied in a dual frequency continuous mode.

14. The method according to claim 13, wherein: The second power includes high-frequency power and low-frequency power.

15. The method according to claim 14, wherein: The high frequency power is between about 1000W and about 2000W.

16. The method according to claim 14, wherein: The low frequency power is between about 100W and about 800W.

17. The method according to claim 1, wherein: The second power is applied for 0.2 seconds or less.

18. The method according to claim 1, wherein: The source container was maintained at 50°C or lower.

19. The method according to claim 1, wherein: The thickness of the gas supply unit is 10 mm or less.

20. The method of claim 1, further comprising forming a second film on the first film by repeating a cycle, the cycle comprising: supplying the silicon source to the reaction chamber; as well as applying a third power to the reaction chamber to form a second film, Therein, the reactants are supplied throughout the entire cycle.

21. The method according to claim 20, wherein: Forming the first film and forming the second film include a super cycle, wherein the super cycle is repeated a plurality of times.

22. The method according to claim 20, wherein: The first film is thicker at an upper portion of the recess, and the second film formed on the first film is thicker at a lower portion of the recess, wherein the film including the first film and the second film is conformal from an upper portion to a lower portion of the recess.

23. The method according to claim 20, wherein: The third power includes high-frequency power and low-frequency power.

24. The method according to claim 23, wherein: The high frequency power is between about 500W and about 1500W.

25. The method according to claim 23, wherein: The low frequency power is between about 500W and about 1500W.

26. The method of claim 20, wherein: The first film and the second film include at least one of silicon oxide, silicon oxycarbide, silicon nitride, silicon carbonitride, silicon oxycarbonitride, or a combination thereof.

27. The method according to claim 20, wherein: The silicon source includes at least one of the following: TSA, (SiH3)3N; DSO, (SiH3)2; DSMA, (SiH3)2NMe; DSEA, (SiH3)2NEt; DSIPA, (SiH3)2N(iPr); DSTBA, (SiH3)2N(tBu); DEAS, SiH3NEt2; DTBAS, SiH3N(tBu)2; BDEAS, SiH2(NEt2)2; BDMAS, SiH2(NMe2)2; BTBAS, SiH 2(NHtBu)2; BITS, SiH2(NHSiMe3)2; DIPAS, SiH3N(iPr)2; TEOS, Si(OEt)4; SiCl4; HCD, Si2Cl6; 3DMAS, SiH(N(Me)2)3; BEMAS, SiH2[N(Et)(Me)]2; AHEAD, Si2(NHEt)6; TEAS, Si(NHEt)4; Si3H8; DCS, SiH2Cl2; SiHI3; SiH2I2 or mixtures thereof.

28. The method of claim 20, wherein: The reactants include at least one of: O2, O3, CO2, H2O, NO2, N2O, N2, NH3, NH4, N2H2, N2H4, free radicals thereof; or mixtures thereof.

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