Blocking wall for probe head of circuit testing system
By setting a barrier wall made of electrical insulating material on the probe head, the problem of air arc in circuit testing is solved, and effective protection of circuit devices and reliability of testing is achieved.
Patent Information
- Application Number
- CN202311348596.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-18
- Publication Date
- 2025-04-18
AI Technical Summary
During circuit testing, air arcs are prone to occur between the conductive probe on the probe head and the contact pad, resulting in continuous plasma discharge and damaging the circuit device.
A probe head is designed that extends at least one barrier wall from the surface between the conductive probes to prevent the formation of air arcs. The barrier wall may be made of an electrically insulating material and configured in a strip-like or radial shape to isolate the air gap between the conductive probes.
By setting a barrier wall on the probe head, the air arc between the conductive probes and the contact pads is effectively reduced, the circuit device is protected, and the accuracy and reliability of the test are ensured.
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Figure CN119846278A_ABST
Abstract
Description
Technical Field
[0001] The present description relates to electronic circuit testing, and in particular, includes a barrier wall for a probe head of a circuit testing system. Background Art
[0002] Circuit devices can be wafer tested at the production level before being packaged as electronic devices. Wafer test stations are configured to adapt chip contact patterns and locations to transfer electrical signals. A probe head is a device used to connect semiconductor test devices to circuits (e.g., integrated circuits) to transfer electrical signals during testing. The probes on the probe head are capable of generating high voltage levels to simulate the functions of a microchip before shipment. During testing, adjacent probes and contact pads connect to shared air space, which can be prone to air arcing caused by electrical breakdown of the gas, which produces a sustained plasma discharge caused by current flowing through a normally non-conductive medium such as air. Summary of the invention
[0003] The following is a brief summary of subject matter that is described in greater detail herein. This summary is not intended to limit the scope of the claims.
[0004] In a first example, a probe head includes a plurality of conductive probes extending from a surface of the probe head. Each of the conductive probes can be configured to electrically contact a contact pad associated with a circuit device to provide an electrical signal between the contact pad and a corresponding one of the conductive probes. The probe head also includes at least one barrier wall extending from the surface of the probe head between at least one pair of conductive probes.
[0005] According to a second example, a method for testing a circuit device includes placing the circuit device in a test environment. The circuit device includes a plurality of contact pads, which are arranged on a surface of the circuit device. The method for testing the circuit device includes moving at least one of the circuit device and a probe head to provide electrical contact between a plurality of conductive probes of the probe head and a corresponding plurality of contact pads. The conductive probes may extend from a surface of the probe head facing away from the surface of the circuit device. The probe head may further include at least one dielectric barrier wall, which extends from the surface of the probe head and is arranged between at least one pair of conductive probes. The method for testing the circuit device further includes providing electrical signal transmission between the conductive probes and the contact pads.
[0006] In a third example, a system for testing a circuit device includes a test fixture configured to hold the circuit device. The circuit device includes a plurality of contact pads. The system also includes a probe head, the probe head including a plurality of conductive probes extending from a surface of the probe head. Each of the conductive probes may be configured to electrically contact one of the contact pads associated with the circuit device to provide an electrical signal between the corresponding contact pad and the corresponding one of the conductive probes. The probe head includes at least one barrier wall extending from the surface of the probe head between at least one pair of conductive probes. The probe head includes a signal test unit, the signal test unit configured to generate an input signal and monitor an output signal, the input signal being provided to a first one of the contact pads of a corresponding integrated circuit via a corresponding first one of the conductive probes, and the output signal being provided from a second one of the contact pads of the corresponding integrated circuit via a corresponding second one of the conductive probes. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] The general concept of the invention and its illustrative examples and advantages are described in more detail below, by way of example, with reference to the accompanying drawings, in which:
[0008] Figure 1 A diagram showing a system for testing a circuit arrangement.
[0009] Figure 2 A side view of a wafer test array is shown.
[0010] Figure 3A and 3B A plan view of a probe head having strip-shaped barrier walls is shown.
[0011] Figure 4A and 4B A plan view of a probe head with radial barrier walls is shown.
[0012] Figure 5 An example of a flow chart for testing a circuit arrangement is shown. DETAILED DESCRIPTION
[0013] The present disclosure relates generally to electronic circuit testing, and in particular, to a barrier wall for a probe head for a circuit testing system. As an example, a test device for testing a circuit device may include a probe head that includes a barrier wall extending from the probe head to prevent air arcing of electromagnetic waves emitted from a conductive probe on the probe head. As described herein, the term "circuit device" refers to a circuit that can be tested during the manufacturing stage, such as a bare die on a wafer, an integrated circuit, a circuit package, etc. As described herein, the term "conductive probe" associated with a probe head refers to a conductive structure that provides an electrical signal to or from a circuit device during electrical testing, such as a probe pin, a bump, or other conductive surface.
[0014] For electrical signal testing, a set of contacts or probes of a probe head are moved together with contact pads of an electrical device (e.g., on a wafer) to form electrical contact. As described herein, the term "contact pad" refers to any of a variety of electrical input / output (I / O) structures of a circuit device (e.g., a circuit device or a circuit package) to which a conductive probe can be electrically coupled for signal transfer during testing, such as a bare die pad, a circuit package pad, a circuit package pin, etc. The tester system is responsible for loading and unloading the microchip wafer from its carrier and aligning the microchip wafer with sufficient accuracy using automatic pattern recognition optics to ensure precise alignment between the contact pads on the microchip wafer and the probe tips.
[0015] A contact pad is a small conductive area in a bare die of a printed circuit board or circuit device. The contact pad is typically made of gold, copper, or aluminum and has a width in micrometers. The contact pad is created during the manufacturing process of the circuit device during the photolithography step of the manufacturing process. The contact pad may correspond to a functional I / O structure during normal operating conditions of the circuit device, or may be manufactured specifically for testing the circuit device. During this process, the contact pad is probed with probe contacts on a probe head of a tester system (e.g., via a probe card) to check for faults through resistance.
[0016] Circuit test systems can test a wide variety of electronic devices and systems, from simple components (e.g., resistors, transistors, capacitors, and inductors) to integrated circuits, printed circuit boards, and complex fully assembled electronic systems. Circuit test systems are designed to reduce the testing time required to verify that a particular device operates effectively or to quickly discover a failure in a part before it has the potential to be used in a final consumer product. To reduce manufacturing costs and increase yields, microchips are tested after they are manufactured to prevent defective devices from ending up in the hands of consumers.
[0017] refer to Figure 1 , a diagram of a system 100 for testing circuit devices is shown, which can be used to perform measurements, evaluate test results, and diagnose faults of electronic package parts. The circuit testing system 102 is used to test functional defects by applying special test patterns to the circuit device 104. As shown in the figure, the circuit testing system 102 includes a signal testing unit 106 for applying a test program to the circuit device 104, a probe head 108, and one or more blocking walls 112, wherein the probe head 108 includes a plurality of conductive probes 110. The circuit device 104 is positioned on a test fixture 114, which is configured for single-wafer or multi-wafer parallel testing. The circuit device 104 includes a plurality of contact pads 116 for providing a surface area of the conductive probes 110 connected to the probe head 108.
[0018] like Figure 1As shown, the circuit test system 102 is generally a device for providing electrical signals to test the operational functions of the circuit device 104. The circuit test system 102 can determine whether the circuit device 104 meets the test standard after applying the electrical signal. The circuit test system 102 can be used to perform various wafer-level tests, such as power cycling, dynamic voltage stress, continuity testing, AC / DC testing, parameter sweeps, functional testing, static power supply current testing, and other suitable tests.
[0019] As an example, the circuit device 104 can be held in place on the test fixture 114 during testing. A plurality of contact pads 116 can be positioned on the circuit device 104 to allow the circuit testing system 102 to electrically communicate with the circuit device 104 via the conductive probes 110 of the probe head 108. The circuit device 104 can be automatically or manually moved into position so that the contact pads 116 of the circuit device 104 make electrical contact with the conductive probes 110 of the probe head 108.
[0020] Testing of the circuit device 104 may be provided in several ways. In the simplest example, the circuit testing system 102 may be configured to provide a first signal (e.g., a DC voltage) to one of the contact pads 116 of the circuit device 104 via one of the conductive probes 110. Thus, the circuit testing system 102 may receive a second signal from the circuit device 104 via the electrical connection of the contact pad 116 and the conductive probe 110 in response to the first signal. Thus, the received second signal may be monitored by the circuit testing device 102 to determine the test result of the circuit device 104.
[0021] As an example, a power cycle test may be performed on the circuit device 104 by the circuit testing system 102. The power cycle test serves to stress the circuit device 104 and induce failures associated with the manufacturing process. The power cycle test utilizes a quasi-power ramp signal to turn the circuit device 104 on and off at a normal operating voltage. The power cycle test may be performed for X cycles. In an example, the X cycles may be equal to 100 on / off cycles. The number of cycles may vary depending on the test requirements and / or historical data. A reliability analysis may be performed on the circuit device 104 to determine whether the circuit device 104 fails due to the power cycle test.
[0022] When the circuit is disconnected or a bad connection occurs on the conductive probe 110, an arc discharge may be formed on the conductive probe 110, the scribe area 118 and / or the contact pad 116 of the circuit device 104. Arc discharge is an electrical breakdown of a gas, which produces a continuous plasma discharge caused by a current flowing through a medium that is usually not conductive, such as air. During the test, the ionization of electrons may produce an electron avalanche, which forms an air arc between a pair of conductive probes 110, the scribe area 118 and / or the contact pad 116. At the beginning of the disconnection, the separation distance between the conductive probe 110, the scribe area 118 and / or the contact pad 116 produces a very large electric field in volts / mm. This large electric field causes the arc between a pair of conductive probes 110, the scribe area 118 and / or the contact pad 116 to ignite. If the circuit has enough current and voltage to maintain the arc, the arc will cause damage to the circuit device 104, such as melting of the conductor.
[0023] In order to avoid air arcing during circuit device testing, the barrier wall 112 is configured to extend from the probe head 108 between each conductive probe 110. As an example, the barrier wall 112 extending from the probe head 108 can be formed by an electrically insulating material. The insulating material can be an organic insulator, an inorganic material or a combination thereof containing multiple layers. Therefore, the barrier wall 112 blocks the air gap between a pair of conductive probes 110 to mitigate air arcing between the conductive probes 110 or between the conductive probes 110 and different contact pads 116.
[0024] Figure 2 A side view of an example circuit testing system 200 is shown. A probe head 202 may be configured for high current wafer testing and includes a printed circuit board including a plurality of conductive probes 204 and a plurality of blocking walls 206. A circuit device 208 is a device under test that includes a plurality of metal contact pads 210 made of a conductive material to electrically communicate with the conductive probes 204 of the probe head 202. The probe head 202 is an interface between the circuit device 208 and a tester (not shown). The probe head 202 is mechanically docked to the tester (not shown). The probe head 202 provides an electrical path between the test system and the circuit device 208, thereby permitting circuit testing and verification (e.g., at the wafer level), such as before the circuit device 208 is packaged. The probe head 202 is designed to meet the mechanical and electrical requirements of a specific circuit device 208 and a specific test equipment to be used. The probe head 202 may be configured to test multiple circuit devices 208 in parallel.
[0025] exist Figure 2In the example of , the conductive probe 204 is shown as a probe pin for electrically connecting an electronic test device to a circuit device 208. The conductive probe 204 can be a spring-loaded probe, such as a pogo-pin, configured to retract into the probe head in response to contact with a contact pad 210. The conductive probe 204 of the probe head 202 is configured to align with the contact pad 210 of the circuit device 208. The conductive probe 204 can be a high voltage probe that allows the test device to transmit and / or measure high amplitude voltages. The conductive probe 204 of the probe head 202 is thus in electrical contact with the contact pad 210 of the circuit device 208 during testing. For example, when the circuit device 208 mounted on a test fixture (not shown) is moved into electrical contact, the conductive probe 204 of the probe head 202 remains in place.
[0026] The barrier wall 206 may be made of a dielectric material, such as a dielectric material with a low dielectric constant. The barrier wall 206 is configured to have a sufficient width, depending on the material used to form the barrier wall 206 to mitigate arcing. The barrier wall 206 may extend to a greater depth than the conductive probe 204.
[0027] When the circuit device 208 is positioned to make electrical contact with the tester, the contact pads 210 are contained by the barrier walls 206 along with their corresponding conductive probes 204 so that there is no air space shared with adjacent conductive probes 204, scribe areas 212, and / or contact pads 210. The barrier walls 206 cut off the air gaps between the contact pads 210 during testing so that there is no conductive path for air arcing to occur.
[0028] Now turn to Figure 3A and 3B , a diagram 300 of a probe head having a strip dielectric barrier wall is shown. Diagram 300 includes a first view 302, which is a plan view of a surface of a probe head (hereinafter referred to as probe head 306), from which a strip barrier wall 308 and a conductive probe 310 extend. Diagram 300 also includes a second view 304, which is a cross-sectional view of the probe head 306 through "3B", which is in contact with a cross-sectional view of a circuit device 312, and the circuit device 312 includes a contact pad 314 with which the conductive probe 310 contacts during testing. For the sake of brevity and simplicity of description, in Figure 3A and 3B In the example, the probe head 306 and the circuit device 312 are each described as a simple example.
[0029] Each of the strip-shaped barrier walls 308 is shown as having a substantially flat surface and extending laterally along a plane (e.g., a center) of a surface of the probe head 306 between each pair of conductive probes 310 on the probe head 306. As an example, the barrier wall may extend substantially linearly from a first edge of the surface of the probe head 306 to substantially a second edge of the surface of the probe head 306. As an example, the strip-shaped dielectric walls 308 may isolate each conductive probe 310, scribe line region 316, and / or contact pad 314 from adjacent conductive probes 310, scribe line region 316, and / or contact pad 314 to mitigate arcing between adjacent pairs of conductive probes 310, scribe line regions 316, and / or contact pads 314.
[0030] The strip barrier wall 308 may be formed of a compressible material, such as a dielectric material. Additionally or alternatively, the strip barrier wall 308 may be formed to have an accordion shape or texture along the height of the strip barrier wall 308 extending from the surface of the probe head, such that in response to a force acting on the barrier wall in contact with the surface of the circuit device 312, the barrier wall compresses. The compression of the strip barrier wall 308 allows for softening of the contact with the circuit device 312 to avoid any damage to the substrate of the circuit device 312 or any protective or photovoltaic coating that may be present on the circuit device 312. The strip barrier wall 308 may extend under the conductive probe 310 and compress when in contact with the circuit device substrate so that the conductive probe 310 may thereafter contact the contact pad 314.
[0031] In another example, Figure 4A and 4B A diagram 400 is shown of a probe head having a radial barrier wall. Diagram 400 includes a first view 402, which is a plan view of a surface of a probe head (hereinafter referred to as probe head 406) from which radial barrier walls 408 and conductive probes 410 extend. Diagram 400 also includes a second view 404, which is a cross-sectional view of probe head 406 through "4B" in contact with a cross-sectional view of a circuit device 412, which includes contact pads 414 with which conductive probes 410 contact during testing. For the sake of brevity and simplicity of description, the following diagrams are provided. Figure 4A and 4B In the example, the probe head 406 and the circuit device 412 are each described as a simple example.
[0032] exist Figure 4A and 4BIn the example of FIG. 4 , the probe head 406 includes radial barrier walls 408 that at least partially surround the conductive probes 410 to isolate the conductive probes 410, the scribe line regions 416, and / or the contact pads 414 of the circuit device 412 from adjacent conductive probes 410, the scribe line regions 416, and / or the adjacent contact pads 414 of the circuit device 412. Thus, the radial barrier walls 408 surround the conductive probes 410 and the contact pads 414 when in electrical communication to mitigate arcing between adjacent pairs of conductive probes 410, the scribe line regions 416, and / or the contact pads 414. The probe head 406 may include radial barrier walls 408 around each conductive probe 410 of the probe head 406 or around a subset of the conductive probes 410.
[0033] Similar to the above description, the radial barrier wall 408 may be formed of a compressible material and / or be arranged in a compressible (e.g., accordion) shaped structure so as to be compressible. Therefore, when the circuit device 412 and the radial barrier wall 408 are in contact, the radial barrier wall 408 is compressed. Depending on the size and position of the conductive probe 410 and / or the contact pad 414, each of the radial barrier walls 408 may have a different diameter.
[0034] Many variations of the specific examples of the barrier wall shown and described herein are possible. For example, although radial barrier wall 408 is cylindrical as shown, a rectangle or polygon is also possible. Similarly, less or more barrier walls 308 or 408 can be incorporated into the probe head 406 with any number of columns, rows or configurations as required. Barrier wall 308 or 408 can be configured as a part of a removable probe card, or can directly extend from probe head 306 or 406. Barrier wall 308 or 408 can be configured as a strip barrier wall and a radial barrier wall on the same probe head or probe card.
[0035] Reference now Figure 5 , a flowchart 500 for testing a circuit device according to one or more examples described herein is shown.
[0036] At 502 , the flow chart includes placing a circuit device in a test environment, the circuit device including a plurality of contact pads disposed on a surface of the circuit device.
[0037] At 504, the flow chart includes moving at least one of the circuit device and the probe head to provide electrical contact between a plurality of probes and a corresponding plurality of contact pads, the probes extending from a surface of the probe head facing away from a surface of the circuit device, the probe head further including at least one dielectric barrier wall extending from the surface of the probe head and disposed between at least one pair of probes.
[0038] At 506 , the flow chart includes providing electrical signaling between the probe and the contact pad.
[0039] Testing of the circuit device may further include forming the dielectric barrier wall from a compressible material such that the dielectric barrier wall compresses in response to a force acting on the dielectric barrier wall in contact with a surface of the circuit device.
[0040] Testing of the circuit device may further include forming a compressible material in a generally accordion shape along a height of the dielectric barrier wall extending from a surface of the probe head such that the dielectric barrier wall compresses in response to a force acting on the dielectric barrier wall in contact with the surface of the circuit device.
[0041] Testing of the circuit device may further include isolating probes in electrical communication with corresponding contact pads with a dielectric barrier to mitigate air arcing.
[0042] The foregoing detailed description is merely illustrative and is not intended to limit the application or use of the examples and / or the examples. In addition, it is not intended to be bound by any explicit or implicit information described in the foregoing background technology or summary or detailed description.
[0043] As used in the specification and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
[0044] Unless otherwise indicated, any element, characteristic, feature, or combination of elements, characteristics, and features may be used in any example disclosed herein, regardless of whether the element, characteristic, feature, or combination is explicitly disclosed in the example. It will be readily understood that the features described with respect to any particular aspect described herein may be applied to other aspects described herein, as long as the features are compatible with that aspect. In particular, the features described herein with respect to the method may be applied to optical data transmission products, and vice versa.
[0045] References throughout this specification to "one example" or "an example" mean that a particular feature, structure, or characteristic described in connection with the example is included in at least one example. Thus, the phrases "in one example," "in one aspect," or "in an example" appearing in various places in this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples.
[0046] The words "exemplary" and / or "illustrative" are used herein to mean used as examples, instances, or illustrations. For the avoidance of doubt, the subject matter disclosed herein is not limited to these examples. In addition, any aspect or design described herein as "exemplary" and / or "illustrative" is not necessarily to be construed as being preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent exemplary structures and techniques known to those of ordinary skill in the art. In addition, to the extent the terms "comprising," "having," "containing," and other similar words are used in the detailed description or claims, these terms are intended to be inclusive in a manner similar to the term "comprise" as an open transition word, without excluding any additional or other elements.
[0047] The above description contains non-limiting aspects of various examples. Of course, for the purpose of describing the disclosed subject matter, it is not possible to describe every conceivable combination of components or methods, and those skilled in the art will recognize that other combinations and arrangements of various examples are possible. The disclosed subject matter is intended to encompass all such changes, modifications and variations that fall within the spirit of the appended claims.
[0048] With respect to the various functions performed by the above-described components, unless otherwise indicated, the terms used to describe these components (including references to "means") also include any structure (e.g., functional equivalent) that performs the specified function of the components, even if not structurally equivalent to the disclosed structure. In addition, although a particular feature of the disclosed subject matter may be disclosed for only one of several embodiments, such feature may be combined with one or more features of other embodiments, which is desirable and advantageous for any given or specific application.
[0049] The terms "exemplary" and / or "illustrative" are used herein to refer to examples, instances, or illustrations. For the avoidance of doubt, the subject matter disclosed herein is not limited to these examples. In addition, any aspect or design described herein as "exemplary" and / or "illustrative" is not necessarily to be construed as being preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent structures and techniques known to those skilled in the art. In addition, to the extent that the terms "comprising," "having," "containing," and other similar words are used in the detailed description or claims, these terms are intended to be inclusive in a manner similar to the term "comprise" as an open transition word, without excluding any additional or other elements.
Claims
1. A probe head for testing a circuit device, the probe head comprising: a plurality of conductive probes extending from a surface of the probe head, each of the conductive probes being configured to electrically contact a contact pad associated with the circuit device to provide an electrical signal between the contact pad and a corresponding one of the conductive probes; as well as At least one barrier wall extends from the surface of the probe head between at least one pair of the conductive probes. 2 . The probe head of claim 1 , wherein each of the at least one barrier wall extends substantially linearly along the surface of the probe head between the at least one pair of the conductive probes.
3. The probe head of claim 2, wherein each of the at least one barrier wall extends substantially linearly from a first edge of the surface of the probe head to a second edge of the surface of the probe head between a plurality of pairs of the conductive probes.
4. The probe head of claim 1, wherein each of the at least one barrier wall is formed of a compressible dielectric material such that the at least one barrier wall compresses in response to a force acting on the at least one barrier wall in contact with the surface of the circuit device.
5. A probe head according to claim 1, wherein at least one barrier wall is formed in a substantially accordion shape along the height of the at least one barrier wall extending from the surface of the probe head, so that in response to a force acting on the at least one barrier wall in contact with the surface of the circuit device, the at least one barrier wall compresses. 6 . The probe head of claim 1 , wherein each of the at least one barrier wall at least partially surrounds a perimeter of a corresponding one of the conductive probes. 7 . The probe head of claim 1 , further comprising a detachable probe card, wherein the at least one blocking wall extends from a surface of the detachable probe card.
8. The probe head of claim 7, wherein the detachable probe card comprises at least one of at least one substantially flat barrier wall and at least one hollow cylindrical barrier wall.
9. The probe head of claim 1, wherein each of the at least one barrier wall isolates a respective one of the conductive probes in electrical communication with a respective contact pad to mitigate air arcing.
10. A method for testing a circuit device, the method comprising: placing the circuit device in a test environment, the circuit device comprising a plurality of contact pads arranged on a surface of the circuit device; moving at least one of the circuit device and the probe head to provide electrical contact between a plurality of conductive probes of the probe head and a corresponding plurality of contact pads, the conductive probes extending from a surface of the probe head facing away from the surface of the circuit device, the probe head further comprising at least one dielectric barrier wall extending from the surface of the probe head and disposed between at least one pair of the conductive probes; and Electrical signal transmission is provided between the conductive probe and the contact pad.
11. The method of claim 10, wherein the at least one dielectric barrier wall is formed of a compressible material such that in response to a force acting on the at least one dielectric barrier wall in contact with the surface of the circuit device, the at least one dielectric barrier wall compresses.
12. The method of claim 10, wherein the at least one dielectric barrier wall is formed in a generally accordion shape along a height of the at least one dielectric barrier wall extending from the surface of the probe head such that the at least one dielectric barrier wall compresses in response to a force acting on the at least one dielectric barrier wall in contact with the surface of the circuit device.
13. The method of claim 10, wherein each of the at least one barrier wall at least partially surrounds a perimeter of a corresponding one of the conductive probes.
14. A system for testing a circuit device, the system comprising: a test fixture configured to hold the circuit device, the circuit device comprising a plurality of contact pads; A probe head comprising: a plurality of conductive probes extending from a surface of the probe head, each of the conductive probes being configured to electrically contact one of the contact pads associated with the circuit device to provide an electrical signal between a corresponding contact pad and a corresponding one of the conductive probes; and at least one barrier wall extending from the surface of the probe head between at least one pair of the conductive probes; and A circuit tester is configured to generate an input signal provided to a first one of the contact pads of the corresponding circuit device via a corresponding first one of the conductive probes and to monitor an output signal provided from a second one of the contact pads of the corresponding circuit device via a corresponding second one of the conductive probes.
15. The system of claim 14, wherein the at least one barrier wall extends substantially linearly along the surface of the probe head between the at least one pair of the conductive probes.
16. The system of claim 14, wherein each of the at least one barrier wall at least partially surrounds a perimeter of a corresponding one of the conductive probes.
17. The system of claim 14, wherein the at least one barrier wall is formed of a compressible dielectric material such that in response to a force acting on the at least one barrier wall in contact with a surface of the circuit device, the at least one barrier wall compresses.
18. A system according to claim 14, wherein at least one barrier wall is formed in a substantially accordion shape along the height of the at least one barrier wall extending from the surface of the probe head, so that in response to a force acting on the at least one barrier wall in contact with the surface of the circuit device, the at least one barrier wall compresses.
19. The system of claim 14, further comprising a detachable probe card, wherein the at least one blocking wall extends from a surface of the detachable probe card.
20. The system of claim 19, wherein the removable probe card comprises at least one substantially flat barrier wall or at least one hollow cylindrical barrier wall.