Insulation resistance detection circuit, insulation resistance detection system and charging pile
By designing an insulation resistance detection circuit including an upper bridge, a lower bridge and a third switching circuit, the controller controls the state of the switching circuit, collects and corrects data, the problem of low insulation resistance detection accuracy in the prior art is solved, and a high-precision and simple detection process is achieved.
Patent Information
- Application Number
- CN202510338308.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-21
- Publication Date
- 2025-04-18
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing insulation resistance detection system has the problem of complex circuit structure and low detection accuracy.
An insulation resistance detection circuit including an upper bridge circuit, a lower bridge circuit and a third switching circuit is designed. The controller outputs control signals, controls the on and off of the switching circuit, collects three sets of sampled data and corrects each other to quickly determine the insulation resistance.
The accuracy and simplicity of insulation resistance detection are achieved, the complexity of the detection process is reduced, and the detection accuracy is improved.
Smart Images

Figure CN119846315A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of insulation resistance detection, and in particular to an insulation resistance detection circuit, an insulation resistance detection system and a charging pile. Background Art
[0002] In the current charging field, in order to improve charging efficiency, high-voltage charging is generally used for charging. During the high-voltage charging process, it is generally necessary to detect the insulation resistance of the high-voltage system to ensure the safety of high-voltage charging. The existing insulation resistance detection has problems such as complex circuit structure, complex process for high-voltage sampling and correction, complex calculation process, and low detection accuracy. Summary of the invention
[0003] The embodiments of the present invention provide an insulation resistance detection circuit, an insulation resistance detection system and a charging pile to solve the problems of complex circuit structure and low detection accuracy in the existing insulation resistance detection system.
[0004] An insulation resistance detection circuit comprises an upper bridge circuit, a lower bridge circuit and a third switch circuit; The upper bridge circuit and the lower bridge circuit are arranged in series between the positive electrode and the negative electrode of the DC bus, the upper bridge circuit is used to connect the positive electrode of the DC bus, and the lower bridge circuit is used to connect the negative electrode of the DC bus; The upper bridge circuit includes a first switch circuit and a first sampling circuit arranged in series; The lower bridge circuit includes a second switch circuit and a second sampling circuit arranged in series; A first end of the third switch circuit is connected to a connection node between the upper bridge circuit and the lower bridge circuit, and a second end of the third switch circuit is used to connect to a protection ground; The first switch circuit, the second switch circuit and the third switch circuit are all used to connect to a controller, and according to a control signal output by the controller, any two switch circuits are controlled to be turned on in sequence, and the other switch circuit is turned off, so that the first sampling circuit and / or the second sampling circuit collects sampling data; The first sampling circuit and the second sampling circuit are further used to connect to the controller and output the sampling data to the controller, so that the controller determines the first insulation resistance and the second insulation resistance according to the sampling data; The first insulation resistance is the insulation resistance between the positive pole of the DC bus and the protective ground; the second insulation resistance is the insulation resistance between the negative pole of the DC bus and the protective ground.
[0005] Preferably, a first end of the first switch circuit is connected to the positive electrode of the DC bus, and a second end of the first switch circuit is connected to the first end of the first sampling circuit; A first end of the second switch circuit is connected to the negative electrode of the DC bus, and a second end of the second switch circuit is connected to a first end of the second sampling circuit; The second end of the first sampling circuit is connected to the second end of the second sampling circuit; A first end of the third switch circuit is connected to a connection node between the first sampling circuit and the second sampling circuit.
[0006] Preferably, the upper bridge circuit further includes a first current limiting circuit, and the first current limiting circuit is arranged between the positive electrode of the DC bus and the first switch circuit; The lower bridge circuit further includes a second current limiting circuit, and the second current limiting circuit is arranged between the negative electrode of the DC bus and the second switch circuit.
[0007] Preferably, the first sampling circuit comprises three first sampling resistors arranged in series, a first sampling point is formed between two adjacent first sampling resistors, and the two first sampling points are connected to the controller; The second sampling circuit includes three second sampling resistors connected in series, a second sampling point is formed between two adjacent second sampling resistors, and the two second sampling points are connected to the controller.
[0008] Preferably, the first switch circuit includes a first switch, the second switch circuit includes a second switch, and the first switch and the second switch are relays or optocoupler switches; The third switch circuit includes a third switch, and the third switch is a relay, an optical coupler switch or a reed switch.
[0009] Preferably, the upper bridge circuit further includes a first anti-interference circuit, and the first anti-interference circuit is connected in parallel with a circuit formed by the first switch circuit and the first sampling circuit; The lower bridge circuit further includes a second anti-interference circuit, which is connected in parallel with a circuit formed by the second switch circuit and the second sampling circuit.
[0010] Preferably, the first anti-interference circuit includes a first RC circuit and a first diode arranged in parallel, and the first RC circuit includes a first resistor and a first capacitor arranged in series; the second anti-interference circuit includes a second RC circuit and a second diode arranged in parallel, and the second RC circuit includes a second resistor and a second capacitor arranged in series.
[0011] An insulation resistance detection system comprises the above insulation resistance detection circuit and a controller; The controller is connected to the first switch circuit, the second switch circuit and the third switch circuit, and is used to output a control signal to sequentially control any two switch circuits to be turned on and the other switch circuit to be turned off, so that the first sampling circuit and / or the second sampling circuit collect sampling data; The controller is also connected to the first sampling circuit and the second sampling circuit, and is used to determine the first insulation resistance and the second insulation resistance according to the sampling data.
[0012] Preferably, the controller is used to perform the following operations: Controlling the first switch circuit and the second switch circuit to be turned on and the third switch circuit to be turned off, and obtaining first sampling data output by the first sampling circuit or the second sampling circuit; Controlling the first switch circuit and the third switch circuit to be turned on and the second switch circuit to be turned off, and acquiring second sampling data output by the first sampling circuit; Controlling the second switch circuit and the third switch circuit to be turned on, and the first switch circuit to be turned off, to obtain third sampling data output by the second sampling circuit; A first insulation resistance and a second insulation resistance are determined according to the first sampling data, the second sampling data, and the third sampling data.
[0013] Preferably, determining the first insulation resistance and the second insulation resistance according to the first sampling data, the second sampling data and the third sampling data includes: Determining a bus voltage corresponding to the DC bus according to the first sampling data; Determine a first mapping relationship between the first insulation resistance and the second insulation resistance according to the second sampling data and the bus voltage; Determine a second mapping relationship between the first insulation resistance and the second insulation resistance according to the third sampling data and the bus voltage; The first insulation resistance and the second insulation resistance are determined according to the first mapping relationship and the second mapping relationship.
[0014] Preferably, determining the bus voltage corresponding to the DC bus according to the first sampling data includes: Determining a first current corresponding to the DC bus according to the first sampling data; A bus voltage corresponding to the DC bus is determined according to a first current corresponding to the DC bus.
[0015] Preferably, determining a first mapping relationship between the first insulation resistance and the second insulation resistance according to the second sampling data and the bus voltage includes: Determine an upper bridge measured voltage corresponding to the upper bridge circuit according to the second sampling data, and determine an upper bridge measured current corresponding to the upper bridge circuit based on the upper bridge measured voltage; Determine the estimated lower bridge voltage corresponding to the lower bridge circuit according to the upper bridge measured voltage and the bus voltage, and determine the estimated lower bridge current corresponding to the lower bridge circuit based on the estimated lower bridge voltage; Determine a first mapping relationship between the first insulation resistance and the second insulation resistance based on an upper bridge measured current corresponding to the upper bridge circuit and a lower bridge estimated current corresponding to the lower bridge circuit; The determining, according to the third sampling data and the bus voltage, a second mapping relationship between the first insulation resistance and the second insulation resistance comprises: Determine the lower bridge measured voltage corresponding to the lower bridge circuit according to the third sampling data, and determine the lower bridge measured current corresponding to the lower bridge circuit based on the lower bridge measured voltage; Determine an upper bridge estimated voltage corresponding to the upper bridge circuit according to the lower bridge measured voltage and the bus voltage, and determine an upper bridge estimated current corresponding to the upper bridge circuit based on the upper bridge estimated voltage; Based on the lower bridge measured current corresponding to the lower bridge circuit and the upper bridge estimated current corresponding to the upper bridge circuit, a second mapping relationship between the first insulation resistance and the second insulation resistance is determined.
[0016] Preferably, determining the upper bridge measured voltage corresponding to the upper bridge circuit according to the second sampling data includes: Determine a second current corresponding to the upper bridge circuit according to the second sampling data; Determine the upper bridge measured voltage corresponding to the upper bridge circuit according to the second current corresponding to the upper bridge circuit and the sum of the resistance values of all resistors in the upper bridge circuit; Determining the lower bridge measured voltage corresponding to the lower bridge circuit according to the third sampling data includes: Determining a third current corresponding to the lower bridge circuit according to the third sampling data; The lower bridge measured voltage corresponding to the lower bridge circuit is determined according to the third current corresponding to the lower bridge circuit and the sum of the resistance values of all resistors in the lower bridge circuit.
[0017] Preferably, the first sampling circuit comprises three first sampling resistors arranged in series, and a first sampling point is formed between two adjacent first sampling resistors; The second sampling circuit includes three second sampling resistors arranged in series, and a second sampling point is formed between two adjacent second sampling resistors; The first sampling data includes first sampling voltages corresponding to two first sampling points or first sampling voltages corresponding to two second sampling points; the first current is determined based on the first sampling voltages corresponding to the two first sampling points and the resistance value of a first sampling resistor between the two first sampling points; or the first current is determined based on the first sampling voltages corresponding to the two second sampling points and the resistance value of a second sampling resistor between the two second sampling points; The second sampling data includes second sampling voltages corresponding to two first sampling points; the second current is determined based on the second sampling voltages corresponding to the two first sampling points and the resistance value of the first sampling resistor between the two first sampling points; The third sampling data includes third sampling voltages corresponding to two second sampling points; and the third current is determined based on the third sampling voltages corresponding to the two second sampling points and the resistance value of the second sampling resistor between the two second sampling points.
[0018] A charging pile comprises the above insulation resistance detection system.
[0019] In the above-mentioned insulation resistance detection circuit, insulation resistance detection system and charging pile, the upper bridge circuit and the lower bridge circuit are arranged in series between the positive and negative poles of the DC bus; the upper bridge circuit includes a first switch circuit and a first sampling circuit arranged in series; the lower bridge circuit includes a second switch circuit and a second sampling circuit arranged in series; the first end of the third switch circuit is connected to the connection node between the upper bridge circuit and the lower bridge circuit, and the second end of the third switch circuit is connected to the protective ground; the controller can control any two of the first switch circuit, the second switch circuit and the third switch circuit to be turned on and the other one to be turned off, so as to collect three groups of sampling data, and perform mutual correction according to the relationship between the three groups of sampling data, so as to quickly determine the first insulation resistance between the positive pole of the DC bus and the protective ground, and the second insulation resistance between the negative pole of the DC bus and the protective ground. The entire insulation resistance detection circuit has a simple structure, and the process does not require high-voltage sampling correction. The detection process is simple and convenient, and the detection accuracy is high. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.
[0021] Figure 1 is a first schematic diagram of an insulation resistance detection circuit in one embodiment of the present invention; Figure 2is a second schematic diagram of an insulation resistance detection circuit in one embodiment of the present invention; Figure 3 is a third schematic diagram of an insulation resistance detection circuit in one embodiment of the present invention; Figure 4 is a first schematic diagram of an insulation resistance detection system in one embodiment of the present invention; Figure 5 It is a processing flow chart of an insulation resistance detection system in one embodiment of the present invention.
[0022] In the figure: 1. upper bridge circuit; 11. first switch circuit; S1. first switch; 12. first sampling circuit; R121 / R122 / R123. first sampling resistor; 13. first current limiting circuit; R131. first current limiting resistor; 14. first anti-interference circuit; D141. first diode; R141. first resistor; C141. first capacitor; 2. lower bridge circuit; 21. second switch circuit; S2. second switch; 22. second sampling circuit; R221 / R222 / R223. second sampling resistor; 23. second current limiting circuit; R231. second current limiting resistor; 24. second anti-interference circuit; D241. second diode; R241. second resistor; C241. second capacitor; 3. third switch circuit; S3. third switch; 4. controller. DETAILED DESCRIPTION
[0023] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0024] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.
[0025] The embodiment of the present invention provides an insulation resistance detection circuit, such as Figure 1-Figure 3As shown, the insulation resistance detection circuit includes an upper bridge circuit 1, a lower bridge circuit 2 and a third switch circuit 3; the upper bridge circuit 1 and the lower bridge circuit 2 are arranged in series between the positive pole DC+ and the negative pole DC- of the DC bus, the upper bridge circuit 1 is used to connect the positive pole DC+ of the DC bus, and the lower bridge circuit 2 is used to connect the negative pole DC- of the DC bus; the upper bridge circuit 1 includes a first switch circuit 11 and a first sampling circuit 12 arranged in series; the lower bridge circuit 2 includes a second switch circuit 21 and a second sampling circuit 22 arranged in series; the first end of the third switch circuit 3 is connected to the connection node between the upper bridge circuit 1 and the lower bridge circuit 2, and the second end of the third switch circuit 3 is used to connect to the protective ground PE; the first switch circuit 11, the second The switch circuit 21 and the third switch circuit 3 are both used to connect to the controller 4, and according to the control signal output by the controller 4, any two switch circuits are controlled to be turned on in turn, and the other switch circuit is turned off, so that the first sampling circuit 12 and / or the second sampling circuit 22 collect sampling data; the first sampling circuit 12 and the second sampling circuit 22 are also used to connect to the controller 4 and output sampling data to the controller 4, so that the controller 4 determines the first insulation resistance Rx and the second insulation resistance Ry according to the sampling data; wherein the first insulation resistance Rx is the insulation resistance between the positive pole DC+ of the DC bus and the protective ground PE; the second insulation resistance Ry is the insulation resistance between the negative pole DC- of the DC bus and the protective ground PE.
[0026] The upper bridge circuit 1 is a circuit arranged between the positive pole DC+ of the DC bus and the protective ground PE, while the lower bridge circuit 2 is a circuit arranged between the negative pole DC- of the DC bus and the protective ground PE, and the protective ground PE is insulated from the ground. The first switch circuit 11 and the second switch circuit 21 are switch circuits for realizing on-off control in the upper bridge circuit 1 and the lower bridge circuit 2, respectively, and the first sampling circuit 12 and the second sampling circuit 22 are circuits for realizing signal acquisition in the upper bridge circuit 1 and the lower bridge circuit 2, respectively.
[0027] As an example, the upper bridge circuit 1 and the lower bridge circuit 2 are arranged in series between the positive pole DC+ and the negative pole DC- of the DC bus. The upper bridge circuit 1 includes a first switch circuit 11 and a first sampling circuit 12 arranged in series. The first switch circuit 11 may be connected to the positive pole DC+ of the DC bus, and the first sampling circuit 12 may be connected to the lower bridge circuit 2, or the first sampling circuit 12 may be connected to the positive pole DC+ of the DC bus, and the first switch circuit 11 may be connected to the lower bridge circuit 2, which may be determined independently according to actual conditions. The lower bridge circuit 2 includes a second switch circuit 21 and a second sampling circuit 22 arranged in series. The second switch circuit 21 may be connected to the negative pole DC- of the DC bus, and the second sampling circuit 22 may be connected to the upper bridge circuit 1, or the second sampling circuit 22 may be connected to the negative pole DC- of the DC bus, and the second switch circuit 21 may be connected to the upper bridge circuit 1, which may be determined independently according to actual conditions.
[0028] The first end of the third switch circuit 3 is connected to the connection node between the upper bridge circuit 1 and the lower bridge circuit 2, and the second end of the third switch circuit 3 is connected to the protective ground PE, so that the upper bridge circuit 1 and the lower bridge circuit 2 can reach the protective ground PE through the conductive third switch circuit 3, so as to cooperate with the on and off of the first switch circuit 11 and the second switch circuit 21, collect the first insulation resistance Rx between the positive pole DC+ of the DC bus and the protective ground PE, and collect the second insulation resistance Ry between the negative pole DC- of the DC bus and the protective ground PE.
[0029] The first switch circuit 11, the second switch circuit 21, the third switch circuit 3, the first sampling circuit 12 and the second sampling circuit 22 are all used to connect to the controller 4, and can control the on and off of the first switch circuit 11, the second switch circuit 21 and the third switch circuit 3 according to the control signal output by the controller 4. After the switching states of the three switch circuits are determined, the corresponding sampling data are collected through the first sampling circuit 12 and the second sampling circuit 22 to determine the first insulation resistance Rx and the second insulation resistance Ry according to the sampling data of the first sampling circuit 12 and the second sampling circuit 22.
[0030] Specifically, the controller 4 can control the first switch circuit 11 and the second switch circuit 21 to be turned on, and the third switch circuit 3 to be turned off, so that the first sampling data output by the first sampling circuit 12 or the second sampling circuit 22 can reflect the voltage, current or other information between the positive pole DC+ and the negative pole DC- of the DC bus; control the first switch circuit 11 and the third switch circuit 3 to be turned on, and the second switch circuit 21 to be turned off, so that the second sampling data output by the first sampling circuit 12 can reflect the voltage, current or other information between the positive pole DC+ and the protective ground PE of the DC bus; control the second switch circuit 21 and the third switch circuit 3 to be turned on, and the first switch circuit 11 to be turned off, so that the second sampling circuit 22 outputs The third sampling data can reflect the voltage, current or other information between the negative pole DC- of the DC bus and the protective ground PE; after receiving the first sampling data, the second sampling data and the third sampling data, the controller 4 can understand the voltage, current or other information between the positive pole DC+ and the negative pole DC- of the DC bus, the voltage, current or other information between the positive pole DC+ of the DC bus and the protective ground PE, and the voltage, current or other information between the negative pole DC- of the DC bus and the protective ground PE, so as to analyze and determine the first insulation resistance Rx between the positive pole DC+ of the DC bus and the protective ground PE, and the second insulation resistance Ry between the negative pole DC- of the DC bus and the protective ground PE according to the relationship between the three.
[0031] In this example, the upper bridge circuit 1 and the lower bridge circuit 2 are arranged in series between the positive pole DC+ and the negative pole DC- of the DC bus; the upper bridge circuit 1 includes a first switch circuit 11 and a first sampling circuit 12 arranged in series; the lower bridge circuit 2 includes a second switch circuit 21 and a second sampling circuit 22 arranged in series; the first end of the third switch circuit 3 is connected to the connection node between the upper bridge circuit 1 and the lower bridge circuit 2, and the second end of the third switch circuit 3 is connected to the protective ground PE; the controller 4 can control any two of the first switch circuit 11, the second switch circuit 21 and the third switch circuit 3 to be turned on and the other to be turned off, so as to collect three groups of sampling data, perform mutual correction according to the relationship between the three groups of sampling data, and quickly determine the first insulation resistance Rx between the positive pole DC+ of the DC bus and the protective ground PE, and the second insulation resistance Ry between the negative pole DC- of the DC bus and the protective ground PE. The entire insulation resistance detection circuit has a simple structure, and the process does not require high-voltage sampling correction. The detection process is simple and convenient, and the detection accuracy is high.
[0032] In one embodiment, if Figure 1 and Figure 3 As shown, the first end of the first switch circuit 11 is connected to the positive pole DC+ of the DC bus, and the second end of the first switch circuit 11 is connected to the first end of the first sampling circuit 12; the first end of the second switch circuit 21 is connected to the negative pole DC- of the DC bus, and the second end of the second switch circuit 21 is connected to the first end of the second sampling circuit 22; the second end of the first sampling circuit 12 is connected to the second end of the second sampling circuit 22; the first end of the third switch circuit 3 is connected to the connection node between the first sampling circuit 12 and the second sampling circuit 22.
[0033] As an example, Figure 1 and Figure 3As shown, the first end of the first switch circuit 11 is connected to the positive electrode DC+ of the DC bus, and the second end of the first switch circuit 11 is connected to the first end of the first sampling circuit 12; the first end of the second switch circuit 21 is connected to the negative electrode DC- of the DC bus, and the second end of the second switch circuit 21 is connected to the first end of the second sampling circuit 22; the second end of the first sampling circuit 12 is connected to the second end of the second sampling circuit 22; that is, the positive electrode DC+ of the DC bus, the first switch circuit 11, the first sampling circuit 12, the second sampling circuit 22, the second switch circuit 21 and the negative electrode DC- of the DC bus are connected in sequence, so that the first switch circuit 11 and the second switch circuit 21 are respectively connected to the negative electrode DC- of the DC bus. The positive electrode DC+ is connected to the negative electrode DC-, the first sampling circuit 12 and the second sampling circuit 22 are located between the first switch circuit 11 and the second switch circuit 21, and the connection node between the first sampling circuit 12 and the second sampling circuit 22 is connected to the protective ground PE through the third switch circuit 3. The controller 4 sequentially controls any two of the first switch circuit 11, the second switch circuit 21 and the third switch circuit 3 to be turned on and the other to be turned off. The first sampling circuit 12 and the second sampling circuit 22 can be used to accurately collect three groups of sampling data to achieve the purpose of reducing detection interference, thereby ensuring the subsequent use of the three groups of sampling data to determine the accuracy of the first insulation resistance Rx and the second insulation resistance Ry.
[0034] In one embodiment, if Figure 1-Figure 3 As shown, the upper bridge circuit 1 also includes a first current limiting circuit 13, which is arranged between the positive pole DC+ of the DC bus and the first switching circuit 11; the lower bridge circuit 2 also includes a second current limiting circuit 23, which is arranged between the negative pole DC- of the DC bus and the second switching circuit 21.
[0035] As an example, the upper bridge circuit 1 further includes a first current limiting circuit 13, which is arranged between the positive pole DC+ of the DC bus and the first switch circuit 11, and is used to limit the current in the upper bridge circuit 1 so that it meets the high-voltage charging requirement. Correspondingly, the lower bridge circuit 2 further includes a second current limiting circuit 23, which is arranged between the negative pole DC- of the DC bus and the second switch circuit 21, and is used to limit the current in the lower bridge circuit 2 so that it meets the high-voltage charging requirement.
[0036] In one embodiment, if Figure 3 As shown, the first current limiting circuit 13 includes a first current limiting resistor R131 or at least two first current limiting resistors R131 arranged in series; the second current limiting circuit 23 includes a second current limiting resistor R231 or at least two second current limiting resistors R231 arranged in series.
[0037] As an example, the first current limiting circuit 13 may include a first current limiting resistor R131, or may include at least two first current limiting resistors R131 arranged in series, and the number of first current limiting resistors R131 may be determined independently according to actual conditions. For example, the first current limiting circuit 13 may be a circuit formed by encapsulating four first current limiting resistors R131, and its resistance value may be determined independently according to actual conditions to meet the high-voltage charging requirements of the charging pile.
[0038] Accordingly, the second current limiting circuit 23 may include a second current limiting resistor R231, or may include at least two second current limiting resistors R231 arranged in series, and the number of the second current limiting resistors R231 may be determined independently according to actual conditions. For example, the second current limiting circuit 23 may be a circuit formed by encapsulating four second current limiting resistors R231, and its resistance value may be determined independently according to actual conditions to meet the high-voltage charging requirements of the charging pile.
[0039] In one embodiment, if Figure 3 As shown, the first sampling circuit 12 includes three first sampling resistors R121 / R122 / R123 arranged in series, a first sampling point is formed between two adjacent first sampling resistors R121 / R122 / R123, and the two first sampling points are connected to the controller 4; the second sampling circuit 22 includes three second sampling resistors R221 / R222 / R223 arranged in series, a second sampling point is formed between two adjacent second sampling resistors R221 / R222 / R223, and the two second sampling points are connected to the controller 4.
[0040] As an example, the first sampling circuit 12 includes three first sampling resistors R121 / R122 / R123 arranged in series, and a first sampling point is formed between two adjacent first sampling resistors R121 / R122 / R123, so that two first sampling points are formed between the three first sampling resistors R121 / R122 / R123, and the two first sampling points are connected to the controller 4, and the voltage, current or other data corresponding to the two first sampling points can be output to the controller 4. Figure 3 As shown, a first sampling point ADC1 is formed between the first sampling resistor R121 and the first sampling resistor R122, and a first sampling point ADC2 is formed between the first sampling resistor R122 and the first sampling resistor R123, so that the controller 4 can not only accurately determine the voltage difference corresponding to the two first sampling points, but also accurately determine the current flowing through the first sampling circuit 12 in combination with the resistance value of the first sampling resistor R122 between the two. The detection process can ignore the resistance difference and temperature rise influence of the entire circuit, so that the sampling accuracy is higher and more reliable.
[0041] Accordingly, the second sampling circuit 22 includes three second sampling resistors R221 / R222 / R223 arranged in series, and a second sampling point is formed between two adjacent second sampling resistors R221 / R222 / R223, so that two second sampling points are formed between the three second sampling resistors R221 / R222 / R223, and the two second sampling points are both connected to the controller 4, and the voltage, current or other data corresponding to the two second sampling points can be output to the controller 4. For example, the second sampling point ADC3 is formed between the second sampling resistor R221 and the second sampling resistor R222, and the second sampling point ADC4 is formed between the second sampling resistor R222 and the second sampling resistor R223, so that the controller 4 can not only accurately determine the voltage difference corresponding to the two second sampling points, but also accurately determine the current flowing through the second sampling circuit 22 in combination with the resistance value of the second second sampling resistor R222 between the two, and the detection process can ignore the resistance difference and temperature rise influence of the entire circuit, so that the sampling accuracy is higher and more reliable.
[0042] In this example, the first sampling circuit 12 and the second sampling circuit 22 use a differential acquisition circuit composed of two sampling points. The anti-interference performance of this differential sampling circuit is better than that of a traditional sampling circuit. The final leakage current calculation is achieved through the signal fluctuation of the sampling resistor, which has no effect on the accuracy and error of other resistors, thereby greatly improving the overall calculation accuracy.
[0043] In one embodiment, the first switch circuit 11 includes a first switch S1, the second switch circuit 21 includes a second switch S2, the first switch S1 and the second switch S2 are relays or optocoupler switches; the third switch circuit 3 includes a third switch S3, the third switch S3 is a relay, an optocoupler switch or a reed switch.
[0044] As an example, the first switch circuit 11 includes a first switch S1, and the second switch circuit 21 includes a second switch S2. The first switch S1 and the second switch S2 can be relays or optical coupler switches to meet the needs of frequent control of the first switch S1 and the second switch S2, which helps to ensure their reliability. The third switch circuit 3 includes a third switch S3. Since the third switch S3 has a lower control frequency than the first switch S1 and the second switch S2, the third switch S3 can not only be a relay or an optical coupler switch to ensure its feasibility, but also a reed switch with lower cost can be used. In this example, the relay is a high-voltage relay, and the reed switch is a high-voltage reed switch.
[0045] In one embodiment, if Figure 1-Figure 3As shown, the upper bridge circuit 1 also includes a first anti-interference circuit 14, which is connected in parallel with a circuit formed by the first switch circuit 11 and the first sampling circuit 12; the lower bridge circuit 2 also includes a second anti-interference circuit 24, which is connected in parallel with a circuit formed by the second switch circuit 21 and the second sampling circuit 22.
[0046] As an example, the upper bridge circuit 1 also includes a first anti-interference circuit 14, which is connected in parallel with the circuit formed by the first switch circuit 11 and the first sampling circuit 12, that is, the two ends of the first anti-interference circuit 14 are respectively connected to the two ends of the circuit formed by the first switch circuit 11 and the first sampling circuit 12, for suppressing the inductive load, so as to further reduce the interference and ensure the accuracy of the detection result. Correspondingly, the lower bridge circuit 2 also includes a second anti-interference circuit 24, which is connected in parallel with the circuit formed by the second switch circuit 21 and the second sampling circuit 22, that is, the two ends of the second anti-interference circuit 24 are respectively connected to the two ends of the circuit formed by the second switch circuit 21 and the second sampling circuit 22, for suppressing the inductive load, so as to further reduce the interference and ensure the accuracy of the detection result.
[0047] In one embodiment, the first anti-interference circuit 14 includes a first RC circuit and a first diode D141 arranged in parallel, and the first RC circuit includes a first resistor R141 and a first capacitor C141 arranged in series; the second anti-interference circuit 24 includes a second RC circuit and a second diode D241 arranged in parallel, and the second RC circuit includes a second resistor R241 and a second capacitor C241 arranged in series.
[0048] As an example, Figure 3 As shown, the first anti-interference circuit 14 may include a first resistor R141, a first capacitor C141 and a first diode D141, the first resistor R141 and the first capacitor C141 are connected in series to form a first RC circuit, the first capacitor C141 is used to absorb energy and suppress voltage spikes; the first resistor R141 is used to consume energy and weaken oscillation; the first diode D141 is connected in parallel with the first RC circuit to prevent the energy absorbed by the first capacitor C141 from flowing in reverse and causing resonance. Correspondingly, the second anti-interference circuit 24 may include a second resistor R241, a second capacitor C241 and a second diode D241, the second resistor R241 and the second capacitor C241 are connected in series to form a second RC circuit, the second capacitor C241 is used to absorb energy and suppress voltage spikes; the second resistor R241 is used to consume energy and weaken oscillation; the second diode D241 is connected in parallel with the second RC circuit to prevent the energy absorbed by the second capacitor C241 from flowing in reverse and causing resonance. In this example, the circuit parameters and device parameters of the two anti-interference circuits are adaptively adjusted according to the bus voltage of the DC bus and the specific application scenario to meet the actual needs of the specific application scenario.
[0049] In one embodiment, an insulation resistance detection system is provided. The insulation resistance detection system can be used in a charging pile, and can also be used in other application scenarios where insulation resistance detection is required, such as Figure 4 As shown, it includes the insulation resistance detection circuit and the controller 4 in the above embodiment; the controller 4 is connected to the first switch circuit 11, the second switch circuit 21 and the third switch circuit 3, and is used to output a control signal to control any two switch circuits to be turned on in sequence and the other switch circuit to be turned off, so that the first sampling circuit 12 and / or the second sampling circuit 22 collect sampling data; the controller 4 is also connected to the first sampling circuit 12 and the second sampling circuit 22, and is used to determine the first insulation resistance Rx and the second insulation resistance Ry according to the sampling data.
[0050] In this example, the upper bridge circuit 1 and the lower bridge circuit 2 are arranged in series between the positive pole DC+ and the negative pole DC- of the DC bus; the upper bridge circuit 1 includes a first switch circuit 11 and a first sampling circuit 12 arranged in series; the lower bridge circuit 2 includes a second switch circuit 21 and a second sampling circuit 22 arranged in series; the first end of the third switch circuit 3 is connected to the connection node between the upper bridge circuit 1 and the lower bridge circuit 2, and the second end of the third switch circuit 3 is connected to the protective ground PE; the controller 4 can control any two of the first switch circuit 11, the second switch circuit 21 and the third switch circuit 3 to be turned on and the other to be turned off, so as to collect three groups of sampling data, perform mutual correction according to the relationship between the three groups of sampling data, and quickly determine the first insulation resistance Rx between the positive pole DC+ of the DC bus and the protective ground PE, and the second insulation resistance Ry between the negative pole DC- of the DC bus and the protective ground PE. The entire insulation resistance detection circuit has a simple structure, and the process does not require high-voltage sampling correction. The detection process is simple and convenient, and the detection accuracy is high.
[0051] In one embodiment, if Figure 5 As shown, the controller 4 of the insulation resistance detection system is used to perform the following operations: S1: Control the first switch circuit 11 and the second switch circuit 21 to be turned on, and the third switch circuit 3 to be turned off, to obtain the first sampling data output by the first sampling circuit 12 or the second sampling circuit 22; S2: Control the first switch circuit 11 and the third switch circuit 3 to be turned on, and the second switch circuit 21 to be turned off, to obtain the second sampling data output by the first sampling circuit 12; S3: Control the second switch circuit 21 and the third switch circuit 3 to be turned on, and the first switch circuit 11 to be turned off, and obtain the third sampling data output by the second sampling circuit 22; S4: Determine a first insulation resistance Rx and a second insulation resistance Ry according to the first sampling data, the second sampling data and the third sampling data.
[0052] As an example, in step S1, the controller 4 can control the first switch circuit 11 and the second switch circuit 21 to be turned on, and the third switch circuit 3 to be turned off, so that the positive pole DC+ of the DC bus, the upper bridge circuit 1, the lower bridge circuit 2 and the negative pole DC- of the DC bus are connected, that is, the first sampling circuit 12 and the second sampling circuit 22 are arranged in series between the positive pole DC+ and the negative pole DC- of the DC bus. At this time, the current flowing through the first sampling circuit 12 and the second sampling circuit 22 is the same, and the first sampling circuit 12 or the second sampling circuit 22 can be used to collect the first sampling data reflecting the voltage, current or other information between the positive pole DC+ and the negative pole DC- of the DC bus, and the first sampling data is sent to the controller 4.
[0053] As an example, in step S2, the controller 4 can control the first switch circuit 11 and the third switch circuit 3 to be turned on, and the second switch circuit 21 to be turned off, so that the positive pole DC+ of the DC bus, the upper bridge circuit 1 and the protective ground PE are connected, that is, the first sampling circuit 12 is set between the positive pole DC+ of the DC bus and the protective ground PE. At this time, the first sampling circuit 12 can collect the second sampling data that can reflect the voltage, current or other information between the positive pole DC+ of the DC bus and the protective ground PE, and send the second sampling data to the controller 4.
[0054] As an example, in step S3, the controller 4 can control the second switch circuit 21 and the third switch circuit 3 to be turned on, and the first switch circuit 11 to be turned off, so that the negative pole DC- of the DC bus, the lower bridge circuit 2 and the protective ground PE are connected, that is, the second sampling circuit 22 is set between the negative pole DC- of the DC bus and the protective ground PE. At this time, the second sampling circuit 22 can collect the third sampling data that can reflect the voltage, current or other information between the negative pole DC- of the DC bus and the protective ground PE, and send the third sampling data to the controller 4.
[0055] As an example, in step S4, the controller 4 can receive the first sampling data, the second sampling data and the third sampling data output by the first sampling circuit 12 and the second sampling circuit 22, and then, based on the first sampling data, the second sampling data and the third sampling data, understand the voltage, current and other information between the positive pole DC+ and the negative pole DC- of the DC bus, the voltage, current and other information between the positive pole DC+ and the protective ground PE of the DC bus, and the voltage, current and other information between the negative pole DC- of the DC bus and the protective ground PE, so as to perform mutual correction according to the relationship between the three, and quickly determine the first insulation resistance Rx between the positive pole DC+ of the DC bus and the protective ground PE, and the second insulation resistance Ry between the negative pole DC- of the DC bus and the protective ground PE. The process does not require high-voltage sampling correction, the detection process is simple and convenient, and the detection accuracy is high.
[0056] In one embodiment, step S4, i.e., determining the first insulation resistance Rx and the second insulation resistance Ry according to the first sampling data, the second sampling data and the third sampling data, comprises: S41: Determine a bus voltage Usum corresponding to the DC bus according to the first sampling data; S42: determining a first mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry according to the second sampling data and the bus voltage Usum; S43: determining a second mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry according to the third sampling data and the bus voltage Usum; S44: Determine the first insulation resistance Rx and the second insulation resistance Ry according to the first mapping relationship and the second mapping relationship.
[0057] As an example, in step S41, the controller 4 may determine the bus voltage Usum corresponding to the DC bus according to the first sampling data output by the first sampling circuit 12 or the second sampling circuit 22, and the bus voltage Usum is the voltage between the positive electrode DC+ and the negative electrode DC- of the DC bus. In this example, when the first switch circuit 11 and the second switch circuit 21 are turned on and the third switch circuit 3 is turned off, the first sampling circuit 12 and the second sampling circuit 22 are arranged in series between the positive electrode DC+ and the negative electrode DC- of the DC bus, and the currents flowing through the first sampling circuit 12 and the second sampling circuit 22 are the same. The first current I1 corresponding to the first sampling data detected can be determined, and the bus voltage Usum corresponding to the DC bus is determined by using the first current I1 and the resistance values of all resistors between the positive electrode DC+ and the negative electrode DC- of the DC bus.
[0058] As an example, in step S42, the controller 4 can determine the upper bridge measured voltage Uus corresponding to the conductive branch between the positive pole DC+ of the DC bus-the upper bridge circuit 1-the protective ground PE according to the second sampling data collected by the first sampling circuit 12, and determine the upper bridge measured current Ius according to the upper bridge measured voltage Uus and the resistance values of all resistors in this conductive branch including the first insulation resistor Rx, that is, Ius=Uus / (Rx / / Rs1), Rx / / Rs1 refers to the total resistance of the first insulation resistor Rx and the resistance values of all resistors in the upper bridge circuit 1 in parallel, and Rx is the resistance value of the first insulation resistor Rx, which is an unknown number. Since the bus voltage Usum corresponding to the DC bus is the sum of the voltages of the upper bridge circuit 1 and the lower bridge circuit 2, the lower bridge estimated voltage Udg corresponding to the disconnected branch circuit of the negative pole DC of the DC bus--lower bridge circuit 2-protective ground PE can be estimated according to the bus voltage Usum and the measured voltage Uus of the upper bridge, that is, Udg=Usum-Uus. Since the current in the disconnected branch circuit does not flow through the upper bridge circuit 1, but only flows through the second insulation resistor Ry, the lower bridge estimated current I can be determined according to the lower bridge estimated voltage Udg and the second insulation resistor Ry. dg, that is, Idg=Udg / Ry; according to Kirchhoff's current law, at any node on the circuit at any time, the sum of the currents flowing into the node is equal to the sum of the currents flowing out of the node, therefore, the upper bridge measured current Ius=lower bridge estimated current Idg, and the upper bridge measured current Ius is related to the first insulation resistance Rx, and the lower bridge estimated current Idg is related to the second insulation resistance Ry, therefore, it can be determined that the first mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry is Uus / (Rx / / Rs1)=Udg / Ry.
[0059] As an example, in step S43, the controller 4 can determine the lower bridge measured voltage Uds corresponding to the conductive branch of the negative pole DC of the DC bus--lower bridge circuit 2-protective ground PE according to the third sampling data collected by the second sampling circuit 22; and then determine the lower bridge measured current Ids according to the lower bridge measured voltage Uds and the resistance values of all resistors in this conductive branch including the second insulation resistor Ry, that is, Ids=Uds / (Ry / / Rs2), Ry / / Rs2 refers to the total resistance of the second insulation resistor Ry and the resistance values of all resistors in the lower bridge circuit 2 in parallel, and Ry is the resistance value of the second insulation resistor Ry, which is an unknown number. Since the bus voltage Usum corresponding to the DC bus is the sum of the voltages of the upper bridge circuit 1 and the lower bridge circuit 2, the upper bridge estimated voltage Uug corresponding to the disconnected branch circuit of the DC bus positive pole DC+-upper bridge circuit 1-protective ground PE can be estimated according to the bus voltage Usum and the lower bridge measured voltage Uds, that is, the upper bridge estimated voltage Uug=bus voltage Usum-lower bridge measured voltage Uds, that is, Uug=Usum-Uds; since the current in the disconnected branch circuit does not flow through the upper bridge circuit 1, but only flows through the first insulation resistor Rx, therefore, the upper bridge estimated voltage Uug and the first insulation resistor Rx can be estimated according to the upper bridge estimated voltage Uug and the first insulation resistor Rx. The insulation resistance Rx is used to determine the estimated current Iug of the upper bridge, that is, Iug=Uug / Rx; according to Kirchhoff's current law, at any node on the circuit at any time, the sum of the currents flowing into the node is equal to the sum of the currents flowing out of the node. Therefore, the actual measured current Ids of the lower bridge is equal to the estimated current Iug of the upper bridge, and the actual measured current Ids of the lower bridge is related to the second insulation resistance Ry, and the estimated current Iug of the upper bridge is related to the first insulation resistance Rx. Therefore, the second mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry can be determined as Uds / (Ry / / Rs2)=Uug / Rx.
[0060] As an example, after the controller 4 determines the first mapping relationship and the second mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry, since in the two mapping relationships, except for the first insulation resistance Rx and the second insulation resistance Ry, the resistance values of other resistors are known, and other unknown data can be determined through the first sampling data, the second sampling data and the third sampling data, therefore, based on the first mapping relationship and the second mapping relationship, the two-variable linear equation group can be solved to quickly determine the first insulation resistance Rx and the second insulation resistance Ry, and the process does not need to introduce high-voltage sampling correction, the calculation process is simple and convenient, and based on the bus voltage Usum, the upper bridge measured voltage Uus and the lower bridge measured voltage Uds, the lower bridge estimated voltage Udg and the upper bridge estimated voltage Uug are determined to achieve mutual correction of data, which helps to ensure the accuracy of the detection of the two insulation resistances.
[0061] In this example, the controller 4 is connected to the insulation resistance detection circuit in the above-mentioned embodiment, and can control the conduction or disconnection of the three switching circuits to use the first sampling data collected by it to collect and determine the bus voltage Usum corresponding to the DC bus, without the need to additionally set up a bus voltage collection circuit, which helps to save circuit costs; moreover, by using the calculated bus voltage Usum corresponding to the DC bus in combination with the second sampling data and the third sampling data, the first insulation resistance Rx and the second insulation resistance Ry can be quickly and accurately determined, the calculation process is simple and convenient, and the data can be corrected with each other, which helps to ensure the accuracy of the two insulation resistance detections.
[0062] In one embodiment, step S41, i.e., determining a bus voltage Usum corresponding to the DC bus according to the first sampling data, includes: S411: Determine a first current I1 corresponding to the DC bus according to the first sampling data; S412: Determine a bus voltage Usum corresponding to the DC bus according to the first current I1 corresponding to the DC bus.
[0063] As an example, in step S411, the controller 4 may obtain the first sampling data output by the first sampling circuit 12 or the second sampling circuit 22, and determine the first current I1 corresponding to the DC bus according to the first sampling data. In this example, the first sampling circuit 12 and the second sampling circuit 22 may be current sampling circuits, and the current sampling circuits may be used to directly collect the first current I1 formed when the first switch circuit 11 and the second switch circuit 21 are turned on; or the first sampling circuit 12 and the second sampling circuit 22 may also be voltage sampling circuits, and the voltage sampling circuits may be used to directly collect the voltage difference between any two sampling points when the first switch circuit 11 and the second switch circuit 21 are turned on, and the corresponding first current I1 is calculated using the voltage difference and the resistance value between the two sampling points.
[0064] In one embodiment, the first sampling circuit 12 includes three first sampling resistors R121 / R122 / R123 arranged in series, and a first sampling point is formed between two adjacent first sampling resistors R121 / R122 / R123; the second sampling circuit 22 includes three second sampling resistors R221 / R222 / R223 arranged in series, and a second sampling point is formed between two adjacent second sampling resistors R221 / R222 / R223; the first sampling data includes first sampling voltages corresponding to the two first sampling points or first sampling voltages corresponding to the two second sampling points; the first current is determined based on the first sampling voltages corresponding to the two first sampling points and the resistance value of the first sampling resistor R122 between the two first sampling points; or, the first current is determined based on the first sampling voltages corresponding to the two second sampling points and the resistance value of the second sampling resistor R222 between the two second sampling points.
[0065] like Figure 3 As shown, the first sampling circuit 12 includes three first sampling resistors R121 / R122 / R123 arranged in series, a first sampling point is formed between two adjacent first sampling resistors R121 / R122 / R123, and the first sampling data includes the first sampling voltages of the two first sampling points ADC1 and ADC2. At this time, the first current I1 is determined based on the two corresponding first sampling voltages and the resistance value of the first sampling resistor R122 between the two first sampling points ADC1 and ADC2. Specifically, the first voltage difference can be determined based on the first sampling voltages corresponding to the two first sampling points ADC1 and ADC2; and then the quotient of the first voltage difference and the resistance value of the first sampling resistor R122 between the two first sampling points ADC1 and ADC2 is determined as the first current I1, that is, I1=(ADC1-ADC2) / R122.
[0066] Alternatively, the second sampling circuit 22 includes three second sampling resistors R221 / R222 / R223 arranged in series, a second sampling point is formed between two adjacent second sampling resistors R221 / R222 / R223, and the first sampling data includes the first sampling voltages of the two second sampling points ADC3 and ADC4. At this time, the first current I1 is determined based on the first sampling voltages corresponding to the two second sampling points ADC3 and ADC4 and the resistance value of the second sampling resistor R222 between the two second sampling points ADC3 and ADC4. Specifically, the first voltage difference can be determined based on the first sampling voltages corresponding to the two second sampling points ADC3 and ADC4; and then the quotient of the first voltage difference and the resistance value of the second sampling resistor R222 between the two second sampling points ADC3 and ADC4 is determined as the first current I1, that is, I1=(ADC3-ADC4) / R222.
[0067] As an example, in step S412, after determining the first current I1 corresponding to the DC bus, the controller 4 can use the first current I1 and the sum of the resistance values of all resistors in the DC bus to determine the bus voltage Usum corresponding to the DC bus, that is, Usum=I1*(Rs1+Rs2), where Rs1 is the sum of the resistance values of all resistors in the upper bridge circuit 1, and Rs2 is the sum of the resistance values of all resistors in the upper bridge circuit 1.
[0068] For example, when the upper bridge circuit 1 includes the first switch circuit 11 and the first sampling circuit 12, and the lower bridge circuit 2 includes the second switch circuit 21 and the second sampling circuit 22, Rs1 is the sum of the resistance values of all resistors in the first sampling circuit 12, that is, Rs1=Rs12; Rs2 is the sum of the resistance values of all resistors in the second sampling circuit 22, that is, Rs2=Rs22. For another example, when the upper bridge circuit 1 includes the first switch circuit 11, the first sampling circuit 12 and the first current limiting circuit 13, and the lower bridge circuit 2 includes the second switch circuit 21, the second sampling circuit 22 and the second current limiting circuit 23, Rs1 is the sum of the resistance values of all resistors in the first sampling circuit 12 and the first current limiting circuit 13, that is, Rs1=Rs12+Rs13, Rs2 is the sum of the resistance values of all resistors in the second sampling circuit 22 and the second current limiting circuit 23, that is, Rs2=Rs22+Rs23; Rs12=R121+R122+R123, Rs22=R221+R222+R223, Rs13=R131+R132+R133+R134, Rs23=R231+R232+R233+R234.
[0069] Furthermore, the controller 4 can obtain the first sampling data output by the first sampling circuit 12 and the first sampling data output by the second sampling circuit 22, calculate two first currents I1 respectively according to the two first sampling data, and verify the two first currents I1. If the two first currents I1 are different, it is determined that there is an abnormality in the entire insulation resistance detection circuit, and an abnormal warning message needs to be output.
[0070] In one embodiment, step S42, i.e., determining a first mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry according to the second sampling data and the bus voltage Usum, includes: S421: determining the upper bridge measured voltage Uus corresponding to the upper bridge circuit 1 according to the second sampling data, and determining the upper bridge measured current Ius corresponding to the upper bridge circuit 1 based on the upper bridge measured voltage Uus; S422: Determine the estimated lower bridge voltage Udg corresponding to the lower bridge circuit 2 according to the upper bridge measured voltage Uus and the bus voltage Usum, and determine the estimated lower bridge current Idg corresponding to the lower bridge circuit 2 based on the estimated lower bridge voltage Udg; S423: Determine a first mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry based on the upper bridge measured current Ius corresponding to the upper bridge circuit 1 and the lower bridge estimated current Idg corresponding to the lower bridge circuit 2.
[0071] As an example, in step S421, the controller 4 may obtain the second sampling data output by the first sampling circuit 12, and determine the upper bridge measured voltage Uus corresponding to the upper bridge circuit 1 according to the second sampling data. The upper bridge measured voltage Uus is the voltage across the upper bridge circuit 1, which can be specifically understood as the voltage between the positive pole DC+ of the DC bus and the protective ground PE. In this example, the first sampling circuit 12 may be a current sampling circuit, and the upper bridge measured voltage Uus may be determined according to the current collected by it and the sum of the resistance values of all resistors in the upper bridge circuit 1; or, the first sampling circuit 12 may also be a voltage sampling circuit, and the upper bridge measured voltage Uus may be directly or indirectly measured. Then, the controller 4 may determine the upper bridge measured voltage Uus corresponding to the upper bridge circuit 1 according to the second current I2 corresponding to the upper bridge circuit 1 and the sum of the resistance values Rs1 of all resistors in the upper bridge circuit 1, that is, Uus=I2*Rs1. Finally, the controller 4 can determine the measured current Ius of the upper bridge corresponding to the upper bridge circuit 1 by the measured voltage Uus of the upper bridge corresponding to the upper bridge circuit 1, that is, Ius=Uus / (Rx / / Rs1), Rx / / Rs1 refers to the total resistance of the first insulation resistor Rx and the resistance values of all resistors in the upper bridge circuit 1 in parallel, and Rx is the resistance value of the first insulation resistor Rx, which is an unknown number. In this example, the resistance value of the switch circuit can be basically ignored, then when the upper bridge circuit 1 includes the first switch circuit 11 and the first sampling circuit 12, Rs1=Rs12; when the upper bridge circuit 1 includes the first switch circuit 11, the first sampling circuit 12 and the first current limiting circuit 13, Rs1=Rs12+Rs13, Rs12=R121+R122+R123, Rs13=R131+R132+R133+R134.
[0072] As an example, in step S422, since the bus voltage Usum corresponding to the DC bus measured by the first switch circuit 11 and the second switch circuit 21 is the sum of the voltage of the upper bridge circuit 1 and the voltage of the lower bridge circuit 2 when the first switch circuit 11 and the second switch circuit 21 are turned on, the controller 4 can determine the estimated lower bridge voltage Udg corresponding to the lower bridge circuit 2 by the difference between the bus voltage Usum and the upper bridge measured voltage Uus after determining the upper bridge circuit 1 and the bus voltage Usum corresponding to the DC bus, that is, Udg=Usum-Uus. Then, the controller 4 uses the estimated lower bridge voltage Udg corresponding to the lower bridge circuit 2 to determine the estimated lower bridge current Idg corresponding to the lower bridge circuit 2, that is, Idg=Udg / Ry, where Ry is the resistance value of the second insulation resistor Ry, which is an unknown number.
[0073] As an example, in step S423, according to Kirchhoff's current law, at any node on the circuit at any time, the sum of the currents flowing into the node is equal to the sum of the currents flowing out of the node. Therefore, the measured upper bridge current Ius corresponding to the upper bridge circuit 1 = the estimated lower bridge current Idg corresponding to the lower bridge circuit 2, that is, the first mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry is Uus / (Rx / / Rs1)=Udg / Ry.
[0074] In this embodiment, in the calculation process of the first mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry, the bus voltage Usum of the DC bus and the upper bridge measured voltage Uus corresponding to the upper bridge circuit 1 are used to estimate the lower bridge estimated voltage Udg corresponding to the lower bridge circuit 2. The process does not need to introduce high-voltage sampling correction, and the calculation process is simple and convenient. Compared with the traditional scheme in which the voltages of the upper bridge circuit 1 and the lower bridge circuit 2 are equal by default, the bus voltage Usum and the upper bridge measured voltage Uus are used to determine the lower bridge estimated voltage Udg to achieve mutual correction, which helps to ensure the accuracy of the detection of the two insulation resistances.
[0075] In one embodiment, step S421, i.e., determining the upper bridge measured voltage Uus corresponding to the upper bridge circuit 1 according to the second sampling data, includes: S4211: Determine a second current I2 corresponding to the upper bridge circuit 1 according to the second sampling data; S4212: Determine the upper bridge measured voltage Uus corresponding to the upper bridge circuit 1 according to the second current I2 corresponding to the upper bridge circuit 1 and the sum of the resistance values of all resistors in the upper bridge circuit 1.
[0076] As an example, in step S4211, the controller 4 can obtain the second sampling data output by the first sampling circuit 12, and determine the second current I2 corresponding to the upper bridge circuit 1 according to the second sampling data. When the first sampling circuit 12 is a current sampling circuit, the second current I2 is the current directly collected by the current sampling circuit.
[0077] As another example, the first sampling circuit 12 includes three first sampling resistors R121 / R122 / R123 arranged in series, and a first sampling point is formed between two adjacent first sampling resistors R121 / R122 / R123, that is, the first sampling circuit 12 includes two first sampling points ADC1 and ADC2. The second sampling data includes the second sampling voltage corresponding to the two first sampling points ADC1 and ADC2; the second current I2 is determined based on the second sampling voltage corresponding to the two first sampling points ADC1 and ADC2 and the resistance value of the first sampling resistor R122 between the two first sampling points ADC1 and ADC2, specifically, the second voltage difference can be determined based on the second sampling voltage corresponding to the two first sampling points ADC1 and ADC2; and then the quotient of the second voltage difference and the resistance value of the first sampling resistor R122 between the two first sampling points ADC1 and ADC2 is determined as the second current I2, that is, I2=(ADC1-ADC2) / R122.
[0078] As an example, in step S4212, the controller 4 can determine the upper bridge measured voltage Uus corresponding to the upper bridge circuit 1 according to the second current I2 corresponding to the upper bridge circuit 1 and the sum Rs1 of the resistance values of all resistors in the upper bridge circuit 1, that is, Uus=I2*Rs1. In this example, when the upper bridge circuit 1 includes the first switch circuit 11 and the first sampling circuit 12, Rs1=Rs12; when the upper bridge circuit 1 includes the first switch circuit 11, the first sampling circuit 12 and the first current limiting circuit 13, Rs1=Rs12+Rs13, Rs12=R121+R122+R123, and Rs13=R131+R132+R133+R134.
[0079] In one embodiment, step S43, i.e., determining a second mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry according to the third sampling data and the bus voltage Usum, includes: S431: determining the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2 according to the third sampling data, and determining the lower bridge measured current Ids corresponding to the lower bridge circuit 2 based on the lower bridge measured voltage Uds; S432: Determine the upper bridge estimated voltage Uug corresponding to the upper bridge circuit 1 according to the lower bridge measured voltage Uds and the bus voltage Usum, and determine the upper bridge estimated current Iug corresponding to the upper bridge circuit 1 based on the upper bridge estimated voltage Uug; S433: Determine a second mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry based on the lower bridge measured current Ids corresponding to the lower bridge circuit 2 and the upper bridge estimated current Iug corresponding to the upper bridge circuit 1.
[0080] As an example, in step S431, the controller 4 may obtain the third sampling data output by the second sampling circuit 22, and determine the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2 according to the third sampling data. The lower bridge measured voltage Uds is the voltage across the lower bridge circuit 2, which can be specifically understood as the voltage between the negative pole DC- of the DC bus and the protective ground PE. In this example, the second sampling circuit 22 may be a current sampling circuit, and the lower bridge measured voltage Uds may be determined according to the current collected by it and the sum of the resistance values of all resistors in the lower bridge circuit 2; or, the second sampling circuit 22 may be a voltage sampling circuit, and the lower bridge measured voltage Uds may be directly or indirectly measured. Then, the controller 4 may determine the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2 according to the third current I3 corresponding to the lower bridge circuit 2 and the sum of the resistance values Rs2 of all resistors in the lower bridge circuit 2, that is, Uds=I3*Rs2. Finally, the controller 4 can determine the lower bridge measured current Ids corresponding to the lower bridge circuit 2 by the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2, that is, Ids=Uds / (Ry / / Rs2), where Ids is the lower bridge measured current Ids, Ry / / Rs2 refers to the total resistance of the second insulation resistor Ry and the resistance values of all resistors in the lower bridge circuit 2 in parallel, and Ry is the resistance value of the second insulation resistor Ry, which is an unknown number. In this example, when the lower bridge circuit 2 includes the second switch circuit 21 and the second sampling circuit 22, Rs2=Rs22; when the lower bridge circuit 2 includes the second switch circuit 21, the second sampling circuit 22 and the second current limiting circuit 23, Rs2=Rs22+Rs23, Rs22=R221+R222+R223, and Rs23=R231+R232+R233+R234.
[0081] As an example, in step S432, since the bus voltage Usum corresponding to the DC bus measured when the first switch circuit 11 and the second switch circuit 21 are turned on is the sum of the voltage of the upper bridge circuit 1 and the voltage of the lower bridge circuit 2, after the controller 4 determines the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2 and the bus voltage Usum corresponding to the DC bus, it can determine the upper bridge estimated voltage Uug corresponding to the upper bridge circuit 1 by the difference between the bus voltage Usum and the lower bridge measured voltage Uds, that is, Uug=Usum-Uds. Then, the controller 4 uses the upper bridge estimated voltage Uug corresponding to the upper bridge circuit 1 to determine the upper bridge estimated current Iug corresponding to the upper bridge circuit 1, that is, Iug=Uug / Rx, where Rx is the resistance value of the first insulation resistor Rx, which is an unknown number.
[0082] As an example, in step S433, according to Kirchhoff's current law, at any node on the circuit at any time, the sum of the currents flowing into the node is equal to the sum of the currents flowing out of the node. Therefore, the measured current Ids of the lower bridge corresponding to the lower bridge circuit 2 = the estimated current Iug of the upper bridge corresponding to the upper bridge circuit 1, that is, the second mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry is Uds / (Ry / / Rs2)=Uug / Rx.
[0083] In this embodiment, in the calculation process of the second mapping relationship between the first insulation resistance Rx and the second insulation resistance Ry, the bus voltage Usum of the DC bus and the upper bridge measured voltage Uus corresponding to the lower bridge circuit 2 are used to estimate the upper bridge estimated voltage Uug corresponding to the upper bridge circuit 1. The process does not need to introduce high-voltage sampling correction, and the calculation process is simple and convenient. Compared with the traditional scheme in which the voltages of the upper bridge circuit 1 and the lower bridge circuit 2 are equal by default, the bus voltage Usum and the lower bridge measured voltage Uds are used to determine the upper bridge estimated voltage Uug to achieve mutual correction, which helps to ensure the accuracy of the detection of the two insulation resistances.
[0084] In one embodiment, step S431, i.e., determining the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2 according to the third sampling data, includes: S4311: Determine a third current I3 corresponding to the lower bridge circuit 2 according to the third sampling data; S4312: Determine the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2 according to the third current I3 corresponding to the lower bridge circuit 2 and the sum of the resistance values of all resistors in the lower bridge circuit 2.
[0085] As an example, in step S4311, the controller 4 can obtain the third sampling data output by the second sampling circuit 22, and determine the third current I3 corresponding to the lower bridge circuit 2 according to the third sampling data. When the second sampling circuit 22 is a current sampling circuit, the third current I3 is the current directly collected by the current sampling circuit.
[0086] As another example, the second sampling circuit 22 includes three second sampling resistors R221 / R222 / R223 arranged in series, and a second sampling point is formed between two adjacent second sampling resistors R221 / R222 / R223, that is, the second sampling circuit 22 includes two second sampling points ADC3 and ADC4. Correspondingly, the third sampling data includes the third sampling voltage corresponding to the two second sampling points ADC3 and ADC4; the third current I3 is determined based on the third sampling voltage corresponding to the two second sampling points ADC3 and ADC4 and the resistance value of the second sampling resistor R222 between the two second sampling points ADC3 and ADC4, specifically, the third voltage difference can be determined based on the third sampling voltage corresponding to the two second sampling points ADC3 and ADC4; and then the quotient of the third voltage difference and the resistance value of the second sampling resistor R222 between the two second sampling points ADC3 and ADC4 is determined as the third current I3, that is, I3=(ADC1-ADC2) / R222.
[0087] As an example, in step S4312, the controller 4 can determine the lower bridge measured voltage Uds corresponding to the lower bridge circuit 2 according to the third current I3 corresponding to the lower bridge circuit 2 and the sum of the resistance values Rs2 of all resistors in the lower bridge circuit 2, that is, Uds=I3*Rs2. In this example, when the lower bridge circuit 2 includes the second switch circuit 21 and the second sampling circuit 22, Rs2=Rs22; when the lower bridge circuit 2 includes the second switch circuit 21, the second sampling circuit 22 and the second current limiting circuit 23, Rs2=Rs22+Rs23, Rs22=R221+R222+R223, and Rs23=R231+R232+R233+R234.
[0088] In one embodiment, a charging pile is provided, including the insulation resistance detection system in the above embodiment, which will not be described again here to avoid repetition.
[0089] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.
Claims
1. An insulation resistance detection circuit, characterized in that: It includes an upper bridge circuit, a lower bridge circuit and a third switch circuit; The upper bridge circuit and the lower bridge circuit are arranged in series between the positive electrode and the negative electrode of the DC bus, the upper bridge circuit is used to connect the positive electrode of the DC bus, and the lower bridge circuit is used to connect the negative electrode of the DC bus; The upper bridge circuit includes a first switch circuit and a first sampling circuit arranged in series; The lower bridge circuit includes a second switch circuit and a second sampling circuit arranged in series; A first end of the third switch circuit is connected to a connection node between the upper bridge circuit and the lower bridge circuit, and a second end of the third switch circuit is used to connect to a protection ground; The first switch circuit, the second switch circuit and the third switch circuit are all used to connect to a controller, and according to a control signal output by the controller, any two switch circuits are controlled to be turned on in sequence, and the other switch circuit is turned off, so that the first sampling circuit and / or the second sampling circuit collects sampling data; The first sampling circuit and the second sampling circuit are further used to connect to the controller and output the sampling data to the controller, so that the controller determines the first insulation resistance and the second insulation resistance according to the sampling data; The first insulation resistance is the insulation resistance between the positive pole of the DC bus and the protective ground; the second insulation resistance is the insulation resistance between the negative pole of the DC bus and the protective ground.
2. The insulation resistance detection circuit according to claim 1, characterized in that: A first end of the first switch circuit is connected to the positive electrode of the DC bus, and a second end of the first switch circuit is connected to the first end of the first sampling circuit; A first end of the second switch circuit is connected to the negative electrode of the DC bus, and a second end of the second switch circuit is connected to a first end of the second sampling circuit; The second end of the first sampling circuit is connected to the second end of the second sampling circuit; A first end of the third switch circuit is connected to a connection node between the first sampling circuit and the second sampling circuit.
3. The insulation resistance detection circuit according to claim 2, characterized in that: The upper bridge circuit further includes a first current limiting circuit, which is arranged between the positive electrode of the DC bus and the first switch circuit; The lower bridge circuit further includes a second current limiting circuit, and the second current limiting circuit is arranged between the negative electrode of the DC bus and the second switch circuit.
4. The insulation resistance detection circuit according to claim 1, characterized in that: The first sampling circuit includes three first sampling resistors arranged in series, a first sampling point is formed between two adjacent first sampling resistors, and the two first sampling points are connected to the controller; The second sampling circuit includes three second sampling resistors connected in series, a second sampling point is formed between two adjacent second sampling resistors, and the two second sampling points are connected to the controller.
5. The insulation resistance detection circuit according to claim 1, characterized in that: The first switch circuit includes a first switch, the second switch circuit includes a second switch, and the first switch and the second switch are relays or optocoupler switches; The third switch circuit includes a third switch, and the third switch is a relay, an optical coupler switch or a reed switch.
6. The insulation resistance detection circuit according to claim 1, characterized in that: The upper bridge circuit further includes a first anti-interference circuit, which is connected in parallel with a circuit formed by the first switch circuit and the first sampling circuit; The lower bridge circuit further includes a second anti-interference circuit, which is connected in parallel with a circuit formed by the second switch circuit and the second sampling circuit.
7. The insulation resistance detection circuit according to claim 6, characterized in that: The first anti-interference circuit includes a first RC circuit and a first diode arranged in parallel, and the first RC circuit includes a first resistor and a first capacitor arranged in series; The second anti-interference circuit includes a second RC circuit and a second diode connected in parallel, and the second RC circuit includes a second resistor and a second capacitor connected in series.
8. An insulation resistance detection system, characterized in that: Including the insulation resistance detection circuit and controller according to any one of claims 1 to 7; The controller is connected to the first switch circuit, the second switch circuit and the third switch circuit, and is used to output a control signal to sequentially control any two switch circuits to be turned on and the other switch circuit to be turned off, so that the first sampling circuit and / or the second sampling circuit collect sampling data; The controller is also connected to the first sampling circuit and the second sampling circuit, and is used to determine the first insulation resistance and the second insulation resistance according to the sampling data.
9. The insulation resistance detection system according to claim 8, characterized in that: The controller is used to perform the following operations: Controlling the first switch circuit and the second switch circuit to be turned on and the third switch circuit to be turned off, and obtaining first sampling data output by the first sampling circuit or the second sampling circuit; Controlling the first switch circuit and the third switch circuit to be turned on and the second switch circuit to be turned off, and acquiring second sampling data output by the first sampling circuit; Controlling the second switch circuit and the third switch circuit to be turned on, and the first switch circuit to be turned off, to obtain third sampling data output by the second sampling circuit; A first insulation resistance and a second insulation resistance are determined according to the first sampling data, the second sampling data, and the third sampling data.
10. The insulation resistance detection system according to claim 9, characterized in that: The determining of the first insulation resistance and the second insulation resistance according to the first sampling data, the second sampling data and the third sampling data comprises: Determining a bus voltage corresponding to the DC bus according to the first sampling data; Determine a first mapping relationship between the first insulation resistance and the second insulation resistance according to the second sampling data and the bus voltage; Determine a second mapping relationship between the first insulation resistance and the second insulation resistance according to the third sampling data and the bus voltage; The first insulation resistance and the second insulation resistance are determined according to the first mapping relationship and the second mapping relationship.
11. The insulation resistance detection system according to claim 10, characterized in that: The step of determining the bus voltage corresponding to the DC bus according to the first sampling data includes: Determining a first current corresponding to the DC bus according to the first sampling data; A bus voltage corresponding to the DC bus is determined according to a first current corresponding to the DC bus.
12. The insulation resistance detection system according to claim 11, characterized in that: The determining, according to the second sampling data and the bus voltage, a first mapping relationship between the first insulation resistance and the second insulation resistance comprises: Determine an upper bridge measured voltage corresponding to the upper bridge circuit according to the second sampling data, and determine an upper bridge measured current corresponding to the upper bridge circuit based on the upper bridge measured voltage; Determine the estimated lower bridge voltage corresponding to the lower bridge circuit according to the upper bridge measured voltage and the bus voltage, and determine the estimated lower bridge current corresponding to the lower bridge circuit based on the estimated lower bridge voltage; Determine a first mapping relationship between the first insulation resistance and the second insulation resistance based on an upper bridge measured current corresponding to the upper bridge circuit and a lower bridge estimated current corresponding to the lower bridge circuit; The determining, according to the third sampling data and the bus voltage, a second mapping relationship between the first insulation resistance and the second insulation resistance comprises: Determine the lower bridge measured voltage corresponding to the lower bridge circuit according to the third sampling data, and determine the lower bridge measured current corresponding to the lower bridge circuit based on the lower bridge measured voltage; Determine an upper bridge estimated voltage corresponding to the upper bridge circuit according to the lower bridge measured voltage and the bus voltage, and determine an upper bridge estimated current corresponding to the upper bridge circuit based on the upper bridge estimated voltage; Based on the lower bridge measured current corresponding to the lower bridge circuit and the upper bridge estimated current corresponding to the upper bridge circuit, a second mapping relationship between the first insulation resistance and the second insulation resistance is determined.
13. The insulation resistance detection system according to claim 12, characterized in that: The step of determining the upper bridge measured voltage corresponding to the upper bridge circuit according to the second sampling data includes: Determine a second current corresponding to the upper bridge circuit according to the second sampling data; Determine the upper bridge measured voltage corresponding to the upper bridge circuit according to the second current corresponding to the upper bridge circuit and the sum of the resistance values of all resistors in the upper bridge circuit; Determining the lower bridge measured voltage corresponding to the lower bridge circuit according to the third sampling data includes: Determining a third current corresponding to the lower bridge circuit according to the third sampling data; The lower bridge measured voltage corresponding to the lower bridge circuit is determined according to the third current corresponding to the lower bridge circuit and the sum of the resistance values of all resistors in the lower bridge circuit.
14. The insulation resistance detection system according to claim 13, characterized in that: The first sampling circuit includes three first sampling resistors arranged in series, and a first sampling point is formed between two adjacent first sampling resistors; The second sampling circuit includes three second sampling resistors arranged in series, and a second sampling point is formed between two adjacent second sampling resistors; The first sampling data includes first sampling voltages corresponding to two first sampling points or first sampling voltages corresponding to two second sampling points; the first current is determined based on the first sampling voltages corresponding to the two first sampling points and the resistance value of a first sampling resistor between the two first sampling points; or the first current is determined based on the first sampling voltages corresponding to the two second sampling points and the resistance value of a second sampling resistor between the two second sampling points; The second sampling data includes second sampling voltages corresponding to two first sampling points; the second current is determined based on the second sampling voltages corresponding to the two first sampling points and the resistance value of the first sampling resistor between the two first sampling points; The third sampling data includes third sampling voltages corresponding to two second sampling points; and the third current is determined based on the third sampling voltages corresponding to the two second sampling points and the resistance value of the second sampling resistor between the two second sampling points.
15. A charging pile, characterized in that: The invention comprises the insulation resistance detection system as described in any one of claims 8 to 14.
Citation Information
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