Layout method for functional area of wafer factory, storage medium and terminal

Abstract

The invention discloses a wafer factory function area layout method, a storage medium and a terminal. The wafer factory function area layout method comprises the steps of obtaining a production process in a wafer processing process and each production step in the production process; according to each production step in the production process, obtaining association degrees among different functional areas; and performing layout on each functional area according to the association degree between different functional areas. And layout design is carried out on each functional region by obtaining the feasibility and the correlation degree with a theoretical basis, so that the layout of each functional region is more reasonable.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a layout method, storage medium and terminal for functional areas of a wafer factory. Background Art

[0002] Semiconductor manufacturing is expensive, due to high equipment investment on the one hand and long production cycles on the other. If equipment is not utilized to its full potential or the production cycle is extended, semiconductor manufacturing costs will increase significantly and even become uncontrollable.

[0003] In semiconductor manufacturing, on the one hand, the process is divided into various functional areas according to process differences, so that equipment with similar processes can be placed together for centralized management of equipment and centralized control of personnel. On the other hand, the power supply of the wafer fab is diverse and complex. In order to maximize the power supply efficiency, equipment with similar power requirements is placed together. Based on the above two aspects, the layout of the wafer fab adopts a regional model, and equipment with similar processes and similar power requirements are centrally planned.

[0004] In semiconductor manufacturing, a certain production process is designed according to customer and market demands, and wafers are processed sequentially on equipment with different functions according to the production process. In the context of different technology bands (span of 0.35um to 5nm), the production processes vary greatly, and the proportion of equipment with various functions varies greatly.

[0005] However, there are still many problems in the layout of various functional areas in the prior art. Summary of the invention

[0006] The technical problem solved by the present invention is to provide a layout method, storage medium and terminal for the functional areas of a wafer factory, so as to make the layout of the functional areas more reasonable through theoretical basis.

[0007] To solve the above problems, the present invention provides a layout method for functional areas of a wafer factory, comprising: obtaining a production process in a wafer processing process, and each production step in the production process; obtaining the correlation between different functional areas according to each production step in the production process; and laying out each functional area according to the correlation between different functional areas.

[0008] Optionally, according to each of the production steps in the production process, the method for obtaining the correlation between different functional areas includes: obtaining the functional areas when implementing each of the production steps; obtaining the self-correlation coefficients of the functional areas of each of the production steps; according to each of the self-correlation coefficients, obtaining the inter-area correlation coefficient between the functional area of ​​the current production step and the functional areas of each different production step that needs to be performed subsequently; and statistically superimposing the inter-area correlation coefficients between different functional areas to obtain the correlation between different functional areas.

[0009] Optionally, the method for obtaining the self-correlation coefficient of the functional area of ​​each of the production steps includes: obtaining the number m of the wafers processed in each of the production steps; and taking the ratio of the number m of the wafers processed in each of the production steps to the total number n of the wafers as the self-correlation coefficient of the functional area of ​​each of the production steps.

[0010] Optionally, a method for obtaining the inter-region correlation coefficient between the functional area of ​​the current production step and the functional areas of each different production step to be performed subsequently based on each self-correlation coefficient includes: when two production steps are continuous, the inter-region correlation coefficient is the product of the self-correlation coefficients of the functional areas of the two production steps; when two production steps are discontinuous, the inter-region correlation coefficient is the product of the self-correlation coefficients of the functional areas of the two production steps and the difference between the self-correlation coefficients of the functional areas of each production step between the two production steps and 1.

[0011] Optionally, the method for laying out each of the functional areas according to the correlation between different functional areas includes: selecting several reference correlation degrees from several correlation degrees, each of the reference correlation degrees being greater than each of the unselected correlation degrees; and preferentially arranging the two functional areas corresponding to the larger reference correlation degrees close to each other.

[0012] Optionally, when there are multiple schemes for laying out each of the functional areas according to the correlation between the different functional areas, it also includes: obtaining actual transmission distances between different functional areas under various layout schemes; comparing various layout schemes based on the actual transmission distances, and selecting the optimal layout scheme.

[0013] Optionally, the method for obtaining the actual transmission distances between different functional areas under various layout schemes includes: establishing a coordinate system based on the wafer fab, and obtaining the coordinates of the center points of each functional area; obtaining the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas; and taking the product of the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas and the inter-area correlation coefficient between different functional areas as the actual transmission distance between different functional areas.

[0014] Optionally, a method for selecting the optimal layout scheme based on comparing various layout schemes with the actual transmission distance includes: selecting several reference actual transmission distances from several actual transmission distances under each layout scheme, each of the reference actual transmission distances being greater than each actual transmission distance that is not selected; superimposing several reference actual transmission distances under each layout scheme, and taking the layout scheme with the smallest superposition result as the optimal layout scheme.

[0015] Optionally, when laying out each of the functional areas, it also includes: obtaining constraint requirements for the layout of each of the functional areas, and the priority of the constraint requirements for the layout of each of the functional areas is greater than the priority of the layout of each of the functional areas according to the association between different functional areas.

[0016] Optionally, the constraint requirements include: one or more of the micro-seismic, load and explosion-proof requirements of the equipment, the supply requirements of the equipment, the supply system design requirements and the special requirements for the connection between the main unit and the auxiliary equipment.

[0017] Optionally, when there are multiple production processes in the wafer processing, different weights are assigned to each of the production processes.

[0018] Correspondingly, the technical solution of the present invention also provides a storage medium on which computer instructions are stored, characterized in that when the computer instructions are executed, the steps of the method described in any of the above technical solutions are executed.

[0019] Correspondingly, the technical solution of the present invention also provides a terminal, including a memory and a processor, wherein the memory stores computer instructions that can be run on the processor, and is characterized in that when the processor runs the computer instructions, the steps of the method described in any of the above technical solutions are executed.

[0020] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0021] In the layout method of wafer fab functional areas of the technical solution of the present invention, the correlation between different functional areas is obtained, and each functional area is laid out according to the correlation between the different functional areas. By obtaining the feasible and theoretically based correlation to design the layout of each functional area, the layout of each functional area is made more reasonable.

[0022] Furthermore, the method for laying out each functional area according to the correlation between different functional areas includes: selecting several reference correlation degrees from several correlation degrees, each reference correlation degree is greater than each unselected correlation degree; and preferentially arranging the two functional areas corresponding to the larger reference correlation degree close to each other, so that the actual transmission distance between different functional areas is effectively shortened, thereby improving production efficiency.

[0023] Furthermore, when there are multiple production processes in the wafer processing, different weights are assigned to each of the production processes so as to expand the production line with mixed technologies, so that the production line with mixed technologies is also suitable for layout optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a schematic flow chart of a method for arranging functional areas of a wafer fab in an embodiment of the present invention;

[0025] Figures 2 to 9 Schematic diagram of various steps of the method for layout of wafer fab functional areas in an embodiment of the present invention. DETAILED DESCRIPTION

[0026] As described in the background art, there are still many problems in the layout of various functional areas in the prior art, which will be described in detail below.

[0027] During the wafer manufacturing process, wafers need to be transferred between different areas according to the aforementioned production process, and the transfer of wafers in the wafer factory is achieved through an automated handling system (AMHS). How to reasonably plan the layout of the technical area in the entire factory, coordinate with the single-direction transmission working mode of the overhead crane track, shorten the transmission distance of wafers in the factory, and improve the transmission efficiency of the track is an important issue.

[0028] At present, in the early stage of building a new factory, the layout plan of each functional area is generally formulated by predicting the area of ​​the functional area with reference to the factory construction scale, and planning the location in the Fab in sequence. Each functional area is divided according to experience, and the same type of equipment in the functional area is planned centrally, without considering the application order and frequency of the equipment in the manufacturing process, and the equipment location is planned according to the on-site construction conditions.

[0029] However, with the upgrading of technology, the product types are becoming more complex, the equipment types are becoming more diverse, and the technical requirements of various types of equipment are also significantly different. These changes and developments have brought challenges to existing experience. As the semiconductor industry develops, the technology becomes more mature and advanced, and the product complexity increases, the current practice of referring to existing experience is often not applicable to new factories.

[0030] On this basis, the present invention provides a layout method, storage medium and terminal of wafer fab functional areas, obtains the correlation between different functional areas, and layouts each functional area according to the correlation between different functional areas. By obtaining the feasible and theoretically based correlation, the layout design of each functional area is performed, so that the layout of each functional area is more reasonable.

[0031] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0032] Figure 1 1 is a flow chart of a method for arranging functional areas of a wafer fab according to an embodiment of the present invention, comprising:

[0033] Step S101, obtaining a production process in a wafer processing process and each production step in the production process;

[0034] Step S102, obtaining the correlation between different functional areas according to each of the production steps in the production process;

[0035] Step S103: laying out each of the functional areas according to the correlation between different functional areas.

[0036] The following is a detailed description of each step of the layout method of the functional area of ​​a wafer factory with reference to the accompanying drawings.

[0037] Figures 2 to 9 Schematic diagram of various steps of the method for layout of wafer fab functional areas in an embodiment of the present invention.

[0038] Please refer to Figure 2 , obtain the production process in the wafer processing process and each production step in the production process.

[0039] In this embodiment, the layout of the functional areas of a product with a single technology belt is taken as an example, that is, one production process.

[0040] In other embodiments, in order to ensure the compatibility of the factory with market demand and maximize profits, production flexibility will be retained when designing the factory. A mixed production line with multiple technologies can also be used to better adapt to market changes, that is, multiple production processes.

[0041] In this embodiment, after obtaining the production process in the wafer processing process and each production step in the production process, it also includes: obtaining the correlation between different functional areas according to each production step in the production process. For the specific acquisition process, please refer to Figures 3 to 6 .

[0042] Please refer to Figure 3 , obtaining the functional areas when implementing each of the production steps.

[0043] In this embodiment, 11 functional areas (area1 to area11) are taken as an example.

[0044] In this embodiment, the shape of the wafer factory building is a regular rectangle, and each functional area is also divided into a regular rectangle.

[0045] Please refer to Figure 4 , obtain the self-correlation coefficient of the functional area of ​​each of the production steps.

[0046] In this embodiment, the method for obtaining the self-correlation coefficient of the functional area of ​​each of the production steps includes: obtaining the number m of the wafers processed in each of the production steps; and taking the ratio of the number m of the wafers processed in each of the production steps to the total number n of the wafers as the self-correlation coefficient of the functional area of ​​each of the production steps.

[0047] For example, in a specific embodiment, the total number of wafers is 1000, and only 500 wafers are sampled during the production step of a certain test. Therefore, the self-correlation coefficient of the functional area of ​​the production step of the test is: 500 / 1000=50%.

[0048] Please refer to Figure 5 , according to each of the self-correlation coefficients, obtain the inter-region correlation coefficient between the functional area of ​​the current production step and the functional areas of each of the different production steps that need to be performed subsequently.

[0049] In this embodiment, the method for obtaining the inter-region correlation coefficient between the functional area of ​​the current production step and the functional areas of each different production step that needs to be performed subsequently according to each self-correlation coefficient includes: when two production steps are continuous, the inter-region correlation coefficient is the product of the self-correlation coefficients of the functional areas of the two production steps; when two production steps are discontinuous, the inter-region correlation coefficient is the product of the self-correlation coefficients of the functional areas of the two production steps and the difference between the self-correlation coefficients of the functional areas of each production step between the two production steps and 1.

[0050] For example, in a specific embodiment, the production step 01 and the production step 02 are continuous, and the production step 01 and the production step 02 are both implemented in the functional area area1, the self-correlation coefficient of the functional area area1 of the production step 01 is 100%, and the self-correlation coefficient of the functional area area2 of the production step 02 is 50%, so the corresponding inter-area correlation coefficient is: 100%*50%=50%.

[0051] For example, in a specific embodiment, the production step 01 and the production step 03 are not continuous, the production step 01 is implemented in the functional area area1, and the production step 03 is implemented in the functional area area4. The self-correlation coefficient of the functional area area1 of the production step 01 is 100%, and the self-correlation coefficient of the functional area area4 of the production step 03 is also 100%. There is the production step 02 between the production step 01 and the production step 03. Therefore, the inter-area correlation coefficient when the production step 01 skips the production step 02 and goes directly to the production step 03 is: 100%*(1-50*)*100%=50%.

[0052] In a specific embodiment, the production step 01 and the production step 04 are not continuous, and the production step 01 and the production step 04 are both implemented in the functional area area1, the self-correlation coefficient of the functional area area1 of the production step 01 is 100%, and the self-correlation coefficient of the functional area area1 of the production step 04 is also 50%, and there are the production steps 02 and 03 between the production step 01 and the production step 04, so the inter-area correlation coefficient of the production step 01 skipping the production steps 02 and 03 and directly going to the production step 04 is: 100%*(1-50*)*(1-100%)*50%=0.

[0053] The algorithm process of the inter-region correlation coefficient between the functional area of ​​the current production step and the functional areas of the different production steps to be performed subsequently is the same as the above-mentioned example and will not be repeated here.

[0054] Please refer to Figure 6 , statistically superimpose the inter-region correlation coefficients between different functional regions to obtain the correlation degrees between different functional regions.

[0055] In this embodiment, the inter-region correlation coefficients between all the different functional regions are traversed and superimposed one by one, thereby obtaining the correlation degrees between the different functional regions.

[0056] Please refer to Figures 7 to 9 , and continue to combine reference Figure 6 , laying out each of the functional areas according to the correlation between the different functional areas.

[0057] In this embodiment, the layout design of each functional area is performed by obtaining the feasible and theoretically based correlation degree, so that the layout of each functional area is more reasonable.

[0058] In this embodiment, the method for laying out each of the functional areas according to the correlation between different functional areas includes: selecting several reference correlations from several correlations, each of the reference correlations being greater than each of the unselected correlations; and arranging the two functional areas corresponding to the larger reference correlations in a close proximity with each other in priority, so that the actual transmission distance between the different functional areas is effectively shortened, thereby improving production efficiency.

[0059] Please continue to refer to Figure 6 It should be noted that, in this embodiment, the figure also shows the correlation within the same functional area. The correlation within these areas is often greater than the correlation between different functional areas. However, in data processing, the correlation within these areas will be discarded and not used as a reference.

[0060] When there are multiple layout schemes for each of the functional areas according to the correlation between the different functional areas, it also includes: obtaining actual transmission distances between different functional areas under various layout schemes; comparing various layout schemes based on the actual transmission distances, and selecting the optimal layout scheme.

[0061] Please continue to refer to Figure 7 and Figure 8In this embodiment, there are two schemes for laying out the functional areas according to the correlation between the different functional areas, namely, layout scheme 1 and layout scheme 2 in the figure.

[0062] Please continue to refer to Fig. 9 In this embodiment, the method for obtaining the actual transmission distances between different functional areas under various layout schemes includes: establishing a coordinate system based on the wafer factory, and obtaining the coordinates of the center points of each functional area; obtaining the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas; and taking the product of the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas and the inter-area correlation coefficient between different functional areas as the actual transmission distance between different functional areas.

[0063] In this embodiment, the method for obtaining the actual transmission distances between different functional areas under various layout schemes includes: establishing a coordinate system based on the wafer factory, and obtaining the coordinates of the center points of each functional area; obtaining the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas; and taking the product of the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas and the inter-area correlation coefficient between different functional areas as the actual transmission distance between different functional areas.

[0064] In this embodiment, the method for selecting the optimal layout scheme based on comparing various layout schemes with the actual transmission distance includes: selecting several reference actual transmission distances from several actual transmission distances under each layout scheme, each of the reference actual transmission distances being greater than each actual transmission distance that is not selected; superimposing several reference actual transmission distances under each layout scheme, and taking the layout scheme with the smallest superposition result as the optimal layout scheme.

[0065] In this embodiment, the superposition distance obtained by superimposing several reference actual transmission distances based on layout scheme 1 is N1, and the superposition distance obtained by superimposing several reference actual transmission distances based on layout scheme 2 is N2. If the superposition distance N1 is less than N2, layout scheme 1 is selected as the final layout scheme; if the superposition distance N1 is greater than N2, layout scheme 2 is selected as the final layout scheme.

[0066] In this embodiment, when the functional areas are laid out, the method further includes: obtaining constraint requirements for the layout of the functional areas, and the priority of the constraint requirements for the layout of the functional areas is greater than the priority of the layout of the functional areas according to the association between the different functional areas. By limiting the constraint requirements, the layout of the functional areas can meet the requirements of safe production and the like.

[0067] In this embodiment, the constraint requirements include: one or more of the microseismic, load and explosion-proof requirements of the equipment, the supply requirements of the equipment, the supply system design requirements and the special requirements for the connection between the main station and the auxiliary equipment.

[0068] In other embodiments, when there are multiple production processes in the wafer processing process, different weights are assigned to each of the production processes (the weight of each of the production processes can be flexibly defined based on actual planning) so as to expand the production line with mixed multiple technology belts, so that the production line with mixed multiple technology belts is also suitable for layout optimization.

[0069] It should be noted that, in other embodiments, when there are multiple production processes in the wafer processing process, the specific calculation process is the same as the calculation process in the above embodiment, except that it is only necessary to multiply the weight of the corresponding production process in each step of the calculation. For the specific process, please refer to Figures 2 to 9 , and related instructions have been described, which will not be repeated here.

[0070] Correspondingly, an embodiment of the present invention further provides a storage medium on which computer instructions are stored, characterized in that when the computer instructions are executed, the steps of the method described in any of the above embodiments are executed.

[0071] Correspondingly, an embodiment of the present invention further provides a terminal, including a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, and when the processor executes the computer instructions, the steps of the method described in any one of the above embodiments are executed.

[0072] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for layout of functional areas of a wafer fab, characterized in that: include: Obtaining a production process in a wafer processing process and each production step in the production process; The correlation between different functional areas is obtained according to each of the production steps in the production process; and each of the functional areas is laid out according to the correlation between the different functional areas.

2. The method for layout of wafer fab functional areas according to claim 1, characterized in that: According to each of the production steps in the production process, the method for obtaining the correlation between different functional areas includes: obtaining the functional areas when implementing each of the production steps; obtaining the self-correlation coefficients of the functional areas of each of the production steps; according to each of the self-correlation coefficients, obtaining the inter-area correlation coefficients between the functional areas of the current production step and the functional areas of each different production step that needs to be performed subsequently; and statistically superimposing the inter-area correlation coefficients between different functional areas to obtain the correlation between different functional areas.

3. The method for layout of wafer fab functional areas according to claim 2, characterized in that: The method for obtaining the self-correlation coefficient of the functional area of ​​each of the production steps includes: obtaining the number m of the wafers processed in each of the production steps; and taking the ratio of the number m of the wafers processed in each of the production steps to the total number n of the wafers as the self-correlation coefficient of the functional area of ​​each of the production steps.

4. The method for layout of wafer fab functional areas according to claim 2, wherein: The method of obtaining the inter-region correlation coefficient between the functional area of ​​the current production step and the functional areas of each different production step to be performed subsequently according to each self-correlation coefficient includes: when two production steps are continuous, the inter-region correlation coefficient is the product of the self-correlation coefficients of the functional areas of the two production steps; when two production steps are discontinuous, the inter-region correlation coefficient is the product of the self-correlation coefficients of the functional areas of the two production steps and the difference between the self-correlation coefficients of the functional areas of each production step between the two production steps and 1.

5. The method for layout of wafer fab functional areas according to claim 2, wherein: The method for laying out each functional area according to the correlation between different functional areas includes: selecting several reference correlations from several correlations, each reference correlation is greater than each unselected correlation; and arranging the two functional areas corresponding to the larger reference correlations in a close proximity with each other.

6. The method for layout of wafer fab functional areas according to claim 5, characterized in that: When there are multiple layout schemes for each of the functional areas according to the correlation between the different functional areas, it also includes: obtaining actual transmission distances between different functional areas under various layout schemes; comparing various layout schemes based on the actual transmission distances, and selecting the optimal layout scheme.

7. The method for layout of wafer fab functional areas according to claim 6, characterized in that: The method for obtaining the actual transmission distances between different functional areas under various layout schemes includes: establishing a coordinate system based on the wafer factory, and obtaining the coordinates of the center points of each functional area; obtaining the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas; and taking the product of the sum of the absolute values ​​of the differences in the horizontal coordinates and the absolute values ​​of the differences in the vertical coordinates between different functional areas and the inter-area correlation coefficient between different functional areas as the actual transmission distance between different functional areas.

8. The method for layout of wafer fab functional areas according to claim 7, characterized in that: Based on the actual transmission distance, various layout schemes are compared to select the optimal layout scheme, including: selecting several reference actual transmission distances from several actual transmission distances under each layout scheme, each of the reference actual transmission distances being greater than each actual transmission distance that is not selected; superimposing several reference actual transmission distances under each layout scheme, and taking the layout scheme with the smallest superposition result as the optimal layout scheme.

9. The method for layout of wafer fab functional areas according to claim 1, wherein: When laying out each of the functional areas, it also includes: obtaining constraint requirements for the layout of each of the functional areas, and the priority of the constraint requirements for the layout of each of the functional areas is greater than the priority of the layout of each of the functional areas according to the association between different functional areas.

10. The method for layout of wafer fab functional areas according to claim 9, characterized in that: The constraint requirements include: one or more of the micro-seismic, load and explosion-proof requirements of the equipment, the supply requirements of the equipment, the supply system design requirements and the special requirements for the connection between the main unit and the auxiliary equipment.

11. The method for layout of wafer fab functional areas according to claim 1, wherein: When there are multiple production processes in the wafer processing process, different weights are assigned to each of the production processes.

12. A storage medium having computer instructions stored thereon, characterized in that: When the computer instructions are executed, the steps of the method according to any one of claims 1 to 11 are executed.

13. A terminal comprising a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, characterized in that: When the processor runs the computer instructions, the steps of the method according to any one of claims 1 to 11 are performed.

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