Pixel unit, control method, image sensor, electronic equipment and vehicle

Abstract

The invention discloses a pixel unit, a control method, an image sensor, electronic equipment and a vehicle. The pixel unit comprises a first floating diffusion node, a second floating diffusion node, a storage capacitor, a first gain control transistor and a second gain control transistor. The first end of the storage capacitor is grounded; a first end of the first gain control transistor is connected with the first floating diffusion node, a second end of the first gain control transistor is connected with the second floating diffusion node, and the first gain control transistor is used for controlling charge of the first floating diffusion node to be transmitted to the second floating diffusion node; the first end of the second gain control transistor is connected with the second floating diffusion node, and the second end of the second gain control transistor is connected with the second end of the storage capacitor. According to the pixel unit, an overflow charge storage area can be increased, the potential well capacity of pixels is expanded, the upper limit of the dynamic range of an image sensor is improved, the conversion gain is large, and the sensitivity is high.

Description

Technical Field

[0001] The present invention relates to the field of vehicle technology, and in particular to a pixel unit, a pixel unit control method, an image sensor, an electronic device and a vehicle. Background Art

[0002] In some solutions of the related art, the pixel unit structure uses two separate photodiodes. However, the photodiodes in this form have low sensitivity to incident light, low signal-to-noise ratio, and complex manufacturing process that is difficult to manufacture and control. Alternatively, in some solutions, the pixel unit structure uses a transistor with a gate voltage of DCG (Dual Conversion Gain) signal to couple the floating diffusion region FD with the overflow capacitor C. To a certain extent, the charge potential well capacity of the pixel is expanded. However, the dynamic range of the image sensor with this pixel unit structure is still limited and needs to be improved. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the first object of the present invention is to propose a pixel unit, which can increase the overflow charge storage area, expand the potential well capacity of the pixel, increase the upper limit of the dynamic range of the image sensor, and have a large conversion gain and high sensitivity.

[0004] A second objective of the present invention is to provide a pixel unit control method.

[0005] A third objective of the present invention is to provide an image sensor.

[0006] A fourth objective of the present invention is to provide an electronic device.

[0007] A fifth object of the present invention is to provide a vehicle.

[0008] In order to solve the above problems, an embodiment of the first aspect of the present invention provides a pixel unit, including: a first floating diffusion node, a second floating diffusion node and a storage capacitor, the first end of the storage capacitor is grounded; a first gain control transistor, the first end of the first gain control transistor is connected to the first floating diffusion node, the second end of the first gain control transistor is connected to the second floating diffusion node, the first gain control transistor is used to control the charge transfer of the first floating diffusion node to the second floating diffusion node; a second gain control transistor, the first end of the second gain control transistor is connected to the second floating diffusion node, the second end of the second gain control transistor is connected to the second end of the storage capacitor, and the second gain control transistor is used to control the coupling state of the capacitor and the second floating diffusion node.

[0009] According to the pixel unit of the embodiment of the present invention, a second gain control transistor is added between the first gain control transistor and the storage capacitor, an overflow charge storage area is added, the potential well capacity of the pixel is expanded, the charge storage function is separated from the photosensitive unit, the inherent limitation is broken, the pixel dynamic range and the photosensitive unit are decoupled, and the upper limit of the dynamic range of the image sensor is increased. In addition, the expanded second floating diffusion node and the first floating diffusion node exist independently in the circuit, and the junction capacitance of the floating diffusion node is equal to the sum of the parasitic capacitances of the coupling transistors connected to the node, thereby improving the conversion gain and the sensitivity.

[0010] In some embodiments, the pixel unit includes: at least one photoelectric converter, the first end of the at least one photoelectric converter is grounded; a transfer transistor corresponding to the at least one photoelectric converter, the first end of the transfer transistor is connected to the second end of the corresponding photoelectric converter, the second end of the transfer transistor is connected to the first floating diffusion node, and the transfer transistor is used to control the transfer of charge generated by the corresponding photoelectric converter.

[0011] In some embodiments, the pixel unit also includes: a voltage source coupling control transistor, a first end of the voltage source coupling control transistor is connected to the second end of the at least one photoelectric converter, a second end of the voltage source coupling control transistor is connected to a preset voltage source, and the voltage source coupling control transistor is used to control the coupling state of the at least one photoelectric converter and the preset voltage source.

[0012] In some embodiments, the pixel unit also includes: a reset transistor, a first end of the reset transistor is connected to the second floating diffusion node, a second end of the reset transistor is connected to a preset voltage source, and the reset transistor is used to control the coupling state of the second floating diffusion node and the preset voltage source.

[0013] In some embodiments, the pixel unit also includes: a source follower transistor, the control end of the source follower transistor is connected to the first floating diffusion node, the first end of the source follower transistor is connected to a preset voltage source, and the source follower transistor is used to amplify the pixel signal; a row selection transistor, the first end of the row selection transistor is connected to the second end of the source follower transistor, and the second end of the row selection transistor is used to output the pixel signal.

[0014] In some embodiments, the photoelectric converter is a clamped photodiode.

[0015] A second aspect of the present invention provides a pixel unit control method for the pixel unit described in the above embodiment, the pixel unit control method comprising: obtaining a readout signal of the pixel unit in a plurality of different conversion gain modes within each working cycle of the pixel unit, the plurality of different conversion gain modes comprising a first conversion gain mode, a second conversion gain mode and a third conversion gain mode, wherein the conversion gain of the first conversion gain mode > the conversion gain of the second conversion gain mode > the conversion gain of the third conversion gain mode; and obtaining a first frame image within the current working cycle according to the readout signal of the pixel unit in each conversion gain mode.

[0016] According to the pixel unit control method of an embodiment of the present invention, in the sampling order of the readout stage, the gain mode of the circuit is divided into three different gain modes, the image signals of the three stages are sampled or reset at different times, different floating diffusion nodes are sampled in different gain modes, and the stored charge amounts of different floating diffusion nodes are collected to obtain a frame of image, which can improve the conversion gain and improve the sensitivity.

[0017] In some embodiments, the readout signal includes a reset signal and a sampling signal in the first conversion gain mode, a reset signal and a sampling signal in the second conversion gain mode, and a reset signal and a sampling signal in the third conversion gain mode.

[0018] In some embodiments, obtaining the readout signal of the pixel unit under a plurality of different conversion gain modes includes: sequentially obtaining a reset signal under the second conversion gain mode, a reset signal under the first conversion gain mode, a sampling signal under the first conversion gain mode, a sampling signal under the second conversion gain mode, a sampling signal under the third conversion gain mode, and a reset signal under the third conversion gain mode.

[0019] In some embodiments, a first frame of image in a current working cycle is obtained according to a readout signal of the pixel unit in each conversion gain mode, including: subtracting a sampling signal in the first conversion gain mode from a reset signal in the first conversion gain mode to obtain a first correlated double sampled image signal; subtracting a sampling signal in the second conversion gain mode from a reset signal in the second conversion gain mode to obtain a second correlated double sampled image signal; comparing the reset signal in the third conversion gain mode with the sampling signal in the third conversion gain mode to obtain a first non-correlated double sampled image signal; and obtaining the first frame of image according to the first correlated double sampled image signal, the second correlated double sampled image signal, and the first non-correlated double sampled image signal.

[0020] In some embodiments, obtaining a reset signal in the second conversion gain mode includes: controlling the transfer transistor, reset transistor, second gain control transistor and voltage source coupling control transistor of the pixel unit to be in an off state, and controlling the first gain control transistor, source follower transistor and row selection transistor of the pixel unit to be in an on state, so that the pixel unit is in the second conversion gain mode, and the readout signal of the pixel unit is the reset signal in the second conversion gain mode.

[0021] In some embodiments, obtaining a reset signal in the first conversion gain mode includes: controlling the first gain control transistor to switch to an off state so that the pixel unit switches to the first conversion gain mode, and a readout signal of the pixel unit is a reset signal in the first conversion gain mode.

[0022] In some embodiments, obtaining a sampling signal under the first conversion gain mode includes: controlling the transfer transistor to be turned on and then turned off after a preset transmission time, so that the photoelectric converter of the pixel unit generates charge and transfers it to the first floating diffusion node of the pixel unit, and the readout signal of the pixel unit is the sampling signal under the first conversion gain mode.

[0023] In some embodiments, obtaining a sampling signal in the second conversion gain mode includes: controlling the first gain control transistor to switch to an on state so that the pixel unit switches to the second conversion gain mode; controlling the transfer transistor to turn on and then turn off after the preset transfer time so that the photoelectric converter generates charges and the electrons of the first floating diffusion node are transmitted to the second floating diffusion node of the pixel unit, and the readout signal of the pixel unit is the sampling signal in the second conversion gain mode.

[0024] In some embodiments, obtaining a sampling signal in the third conversion gain mode includes: controlling the second gain control transistor to switch to an on state so that the pixel unit switches to the third conversion gain mode; controlling the transfer transistor to switch on and then disconnect after the preset transfer time so that the photoelectric converter generates charges, and the electrons of the first floating diffusion node and the electrons of the second floating diffusion node are transmitted to the storage capacitor of the pixel unit, and the readout signal of the pixel unit is the sampling signal in the third conversion gain mode.

[0025] In some embodiments, obtaining a reset signal in the third conversion gain mode includes: controlling a reset transistor of the pixel unit to be turned on and then turned off after a preset reset time to clear electrons in the first floating diffusion node, the second floating diffusion node, and the storage capacitor, and the output signal of the pixel unit is the reset signal in the third conversion gain mode.

[0026] In some embodiments, the pixel unit control method further includes: in each of the working cycles, before obtaining the readout signal of the pixel unit in multiple different conversion gain modes, controlling the pixel unit to perform a first exposure; after obtaining the readout signal of the pixel unit in multiple different conversion gain modes, controlling the pixel unit to perform a second exposure, and the exposure time of the second exposure is different from the exposure time of the first exposure.

[0027] In some embodiments, the exposure time of the second exposure is shorter than the exposure time of the first exposure.

[0028] In some embodiments, the pixel unit control method further includes: after controlling the pixel unit to perform a second exposure, obtaining a readout signal of the pixel unit in a current conversion gain mode; and obtaining a second frame image in the current working cycle based on the readout signal of the pixel unit in the current conversion gain mode.

[0029] In some embodiments, obtaining a readout signal of the pixel unit in the current conversion gain mode includes: when the pixel unit is in the third conversion gain mode, controlling a reset transistor of the pixel unit to be turned on and then disconnected after a preset reset time, so as to obtain a reset signal of the pixel unit in the third conversion gain mode; and controlling a transmission transistor of the pixel unit to be turned on and then disconnected after a preset transmission time, so as to obtain a sampling signal of the pixel unit in the third conversion gain mode.

[0030] In some embodiments, obtaining a second frame image in the current working cycle based on a readout signal of the pixel unit in the current conversion gain mode includes: comparing a reset signal of the pixel unit in the third conversion gain mode with a collection signal of the pixel unit in the third conversion gain mode to obtain a third correlated double sampled image signal of the pixel unit as the second frame image.

[0031] In some embodiments, the pixel unit control method further includes: synthesizing the first frame image and the second frame image to obtain a captured image of the pixel unit.

[0032] In some embodiments, the pixel unit control method further includes: within each of the working cycles, before the first exposure, controlling the row selection transistor of the pixel unit to be in an off state, and controlling the transfer transistor, reset transistor, first gain control transistor, second gain control transistor and voltage source coupling control transistor of the pixel unit to be turned on for corresponding preset reset times respectively, so that the pixel unit is reset.

[0033] A third aspect of the present invention provides an image sensor, comprising a plurality of pixel units as described in the above embodiment arranged in an array; a column readout and control unit, wherein the column readout and control unit is connected to the output end of the pixel unit in each column in the array via a column bus; a row control unit, wherein the row control unit is connected to a plurality of the pixel units and is used to control the corresponding transistors of the pixel units in the array according to the pixel unit control method described in the above embodiment; and a control unit, wherein the control unit is connected to the column readout and control unit and the row control unit, respectively.

[0034] According to the image sensor of the embodiment of the present invention, by adopting the pixel unit structure and control method of the above embodiment, the upper limit of the dynamic range of the image sensor can be increased, the conversion gain can be increased, and the sensitivity can be increased.

[0035] A fourth aspect of the present invention provides an electronic device, comprising at least one image sensor as described in the above embodiment.

[0036] The electronic device according to the embodiment of the present invention adopts the image sensor of the above embodiment, thereby raising the upper limit of the dynamic range of the image sensor and improving the conversion gain and sensitivity.

[0037] A fifth aspect of the present invention provides a vehicle, comprising at least one image sensor as described in the above embodiment.

[0038] According to the vehicle of the embodiment of the present invention, the image sensor of the above embodiment is used, which can increase the upper limit of the dynamic range of the image sensor, and improve the conversion gain and sensitivity.

[0039] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0041] Figure 1 is a schematic diagram of a pixel unit according to an embodiment of the present invention;

[0042] Figure 2 is a flowchart of a pixel unit control method according to an embodiment of the present invention;

[0043] Figure 3 is a reset readout timing diagram of a pixel unit structure according to an embodiment of the present invention;

[0044] Figure 4 is a charge barrier diagram in a reset phase according to an embodiment of the present invention;

[0045] Figure 5 is a charge barrier diagram for a high conversion gain mode according to an embodiment of the present invention;

[0046] Figure 6 is a charge barrier diagram for a mid-conversion gain mode according to an embodiment of the present invention;

[0047] Figure 7 is a charge barrier diagram for a low conversion gain mode according to an embodiment of the present invention;

[0048] Figure 8 is a schematic diagram of an image sensor according to an embodiment of the present invention;

[0049] Fig. 9 is a structural block diagram of an electronic device according to an embodiment of the present invention;

[0050] Fig.10 is a structural block diagram of a vehicle according to an embodiment of the present invention.

[0051] Reference numerals:

[0052] Vehicle 400; electronic device 300;

[0053] Image sensor 200;

[0054] Pixel unit 100;

[0055] First floating diffusion node 101; second floating diffusion node 102; storage capacitor 103; first gain control transistor 104; second gain control transistor 105; photoelectric converter 106; transfer transistor 107; voltage source coupling control transistor 108; reset transistor 109; source follower transistor 110; row selection transistor 111; column readout and control unit 201; row control unit 202; control unit 203. DETAILED DESCRIPTION

[0056] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0057] A first aspect of the present invention provides a pixel unit, such as Figure 1As shown, the pixel unit 100 includes: a first floating diffusion node 101 , a second floating diffusion node 102 , a storage capacitor 103 , a first gain control transistor 104 and a second gain control transistor 105 .

[0058] Among them, the first end of the storage capacitor 103 is grounded; the first end of the first gain control transistor 104 is connected to the first floating diffusion node 101, and the second end of the first gain control transistor 104 is connected to the second floating diffusion node 102; the first end of the second gain control transistor 105 is connected to the second floating diffusion node 102, and the second end of the second gain control transistor 105 is connected to the second end of the storage capacitor 103.

[0059] Specifically, the first gain control transistor 104 is used to control the charge transfer from the first floating diffusion node 101 to the second floating diffusion node 102; the second gain control transistor 105 is used to control the coupling state between the capacitor and the second floating diffusion node 102, where coupling refers to the connection or connectivity between electronic devices.

[0060] By controlling the switching states of the first gain control transistor 104 and the second gain control transistor 105, a variety of different gain conversion modes can be achieved, for example, when the first gain control transistor 104 and the second gain control transistor are both turned off, the first floating diffusion node 101 stores charges; when the first gain control transistor 104 is turned on and the second gain control transistor is turned off, the first floating diffusion node 101 and the second floating diffusion node 102 can store charges together; when the first gain control transistor 104 and the second gain control transistor are both turned on, the first floating diffusion node 101 and the second floating diffusion node and the storage capacitor 103 store charges together. Therefore, the pixel unit of the embodiment of the present application can adjust the overflow charge storage area and achieve a variety of different conversion gains by adding the second gain control transistor 104.

[0061] According to the pixel unit 100 of the embodiment of the present invention, a second gain control transistor is added between the first gain control transistor and the storage capacitor, an overflow charge storage area is added, the potential well capacity of the pixel is expanded, the charge storage function is separated from the photosensitive unit, the inherent limitation is broken, the pixel dynamic range and the photosensitive unit are decoupled, and the upper limit of the dynamic range of the image sensor is increased. In addition, the expanded second floating diffusion node and the first floating diffusion node exist independently in the circuit, and the junction capacitance of the floating diffusion node is equal to the sum of the parasitic capacitances of the coupling transistors connected to the node, thereby improving the conversion gain and the sensitivity.

[0062] In some embodiments, Figure 1 As shown, the pixel unit 100 includes: at least one photoelectric converter 106 and a transfer transistor 107 .

[0063] The photoelectric converter 106 may include but is not limited to a photodiode. At least one photoelectric converter 106 may be a photodiode such as Figure 1 As shown, there may also be multiple photodiodes, for example, two or four or more photodiodes, and the specific number of photoelectric converters 106 is not specifically limited herein. The first end of at least one photoelectric converter 106 is grounded. The first end of the transfer transistor 107 is connected to the second end of the corresponding photoelectric converter 106, and the second end of the transfer transistor 107 is connected to the first floating diffusion node 101, which is used to control the transfer of the charge generated by the corresponding photoelectric converter 106. It can be understood that one transfer transistor 107 can be connected to one photoelectric converter 106 to control the transfer of the photogenerated charge of the corresponding photoelectric converter 106.

[0064] Specifically, the photoelectric converter 106 is a device that converts light energy into electrical energy, and uses semiconductor materials to convert photons into electrons. For example, in a silicon-based photoelectric converter, the silicon chip generates electron-hole pairs by absorbing external light, which are then collected and converted into current output; the transfer transistor 107 controls the transfer of charges generated by the photoelectric converter 106. After the transfer transistor 107 is turned on, the charges generated by the electrical converter 106 can be moved through the transfer transistor 107.

[0065] In some embodiments, Figure 1 As shown, the pixel unit 100 includes: a voltage source coupling control transistor 108 .

[0066] The first end of the voltage source coupling control transistor 108 is connected to the second end of the at least one photoelectric converter 106 , and the second end of the voltage source coupling control transistor 108 is connected to a preset voltage source.

[0067] Specifically, the voltage source coupling control transistor 108 is used to control the coupling state of at least one photoelectric converter 106 with a preset voltage source. The photoelectric converter 106 can be coupled to the power supply through the voltage source coupling control transistor 108, and the motion distortion and artifacts associated with flicker are reduced by spreading the integration time over a longer time into a shorter time. When the control signal of the voltage source coupling control transistor 108 is at a high level, the photoelectric converter 106 can be reset, and when the control signal is at a low level, the photoelectric converter 106 can accumulate the charge excited by the incident light.

[0068] In some embodiments, Figure 1 As shown, the pixel unit 100 further includes a reset transistor 109 .

[0069] The first end of the reset transistor 109 is connected to the second floating diffusion node 102 , and the second end of the reset transistor 109 is connected to a preset voltage source, for controlling the coupling state between the second floating diffusion node 102 and the preset voltage source.

[0070] In some embodiments, Figure 1 As shown, the pixel unit 100 further includes: a source follower transistor 110 and a row selection transistor 111 .

[0071] Among them, the control end of the source follower transistor 110 is connected to the first floating diffusion node 101, the first end of the source follower transistor 110 is connected to a preset voltage source, and the source follower transistor 110 is used to amplify the pixel signal; the first end of the row selection transistor 111 is connected to the second end of the source follower transistor 110, and the second end of the row selection transistor 111 is used to output the pixel signal.

[0072] Specifically, the source follower transistor 110 is turned on after receiving the control signal and amplifies the received pixel signal. The conduction of the row selection transistor 111 is controlled by the row selection control signal. When the row selection control signal is at a high level, the row selection transistor 111 is turned on and the corresponding pixel signal is transmitted to the column bus.

[0073] In some embodiments, the photoelectric converter is a clamped photodiode.

[0074] Specifically, clamping means limiting voltage in a circuit, and a clamped photodiode refers to a diode used to limit the potential of a certain point in a circuit. A clamped photodiode is a sensor based on the photoelectric effect. It detects and measures by converting light signals into electrical signals. A typical clamped photodiode consists of a PN junction and a reverse bias device. The PN junction plays a role in photoelectric conversion, and the reverse bias device amplifies and filters the signal. When light shines on the PN junction, photoelectrons are excited, thereby generating charges. As the charges flow, a current signal is generated, which is finally converted into a corresponding voltage signal output by the reverse bias device.

[0075] For example, Figure 1As shown, the pixel unit 100 of the embodiment of the present invention may be composed of a clamped photodiode, a voltage source coupling control transistor 108 controlled by a signal SG, a transmission transistor 107 controlled by a charge transfer signal TX, a reset transistor 109 controlled by a reset signal RST, two gain control transistors respectively controlled by conversion gain signals DCG and FCG, a source follower transistor 110, a row selection transistor 111 controlled by a row selection signal RS, a first floating diffusion node 101, a second floating diffusion node 102, and a storage capacitor 103 with a large capacitance. The floating diffusion region is a doped semiconductor region with charge storage capability, and the upper plate of the storage capacitor 103 is defined as a floating diffusion node.

[0076] Among them, two gain control transistors are used, the overflow charge storage area is increased, the potential well capacity of the pixel is expanded, the charge storage function is separated from the photosensitive diode, breaking out of the inherent limitations, realizing the decoupling of the pixel dynamic range and the photosensitive diode, and improving the upper limit of the dynamic range of the image sensor 200.

[0077] The clamped photodiode can be coupled to a power supply having a power supply voltage VDDp through a voltage source coupling control transistor 108, and motion distortion and artifacts associated with flicker can be reduced by spreading the integration time over a longer time into a shorter time. When the control signal SG of the voltage source coupling control transistor 108 is at a high level, the clamped photodiode can be reset. When the control signal SG is at a low level, the clamped photodiode can accumulate charges excited by the incident light.

[0078] A clamped photodiode is used, and a layer of p+ doping is introduced into the photodiode. The introduction of p+ suppresses the dark current generated on the surface of the photodiode due to the Si / SiO2 lattice mismatch defect, and reduces the fixed mode noise. When the photodiode is reset, the photodiode can be completely depleted, the depletion layer width is increased, and the full well capacity of the photodiode is improved. The transfer transistor 107 is used to control the transmission of charge from the clamped photodiode to the first floating diffusion node 101. Controlling the gate voltage of the transfer transistor 107 can transfer the charge in the clamped photodiode to the first floating diffusion node 101. The first floating diffusion node 101 area is connected to the drain of the gain control transistor and the gate of the source follower transistor. Under the same pixel size, only one clamped photodiode is used to improve the pixel sensitivity of low-light scenes. Under the premise that the pixel potential well capacity does not increase, the side overflow drain integral capacitor can increase the mapped scene brightness range, thereby achieving the goal of high dynamic range imaging.

[0079] The clamped photodiode can be connected to the source terminal or the drain terminal of the transfer transistor 107, and the first floating diffusion node 101 can be connected to the drain terminal or the source terminal of the transfer transistor 107. For example, if the clamped photodiode is connected to the source terminal of , the first floating diffusion node 101 is connected to the drain terminal of the transfer transistor 107, and vice versa. TX is used to control the on-off of the transfer transistor 107. When the charge transfer signal TX controlling the transfer transistor 107 is at a high level, the electrons stored in the clamped photodiode can reach the first floating diffusion node 101 through the channel of the transfer transistor 107.

[0080] In the pixel unit 100 of the embodiment of the present invention, in order to improve the potential well capacity of the pixel unit 100 and improve the charge storage capacity of the floating diffusion node, the storage capacitor 103 with a larger capacitance is coupled to the floating diffusion node through two gain control transistors. The switching of the charge storage capacity of the floating diffusion node is achieved by controlling the input levels of the signals DCG and FCG. When the dual conversion gain signal DCG is at a high level and the conversion gain signal FCG is at a low level, the pixel charge stored in the first floating diffusion node 101 can reach the second floating diffusion node 102 through the channel of the gain control transistor; when the conversion gain signals DCG and FCG are both at a high level, the storage capacitor 103 is coupled to the first floating diffusion node 101, and the storage capacity of the pixel unit 100 is maximum.

[0081] In some embodiments, the floating diffusion node may also be coupled to a voltage source VDDp that provides a power supply voltage. When the reset signal RST that controls the reset transistor 109 is high, and the conversion gain signals DCG and FCG are both low, the second floating diffusion node 102 is coupled to the voltage source VDDp through the channel of the reset transistor 109; when the reset signal RST that controls the reset transistor 109 is high, the conversion gain signal DCG is low, and FCG is high, the second floating diffusion node 102 and the storage capacitor 103 are simultaneously coupled to the voltage source VDDp that provides a power supply voltage; when the reset signal RST that controls the reset transistor 109 is high, the conversion gain signal DCG is high, and FCG is low, the first floating diffusion node 101 and the second floating diffusion node 102 are reset to the power supply voltage VDDp together; when the reset signal RST that controls the reset transistor 109, the conversion gain signal DCG, and FCG are both high, the first floating diffusion node 101, the second floating diffusion node 102, and the storage capacitor 103 are reset to the power supply voltage VDDp together.

[0082] In an embodiment, the pixel unit 100 further includes a readout circuit, which is composed of a source follower transistor 110 and a row selection transistor 111. The conduction of the row selection transistor 111 is controlled by a row selection control signal RS. When the row selection control signal RS is at a high level, the row selection transistor 111 is turned on, and the corresponding pixel signal is transmitted to the column bus.

[0083] Based on the pixel unit of the above embodiment, Figure 2 A pixel unit control method according to an embodiment of the second aspect of the present invention is described as follows: Figure 2 As shown, the method at least includes step S1 to step S2.

[0084] Step S1, obtaining readout signals of the pixel unit in a plurality of different conversion gain modes in each working cycle of the pixel unit.

[0085] Specifically, the multiple different conversion gain modes include a first conversion gain mode, a second conversion gain mode and a third conversion gain mode, wherein the conversion gain of the first conversion gain mode>the conversion gain of the second conversion gain mode>the conversion gain of the third conversion gain mode; the first conversion gain mode can be understood as a high conversion gain mode, the second conversion gain mode can be understood as a medium conversion gain mode, and the third conversion gain mode can be understood as a low conversion gain mode.

[0086] Step S2, obtaining the first frame image in the current working cycle according to the readout signal of the pixel unit in each conversion gain mode.

[0087] Specifically, in each working cycle of the pixel unit, the pixel unit can obtain corresponding readout signals in different conversion gain modes, and the pixel unit obtains the first frame image in the current working cycle according to the readout signals.

[0088] According to the pixel unit control method of an embodiment of the present invention, in the sampling order of the readout stage, the gain mode of the circuit is divided into three different gain modes, the image signals of the three stages are sampled or reset at different times, different floating diffusion nodes are sampled in different gain modes, and the stored charge amounts of different floating diffusion nodes are collected to obtain a frame of image, which can improve the conversion gain and improve the sensitivity.

[0089] In some embodiments, the readout signal includes a reset signal and a sampling signal in a first conversion gain mode, a reset signal and a sampling signal in a second conversion gain mode, and a reset signal and a sampling signal in a third conversion gain mode.

[0090] Specifically, Figure 3As shown, the output signal SHS indicates that the output pixel sampling signal is transmitted to the column bus at a high level and is disconnected at a low level; similarly, the output signal SHR indicates that the output pixel reset signal is transmitted to the column bus at a high level and is disconnected at a low level. The time from t0 to t2 is the reset stage of the pixel unit, t2-t2' represents the acquisition and exposure stage of the photodiode of the pixel circuit, and the readout cycle of the pixel circuit lasts from time t2' to time t10, during which the reset signal in the second conversion gain mode, the reset signal in the first conversion gain mode, the sampling signal in the first conversion gain mode, the sampling signal in the second conversion gain mode, the sampling signal in the third conversion gain mode, and the reset signal in the third conversion gain mode are read out in sequence; the time from t10 to t12 uses the time-division multiple exposure technology, the pixel signal is collected and exposed in a very short time from t10 to t10', and the reset and sampling signals exposed in a very short time are read out from the moment t10'.

[0091] In some embodiments, obtaining a readout signal of a pixel unit in a plurality of different conversion gain modes includes: sequentially obtaining a reset signal in a second conversion gain mode, a reset signal in a first conversion gain mode, a sampling signal in a first conversion gain mode, a sampling signal in a second conversion gain mode, a sampling signal in a third conversion gain mode, and a reset signal in a third conversion gain mode.

[0092] Specifically, the readout order of different conversion gain modes is to sequentially obtain the reset signal in the second conversion gain mode, the reset signal in the first conversion gain mode, the sampling signal in the first conversion gain mode, the sampling signal in the second conversion gain mode, the sampling signal in the third conversion gain mode, and the reset signal in the third conversion gain mode; according to the above readout order, the number of transistor state switching times can be reduced, thereby saving switching time.

[0093] For example, the pixel unit can work in the charge overflow stage, that is, the storage capacitor and the second floating diffusion node are used to store the excess charge that the first floating diffusion node cannot store. Figure 3 A timing diagram of a pixel unit in the charge overflow stage is shown. A complete pixel unit working cycle includes a reset stage, an exposure stage, and a readout stage.

[0094] At time t0-t2, the pixel unit is in the reset stage, at which time the charge storage node in the pixel unit can be reset to the power supply voltage level. During the pixel reset period, the control signal SG, the charge transfer signal TX, the reset signal RST, the conversion gain signal DCG and the FCG can output a high level to control the corresponding transistor to turn on, so as to reset the clamping photodiode PPD, the floating diffusion node and the storage capacitor C.

[0095] like Figure 4As shown in the charge barrier diagram of the reset phase, when the control signals TX, DCG, FCG, and RST are simultaneously at high levels, the corresponding transistors are turned on, and the potentials of the photodiode and floating diffusion nodes are reset to the power supply voltage VDDp, that is, all charges (or electrons) will be cleared from the photodiode and floating diffusion nodes.

[0096] In the reset phase, when the signal SG of the voltage source coupling control transistor is high, the clamped photodiode is reset to the power supply voltage VDDp. The control signals TX, DCG, FCG and RST change from high to low at t2. The control signal SG changes from high to low at t2, the photodiode disconnects from the voltage source and allows the photodiode to start storing electrons generated by incident light excitation, which marks the end of the reset phase of the pixel at t2 and the beginning of the pixel readout phase.

[0097] like Figure 5 As shown, the photodiode area can only hold a certain amount of charge. Assuming that the light intensity is very high, even if the signal TX is very low, the accumulated charge will overflow from the photodiode area to the floating diffusion area, and work together to form a larger storage area, and the pixel unit works in a high conversion gain HCG state. In this case, the first floating diffusion node capacitance is composed of the parasitic capacitance of the pn junction diffusion and metal coupling of the first floating diffusion area, which is much smaller than the capacitance of the second floating diffusion node.

[0098] The smaller the floating diffusion node capacitance, the higher the conversion gain, corresponding to higher sensitivity and lower read noise. Therefore, according to the capacitance of the floating diffusion node, it can be determined that when the control signals DCG and FCG are low, the charge storage area is expanded to the first floating diffusion node, at which time the capacitance is the smallest (such as the design value can be 0.8fF), the conversion gain is the largest, and it is the first conversion gain mode. When the control signal DCG is high and FCG is low, the charge storage area is expanded to the second floating diffusion node. The capacitance of this point mainly comes from the parasitic capacitance of the reset transistor and the gain conversion transistor, and its capacitance is greater than the capacitance of the first floating diffusion node, which is the second gain conversion mode (such as the capacitance value can be designed to be about 4 to 5fF). When the control signals DCG and FCG are both high, the storage capacitor C is connected to the second floating diffusion node, the charge storage capacity is the largest, and the storage capacitor C is essentially a metal-insulator-metal capacitor with a much larger capacitance than the first floating diffusion node and the second floating diffusion node (such as can be designed to be about 50fF to 100fF), the conversion gain is the smallest, and it is the third conversion gain mode.

[0099] Similarly, the charge storage conditions of the second conversion gain and the third conversion gain modes are as follows: Figure 6 , Figure 7 shown.

[0100] Since the reset exposure phase and the readout phase of the same pixel unit are not continuous in time, at t2', the row control circuit outputs a row address switching command to control the readout circuit to read the image signal of a row of pixels. For example, assuming that the working cycle of the pixel is time T, T includes the reset and exposure time T1 of the pixel and the readout time T2.

[0101] T=T1+T2

[0102] For the same pixel unit, the reset, exposure time and readout time differ by k working cycles, that is, for the same pixel unit, it takes a waiting time kT after the reset and exposure to start reading the pixel analog signal, and the waiting time kT of this pixel does not affect the reset, exposure and readout process of other pixels. In one working cycle, Figure 3 As shown, the nth row of pixels is reset and exposed from time t0 to time t2', and at time t2', the pixel unit reads out the (nk)th row of pixels from time t2' to t10 under the control of the row address switching command.

[0103] In some embodiments, a first frame of image in a current working cycle is obtained according to a readout signal of a pixel unit in each conversion gain mode, including: subtracting a sampling signal in a first conversion gain mode from a reset signal in the first conversion gain mode to obtain a first correlated double sampled image signal; subtracting a sampling signal in a second conversion gain mode from a reset signal in the second conversion gain mode to obtain a second correlated double sampled image signal; comparing a reset signal in a third conversion gain mode with a sampling signal in a third conversion gain mode to obtain a first non-correlated double sampled image signal, for example, subtracting a sampling signal in a third conversion gain mode from a reset signal; and obtaining a first frame of image according to the first correlated double sampled image signal, the second correlated double sampled image signal, and the first non-correlated double sampled image signal.

[0104] Specifically, the correlated double sampling signal samples two levels of the output signal respectively, and makes the interval between the two sampling times much smaller than the time constant so that the noise voltages of the two samples are almost the same, and the time of the two samples is correlated. If the two sampling values ​​are subtracted, the interference of the reset noise is basically eliminated, and the actual effective amplitude of the signal level is obtained. In the first conversion gain mode, the sampling signal is subtracted from the reset signal to obtain the image signal of the first correlated double sampling and save it; in the second conversion gain mode, the sampling signal is subtracted from the reset signal to obtain the image signal of the second correlated double sampling and save it; in the third conversion gain mode, the reset signal is compared with the sampling signal to obtain the image signal of the first non-correlated double sampling; the first frame image is synthesized according to the linear combination of the image signal of the first correlated double sampling, the image signal of the second correlated double sampling and the image signal of the first non-correlated double sampling.

[0105] In some embodiments, obtaining a reset signal in the second conversion gain mode includes: controlling the transfer transistor, reset transistor, second gain control transistor and voltage source coupling control transistor of the pixel unit to be in an off state, and controlling the first gain control transistor, source follower transistor and row selection transistor to be in an on state. At this time, the pixel unit is in the second conversion gain mode, and the reset signal in the second conversion gain mode is read out in this mode.

[0106] Specifically, Figure 3 As shown, the readout period of the pixel starts at time t3, the row selection transistor control signal RS changes from low level to high level, and changes from high level to low level at the end of the readout period of the pixel. At time t3, the control signals DCG and FCG change from low level to high level, and the electrons stored in the capacitor can flow to the floating diffusion node. At this time, the overflowing electrons share the charge on the floating diffusion node.

[0107] At time t4, the control signal FCG changes from a high level to a low level. At this time, the electron integration stored on the second diffusion node obtains the pixel voltage signal, the row selection control signal RS is at a high level, and the analog pixel signal can be read out through the source follower transistor and the column bus. It is sampled in the pulse A phase and saved as the reset signal of the second conversion gain mode.

[0108] In some embodiments, obtaining a reset signal in a first conversion gain mode includes: controlling a first gain control transistor to switch to an off state so that the pixel unit switches to the first conversion gain mode, and a readout signal of the pixel unit is a reset signal in the first conversion gain mode.

[0109] Specifically, the first gain control transistor is controlled to switch to the off state, which is the first conversion gain mode, and the reset signal in the first conversion gain mode is read out. Figure 3 As shown, at time t5, the control signal DCG changes from a high level to a low level. At this time, the electron integration stored on the first floating diffusion node obtains a pixel voltage signal, which can be read out through the source follower transistor and the column bus, sampled in the pulse C phase and saved as a reset signal for the first conversion gain.

[0110] In some embodiments, obtaining a sampling signal in a first conversion gain mode includes: controlling a transmission transistor to be turned on and then turned off after a preset transmission time, so that a photoelectric converter of a pixel unit generates charge and transfers it to a first floating diffusion node of the pixel unit, and a readout signal of the pixel unit is a sampling signal in the first conversion gain mode.

[0111] Specifically, the transfer transistor is controlled to be turned on for a preset transfer time and then turned off, so that the photoelectric converter of the pixel unit generates charges and transfers them to the first floating diffusion node of the pixel unit during the transfer transistor on time period. For example, the transfer transistor is turned on for a preset transfer time of 1 μs or 2 μs.

[0112] For example, at time t6, the control signal TX changes from a low level to a high level, and the electrons stored in the photodiode can be transferred to the first floating diffusion node through the channel of the transfer transistor. At this time, the electrons stored on the storage node of the first floating diffusion node include the electrons overflowed during the exposure of the current readout pixel unit and the electrons transferred in the photodiode after TX is turned on. At this time, the analog pixel signal is collected on the column bus through the source follower transistor as the sampling signal of the first conversion gain and saved, and the first correlated double sampling is completed by subtracting the reset signal of the first conversion gain mode. The correlated double sampling readout occurs in the transmission process of the image analog signal, and the sampled image signal is directly subtracted from the reset image signal to eliminate the system fixed noise and low-frequency noise.

[0113] In some embodiments, obtaining a sampling signal in a second conversion gain mode includes: controlling the first gain control transistor to switch to an on state so that the pixel unit switches to the second conversion gain mode; controlling the transfer transistor to turn on and then turn off after a preset transfer time so that the photoelectric converter generates charges and electrons from the first floating diffusion node are transmitted to the second floating diffusion node of the pixel unit, and the readout signal of the pixel unit is the sampling signal in the second conversion gain mode.

[0114] Specifically, the first gain control transistor is controlled to switch to the on state, and the transfer transistor is turned on for a preset transmission time and then turned off. For example, the preset transmission time of the transfer transistor can be 1μs or 2μs. When the first gain control transistor is switched to the on state, the pixel unit is switched to the second conversion gain mode. After the transfer transistor is turned on, the photoelectric converter generates charges and the electrons of the first floating diffusion node are transmitted to the second floating diffusion node of the pixel unit. At this time, the readout signal of the pixel unit is the sampling signal under the second conversion gain mode.

[0115] like Figure 3As shown, before time t7, the control signal DCG changes from low level to high level, and at this time, the control signal FCG still maintains a low level, and the electrons stored in the photodiode and the first floating diffusion node are moved to the second floating diffusion node through the gain control transistor, and at this time, the circuit operates in the second conversion gain mode. The electrons stored in the second floating diffusion node can be read out in the same way as the sampling signal in the first conversion gain mode, and the sampling signal of the second conversion gain mode is collected and saved using pulse B on the column bus, and the reset signal of the second conversion gain mode is compared with the sampling signal, and the pixel signal in the second conversion gain mode is read out by the second correlated double sampling.

[0116] In the first conversion gain mode and the second conversion gain mode, the clamped photodiode collects pixel signals under weak light conditions and is susceptible to reset noise and low-frequency noise interference. The use of the correlated double sampling method to read out can eliminate the interference of reset noise and also suppress low-frequency noise, which can significantly improve the signal-to-noise ratio and improve signal detection accuracy. In the third conversion gain mode, the clamped photodiode collects pixel signals under strong light conditions. Since the influence of reset noise and low-frequency noise interference under strong light conditions is not significant, non-correlated double sampling readout can be used. First, the sampling signal of the third conversion gain mode is read, and the reset signal of the third conversion gain mode is read after reset.

[0117] In some embodiments, obtaining a sampling signal in a third conversion gain mode includes: controlling the second gain control transistor to switch to an on state so that the pixel unit switches to the third conversion gain mode; controlling the transmission transistor to switch on and then disconnect after a preset transmission time so that the photoelectric converter generates charges, and the electrons of the first floating diffusion node and the electrons of the second floating diffusion node are transmitted to the storage capacitor of the pixel unit, and the readout signal of the pixel unit is the sampling signal in the third conversion gain mode.

[0118] Specifically, the second gain control transistor is controlled to switch to the on state, and the transfer transistor is turned on and then disconnected after a preset transmission time. For example, the preset transmission time of the transfer transistor can be 1μs or 2μs. When the second gain control transistor is switched to the on state, the pixel unit switches to the third conversion gain mode. After the transfer transistor is turned on, the photoelectric converter generates charges, and the electrons of the first floating diffusion node and the second floating diffusion node are transmitted to the storage capacitor of the pixel unit. At this time, the readout signal of the pixel unit is the sampling signal under the third conversion gain mode.

[0119] like Figure 3As shown, at time t8, the control signals DCG and FCG are at high level, and the circuit works in the third conversion gain mode, and the storage capacitor C stores most of the electrons and stores them on the floating diffusion node. At this time, the analog pixel signal integrated on the floating diffusion node is read out through the source follower transistor and the column bus, sampled in the pulse F stage and saved as the sampling signal of the third conversion gain.

[0120] In some embodiments, obtaining a reset signal in a third conversion gain mode includes: controlling a reset transistor of a pixel unit to be turned on and then turned off after a preset reset time to clear electrons in a first floating diffusion node, a second floating diffusion node, and a storage capacitor, wherein an output signal of the pixel unit is a reset signal in the third conversion gain mode.

[0121] Specifically, when a reset signal is obtained in the third conversion gain mode, the reset transistor of the pixel unit is controlled to be turned on and then disconnected after a preset reset time, and the electrons in the first floating diffusion node, the second floating diffusion node and the storage capacitor are cleared. At this time, the output signal of the pixel unit is the reset signal in the third conversion gain mode.

[0122] like Figure 3 As shown, at time t9, the reset signal RST changes from low level to high level, the control signals DCG and FCG remain at high level, the pixel unit circuit is in a reset state, and the electrons on the floating diffusion node are cleared. Subsequently, the control signals FCG and DCG are still at high level, and the row selection control signal RS is at high level. At this time, the reset voltage signal is read out through the source follower transistor and the column bus, and the analog pixel signal is sampled in the pulse E stage and saved as the reset signal of the third conversion gain mode. The reset signal of the third conversion gain mode is compared with the sampling signal to obtain the image signal after non-correlated double sampling. The first frame of image is synthesized using the linear combination of the image signals in the first conversion gain, the second conversion gain, and the third conversion gain working mode.

[0123] In some embodiments, the pixel unit control method further includes: in each working cycle, before obtaining the readout signal of the pixel unit in multiple different conversion gain modes, controlling the pixel unit to perform a first exposure; after obtaining the readout signal of the pixel unit in multiple different conversion gain modes, controlling the pixel unit to perform a second exposure, and the exposure time of the second exposure is different from the exposure time of the first exposure.

[0124] Specifically, in each working cycle of the pixel unit, the pixel unit is first controlled to perform the first exposure, and after the first exposure, the readout signal of the pixel unit in multiple different conversion gain modes is obtained, and then the pixel unit is controlled to perform the second exposure; the exposure principle refers to capturing the details of the target object as much as possible by controlling the incident light intensity and exposure time. The exposure time is adjusted by the control voltage. When external light shines on the image sensor, the photodiode in the pixel unit can generate a voltage, and the energy is converted into a certain amount of charge. Before the exposure starts, the pixel unit accumulates a certain amount of charge. When the exposure starts, all photoelectric elements are cleared, and under the action of external light, the pixel diode begins to accumulate charge.

[0125] In some embodiments, the exposure time of the second exposure is less than the exposure time of the first exposure.

[0126] Specifically, Figure 3 As shown, the first exposure is performed from time t0 to time t2', and the second exposure is completed in a very short time interval t10-t10'. The first exposure time is longer to obtain a clearer first frame image, and the second exposure time is shorter to obtain a second frame image as a supplement. The first frame and the second frame image are synthesized again to obtain an image with a high dynamic range.

[0127] In some embodiments, the pixel unit control method further includes: after controlling the pixel unit to perform a second exposure, obtaining a readout signal of the pixel unit in a current conversion gain mode; and obtaining a second frame image in a current working cycle based on the readout signal of the pixel unit in the current conversion gain mode.

[0128] Specifically, after reading the second exposure, the readout signal of the pixel unit in the current conversion gain mode is read, and the second frame image in the current working cycle is obtained according to the readout signal of the pixel unit in the current conversion gain mode. The first frame and the second frame image are synthesized again to obtain an image with a high dynamic range.

[0129] In some embodiments, obtaining a readout signal of a pixel unit in a current conversion gain mode includes: when the pixel unit is in a third conversion gain mode, controlling a reset transistor of the pixel unit to be turned on and then disconnected after a preset reset time, thereby obtaining a reset signal of the pixel unit in the third conversion gain mode; and controlling a transmission transistor of the pixel unit to be turned on and then disconnected after a preset transmission time, thereby obtaining a sampling signal of the pixel unit in the third conversion gain mode.

[0130] Specifically, when the pixel unit is in the third conversion gain mode, the reset transistor of the pixel unit is controlled to be turned on and then disconnected after a preset reset time, so as to obtain a reset signal of the pixel unit in the third conversion gain mode; the transmission transistor of the pixel unit is controlled to be turned on and then disconnected after a preset transmission time, so as to obtain a sampling signal of the pixel unit in the third conversion gain mode; the reset signal and the sampling signal of the pixel unit in the third conversion gain mode are obtained and are limited to be read out after a short exposure, so as to reduce the switching frequency of the corresponding transistors.

[0131] In some embodiments, a second frame image in the current working cycle is obtained based on a readout signal of the pixel unit in the current conversion gain mode, including: comparing a reset signal of the pixel unit in a third conversion gain mode with a collection signal of the pixel unit in the third conversion gain mode to obtain a third correlated double sampled image signal of the pixel unit as the second frame image.

[0132] Specifically, when the pixel unit is in the third conversion gain mode, the reset transistor of the pixel unit is controlled to be turned on and then disconnected after a preset reset time, so as to obtain a reset signal of the pixel unit in the third conversion gain mode; the transmission transistor of the pixel unit is controlled to be turned on and then disconnected after a preset transmission time, so as to obtain a sampling signal of the pixel unit in the third conversion gain mode; the reset signal and the sampling signal are compared to obtain a third correlated double-sampled image signal of the pixel unit as a second frame image.

[0133] In some embodiments, the pixel unit control method further includes: synthesizing the first frame image and the second frame image to obtain a captured image of the pixel unit.

[0134] Specifically, when the pixel unit is in the third conversion gain mode, the reset transistor of the pixel unit is controlled to be turned on and then disconnected after a preset reset time, so as to obtain a reset signal of the pixel unit in the third conversion gain mode; the transmission transistor of the pixel unit is controlled to be turned on and then disconnected after a preset transmission time, so as to obtain a sampling signal of the pixel unit in the third conversion gain mode; the reset signal and the sampling signal are compared to obtain a third correlated double-sampled image signal of the pixel unit as a second frame image; and the first frame image and the second frame image are synthesized to obtain a captured image of the pixel unit.

[0135] Using time-division multiple exposure technology, by changing the exposure time, the scene brightness is sampled separately, and multiple frames of images are obtained by continuous multiple exposures. The duration of each exposure can be controlled very accurately, and the final fitted image brightness linear characteristics are good. Dynamic range extension technology, under the premise of unchanged pixel potential well capacity, can achieve a dynamic range of 140dB using only time-division technology.

[0136] For example, after the first exposure, the exposure time is changed for the second exposure, and the exposure process of the second frame image is completed within a very short time interval t10-t10'. At time t10', the control signal RST is at a high level, and the third gain mode pixel reset signal of the second very short exposure is read; at time t11, the control signal TX is at a high level, and the third gain mode pixel sampling signal of the second short exposure is read, and the obtained sampling signal is compared with the reset signal, and the second frame image is read out by correlated double sampling, and the first frame and the second frame image are synthesized again to obtain an image with a high dynamic range.

[0137] The present invention uses three technologies, namely, changing pixel sensitivity, multiple exposures, and directly expanding the potential well capacity of pixels, to expand the dynamic range. The pixel unit uses a clamped photodiode design, and the readout circuit uses three correlated double samplings and one non-correlated double sampling technology to reduce the noise that occurs during the imaging process, improve the signal-to-noise ratio of the image signal, and greatly optimize the performance of the image sensor.

[0138] In some embodiments, the pixel unit control method further includes: in each working cycle, before the first exposure, controlling the row selection transistor of the pixel unit to be in an off state, and controlling the transfer transistor, reset transistor, first gain control transistor, second gain control transistor and voltage source coupling control transistor of the pixel unit to be turned on for corresponding preset reset times respectively, so that the pixel unit is reset.

[0139] Specifically, in each working cycle of the pixel unit, the pixel unit needs to be reset before the first exposure; when the pixel unit is reset, the row selection transistor of the pixel unit is controlled to be in an off state, and the transfer transistor, reset transistor, first gain control transistor, second gain control transistor and voltage source coupling control transistor of the pixel unit are controlled to be turned on respectively for the corresponding preset reset time. For example, the preset reset time can be 1μs or 2μs to clear the electrons in the pixel unit.

[0140] A third aspect of the present invention provides an image sensor, such as Figure 8 As shown, the image sensor 200 includes: a plurality of pixel units 100 arranged in an array, a column readout and control unit 201 , a row control unit 202 and a control unit 203 .

[0141] Among them, the column readout and control unit 201 is connected to the output end of the pixel unit 100 in each column of the array through a column bus; the row control unit 202 is connected to multiple pixel units 100 and is used to control the corresponding transistors of the pixel units in the array according to the pixel unit control method; the control unit 203 is connected to the column readout and control unit 201 and the row control unit 202 respectively.

[0142] According to the image sensor of the embodiment of the present invention, by adopting the pixel unit structure and control method of the above embodiment, the upper limit of the dynamic range of the image sensor can be increased, the conversion gain can be increased, and the sensitivity can be increased.

[0143] For example, an image sensor uses a 3D stacking structure to place pixel units and logic circuits in a three-dimensional space, and may include one or more arrays of image pixel units. The image pixel units may be formed in a semiconductor substrate using complementary metal oxide semiconductor technology or charge coupled device technology or any other suitable photosensitive device technology.

[0144] The image sensor includes a pixel cell array placed on a pixel wafer, which contains hundreds or thousands of rows and columns of image sensor pixel cells and control and processing circuits. The control circuit can be coupled to the row control circuit and the column readout circuit (also called image readout circuit, readout circuit or column decoder). The row control circuit can receive the row address from the control circuit and send the corresponding row control signal to the pixel through the row control path, such as the charge transfer signal TX, the reset signal RST, the row selection signal RS, the conversion gain signal DCG and FCG, etc. The column bus couples the pixel matrix with the column readout and control circuit, and the pixel signal is input to the column readout and control circuit, and the image signal can be read out from the pixel cell. The column-level bias circuit is used to provide a bias voltage or bias current to the pixel cell. During pixel readout, the row control circuit selects a pixel row in the array and reads out the image signal generated by the image pixel in the pixel row along the column bus.

[0145] The column readout circuit receives the analog pixel value generated by the pixel unit provided through the column bus. The image readout circuit includes a sampling and holding circuit, an analog-to-digital conversion circuit, a bias circuit, a column memory circuit, a latch circuit, etc. The sampling and holding circuit is used to sample and temporarily store the image signal read out from the pixel array; the latch circuit can selectively enable or disable the column readout circuit; other unmentioned circuits can be coupled to one or more columns of pixel units to operate the pixel units and read out image signals therefrom. The analog-to-digital conversion circuit in the readout circuit converts the analog pixel value received from the array into a corresponding digital code value.

[0146] A fourth aspect of the present invention provides an electronic device, such as Fig. 9 As shown, the electronic device 300 includes: at least one image sensor 200 .

[0147] The electronic device according to the embodiment of the present invention adopts the image sensor of the above embodiment, thereby raising the upper limit of the dynamic range of the image sensor and improving the conversion gain and sensitivity.

[0148] A fifth aspect of the present invention provides a vehicle, such as Fig.10As shown, vehicle 400 includes: at least one image sensor 200 .

[0149] According to the vehicle of the embodiment of the present invention, the image sensor of the above embodiment is used, which can increase the upper limit of the dynamic range of the image sensor, and improve the conversion gain and sensitivity.

[0150] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0151] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A pixel unit, characterized in that: include: A first floating diffusion node, a second floating diffusion node and a storage capacitor, wherein a first terminal of the storage capacitor is grounded; a first gain control transistor, wherein a first end of the first gain control transistor is connected to the first floating diffusion node, a second end of the first gain control transistor is connected to the second floating diffusion node, and the first gain control transistor is used to control the transfer of charges from the first floating diffusion node to the second floating diffusion node; A second gain control transistor, wherein a first end of the second gain control transistor is connected to the second floating diffusion node, a second end of the second gain control transistor is connected to the second end of the storage capacitor, and the second gain control transistor is used to control a coupling state between the capacitor and the second floating diffusion node.

2. The pixel unit according to claim 1, characterized in that: The pixel unit comprises: at least one photoelectric converter, wherein a first terminal of the at least one photoelectric converter is grounded; A transfer transistor corresponding to the at least one photoelectric converter, wherein the first end of the transfer transistor is connected to the second end of the corresponding photoelectric converter, the second end of the transfer transistor is connected to the first floating diffusion node, and the transfer transistor is used to control the transfer of charge generated by the corresponding photoelectric converter.

3. The pixel unit according to claim 2, characterized in that: The pixel unit also includes: A voltage source coupling control transistor, wherein the first end of the voltage source coupling control transistor is connected to the second end of the at least one photoelectric converter, the second end of the voltage source coupling control transistor is connected to a preset voltage source, and the voltage source coupling control transistor is used to control the coupling state of the at least one photoelectric converter and the preset voltage source.

4. The pixel unit according to claim 1, characterized in that: The pixel unit also includes: A reset transistor, a first end of the reset transistor is connected to the second floating diffusion node, a second end of the reset transistor is connected to a preset voltage source, and the reset transistor is used to control a coupling state between the second floating diffusion node and the preset voltage source.

5. The pixel unit according to claim 1, characterized in that: The pixel unit also includes: A source follower transistor, wherein a control terminal of the source follower transistor is connected to the first floating diffusion node, a first terminal of the source follower transistor is connected to a preset voltage source, and the source follower transistor is used for amplifying a pixel signal; A row selection transistor, a first terminal of the row selection transistor is connected to a second terminal of the source follower transistor, and a second terminal of the row selection transistor is used to output the pixel signal.

6. The pixel unit according to any one of claims 1 to 5, characterized in that: The photoelectric converter is a clamped photodiode.

7. A pixel unit control method, characterized in that: For the pixel unit according to any one of claims 1 to 6, the pixel unit control method comprises: In each working cycle of the pixel unit, a readout signal of the pixel unit in a plurality of different conversion gain modes is obtained, the plurality of different conversion gain modes include a first conversion gain mode, a second conversion gain mode and a third conversion gain mode, wherein the conversion gain of the first conversion gain mode>the conversion gain of the second conversion gain mode>the conversion gain of the third conversion gain mode; The first frame image in the current working cycle is obtained according to the readout signal of the pixel unit in each conversion gain mode.

8. The pixel unit control method according to claim 7, characterized in that: The readout signal includes a reset signal and a sampling signal in the first conversion gain mode, a reset signal and a sampling signal in the second conversion gain mode, and a reset signal and a sampling signal in the third conversion gain mode.

9. The pixel unit control method according to claim 8, characterized in that: Obtaining a readout signal of the pixel unit in a plurality of different conversion gain modes, comprising: A reset signal in the second conversion gain mode, a reset signal in the first conversion gain mode, a sampling signal in the first conversion gain mode, a sampling signal in the second conversion gain mode, a sampling signal in the third conversion gain mode, and a reset signal in the third conversion gain mode are obtained in sequence.

10. The pixel unit control method according to claim 9, characterized in that: Obtaining a first frame of image in a current working cycle according to a readout signal of the pixel unit in each conversion gain mode, comprising: The sampling signal in the first conversion gain mode is subtracted from the reset signal in the first conversion gain mode to obtain a first correlated double sampling image signal; The sampling signal in the second conversion gain mode is subtracted from the reset signal in the second conversion gain mode to obtain a second correlated double sampling image signal; Compare the reset signal in the third conversion gain mode with the sampling signal in the third conversion gain mode to obtain a first non-correlated double-sampled image signal; The first frame image is obtained according to the first correlated double sampled image signal, the second correlated double sampled image signal and the first non-correlated double sampled image signal.

11. The pixel unit control method according to claim 9, characterized in that: Obtaining a reset signal in the second conversion gain mode, comprising: The transfer transistor, reset transistor, second gain control transistor and voltage source coupling control transistor of the pixel unit are all controlled to be in an off state, and the first gain control transistor, source follower transistor and row selection transistor of the pixel unit are all controlled to be in an on state, so that the pixel unit is in the second conversion gain mode, and the readout signal of the pixel unit is a reset signal in the second conversion gain mode.

12. The pixel unit control method according to claim 11, characterized in that: Obtaining a reset signal in the first conversion gain mode includes: The first gain control transistor is controlled to switch to an off state, so that the pixel unit switches to the first conversion gain mode, and the readout signal of the pixel unit is a reset signal in the first conversion gain mode.

13. The pixel unit control method according to claim 12, characterized in that: Obtaining a sampling signal in the first conversion gain mode includes: The transmission transistor is controlled to be turned on for a preset transmission time and then turned off, so that the photoelectric converter of the pixel unit generates charges and transfers them to the first floating diffusion node of the pixel unit, and the readout signal of the pixel unit is a sampling signal in the first conversion gain mode.

14. The pixel unit control method according to claim 13, characterized in that: Obtaining a sampling signal in the second conversion gain mode, comprising: Controlling the first gain control transistor to switch to an on state so that the pixel unit switches to the second conversion gain mode; The transfer transistor is controlled to be turned on for the preset transfer time and then turned off, so that the photoelectric converter generates charges and the electrons of the first floating diffusion node are transmitted to the second floating diffusion node of the pixel unit, and the readout signal of the pixel unit is a sampling signal under the second conversion gain mode.

15. The pixel unit control method according to claim 14, characterized in that: Obtaining a sampling signal in the third conversion gain mode, comprising: Controlling the second gain control transistor to switch to an on state so that the pixel unit switches to the third conversion gain mode; The transfer transistor is controlled to be turned on and then turned off after the preset transfer time, so that the photoelectric converter generates charges, and the electrons of the first floating diffusion node and the electrons of the second floating diffusion node are transmitted to the storage capacitor of the pixel unit, and the readout signal of the pixel unit is the sampling signal under the third conversion gain mode.

16. The pixel unit control method according to claim 15, characterized in that: Obtaining a reset signal in the third conversion gain mode includes: The reset transistor of the pixel unit is controlled to be turned on for a preset reset time and then turned off to clear the electrons in the first floating diffusion node, the second floating diffusion node and the storage capacitor, and the output signal of the pixel unit is a reset signal in the third conversion gain mode.

17. The pixel unit control method according to any one of claims 7 to 16, characterized in that: The pixel unit control method further includes: In each of the working cycles, Before obtaining the readout signal of the pixel unit in a plurality of different conversion gain modes, controlling the pixel unit to perform a first exposure; After obtaining the readout signals of the pixel unit in a plurality of different conversion gain modes, the pixel unit is controlled to perform a second exposure, and the exposure time of the second exposure is different from the exposure time of the first exposure.

18. The pixel unit control method according to claim 17, characterized in that: The exposure time of the second exposure is shorter than the exposure time of the first exposure.

19. The pixel unit control method according to claim 17, characterized in that: The pixel unit control method further includes: After controlling the pixel unit to perform a second exposure, obtaining a readout signal of the pixel unit in a current conversion gain mode; A second frame image in the current working cycle is obtained according to a readout signal of the pixel unit in the current conversion gain mode.

20. The pixel unit control method according to claim 19, characterized in that: Obtaining a readout signal of the pixel unit in a current conversion gain mode, comprising: When the pixel unit is in the third conversion gain mode, the reset transistor of the pixel unit is controlled to be turned on and then turned off after a preset reset time, so as to obtain a reset signal of the pixel unit in the third conversion gain mode; The transmission transistor of the pixel unit is controlled to be turned on and then turned off after a preset transmission time, so as to obtain a sampling signal of the pixel unit in the third conversion gain mode.

21. The pixel unit control method according to claim 20, characterized in that: Obtaining a second frame image in the current working cycle according to a readout signal of the pixel unit in the current conversion gain mode, comprising: A reset signal of the pixel unit in the third conversion gain mode is compared with a collection signal of the pixel unit in the third conversion gain mode to obtain a third correlated double sampled image signal of the pixel unit as the second frame image.

22. The pixel unit control method according to claim 19, characterized in that: The pixel unit control method further includes: synthesizing the first frame image and the second frame image to obtain a captured image of the pixel unit.

23. The pixel unit control method according to claim 17, characterized in that: The pixel unit control method further includes: In each of the working cycles, Before the first exposure, the row selection transistor of the pixel unit is controlled to be in an off state, and the transfer transistor, reset transistor, first gain control transistor, second gain control transistor and voltage source coupling control transistor of the pixel unit are controlled to be turned on for corresponding preset reset times, so that the pixel unit is reset.

24. An image sensor, characterized in that: include: A plurality of pixel units as claimed in any one of claims 1 to 6 arranged in an array; A column readout and control unit, the column readout and control unit is connected to the output end of the pixel unit of each column in the array through a column bus; A row control unit, the row control unit being connected to the plurality of pixel units and configured to control corresponding transistors of the pixel units in the array according to the pixel unit control method according to any one of claims 7 to 23; A control unit is connected to the column readout and control unit and the row control unit respectively.

25. An electronic device, characterized in that: Comprising at least one image sensor as claimed in claim 24.

26. A vehicle, characterized in that: Comprising at least one image sensor as claimed in claim 24.

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