Manufacturing method of image sensor and image sensor

Abstract

The invention discloses a manufacturing method of an image sensor and the image sensor, and relates to the technical field of semiconductor manufacturing, and the manufacturing method comprises the steps: forming a first stacked structure on the surface of a substrate; forming a deep trench isolation structure in the first laminated structure to isolate the first laminated structure to form a plurality of photodiode regions; forming a plurality of doped regions in the photodiode region; wherein the doping elements are diffused from the surface of the photodiode region to the interior of the photodiode region to form a plurality of doping regions, the plurality of doping regions extend from the surface of the photodiode region to the interior of the photodiode region, and the extension depths of different doping regions are different, so that the doping regions with different layer structures are formed.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a manufacturing method of an image sensor and an image sensor. Background Art

[0002] Image sensors refer to devices that convert optical images into pixel signal outputs. They are divided into charge-coupled device (CCD) image sensors and complementary metal-oxide-semiconductor (CMOS) image sensors according to the different photosensitive elements and photosensitive principles. Among them, complementary metal-oxide-semiconductor image sensors, as a widely used image sensor, include front side illumination (FSI) image sensors and back side illumination (BSI) image sensors. In the existing manufacturing method of back side illumination image sensors, high energy ion implantation (IMP) is used in the front end of line (FEOL) to form photodiodes (PDs), which will cause damage to the substrate and thus aggravate the crosstalk effect of the image sensor. Summary of the invention

[0003] In view of the above problems, the present application provides a method for manufacturing an image sensor and an image sensor, which adopts a diffusion process to form a doped region in a photodiode region to avoid the adverse effects caused by the use of high-energy ion implantation.

[0004] According to one aspect of the present invention, there is provided a method for manufacturing an image sensor, comprising: forming a first stacked structure on the surface of a substrate; forming a deep trench isolation structure in the first stacked structure to isolate the first stacked structure to form a plurality of photodiode regions; and forming a plurality of doping regions in the photodiode regions; wherein doping elements diffuse from the surface of the photodiode region to the interior thereof to form a plurality of doping regions, and the plurality of doping regions extend from the surface of the photodiode region to the interior thereof, and different doping regions have different extension depths, thereby forming doping regions with different layer structures.

[0005] Optionally, a doped region is formed in the photodiode area, including: forming a third stacked structure on the surface of the photodiode area, the third stacked structure including a plurality of doped semiconductor material layers; and performing laser annealing on the third stacked structure to diffuse the doped elements in the plurality of doped semiconductor material layers into the first stacked structure to form a doped region; wherein, through the same laser annealing step, the doped elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doped regions with different layer structures.

[0006] Optionally, a plurality of doped semiconductor material layers are sequentially formed on the substrate by an epitaxial deposition process to form a first stacked structure, and the doping type of the doped region is the same as the doping type of the first stacked structure.

[0007] Optionally, before forming the first stacked structure on the surface of the substrate, the method also includes: forming a shallow trench isolation structure extending from the first surface of the substrate to the interior thereof; performing ion implantation from the first surface of the substrate to the interior thereof to form a barrier layer in the substrate, wherein the barrier layer separates the substrate into a first portion located on one side of the barrier layer and a second portion located on the other side of the barrier layer, wherein the shallow trench isolation structure is located in the first portion; and removing the second portion of the substrate to expose the surface of the barrier layer; the first stacked structure is located on the surface of the barrier layer.

[0008] Optionally, a doping type of the barrier layer is opposite to a doping type of the first stacked structure.

[0009] Optionally, the method for forming a deep trench isolation structure in a first stacked structure includes: forming a deep trench penetrating the first stacked structure, the deep trench exposing the surface of the barrier layer; and using an epitaxial deposition process to form an isolation medium filling the deep trench to form a deep trench isolation structure; the isolation medium filling the deep trench is in contact with the barrier layer.

[0010] Optionally, the isolation medium of the deep trench isolation structure is a doped semiconductor layer, and the doping type of the isolation medium of the deep trench isolation structure is opposite to the doping type of the first stacked structure.

[0011] According to another aspect of the present invention, there is provided an image sensor, comprising: a substrate; a first stacked structure located on the substrate; a deep trench isolation structure penetrating the first stacked structure, wherein the deep trench structure isolates the first stacked structure to form a plurality of photodiode regions; and a plurality of doped regions located in the photodiode regions, wherein doping elements diffuse from the surface of the photodiode region to the interior thereof to form a plurality of doped regions, and the plurality of doped regions extend from the surface of the photodiode region to the interior thereof, and different doped regions have different extension depths, thereby forming doped regions with different layer structures.

[0012] Optionally, the first stacked structure includes a plurality of doped semiconductor material layers, and the doping type of the doping region is the same as the doping type of the first stacked structure.

[0013] Optionally, it also includes a barrier layer, which is located on the substrate, and the first stacked structure is located on the barrier layer; the deep trench isolation structure penetrates the first stacked structure and contacts the barrier layer; the deep trench isolation structure and the barrier layer both use doped semiconductor material layers, and the doping types of the deep trench isolation structure and the barrier layer are opposite to the doping type of the first stacked structure.

[0014] The unexpected technical effects of this application are:

[0015] According to the manufacturing method of the image sensor provided in the present application, a plurality of doping regions are formed in the photodiode region by adopting a diffusion process instead of an ion implantation process, thereby avoiding the problems of substrate damage and aggravated crosstalk caused by the ion implantation process.

[0016] Furthermore, a third stacked structure including a plurality of doped semiconductor material layers is formed on the surface of the photodiode region, and the third stacked structure is subjected to laser annealing treatment so that the doping elements in the plurality of doped semiconductor material layers diffuse into the first stacked structure to form a doped region; wherein, through the same laser annealing step, the doping elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doped regions with different layer structures, which increases the number of photogenerated carriers (Quantum e-) in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region; and at the same time, since the formation of doped regions with different layer structures can be completed by only one laser annealing process, the cost of forming doped regions with different layer structures is reduced.

[0017] Furthermore, the manufacturing method of the image sensor provided in the present application forms the first stacked structure through an epitaxial deposition process, and also does not use an ion implantation process, thereby avoiding the problems of substrate damage and aggravated crosstalk caused by the ion implantation process.

[0018] In the embodiment of the present application, the photodiode region is formed by multiple different semiconductor material layers, and a plurality of doping regions stacked sequentially from the outside to the inside are added in the photodiode region. This structure increases the number of photogenerated carriers in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region. This enables the image sensor to capture more photons under lower light conditions, further making the image sensor suitable for low light conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings, in which:

[0020] Figure 1 A schematic cross-sectional view of a conventional back-illuminated image sensor is shown;

[0021] Figure 2 A schematic diagram of an image sensor provided according to an embodiment of the present application is shown;

[0022] Figure 3 A flow chart showing a method for manufacturing an image sensor according to an embodiment of the present application;

[0023] Figures 4a to 4j is a schematic diagram of each step of an exemplary method for manufacturing an image sensor provided in an embodiment of the present application, wherein:

[0024] Figure 4a A schematic cross-sectional view showing a shallow trench isolation structure extending from a first surface of a substrate to the inside thereof and a barrier layer formed in the substrate in an embodiment of the present application;

[0025] Figure 4b A schematic diagram showing the removal of the second portion of the substrate to expose the surface of the barrier layer in an embodiment of the present application;

[0026] Figure 4c A schematic diagram showing a first stacked structure formed in an embodiment of the present application;

[0027] Figure 4d A schematic diagram showing a process of forming a deep trench in a first stacked structure in an embodiment of the present application;

[0028] Figure 4e A schematic diagram showing filling a deep trench to form a deep trench isolation structure in an embodiment of the present application is shown;

[0029] Figure 4f A schematic diagram showing a grid structure formed on the surface of a deep trench isolation structure in an embodiment of the present application;

[0030] Figure 4gA schematic diagram showing a third stacked structure formed in a photodiode region in an embodiment of the present application;

[0031] Figure 4h A schematic diagram showing how to form doping regions with different layer structures in an embodiment of the present application;

[0032] Figure 4i A schematic diagram showing the removal of the third stacked structure in an embodiment of the present application;

[0033] Figure 4j A schematic diagram showing the formation of an isolation dielectric layer and a filter element in an embodiment of the present application is shown.

[0034] Description of reference numerals: 210-semiconductor layer; 211-substrate; 212-barrier layer; 213-first stacked structure; 2131-first semiconductor material layer; 2132-second semiconductor material layer; 2133-third semiconductor material layer; 2134-fourth semiconductor material layer; 220-shallow trench isolation structure; 230-deep trench isolation structure; 230a-deep trench; 241-first dielectric layer; 242-second dielectric layer; 243-pad; 244-connection structure; 245-polysilicon structure; 250-mask material layer; 251-polysilicon structure; 252-polysilicon structure; 253-polysilicon structure; 254-polysilicon structure; 255-polysilicon structure; 256-polysilicon structure; 257-polysilicon structure; 258-polysilicon structure; 259-polysilicon structure; 260-polysilicon structure; 261-polysilicon structure; 262-polysilicon structure; 263-polysilicon structure; 264-polysilicon structure; 265-polysilicon structure; 266-polysilicon structure; 267-polysilicon structure; 268-polysilicon structure; 269-polysilicon structure; 270-polysilicon structure; 271-polysilicon structure; 272-polysilicon structure; 273-polysilicon structure; 274-polysilicon structure; 275-polysilicon structure; 276-polysilicon structure; 277-polysilicon structure; 278-polysilicon structure; 279-polysilicon structure; 280-polysilicon structure; 281-polysilicon structure; 282-polysilicon structure; 283-polysilicon structure; 2 1-first mask layer; 252-second mask layer; 253-third mask layer; 254-fourth mask layer; 260-grid structure; 261-dielectric layer; 262-high-k dielectric layer; 263-protective layer; 264-metal layer; 270-third stacked structure; 271-first doped semiconductor material layer; 272-second doped semiconductor material layer; 281-first layer doped region; 282-second layer doped region; 291-isolation dielectric layer; 292a-blue filter element; 292b-green filter element; 292c-red filter element. DETAILED DESCRIPTION

[0035] The present application will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0036] This application may be presented in a variety of forms, some examples of which are described below.

[0037] Figure 1 FIG. 4 shows an existing back-illuminated image sensor. Figure 1As shown, the back-illuminated image sensor includes a substrate 211, in which a plurality of photodiode regions and a deep trench isolation (DTI) structure 230 and a shallow trench isolation (STI) structure 220 for separating adjacent photodiode regions are arranged, the shallow trench isolation structure 220 extends from the first surface of the substrate 211 to the inside thereof, and the deep trench isolation structure 230 extends from the second surface of the substrate 211 to the inside thereof, wherein the first surface and the second surface of the substrate 211 are opposite to each other. A stacked first dielectric layer 241 and a second dielectric layer 242 are formed on the first surface of the substrate 211, wherein the first dielectric layer 241 is located on the first surface of the substrate 211, and the second dielectric layer 242 is located on the surface of the first dielectric layer 241 away from the substrate 211. A pad 243 is provided on the surface of the second dielectric layer 242 away from the first dielectric layer 241. The pad 243 is connected to the polysilicon structure 245 provided in the first dielectric layer 241 through a connection structure 244 provided in the second dielectric layer 242. The material used for the pad 243 is, for example, copper (Cu). A mask material layer 250 is formed on the second surface of the substrate 211. A grid structure 260 formed by stacking different materials is provided on the surface of the mask material layer 250. The mask material layer 250 includes a first mask layer 251, a second mask layer 252, a third mask layer 253 and a fourth mask layer 254. The materials used for the first mask layer 251 and the fourth mask layer 254 may be silicon oxide (SiO2), the material used for the second mask layer 252 may be aluminum oxide (Al2O3), and the material used for the third mask layer 253 may be tantalum oxide (Ta2O5). The material used for the substrate 211 is, for example, silicon (Si) with a thickness of 3 um. The thickness of the first mask layer 251 can be 120 angstroms, the thickness of the second mask layer 252 can be 75 angstroms, the thickness of the third mask layer 253 can be 520 angstroms, and the thickness of the fourth mask layer 254 can be 1800 angstroms.

[0038] In the conventional method of manufacturing a back-illuminated image sensor, the photodiode region is as follows: Figure 1 As shown, it is formed by injecting ions from the first surface of the substrate 211 into the substrate 211 in the front-end process. Since the photodiode region extends from the second surface of the substrate 211 to the inside thereof and is a certain distance away from the first surface of the substrate 211, high-energy ions need to be injected from the first surface of the substrate 211 into the substrate 211. However, the high-energy ion injection is bound to damage the substrate 211 and thus aggravate the signal crosstalk problem between the photodiode regions.

[0039] In view of this, one embodiment of the present application provides an image sensor. Figure 2A schematic diagram of an image sensor provided according to an embodiment of the present application is shown, Figure 2 As shown, the image sensor includes a semiconductor layer 210 , a shallow trench isolation structure 220 extending from a first surface of the semiconductor layer 210 toward the inside thereof, and a deep trench isolation structure 230 extending from a second surface of the semiconductor layer 210 toward the inside thereof.

[0040] The semiconductor layer 210 includes, from bottom to top, a stacked substrate 211, a barrier layer 212, and a first stacked structure 213. The shallow trench isolation structure 220 extends from the surface of the substrate 211 away from the barrier layer 212 (i.e., the first surface of the semiconductor layer 210) toward the inside of the substrate 211 until it extends to the surface of the barrier layer 212 close to the substrate 211, i.e., the shallow trench isolation structure 220 penetrates the substrate 211 and reaches the surface of the barrier layer 212 close to the substrate 211. The deep trench isolation structure 230 extends from the surface of the first stacked structure 213 (i.e., the second surface of the semiconductor layer 210) toward the inside of the first stacked structure 213 until it extends to the surface of the barrier layer 212 close to the first stacked structure 213, i.e., the deep trench isolation structure 230 penetrates the first stacked structure 213 and reaches the surface of the barrier layer 212 close to the first stacked structure 213. Among them, the first stacked structure 213 is isolated by the deep trench isolation structure 230 and the shallow trench isolation structure 220 to form a plurality of photodiode regions, and the barrier layer 212 and the shallow trench isolation structure 220 and the deep trench isolation structure 230 are combined to achieve better isolation of adjacent photodiode regions, thereby reducing the crosstalk effect of the image sensor. It should be noted that the embodiment of the present application is to manufacture a back-illuminated image sensor, which allows light to enter the pixel area through the back side, so the second surface side of the semiconductor layer 210 corresponds to the back side of the image sensor formed subsequently.

[0041] In this embodiment, the material used for the substrate 211 is, for example, silicon (Si). The first stacked structure 213 includes a plurality of semiconductor material layers, which may be a plurality of semiconductor material layers formed by doping different elements in silicon material, that is, the doping elements of any two semiconductor material layers in the plurality of semiconductor material layers are different, or may be a plurality of semiconductor material layers formed by doping the same element in silicon material at different concentrations, that is, the doping concentrations of any two semiconductor material layers in the plurality of semiconductor material layers are different. It should be understood that the first stacked structure 213 is used to form a photodiode region, so although different elements may be doped in different semiconductor material layers, the plurality of semiconductor material layers have the same doping type, for example, the elements doped in the silicon material may be phosphorus, arsenic, antimony of group V, and other suitable elements known to those skilled in the art. In one embodiment, a first semiconductor material layer 2131, a second semiconductor material layer 2132, a third semiconductor material layer 2133 and a fourth semiconductor material layer 2134 are sequentially deposited onto the surface of the barrier layer 212 to form a first stacked structure 213, wherein the first semiconductor material layer 2131 is a silicon material doped with phosphorus (P), the second semiconductor material layer 2132 is a silicon material doped with arsenic (As), the third semiconductor material layer 2133 is a silicon material doped with phosphorus (P), and the fourth semiconductor material layer 2134 is a silicon material doped with antimony (Sb).

[0042] Furthermore, in this embodiment, the barrier layer 212 and the deep trench isolation structure 230 are formed of doped semiconductor materials, and the doping type of the two is opposite to the doping type of the first stacked structure 213, so as to achieve isolation of the photodiode region. It should be understood that the barrier layer 212 and the deep trench isolation structure 230 are used for isolation of the photodiode region, so the elements doped in the silicon material can be boron (B) and gallium (Ga) of group III, and other suitable elements known to those skilled in the art. In one embodiment, the barrier layer 212 and the deep trench isolation structure 230 are silicon materials doped with gallium (Ga).

[0043] Furthermore, a plurality of doping regions are provided in the photodiode region, and the plurality of doping regions are formed by doping different elements into the photodiode region, or by doping the same element with different concentrations into the photodiode region. The doping type of the plurality of doping regions is the same as the doping type of the first stacked structure 213. In one embodiment, phosphorus (P) element and bismuth (Bi) element are sequentially doped into the photodiode region to form a first layer doping region 281 and a second layer doping region 282, respectively.

[0044] Furthermore, a plurality of doping regions extend from the surface of the photodiode region to the inside thereof, and each doping region has different lateral extension widths and longitudinal extension depths in the photodiode region, so as to form a plurality of doping regions stacked sequentially from the outside to the inside. For example, the lateral extension width of the first layer doping region 281 is greater than the lateral extension width of the second layer doping region 282, the longitudinal extension depth of the first layer doping region 281 is greater than the longitudinal extension depth of the second layer doping region 282, and the first layer doping region 281 surrounds the second layer doping region 282, forming a structure stacked sequentially from the outside to the inside.

[0045] Further, a dielectric stack consisting of a first dielectric layer 241 and a second dielectric layer 242 is formed on the first surface of the semiconductor layer 210. The first dielectric layer 241 is located on the first surface of the semiconductor layer 210, and the second dielectric layer 242 is located on the surface of the first dielectric layer 241 away from the semiconductor layer 210. A grid structure 260 and a filter element are formed on the second surface of the semiconductor layer 210. The grid structure 260 is located on the deep trench isolation structure 230, exposing the photodiode region and the first layer doping region 281 and the second layer doping region 282 in the photodiode region. The grid structure 260 can be as follows: Figure 2 As shown, from bottom to top, it includes a dielectric layer 261, a high-k dielectric layer 262, a protective layer 263, and a metal layer 264, wherein the dielectric layer 261 is made of, for example, silicon dioxide (SiO2), the high-k dielectric layer 262 is made of, for example, hafnium dioxide (HfO2) with a high dielectric constant (k), the protective layer 263 is made of, for example, titanium nitride (TiN), and the metal layer 264 is made of, for example, tungsten (W). The filter element is located on the surface of the photodiode region between the grid structures, and is isolated from the photodiode region and the first doped region 281 and the second doped region 282 in the photodiode region via an isolation dielectric layer 291. The filter element may include, for example, Figure 2 The blue filter element 292a, the green filter element 292b and the red filter element 292c are shown. It should be noted that the filter element includes a color filter and a micro lens located on the surface of the color filter. Since the surface of the micro lens is convex, Figure 2 The blue filter element 292a, the green filter element 292b and the red filter element 292c are all in a convex shape.

[0046] In the embodiment of the present application, the photodiode region is formed by multiple different semiconductor material layers, and multiple doping regions stacked sequentially from the outside to the inside are added in the photodiode region. This structure increases the number of photogenerated carriers (Quantum e-) in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region, which enables the image sensor to capture more photons under lower light conditions, further making the photosensor suitable for low light conditions.

[0047] Corresponding to the image sensor provided in the above embodiment, another embodiment of the present application further provides a method for manufacturing an image sensor. Figure 3 A flowchart showing a method for manufacturing an image sensor according to an embodiment of the present application is shown. Figure 3 , the manufacturing method comprises:

[0048] Step S110, forming a first stacked structure on the surface of the substrate, the first stacked structure comprising a plurality of stacked layers of different semiconductor materials;

[0049] Step S120, forming a deep trench isolation structure in the first stacked structure to isolate the first stacked structure to form a plurality of photodiode regions; and

[0050] Step S130, forming a doped region in the photodiode region;

[0051] Among them, the doping elements diffuse from the surface of the photodiode area to the inside thereof to form multiple doping regions, and the multiple doping regions extend from the surface of the photodiode area to the inside thereof, and different doping regions have different extension depths, forming doping regions with different layer structures.

[0052] Specifically, the multiple different semiconductor material layers included in the first stacked structure can be multiple semiconductor material layers formed by doping different elements in silicon material, that is, the doping elements of any two semiconductor material layers in the multiple semiconductor material layers are different; or multiple semiconductor material layers can be formed by doping the same element in different concentrations in silicon material, that is, the doping concentrations of any two semiconductor material layers in the multiple semiconductor material layers are different. The first stacked structure is used to form a photodiode region. Therefore, although different elements can be doped in different semiconductor material layers, the multiple semiconductor material layers have the same doping type. For example, the elements doped in the silicon material can be phosphorus, arsenic, antimony of group V, and other suitable elements known to those skilled in the art. The multiple doping regions can be multiple doping regions formed by doping different elements in the photodiode region, that is, the doping elements of any two doping regions in the multiple doping regions are different; or multiple doping regions formed by doping the same element in different concentrations in the photodiode region, that is, the doping concentrations of any two doping regions in the multiple doping regions are different. And the doping type of the photodiode region is the same as the doping type of the doping region.

[0053] In the process of forming multiple photodiode regions and multiple doping regions in the embodiment of the present application, no ion implantation process is used, thereby avoiding the problems of substrate damage and aggravated crosstalk caused by the ion implantation process.

[0054] Figures 4a to 4j 1 is a schematic diagram of each step of an exemplary method for manufacturing an image sensor provided in an embodiment of the present application. The image sensor needs to manufacture three different photodiodes, and the first stacked structure is correspondingly divided into three regions. Figure 3 as well as Figures 4a to 4j The manufacturing method of the image sensor provided in the embodiment of the present application is described in detail.

[0055] In step S110, a first stacked structure 213 is formed on a substrate 211, such as Figures 4a to 4c shown.

[0056] like Figure 4a As shown, before forming the first stacked structure 213, it also includes the steps of forming a shallow trench isolation structure 220 extending from the first surface of the substrate 211 to the interior thereof, forming a dielectric stack on the first surface of the substrate 211, and performing ion implantation on the second surface of the substrate 211 to form a barrier layer 212 in the substrate 211, wherein the first surface and the second surface of the substrate 211 are opposite to each other.

[0057] Specifically, forming the shallow trench isolation structure 220 includes: using a photolithography process to form a patterned mask layer on the first surface of the substrate 211, etching the substrate 211 through the patterned mask layer to form a shallow trench in the substrate 211 extending from the first surface of the substrate 211 to the interior thereof, and filling an isolation medium into the shallow trench to form the shallow trench isolation structure 220.

[0058] Next, a dielectric stack consisting of a first dielectric layer 241 and a second dielectric layer 242 is formed on the first surface of the substrate 211 , wherein the first dielectric layer 241 is located on the first surface of the semiconductor layer 210 , and the second dielectric layer 242 is located on the surface of the first dielectric layer 241 away from the substrate 211 .

[0059] Further, a barrier layer 212 is formed by ion implantation into the second surface of the substrate 211, and the doping type of the barrier layer 212 is opposite to the doping type of the first stacked structure 213 formed subsequently. In one embodiment, the implanted ions are, for example, gallium (Ga) ions. The barrier layer 212 is formed on the surface of the shallow trench isolation structure 220 in the substrate 211, and is used to combine with the shallow trench isolation structure 220 and the deep trench isolation structure formed subsequently above the barrier layer 212 to achieve better isolation of adjacent photodiode regions, thereby reducing the crosstalk effect of the image sensor. It should be noted that the embodiment of the present application is to manufacture a back-illuminated image sensor, which allows light to enter the pixel area through the back side, so the second surface side of the substrate 211 corresponds to the back side of the image sensor formed subsequently. The barrier layer 212 has a blanket structure, which divides the substrate 211 into a first part located below the barrier layer 212 and a second part located above the barrier layer 212, and the shallow trench isolation structure 220 is located in the first part.

[0060] like Figure 4b As shown, the second portion of the substrate 211 is removed to expose the surface of the barrier layer 212. The second portion may be removed by chemical mechanical polishing (CMP), so that the surface of the exposed barrier layer 212 is flattened while the second portion is removed, thereby providing a high-quality substrate for the subsequent fabrication of the first stacked structure 213.

[0061] like Figure 4c As shown, a first stacked structure 213 is formed. The first stacked structure 213 may be formed by sequentially depositing a plurality of different semiconductor material layers onto the surface of the barrier layer 212, and the deposition process may be, for example, an epitaxial deposition process. Figure 4c As shown, the first semiconductor material layer 2131, the second semiconductor material layer 2132, the third semiconductor material layer 2133 and the fourth semiconductor material layer 2134 are sequentially deposited on the surface of the barrier layer 212 to form a first stacked structure 213. Among them, the first semiconductor material layer 2131 of the first stacked structure 213 is a silicon material doped with phosphorus (P), the second semiconductor material layer 2132 is a silicon material doped with arsenic (As), the third semiconductor material layer 2133 is a silicon material doped with phosphorus (P), and the fourth semiconductor material layer 2134 is a silicon material doped with antimony (Sb).

[0062] In step S120, a deep trench isolation structure 230 is formed in the first stacked structure 213 to isolate the first stacked structure 213 to form a plurality of photodiode regions; Figure 4d and Figure 4e shown.

[0063] Specifically, Figure 4d As shown, a deep trench 230a is formed in the first stacked structure 213. This step includes forming a mask layer on the surface of the first stacked structure 213; patterning the mask layer on the first stacked structure 213, and etching the first stacked structure 213 using the formed patterned mask layer as a mask to form the deep trench 230a.

[0064] It should be noted that the deep trench isolation structure 230 is to be combined with the shallow trench isolation structure 220 described above for isolation of adjacent photodiode regions, and thus the deep trench 230a formed in this step has a one-to-one correspondence in position with the shallow trench isolation structure 220. In order to distinguish it from the shallow trench isolation structure 220 described above, the deep trench isolation structure 230 is also referred to as the deep trench isolation structure 230 because it generally has a height greater than that of the shallow trench isolation structure 220.

[0065] Specifically, the patterning process of the mask layer causes the position on the mask layer corresponding to the deep groove 230a to be removed to form an opening area, and the opening area is used to subsequently etch the first stack structure 213 to form the deep groove 230a. In one embodiment, the etching of the first stack structure 213 can adopt a dry etching process, which is beneficial to ensure the accuracy of the deep trench isolation structure 230 subsequently manufactured.

[0066] like Figure 4e As shown, the deep trench 230a is filled to form a deep trench isolation structure 230, and the isolation dielectric filling the deep trench 230a is in contact with the barrier layer 212. In this embodiment, the material filled in the deep trench 230a is, for example, the same as the material of the barrier layer 212, and the isolation dielectric in the deep trench 230a can be deposited by epitaxy. The doping type of the isolation dielectric of the deep trench isolation structure 230 is opposite to the doping type of the first stacked structure 213.

[0067] Furthermore, after the deep trench 230a is filled to form the deep trench isolation structure 230, the process may further include: performing a surface planarization process on the deep trench isolation structure 230 and the first stacked structure 213, which is intended to provide a high-quality manufacturing substrate for the subsequent formation of the grid structure 260.

[0068] Through the above steps, a semiconductor layer 210, a shallow trench isolation structure 220, a deep trench isolation structure 230 and a photodiode region are formed, and the semiconductor layer 210 includes a substrate 211, a barrier layer 212 and a first stacked structure 213 stacked in sequence from bottom to top. The surface of the substrate 211 away from the barrier layer 212 constitutes the first surface of the semiconductor layer 210, and the surface of the first stacked structure 213 away from the barrier layer 212 constitutes the second surface of the semiconductor layer 210. The shallow trench isolation structure 220 extends from the surface of the substrate 211 away from the barrier layer 212 (i.e., the first surface of the semiconductor layer 210) toward the inside of the substrate 211 until it extends to the surface of the barrier layer 212 close to the substrate 211, that is, the shallow trench isolation structure 220 penetrates the substrate 211 and reaches the surface of the barrier layer 212 close to the substrate 211. The deep trench isolation structure 230 extends from the surface of the first stacked structure 213 (i.e., the second surface of the semiconductor layer 210) toward the inside of the first stacked structure 213 until it reaches the surface of the barrier layer 212 close to the first stacked structure 213, i.e., the deep trench isolation structure 230 penetrates the first stacked structure 213 and reaches the surface of the barrier layer 212 close to the first stacked structure 213. The first stacked structure 213 is isolated by the deep trench isolation structure 230 and the shallow trench isolation structure 220 to form a plurality of photodiode regions. The barrier layer 212, the shallow trench isolation structure 220, and the deep trench isolation structure 230 are combined to achieve better isolation of adjacent photodiode regions, thereby reducing the crosstalk effect of the image sensor.

[0069] After step S120, the process further includes forming a grid structure 260 on the surface of the deep trench isolation structure 230. Figure 4f shown.

[0070] Specifically, forming the grid structure 260 includes: forming a second stacked structure on the surface of the first stacked structure 213 and the surface of the deep trench isolation structure 230; and etching the second stacked structure until the first stacked structure 213 is exposed, so that the retained portion of the second stacked structure forms the grid structure 260 located on the surface of the deep trench isolation structure 230. Since the grid structure 260 is formed by a multi-layer structure, it can reduce the generation of dark current and improve the product yield. The grid structure 260 can be as follows Figure 4f As shown, from bottom to top, it includes a dielectric layer 261, a high-k dielectric layer 262, a protective layer 263 and a metal layer 264, wherein the material used by the dielectric layer 261 is, for example, silicon dioxide (SiO2), the material used by the high-k dielectric layer 262 is, for example, hafnium dioxide (HfO2) with a high dielectric constant (k), the material used by the protective layer 263 is, for example, titanium nitride (TiN), and the material used by the metal layer 264 is, for example, tungsten (W).

[0071] In step S130, a doped region is formed in the photodiode region, such as Figure 4g to Figure 4hshown.

[0072] Specifically, Figure 4g As shown, a third stacked structure 270 is formed in the photodiode region. The third stacked structure 270 may be formed by sequentially depositing a plurality of doped semiconductor material layers onto the surface of the first stacked structure 213, and the deposition process may be, for example, epitaxial deposition. Figure 4g As shown, the first doped semiconductor material layer 271 and the second doped semiconductor material layer 272 are sequentially deposited on the surface of the first stacked structure 213 to form a third stacked structure 270, wherein the first doped semiconductor material layer 271 is a silicon material doped with phosphorus (P), and the second doped semiconductor material layer 272 is a silicon material doped with bismuth (Bi). It should be noted that the number of layers of the third stacked structure 270 is consistent with the number of layers of the doped region to be formed subsequently. Figure 4g Only the first doped semiconductor material layer 271 and the second doped semiconductor material layer 272 are shown, but it should be known that those skilled in the art can set the number of layers of the third stacked structure 270 as needed, and can set the doping element of each doped semiconductor material layer as needed. Further, the third stacked structure 270 needs to have the same doping type as the photodiode region formed by the first stacked structure 213.

[0073] Furthermore, if Figure 4h As shown, the third stacked structure 270 is subjected to laser annealing, and the laser annealing process causes the doping elements in the third stacked structure 270 to diffuse into the first stacked structure 213 to form doping regions with different layer structures. In one embodiment, the energy of the laser annealing is, for example, 30 mj, and the laser annealing time is, for example, 10 ms to 20 ms.

[0074] Specifically, during the laser annealing process, the first doped semiconductor material layer 271 is closer to the first stacked structure 213 than the second doped semiconductor material layer 272. When the first doped semiconductor material layer 271 and the second doped semiconductor material layer 272 are laser annealed at the same time, the doping elements in the first doped semiconductor material layer 271 diffuse to a deeper depth in the first stacked structure 213, while the doping elements in the second doped semiconductor material layer 272 diffuse to a relatively shallower depth in the first stacked structure 213, thereby forming a diffusion region with different layer structures. For example, the doping element phosphorus (P) in the first doped semiconductor material layer 271 diffuses into the first stacked structure 213 to form a first layer doping region 281, and the doping element bismuth (Bi) in the second doped semiconductor material layer 272 diffuses into the first stacked structure 213 to form a second layer doping region 282, and the first layer doping region 281 and the second layer doping region 282 are stacked in sequence from the outside to the inside.

[0075] In the embodiment of the present application, the photodiode region is formed by a deposition process, and the doping region is formed by a diffusion process. No ion implantation process is used in the process of forming the photodiode region and the doping region, thereby avoiding the problems of substrate damage and increased crosstalk caused by the ion implantation process.

[0076] Furthermore, since the formation of the doping regions with different layer structures can be completed through only one laser annealing process, the cost of forming the doping regions with different layer structures is reduced.

[0077] Furthermore, if Figure 4i As shown, after the first layer doping region 281 and the second layer doping region 282 are formed, the third stacked structure 270 is removed.

[0078] Furthermore, if Figure 4j As shown, after forming the first doping region 281 and the second doping region 282, the method for manufacturing the image sensor provided by the embodiment of the present application may further include: forming an isolation dielectric layer 291 on the surface of the photodiode region and forming a filter element located on the surface of the isolation dielectric layer 291 between the grid structures. The filter element may include Figure 4j The blue filter element 292a, the green filter element 292b and the red filter element 292c are shown. It should be noted that the filter element includes a color filter and a micro lens located on the surface of the color filter. Since the surface of the micro lens is convex, Figure 4j The blue filter element 292a, the green filter element 292b and the red filter element 292c are all in a convex shape.

[0079] The unexpected technical effects of this application are:

[0080] According to the manufacturing method of the image sensor provided in the present application, a plurality of doping regions are formed in the photodiode region by adopting a diffusion process instead of an ion implantation process, thereby avoiding the problems of substrate damage and aggravated crosstalk caused by the ion implantation process.

[0081] Furthermore, a third stacked structure including a plurality of doped semiconductor material layers is formed on the surface of the photodiode region, and the third stacked structure is subjected to laser annealing treatment so that the doping elements in the plurality of doped semiconductor material layers diffuse into the first stacked structure to form a doped region; wherein, through the same laser annealing step, the doping elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doped regions with different layer structures, which increases the number of photogenerated carriers (Quantum e-) in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region; and at the same time, since the formation of doped regions with different layer structures can be completed by only one laser annealing process, the cost of forming doped regions with different layer structures is reduced.

[0082] Furthermore, the manufacturing method of the image sensor provided in the present application forms the first stacked structure through an epitaxial deposition process, and also does not use an ion implantation process, thereby avoiding the problems of substrate damage and aggravated crosstalk caused by the ion implantation process.

[0083] In the embodiment of the present application, the photodiode region is formed by multiple different semiconductor material layers, and a plurality of doping regions stacked sequentially from the outside to the inside are added in the photodiode region. This structure increases the number of photogenerated carriers in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region. This enables the image sensor to capture more photons under lower light conditions, further making the image sensor suitable for low light conditions.

[0084] The embodiments of the present application are described above, and these embodiments do not describe all the details in detail, nor do they limit the application to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can make good use of the present application and the modifications based on the present application. The present application is only limited by the claims and their full scope and equivalents.

Claims

1. A method for manufacturing an image sensor, characterized in that: include: forming a first stacked structure on a surface of a substrate; forming a deep trench isolation structure in the first stacked structure to isolate the first stacked structure to form a plurality of photodiode regions; as well as forming a plurality of doped regions in the photodiode region; Among them, the doping elements diffuse from the surface of the photodiode area to the inside thereof to form multiple doping regions, and the multiple doping regions extend from the surface of the photodiode area to the inside thereof, and different doping regions have different extension depths, forming doping regions with different layer structures.

2. The manufacturing method according to claim 1, characterized in that: A doped region is formed in the photodiode region, including: forming a third stacked structure on the surface of the photodiode region, wherein the third stacked structure includes a plurality of doped semiconductor material layers; and Performing laser annealing on the third stacked structure so that the doping elements in the plurality of doped semiconductor material layers diffuse into the first stacked structure to form a doped region; Wherein, through the same laser annealing step, the doping elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doping regions with different layer structures.

3. The manufacturing method according to claim 2, characterized in that: A plurality of doped semiconductor material layers are sequentially formed on the substrate by using an epitaxial deposition process to form a first stacked structure, and the doping type of the doped region is the same as the doping type of the first stacked structure.

4. The manufacturing method according to claim 3, characterized in that: Before forming the first stacked structure on the surface of the substrate, the method further includes: forming a shallow trench isolation structure in the substrate extending from the first surface thereof to the interior thereof; Performing ion implantation from a first surface of the substrate into the interior of the substrate to form a barrier layer in the substrate, wherein the barrier layer separates the substrate into a first portion located on one side of the barrier layer and a second portion located on the other side of the barrier layer, wherein the shallow trench isolation structure is located in the first portion; and removing a second portion of the substrate to expose a surface of the barrier layer; The first stacked structure is located on the surface of the barrier layer.

5. The manufacturing method according to claim 4, characterized in that: The doping type of the barrier layer is opposite to the doping type of the first stacked structure.

6. The manufacturing method according to claim 4, characterized in that: The method of forming a deep trench isolation structure in a first stacked structure includes: forming a deep trench penetrating the first stacked structure, wherein the deep trench exposes a surface of the barrier layer; and An isolation medium filling the deep trench is formed by an epitaxial deposition process to form a deep trench isolation structure; An isolation dielectric filling the deep trench contacts the barrier layer.

7. The manufacturing method according to claim 6, characterized in that: The isolation medium of the deep trench isolation structure is a doped semiconductor layer, and the doping type of the isolation medium of the deep trench isolation structure is opposite to the doping type of the first stacked structure.

8. An image sensor, characterized in that: include: substrate; a first stacked structure located on the substrate; A deep trench isolation structure penetrating the first stacked structure, wherein the deep trench structure isolates the first stacked structure to form a plurality of photodiode regions; as well as Multiple doping regions are located in the photodiode area, wherein doping elements diffuse from the surface of the photodiode area to the interior thereof to form multiple doping regions, and multiple doping regions extend from the surface of the photodiode area to the interior thereof, and different doping regions have different extension depths, forming doping regions with different layer structures.

9. The image sensor according to claim 8, characterized in that: The first stacked structure includes a plurality of doped semiconductor material layers, and the doping type of the doped region is the same as the doping type of the first stacked structure.

10. The image sensor according to claim 8, characterized in that It also includes a barrier layer, the barrier layer is located on the substrate, and the first stacked structure is located on the barrier layer; The deep trench isolation structure penetrates the first stacked structure and contacts the barrier layer; The deep trench isolation structure and the barrier layer are both made of doped semiconductor material layers, and the doping types of the deep trench isolation structure and the barrier layer are opposite to the doping type of the first stacked structure.

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