Semiconductor device

Abstract

The semiconductor device includes: a main substrate having a first main metal layer; a first semiconductor element supported on the main substrate; a first sub-substrate supported on the main substrate; and a sealing resin covering the first semiconductor element. The first sub-substrate has a sub-insulating layer, and a first sub-metal layer and a second sub-metal layer disposed across the sub-insulating layer in the thickness direction. The second sub-metal layer is conductively bonded to the first main metal layer, the first sub-metal layer including a region. The first sub-substrate further includes a connection conductive portion that connects the region and the second sub-metal layer.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device. Background Art

[0002] In the past, a semiconductor device having power switching elements such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and IGBT (Insulated Gate Bipolar Transistor) is known. Such semiconductor devices are mounted on all electronic devices from industrial equipment to home appliances, information terminals, and automotive equipment. Patent document 1 discloses a conventional semiconductor device (power module). The semiconductor device described in patent document 1 comprises a semiconductor element, a main substrate, and a substrate. The main substrate has a metal layer. The semiconductor element is conductively bonded to the metal layer. The sub-substrate is supported on the main substrate. In addition, the semiconductor device described in patent document 1 comprises a supporting substrate (ceramic substrate). The supporting substrate supports the semiconductor element. The supporting substrate includes an insulating substrate and a conductor layer stacked on both sides of the substrate. The substrate is made of, for example, ceramic. Each conductor layer is made of, for example, Cu (copper), and a semiconductor element is bonded to one of the conductor layers. The electrical connection between the semiconductor element and the conductor layer uses a metal wire made of, for example, Al.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-190505 Summary of the invention

[0006] Problems to be solved by the invention

[0007] When the potential of the metal layer of the main substrate is monitored from the outside, it is necessary to connect a metal wire to the metal layer, which limits the structure of the conduction path. In addition, when a metal wire is used, undesirable phenomena may occur at the bonding interface of dissimilar metals such as between a conductor layer composed of Cu and a metal wire composed of Al.

[0008] The present disclosure is a solution proposed based on the above-mentioned things, and one of the problems is to provide a semiconductor device that has been improved compared with the past. In particular, one of the problems of the present disclosure is to provide a semiconductor device and a vehicle that can set a more diverse conduction path to the main substrate. In addition, one of the problems of the present disclosure is to provide a semiconductor device that can suppress the occurrence of undesirable phenomena between dissimilar metals.

[0009] Solutions to Solve Problems

[0010] The semiconductor device provided by the first scheme of the present disclosure comprises: a main substrate having a first main metal layer; a first semiconductor element supported by the above-mentioned main substrate; a first sub-substrate supported by the above-mentioned main substrate; and a sealing resin covering the above-mentioned first semiconductor element, the above-mentioned first sub-substrate having a sub-insulating layer, and a first sub-metal layer and a second sub-metal layer arranged in the thickness direction with the above-mentioned sub-insulating layer separated, the above-mentioned second sub-metal layer is conductively connected to the above-mentioned first main metal layer, the above-mentioned first sub-metal layer includes a region, and the above-mentioned first sub-substrate also has a connecting conductive part, which makes the above-mentioned region conductive with the above-mentioned second sub-metal layer.

[0011] A vehicle provided by a second aspect of the present disclosure includes: a drive source; and the semiconductor device provided by the first aspect of the present disclosure, the semiconductor device being electrically connected to the drive source.

[0012] The semiconductor device provided by the third scheme of the present disclosure comprises: a first conductive component including a first metal; a second conductive component including a second metal; and a first block including a third metal, wherein the first metal, the second metal and the third metal are different from each other, and the first block is arranged between the first conductive component and the second conductive component.

[0013] Effects of the Invention

[0014] According to the above structure, the conduction paths to the main substrate can be set in a more diverse manner. In addition, according to the above structure, undesirable phenomena between dissimilar metals can be suppressed.

[0015] Other features and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure.

[0017] Figure 2 It is a partial perspective view showing a semiconductor device according to the first embodiment of the present disclosure.

[0018] Figure 3 It is a partial perspective view showing a semiconductor device according to the first embodiment of the present disclosure.

[0019] Figure 4 It is a plan view showing the semiconductor device according to the first embodiment of the present disclosure.

[0020] Figure 5 It is a partial plan view showing the semiconductor device according to the first embodiment of the present disclosure.

[0021] Figure 6It is a partial side view showing the semiconductor device according to the first embodiment of the present disclosure.

[0022] Figure 7 It is a partially enlarged plan view showing the semiconductor device according to the first embodiment of the present disclosure.

[0023] Figure 8 It is a partial plan view showing the semiconductor device according to the first embodiment of the present disclosure.

[0024] Fig. 9 It is a partial plan view showing the semiconductor device according to the first embodiment of the present disclosure.

[0025] Fig.10 It is a side view showing the semiconductor device according to the first embodiment of the present disclosure.

[0026] Fig.11 It is a bottom view showing the semiconductor device according to the first embodiment of the present disclosure.

[0027] Fig.12 is along Figure 5 Cross-sectional view along line XII-XII.

[0028] Fig.13 This is a partially enlarged cross-sectional view showing the semiconductor device according to the first embodiment of the present disclosure.

[0029] Fig.14 This is a partially enlarged cross-sectional view showing the semiconductor device according to the first embodiment of the present disclosure.

[0030] Fig.15 is along Figure 5 Cross-sectional view of line XV-XV.

[0031] Fig.16 is along Figure 5 Cross-sectional view along line XVI-XVI.

[0032] Fig.17 It is a partially enlarged plan view showing the semiconductor device according to the first embodiment of the present disclosure.

[0033] Fig.18 It is a partially enlarged plan view showing the semiconductor device according to the first embodiment of the present disclosure.

[0034] Fig.19 is along Fig.17 A partial enlarged cross-sectional view of the XIX-XIX line.

[0035] Fig. 20 It is a structural diagram showing a vehicle according to the first embodiment of the present disclosure.

[0036] Fig.21This is a partially enlarged cross-sectional view showing a first modified example of the semiconductor device according to the first embodiment of the present disclosure.

[0037] Fig. 22 This is a partially enlarged cross-sectional view showing a second modified example of the semiconductor device according to the first embodiment of the present disclosure.

[0038] Fig.23 It is a partially enlarged cross-sectional view showing a third modified example of the semiconductor device according to the first embodiment of the present disclosure.

[0039] Fig.24 It is a partially enlarged plan view showing a fourth modified example of the semiconductor device according to the first embodiment of the present disclosure.

[0040] Fig.25 It is a partially enlarged plan view showing a semiconductor device according to a second embodiment of the present disclosure.

[0041] Fig.26 It means along Fig.25 A partial enlarged cross-sectional view of the XXVI-XXVI line.

[0042] Fig. 27 This is a partially enlarged cross-sectional view showing a first modified example of the semiconductor device according to the second embodiment of the present disclosure.

[0043] Fig.28 This is a partially enlarged cross-sectional view showing a second modified example of the semiconductor device according to the second embodiment of the present disclosure.

[0044] Fig.29 It is a partially enlarged cross-sectional view showing a third modified example of the semiconductor device according to the second embodiment of the present disclosure.

[0045] Fig.30 It is a partially enlarged plan view showing a fourth modified example of the semiconductor device according to the second embodiment of the present disclosure.

[0046] Fig.31 It is a partially enlarged cross-sectional view showing a semiconductor device according to a third embodiment of the present disclosure.

[0047] Fig.32 It is a partially enlarged plan view showing a first modified example of the semiconductor device according to the third embodiment of the present disclosure.

[0048] Fig.33 is along Fig.32 A partial enlarged cross-sectional view of line XXXIII-XXXIII.

[0049] Fig.34 It is a perspective view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0050] Fig.35 It is a partial perspective view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0051] Fig.36 It is a partial perspective view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0052] Fig.37 It is a plan view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0053] Fig.38 It is a partial plan view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0054] Fig.39 It is a partial side view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0055] Fig.40 It is a partially enlarged plan view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0056] Fig.41 It is a partial plan view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0057] Fig.42 It is a partial plan view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0058] Fig.43 It is a side view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0059] Fig.44 It is a bottom view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0060] Fig.45 is along Fig.38 Cross-sectional view of the XLV-XLV line.

[0061] Fig.46 is along Fig.38 Cross-sectional view of line XLVI-XLVI.

[0062] Fig.47 It is a partially enlarged cross-sectional view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0063] Fig.48 It is a partially enlarged cross-sectional view showing a semiconductor device according to a fourth embodiment of the present disclosure.

[0064] Fig.49 is along Fig.38 Cross-sectional view of line XLIX-XLIX.

[0065] Fig.50 is along Fig.38 Cross-sectional view of the L-L line.

[0066] Fig.51 is along Fig.38 Cross-sectional view of the LI-LI line.

[0067] Fig.52 is along Fig.38 Cross-sectional view of line LII-LII.

[0068] Fig.53 is along Fig.38 Cross-sectional view of the LIII-LIII line.

[0069] Fig.54 is along Fig.42 Cross-sectional view of the LIV-LIV line.

[0070] Fig.55 is along Fig.54 A partial enlarged cross-sectional view of the LV-LV line.

[0071] Fig.56 This is a partially enlarged cross-sectional view showing a third conductive component of a first modified example of the semiconductor device according to the fourth embodiment of the present disclosure.

[0072] Fig.57 This is a partially enlarged cross-sectional view showing a third conductive component of a second modified example of the semiconductor device according to the fourth embodiment of the present disclosure.

[0073] Fig.58 This is a partially enlarged cross-sectional view showing a third conductive component of a third modified example of the semiconductor device according to the fourth embodiment of the present disclosure.

[0074] Fig.59 is along Fig.58 A partial enlarged cross-sectional view of the LIX-LIX line.

[0075] Fig.60 It is a partial plan view showing a semiconductor device according to a fifth embodiment of the present disclosure.

[0076] Fig.61 is along Fig.60 A partial cross-sectional view of the LXI-LXI line.

[0077] Fig.62 is along Fig.60 A partial cross-sectional view of the LXII-LXII line.

[0078] Fig.63 is along Fig.60 A partial cross-sectional view of the LXIII-LXIII line.

[0079] Fig.64 is along Fig.60 A partial cross-sectional view of the LXIV-LXIV line.

[0080] Fig.65 It is a partial plan view showing a semiconductor device according to a sixth embodiment of the present disclosure.

[0081] Fig.66 is along Fig.65 A partial cross-sectional view of the LXVI-LXVI line.

[0082] Fig.67 is along Fig.65 A partial cross-sectional view of line LXVII-LXVII. DETAILED DESCRIPTION

[0083] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Figures 1 to 33 The symbols used in the first to third embodiments are the same as those in Figures 34 to 67 The symbols used in the fourth to sixth embodiments are independent of each other. For example, the same symbol may be used for different parts (elements, etc.), and different symbols may be used for the same (or similar) parts (elements, etc.).

[0084] The terms “first”, “second”, “third”, etc. in the present disclosure are used merely as labels and are not intended to indicate the order of these objects.

[0085] In the present disclosure, “something A is formed on thing B” and “something A is formed on thing B”, unless otherwise specified, include “something A is directly formed on thing B” and “something else is interposed between thing A and thing B and thing A is formed on thing B”. Similarly, “something A is arranged on thing B” and “something A is arranged on thing B”, unless otherwise specified, include “something A is directly arranged on thing B” and “something else is interposed between thing A and thing B and thing A is arranged on thing B”. Similarly, “something A is located on thing B”, unless otherwise specified, includes “something A is in contact with thing B and thing A is located on thing B” and “something else is interposed between thing A and thing B and thing A is located on thing B”. In addition, “something A overlaps something B when viewed in a certain direction” includes “something A overlaps something B entirely” and “something A overlaps something B partially” unless otherwise specified. In addition, in the present disclosure, “some surface A faces (one side or the other side of) direction B” is not limited to the case where the angle of surface A relative to direction B is 90°, and includes the case where surface A is inclined relative to direction B.

[0086] First embodiment: Figures 1 to 20The semiconductor device A1 of the present embodiment includes a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a main substrate 3, a first terminal 41, a second terminal 42, a plurality of third terminals 43, a fourth terminal 44, a plurality of control terminals 45, a first sub-substrate 48A, a second sub-substrate 48B, a first conductive component 5, a second conductive component 6, and a sealing resin 8.

[0087] Figure 1 It is a perspective view showing the semiconductor device A1. Figure 2 It is a partial perspective view showing the semiconductor device A1. Figure 3 It is a partial perspective view showing the semiconductor device A1. Figure 4 It is a top view showing the semiconductor device A1. Figure 5 It is a partial top view showing the semiconductor device A1. Figure 6 It is a partial side view showing the semiconductor device A1. Figure 7 It is a partially enlarged top view showing the semiconductor device A1. Figure 8 It is a partial top view showing the semiconductor device A1. Fig. 9 It is a partial top view showing the semiconductor device A1. Fig.10 It is a side view showing the semiconductor device A1. Fig.11 It is a bottom view showing the semiconductor device A1. Fig.12 is along Figure 5 Cross-sectional view along line XII-XII. Fig.13 It is a partially enlarged cross-sectional view showing the semiconductor device A1. Fig.14 It is a partially enlarged cross-sectional view showing the semiconductor device A1. Fig.15 is along Figure 5 Cross-sectional view of line XVIII-XVIII. Fig.16 is along Figure 5 Cross-sectional view of the XX-XX line. Fig.17 It is a partially enlarged top view showing the semiconductor device A1. Fig.18 It is a partially enlarged top view showing the semiconductor device A1. Fig.19 is along Fig.17 A partial enlarged cross-sectional view of the XIX-XIX line. Fig. 20 1 is a structural diagram of a vehicle according to a first embodiment of the present disclosure. Fig.19 In the figure, the sealing resin 8 is omitted for ease of understanding.

[0088] exist Figures 1 to 20, the thickness direction z is the thickness direction of the present disclosure. The first direction x is a direction orthogonal to the thickness direction z. The second direction y is a direction orthogonal to the thickness direction z and the first direction x. In addition, one side of the first direction x is referred to as the x1 side of the first direction x, and the other side of the first direction x is referred to as the x2 side of the first direction x. In addition, one side of the second direction y is referred to as the y1 side of the second direction y, and the other side of the second direction y is referred to as the y2 side of the second direction y. In addition, one side of the thickness direction z is referred to as the z1 side of the thickness direction z, and the other side of the thickness direction z is referred to as the z2 side of the thickness direction z.

[0089] First semiconductor element 10A, second semiconductor element 10B: Multiple first semiconductor elements 10A and multiple second semiconductor elements 10B are electronic parts that become the functional core of semiconductor device A1. The constituent material of each first semiconductor element 10A and each second semiconductor element 10B is, for example, a semiconductor material mainly composed of SiC (silicon carbide). The semiconductor material is not limited to SiC (silicon carbide), but can also be Si (silicon), GaN (gallium nitride) or C (diamond). Each first semiconductor element 10A and each second semiconductor element 10B is, for example, a power semiconductor chip with a switching function such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor). In this embodiment, the first semiconductor element 10A and the second semiconductor element 10B are MOSFETs, but it is not limited to this, and can also be other transistors such as IGBT (Insulated Gate Bipolar Transistor). Multiple first semiconductor elements 10A and multiple second semiconductor elements 10B can have different structures from each other or a common structure. In the following description, the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B are all the same element. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, an n-channel MOSFET, but may also be a p-channel MOSFET.

[0090] The first semiconductor element 10A and the second semiconductor element 10B are respectively Fig.13 , Fig.14 As shown, it has an element main surface 101 and an element back surface 102. In each first semiconductor element 10A and each second semiconductor element 10B, the element main surface 101 and the element back surface 102 are spaced apart in the thickness direction z. The element main surface 101 faces the z1 side of the thickness direction z, and the element back surface 102 faces the z2 side of the thickness direction z.

[0091] The number of the first semiconductor elements 10A and the number of the second semiconductor elements 10B are appropriately changed according to the required performance such as the current capacity handled by the semiconductor device A1. Figure 8 , Fig. 9 As shown, four first semiconductor elements 10A and four second semiconductor elements 10B are respectively arranged. The number of first semiconductor elements 10A and second semiconductor elements 10B may be two or three, or five or more. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be equal or different.

[0092] The semiconductor device A1 is configured as a half-bridge switching circuit, for example. In this case, a plurality of first semiconductor elements 10A constitute an upper branch circuit of the semiconductor device A1, and a plurality of second semiconductor elements 10B constitute a lower branch circuit. In the upper branch circuit, a plurality of first semiconductor elements 10A are connected in parallel to each other, and in the lower branch circuit, a plurality of second semiconductor elements 10B are connected in parallel to each other. A plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B are connected in series to form a bridge layer.

[0093] The plurality of first semiconductor elements 10A are respectively as follows Figure 8 , Fig. 9 as well as Fig.16 As shown in FIG. 1 and FIG. 2 , the first conductive portion 32A is mounted on the main substrate 3 described later. Figure 8 , Fig. 9 In the example shown, a plurality of first semiconductor elements 10A are arranged in the second direction y and spaced apart from each other. Each first semiconductor element 10A is conductively bonded to the first conductive portion 32A via the first conductive bonding material 19A. The element back surface 102 faces the first conductive portion 32A.

[0094] The plurality of second semiconductor elements 10B are respectively as follows Figure 8 , Fig. 9 as well as Fig.15 As shown in FIG. 1 and FIG. 2 , the second conductive portion 32B is mounted on the main substrate 3 described later. Figure 8 , Fig. 9 In the example shown, a plurality of second semiconductor elements 10B are arranged in the second direction y and are spaced apart from each other. Each second semiconductor element 10B is conductively bonded to the second conductive portion 32B via the second conductive bonding material 19B. The element back surface 102 faces the second conductive portion 32B. Fig. 9 As can be understood, when viewed in the first direction x, the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B overlap, but they do not necessarily overlap.

[0095] The plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B respectively have a first main surface electrode 11, a second main surface electrode 12, a third main surface electrode 13 and a back surface electrode 15. The structures of the first main surface electrode 11, the second main surface electrode 12, the third main surface electrode 13 and the back surface electrode 15 described below are common to each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The first main surface electrode 11, the second main surface electrode 12 and the third main surface electrode 13 are provided on the element main surface 101. The first main surface electrode 11, the second main surface electrode 12 and the third main surface electrode 13 are insulated by an insulating film not shown. The back surface electrode 15 is provided on the element back surface 102.

[0096] The first main surface electrode 11 is, for example, a gate electrode, to which a driving signal (for example, a gate voltage) for driving the first semiconductor element 10A (the second semiconductor element 10B) is input. In the first semiconductor element 10A (the second semiconductor element 10B), the second main surface electrode 12 is, for example, a source electrode, to which a source current flows. The third main surface electrode 13 is, for example, a source sensing electrode, to which a source current flows. The back surface electrode 15 is, for example, a drain electrode, to which a drain current flows. The back surface electrode 15 covers substantially the entire area of ​​the back surface 102 of the element. The back surface electrode 15 is, for example, formed by Ag (silver) plating.

[0097] If a driving signal (gate voltage) is input to the first main surface electrode 11 (gate electrode), each first semiconductor element 10A (each second semiconductor element 10B) switches between the on state and the off state according to the driving signal. In the on state, the current flows from the back electrode 15 (drain electrode) to the second main surface electrode 12 (source electrode), and in the off state, the current does not flow. That is, each first semiconductor element 10A (each second semiconductor element 10B) performs a switching action. The semiconductor device A1 converts the DC voltage input between a fourth terminal 44 and the two first terminals 41 and the second terminal 42 into an AC voltage, for example, through the switching function of the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B, and outputs the AC voltage from the third terminal 43.

[0098] Main substrate 3: The main substrate 3 supports a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. There is no limitation on the specific structure of the main substrate 3, and it may be, for example, a DBC (Direct Bonded Copper) substrate or an AMB (Active Metal Brazing) substrate. The main substrate 3 includes a main insulating layer 31, a first main metal layer 32, and a second main metal layer 33. The first main metal layer 32 includes a first conductive portion 32A and a second conductive portion 32B. There is no limitation on the dimension of the main substrate 3 in the thickness direction z, and it may be, for example, greater than 0.4 mm and less than 3.0 mm. In the example shown in the figure, no plating layer is provided on the first main metal layer 32, and it is composed of a single layer.

[0099] The constituent material of the main insulating layer 31 includes, for example, ceramics with excellent thermal conductivity. Such ceramics include, for example, SiN (silicon nitride). The constituent material of the main insulating layer 31 is not limited to ceramics, and may also be an insulating resin sheet or the like. The main insulating layer 31 is, for example, rectangular in plan view. The dimension of the thickness direction z of the main insulating layer 31 is not limited in any way, and is, for example, not less than 0.05 mm and not more than 1.0 mm.

[0100] like Figure 8 , Fig. 9 as well as Fig.12 As shown, the first conductive portion 32A supports a plurality of first semiconductor elements 10A, and the second conductive portion 32B supports a plurality of second semiconductor elements 10B. The first conductive portion 32A and the second conductive portion 32B are formed on the upper surface of the main insulating layer 31 (the surface facing the z1 side of the thickness direction z). The constituent material of the first conductive portion 32A and the second conductive portion 32B includes, for example, Cu (copper). The constituent material may also include, for example, Al (aluminum) other than Cu (copper). The first conductive portion 32A and the second conductive portion 32B are spaced apart in the first direction x. The first conductive portion 32A is located on the x1 side of the first direction x of the second conductive portion 32B. The first conductive portion 32A and the second conductive portion 32B are, for example, rectangular in a plan view. The first conductive portion 32A and the second conductive portion 32B together with the first conductive component 5 and the second conductive component 6 constitute a path for the main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B.

[0101] The first conductive portion 32A has a first main surface 301A. The first main surface 301A is a plane facing the z1 side of the thickness direction z. On the first main surface 301A of the first conductive portion 32A, a plurality of first semiconductor elements 10A are bonded via the first conductive bonding material 19A. The second conductive portion 32B has a second main surface 301B. The second main surface 301B is a plane facing the z1 side of the thickness direction z. On the second main surface 301B of the second conductive portion 32B, a plurality of second semiconductor elements 10B are bonded via the second conductive bonding material 19B. The constituent materials of the first conductive bonding material 19A and the second conductive bonding material 19B are not particularly limited, and are, for example, solder, a metal paste containing a metal such as Ag (silver), or a sintered metal containing a metal such as Ag (silver). The dimensions of the first conductive portion 32A and the second conductive portion 32B in the thickness direction z are not limited in any way, and are, for example, not less than 0.1 mm and not more than 1.5 mm.

[0102] The second main metal layer 33 is formed on the lower surface of the main insulating layer 31 (the surface facing the z2 side in the thickness direction z). The constituent material of the second main metal layer 33 is, for example, the same as the constituent material of the first main metal layer 32. The second main metal layer 33 has a back surface 302. The back surface 302 is a flat surface facing the z2 side in the thickness direction z. Fig.11 In the example shown, the back surface 302 is exposed from the sealing resin 8, for example. A heat dissipation component (for example, a heat sink) not shown in the figure can be mounted on the back surface 302. The back surface 302 may not be exposed from the sealing resin 8 but may be covered by the sealing resin 8. In a plan view, the second main metal layer 33 overlaps both the first conductive portion 32A and the second conductive portion 32B.

[0103] First terminal 41, second terminal 42, third terminal 43, fourth terminal 44: The specific structure of the first terminal 41, second terminal 42, third terminals 43, and fourth terminal 44 is not limited in any way. In the present embodiment, they are formed of a plate-shaped metal plate. The metal plate includes, for example, Cu (copper) or a Cu (copper) alloy. Figure 1 to Figure 6 , Figure 8 , Fig. 9 as well as Fig.11 In the illustrated example, the semiconductor device A1 includes one first terminal 41 , one second terminal 42 , and one fourth terminal 44 , and two third terminals 43 , but the number of each terminal is not limited in any way.

[0104] A DC voltage to be the object of power conversion is input to the first terminal 41, the second terminal 42, and the fourth terminal 44. For example, the fourth terminal 44 is a positive electrode (P terminal), and the first terminal 41 and the second terminal 42 are respectively negative electrodes (N terminals). The AC voltage converted by the power of the first semiconductor element 10A and the second semiconductor element 10B is output from the plurality of third terminals 43. The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 each include a portion covered by the sealing resin 8 and a portion exposed from the sealing resin 8.

[0105] like Fig.12 As shown, the fourth terminal 44 is conductively bonded to the first conductive portion 32A. The conductive bonding method is not limited in any way, and ultrasonic bonding, laser bonding, welding, or a method using solder, metal paste, silver sintered body, etc. may be appropriately used. The fourth terminal 44 may also be a structure formed integrally with the first conductive portion 32A. Figure 8 , Fig. 9 As shown in FIG. 1 , the fourth terminal 44 is located on the x1 side of the first direction x relative to the plurality of first semiconductor elements 10A and the first conductive portion 32A. The fourth terminal 44 is electrically connected to the first conductive portion 32A and to the back surface electrode 15 (drain electrode) of each first semiconductor element 10A via the first conductive portion 32A.

[0106] like Figure 5 As shown in FIG. 1 , the first terminal 41 and the second terminal 42 are conductively bonded to the second conductive component 6. The conductive bonding method is not limited in any way, and a method such as ultrasonic bonding, laser bonding, welding, or a method using solder, metal paste, silver sintered body, etc. may be appropriately used. The first terminal 41 and the second terminal 42 may also be a structure formed integrally with the second conductive component 6. The first terminal 41 and the second terminal 42 are respectively as shown in FIG. Figure 5 , Figure 8 As shown in FIG. 1 , the first terminal 41 and the second terminal 42 are respectively connected to the second conductive member 6 and are connected to the second main surface electrode 12 (source electrode) of each second semiconductor element 10B via the second conductive member 6.

[0107] like Figure 1 to Figure 5 as well as Fig.11As shown in the figures, the first terminal 41, the second terminal 42 and the fourth terminal 44 protrude from the sealing resin 8 to the x1 side of the first direction x in the semiconductor device A1. The first terminal 41, the second terminal 42 and the fourth terminal 44 are spaced apart from each other. The first terminal 41 and the second terminal 42 are located on the opposite sides of each other in the second direction y across the fourth terminal 44. The first terminal 41 is located on the y1 side of the second direction y of the fourth terminal 44, and the second terminal 42 is located on the y2 side of the second direction y of the fourth terminal 44. The first terminal 41, the second terminal 42 and the fourth terminal 44 overlap each other when viewed in the second direction y.

[0108] The two third terminals 43 are respectively Figure 8 , Fig. 9 as well as Fig.12 As can be understood, the second conductive portion 32B is conductively connected. The conductive connection method is not limited in any way, and ultrasonic bonding, laser bonding, welding, or a method using solder, metal paste, silver sintered body, etc. can be appropriately used. The two third terminals 43 are respectively as shown in FIG. Figure 8 As shown in the figure, the third terminals 43 are located on the x2 side of the first direction x relative to the plurality of second semiconductor elements 10B and the second conductive portion 32B. Each third terminal 43 is electrically connected to the second conductive portion 32B, and is electrically connected to the back electrode 15 (drain electrode) of each second semiconductor element 10B via the second conductive portion 32B. In addition, the number of third terminals 43 is not limited to two, and for example, it may be one or more than three. For example, when there is one third terminal 43, it is desirable to connect it to the central portion of the second conductive portion 32B in the second direction y.

[0109] First sub-substrate 48A, second sub-substrate 48B: The first sub-substrate 48A and the second sub-substrate 48B support a plurality of control terminals 45. The first sub-substrate 48A and the second sub-substrate 48B are located between the first main surface 301A and the second main surface 301B and the plurality of control terminals 45 in the thickness direction z. The structures of the first sub-substrate 48A and the second sub-substrate 48B may be different from each other, or the structures of each other may be common. The first sub-substrate 48A is disposed on the first conductive portion 32A. The second sub-substrate 48B is disposed on the second conductive portion 32B. In the present embodiment, the structures of the first sub-substrate 48A and the second sub-substrate 48B are common to each other, and when viewed in the thickness direction z, one side is rotated 180° relative to the other side.

[0110] The specific structure of the first sub-substrate 48A and the second sub-substrate 48B is not limited in any way. As specific structural examples of the first sub-substrate 48A and the second sub-substrate 48B, for example, an IMS substrate (Insulated Metal Substrate), a glass epoxy substrate, etc. can be cited. In the present embodiment, the first sub-substrate 48A and the second sub-substrate 48B are IMS substrates. The first sub-substrate 48A and the second sub-substrate 48B have a sub-insulating layer 481, a first sub-metal layer 482, and a second sub-metal layer 483 stacked on each other.

[0111] The sub-insulating layer 481 is made of, for example, ceramics. The sub-insulating layer 481 is, for example, rectangular in plan view. The thickness of the sub-insulating layer 481 is not limited at all, and is, for example, 0.05 mm or more and 1.0 mm or less.

[0112] like Fig.19 As shown in the figures, the first sub-metal layer 482 is formed on the upper surface of the sub-insulating layer 481 (the surface facing the z1 side of the thickness direction z). The first sub-metal layer 482, for example, contains Cu (copper) or a Cu (copper) alloy. There is no limitation on the specific structure of the first sub-metal layer 482. In the present embodiment, it contains a base material layer 4820 and a surface metal layer 4829. The base material layer 4820 is in contact with the sub-insulating layer 481. The base material layer 4820, for example, contains Cu (copper) or a Cu (copper) alloy. There is no limitation on the thickness of the base material layer 4820, for example, it is greater than 0.035 mm and less than 2.0 mm. The surface metal layer 4829 is stacked on the side opposite to the sub-insulating layer 481 relative to the base material layer 4820. The surface metal layer 4829 contains a metal different from the constituent material of the base material layer 4820, for example, contains Ni (nickel). In addition, the surface metal layer 4829 may also be a structure in which a plurality of metal layers are stacked. The thickness of the surface metal layer 4829 is not limited at all, and is, for example, not less than 1 μm and not more than 10 μm.

[0113] like Fig.17 as well as Fig.18 As shown, the first sub-metal layer 482 includes a plurality of regions 482A, 482B, 482C, 482D, 482E, and 482F. The plurality of regions 482A, 482B, 482C, 482D, 482E, and 482F are spaced apart and insulated from each other.

[0114] The region 482A includes a connection portion 4821A and a terminal portion 4822A. In the first sub-substrate 48A, the connection portion 4821A is located on the x2 side of the first direction x, and the terminal portion 4822A is located on the x1 side of the first direction x. In the second sub-substrate 48B, the connection portion 4821A is located on the x1 side of the first direction x, and the terminal portion 4822A is located on the x2 side of the first direction x. The connection portion 4821A is a shape that extends long in the second direction y. The terminal portion 4822A is a substantially circular shape.

[0115] A plurality of metal wires 71 are bonded to the connection portion 4821A. In the present embodiment, the metal wires 71 are bonded to the surface metal layer 4829 of the connection portion 4821A. The constituent material of the metal wires 71 is not limited in any way, and may include, for example, Al (aluminum) or an Al (aluminum) alloy. The region 482A is electrically connected to the first main surface electrodes 11 (gate electrodes) of the plurality of first semiconductor elements 10A (plurality of second semiconductor elements 10B) via the plurality of metal wires 71.

[0116] The region 482B includes a connection portion 4821B and a terminal portion 4822B. In the first sub-substrate 48A, the connection portion 4821B is located on the x2 side of the first direction x, and the terminal portion 4822B is located on the x1 side of the first direction x. In the second sub-substrate 48B, the connection portion 4821B is located on the x1 side of the first direction x, and the terminal portion 4822B is located on the x2 side of the first direction x. In the first sub-substrate 48A, the region 482B is arranged on the x1 side of the first direction x of the connection portion 4821A. In the second sub-substrate 48B, the region 482B is arranged on the x2 side of the first direction x of the connection portion 4821A. The connection portion 4821B is a shape that extends long in the second direction y. The terminal portion 4822B is a substantially semicircular shape. In the first sub-substrate 48A, the terminal portion 4822B is located on the y2 side of the second direction y of the terminal portion 4822A. In the second sub-substrate 48B, the terminal portion 4822B is located on the y1 side in the second direction y of the terminal portion 4822A.

[0117] A plurality of metal wires 72 are bonded to the connection portion 4821B. In the present embodiment, the metal wires 72 are bonded to the surface metal layer 4829 of the connection portion 4821B. The constituent material of the metal wires 72 is not limited in any way, and may include, for example, Al (aluminum) or an Al (aluminum) alloy. The region 482B is electrically connected to the third main surface electrodes 13 (source sensing electrodes) of the plurality of first semiconductor elements 10A (plurality of second semiconductor elements 10B) via the plurality of metal wires 72.

[0118] The region 482C includes a connection portion 4821C and a terminal portion 4822C. In the first sub-substrate 48A, the connection portion 4821C is located on the y2 side of the second direction y, and the terminal portion 4822C is located on the y1 side of the second direction y. In the second sub-substrate 48B, the connection portion 4821C is located on the y1 side of the second direction y, and the terminal portion 4822C is located on the y2 side of the second direction y. The connection portion 4821C is a curved shape extending in the second direction y. The terminal portion 4822C is a substantially circular shape. In the first sub-substrate 48A, the terminal portion 4822C is located on the x1 side of the first direction x of the connection portion 4821A, and is located on the y2 side of the second direction y of the terminal portion 4822B. In the second sub-substrate 48B, the terminal portion 4822C is located on the x2 side of the first direction x of the connection portion 4821A, and is located on the y1 side of the second direction y of the terminal portion 4822B.

[0119] The region 482D includes a connection portion 4821D and a terminal portion 4822D. In the first sub-substrate 48A, the connection portion 4821D is located on the y2 side of the second direction y, and the terminal portion 4822D is located on the y1 side of the second direction y. The connection portion 4821D is, for example, rectangular in shape, and the terminal portion 4822D is, for example, substantially circular in shape. In the first sub-substrate 48A, the connection portion 4821D is located on the x1 side of the first direction x of the connection portion 4821C. In the second sub-substrate 48B, the connection portion 4821D is located on the x2 side of the first direction x of the connection portion 4821C. In the first sub-substrate 48A, the terminal portion 4822D is located on the y2 side of the second direction y of the terminal portion 4822C. In the second sub-substrate 48B, the terminal portion 4822D is located on the y1 side of the second direction y of the terminal portion 4822C.

[0120] In the first sub-substrate 48A, the region 482E is located on the y2 side of the second direction y of the connection portion 4821A and on the x2 side of the first direction x of the connection portion 4821C. In the second sub-substrate 48B, the region 482E is located on the y1 side of the second direction y of the connection portion 4821A and on the x1 side of the first direction x of the connection portion 4821C. The region 482E is a shape extending in the second direction y.

[0121] The region 482E is equivalent to the “first region” of the present disclosure. The region 482D is equivalent to the “second region” of the present disclosure. The region 482C is equivalent to the “third region” of the present disclosure. That is, the region 482C is located between the region 482E and the region 482D in the first direction x.

[0122] The plurality of regions 482F are arranged alternately with the terminal portions 4822A, 4822B, 4822C, and 4822D in the second direction y. The shapes of the plurality of regions 482F are not limited and may be rectangular, circular, etc., but are rectangular in the illustrated example.

[0123] like Fig.13 , Fig.14 , Fig.19 As shown in FIG. 1 , the second sub-metal layer 483 is formed on the lower surface (the surface on the z2 side in the thickness direction z) of the sub-insulating layer 481. The constituent material of the second sub-metal layer 483 includes, for example, Cu (copper) or a Cu (copper) alloy. The thickness of the second sub-metal layer 483 is not limited in any way, for example, it is greater than 0.035 mm and less than 3.0 mm.

[0124] The second sub-metal layer 483 of the first sub-substrate 48A is conductively bonded to the first conductive portion 32A. The second sub-metal layer 483 of the second sub-substrate 48B is conductively bonded to the second conductive portion 32B. There is no limitation on the method of conductively bonding the second sub-metal layer 483 to the first conductive portion 32A or the second conductive portion 32B. Examples of conductive bonding methods include methods using a conductive bonding material, laser bonding methods, ultrasonic bonding methods, and solid phase bonding. In this embodiment, Fig.19 As shown, the second sub-metal layers 483 of the first sub-substrate 48A and the second sub-substrate 48B are conductively bonded to the first conductive portion 32A and the second conductive portion 32B via the conductive bonding material 49. The conductive bonding material 49 is made of solder, for example.

[0125] like Figure 17 to Figure 19 As shown, the first sub-substrate 48A and the second sub-substrate 48B have a connecting conductive portion 485. The connecting conductive portion 485 makes the region 482E and the second sub-metal layer 483 conductive. There is no limitation on the specific structure of the connecting conductive portion 485. In the example shown in the figure, the connecting conductive portion 485 is composed of a conductive component that penetrates the sub-insulating layer 481 in the thickness direction z. Such a connecting conductive portion 485 includes, for example, a plating material containing Cu (copper), solder, etc. In the example shown in the figure, the connecting conductive portion 485 penetrates the sub-insulating layer 481 and the region 482E.

[0126] like Fig.17 As shown, in the first sub-substrate 48A, a metal wire 73 is connected to the region 482E and the connecting portion 4821D. In this embodiment, the metal wire 73 is bonded to the surface metal layer 4829 of each of the region 482E and the connecting portion 4821D. The constituent material of the metal wire 73 is not limited in any way, and for example, it includes Al (aluminum) or Al (aluminum) alloy. As a result, the region 482D is conductively connected to the first conductive portion 32A.

[0127] like Fig.18 As shown, in the second sub-substrate 48B, the thermistor 17 is connected to the connection portion 4821C and the connection portion 4821D. The thermistor 17 is used as a temperature detection sensor. In addition, the semiconductor device A1 may have a structure including a temperature sensing diode or the like in addition to the thermistor 17, or may not have a thermistor 17 or the like.

[0128] The metal wires 71 , 72 , and 73 are not connected to the first main metal layer 32 . In other words, the first main metal layer 32 is separated from the plurality of metal wires 71 , 72 , and 73 .

[0129] Control terminal 45: The plurality of control terminals 45 are terminals for controlling each first semiconductor element 10A and each second semiconductor element 10B. The plurality of control terminals 45 include a plurality of control terminals 46A, 46B, 46E and a plurality of control terminals 47A to 47D. The plurality of control terminals 46A, 46B, 46E are used for controlling each first semiconductor element 10A, etc. The plurality of control terminals 47A to 47D are used for controlling each second semiconductor element 10B, etc.

[0130] The plurality of control terminals 46A, 46B, and 46E are arranged at intervals in the second direction y. Figure 2 , Figure 3 , Figure 5 , Figure 6 , Figure 8 , Fig.17 As shown in FIG. 1 and FIG. 2 , a plurality of control terminals 46A, 46B, and 46E are supported on the first conductive portion 32A via the first sub-substrate 48A. Figure 5 As shown, the plurality of control terminals 46A, 46B, 46E are located between the plurality of first semiconductor elements 10A and the first terminal 41 , the second terminal 42 , and the fourth terminal 44 in the first direction x.

[0131] like Fig.17 As shown, the control terminal 46A is disposed on the terminal portion 4822A. The control terminal 46A is a terminal (gate terminal) for inputting drive signals to the plurality of first semiconductor elements 10A. The control terminal 46A receives a drive signal (eg, a gate voltage) for driving the plurality of first semiconductor elements 10A.

[0132] The control terminal 46B is disposed on the terminal portion 4822B. The control terminal 46B is a terminal (source sensing terminal) for detecting source signals of the plurality of first semiconductor elements 10A. The voltage (voltage corresponding to the source current) applied from the control terminal 46B to each second main surface electrode 12 (source electrode) of the plurality of first semiconductor elements 10A is detected.

[0133] The control terminal 46E is arranged on the terminal portion 4822D. The control terminal 46E is a terminal (drain sensing terminal) for detecting drain signals of the plurality of first semiconductor elements 10A. The voltage (voltage corresponding to the drain current) applied from the control terminal 46E to each back electrode 15 (drain electrode) of the plurality of first semiconductor elements 10A is detected. The control terminal 46E corresponds to the "first control terminal" of the present disclosure.

[0134] The plurality of control terminals 47A to 47D are arranged at intervals in the second direction y. Figure 2 , Figure 3 , Figure 5 , Figure 6 , Figure 8 , Fig.18 As shown in FIG. 4A and FIG. 4B , a plurality of control terminals 47A to 47D are supported on the second conductive portion 32B via the second sub-substrate 48B. Figure 5 As shown, the plurality of control terminals 47A to 47D are located between the plurality of second semiconductor elements 10B and the plurality of third terminals 43 in the first direction x.

[0135] like Fig.18 As shown, the control terminal 47A is disposed on the terminal portion 4822A. The control terminal 47A is a terminal (gate terminal) for inputting drive signals to the plurality of second semiconductor elements 10B. A drive signal (eg, a gate voltage) for driving the plurality of second semiconductor elements 10B is input to the control terminal 47A.

[0136] The control terminal 46B is disposed on the terminal portion 4822B. The control terminal 46B is a terminal (source sensing terminal) for detecting source signals of the plurality of second semiconductor elements 10B. The voltage (voltage corresponding to the source current) applied from the control terminal 46B to each second main surface electrode 12 (source electrode) of the plurality of second semiconductor elements 10B is detected.

[0137] The control terminal 47C is arranged on the terminal portion 4822C. The control terminal 47D is arranged on the terminal portion 4822D. The control terminal 47C and the control terminal 47D are terminals that are electrically connected to the thermistor 17 .

[0138] like Fig.12 , Fig.17 as well as Fig.18 As shown, the plurality of control terminals 45 (a plurality of control terminals 46A, 46B, 46E and a plurality of control terminals 47A to 47D) include a bracket 451 and a metal pin 452 , respectively.

[0139] The support 451 is made of a conductive material. Fig.13 , Fig.14As shown, the bracket 451 is bonded to the first auxiliary metal layer 482 via a conductive bonding material (not shown). The bracket 451 includes a cylindrical portion, an upper flange portion, and a lower flange portion. The upper flange portion is connected to the upper portion of the cylindrical portion, and the lower flange portion is connected to the lower portion of the cylindrical portion. A metal pin 452 is inserted through at least the upper flange portion and the cylindrical portion of the bracket 451. The bracket 451 is covered with a sealing resin 8.

[0140] The metal pin 452 is a rod-shaped member extending in the thickness direction z. The metal pin 452 is supported by being pressed into the bracket 451. The metal pin 452 is electrically connected to the first auxiliary metal layer 482 at least via the bracket 451. Figure 1 as well as Fig.12 As shown, the metal pin 452 protrudes from the sealing resin 8 toward the z1 side in the thickness direction z.

[0141] First conductive component 5, second conductive component 6: The first conductive component 5 and the second conductive component 6 together with the first conductive portion 32A and the second conductive portion 32B constitute the path of the main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. The first conductive component 5 and the second conductive component 6 are spaced apart from the first main surface 301A and the second main surface 301B to the z1 side in the thickness direction z, and overlap with the first main surface 301A and the second main surface 301B when viewed from above. In the present embodiment, the first conductive component 5 and the second conductive component 6 are respectively formed of a metal plate. The metal includes, for example, Cu (copper) or a Cu (copper) alloy. Specifically, the first conductive component 5 and the second conductive component 6 are appropriately bent metal plates.

[0142] The first conductive component 5 is connected to the second main surface electrode 12 (source electrode) of each first semiconductor element 10A and the second conductive portion 32B, so that the second main surface electrode 12 of each first semiconductor element 10A and the second conductive portion 32B are conductively connected. The first conductive component 5 constitutes a path for the main circuit current switched by the plurality of first semiconductor elements 10A. Figure 7 as well as Figure 8 As shown, the first conductive component 5 includes a main portion 51 , a plurality of first bonding portions 52 , and a plurality of second bonding portions 53 .

[0143] The main portion 51 is located between the plurality of first semiconductor elements 10A and the second conductive portion 32B in the first direction x, and is a strip-shaped portion extending in the second direction y when viewed from above. The main portion 51 overlaps both the first conductive portion 32A and the second conductive portion 32B when viewed from above, and is spaced from the first main surface 301A and the second main surface 301B toward the z1 side of the thickness direction z in the thickness direction z. Fig.16As shown in FIG. 1 , the main portion 51 is located on the z2 side in the thickness direction z relative to a third path portion 66 and a fourth path portion 67 of a second conductive member 6 described later, and is closer to the first main surface 301A and the second main surface 301B than the third path portion 66 and the fourth path portion 67 .

[0144] In the present embodiment, the main portion 51 is arranged parallel to the first main surface 301A and the second main surface 301B.

[0145] like Figure 8 As shown in FIG. 1 and FIG. 2 , the main portion 51 extends continuously in the second direction y corresponding to the region where the plurality of first semiconductor elements 10A are arranged. Figure 7 , Figure 8 , Fig.12 As shown in the figures, a plurality of first openings 514 are formed in the main part 51. The plurality of first openings 514 are, for example, through holes that penetrate in the thickness direction z (the plate thickness direction of the main part 51). The plurality of first openings 514 are arranged at intervals in the second direction y. The plurality of first openings 514 are respectively provided corresponding to the plurality of first semiconductor elements 10A. In the present embodiment, four first openings 514 are provided in the main part 51, and the positions of these first openings 514 and the plurality of (four) first semiconductor elements 10A in the second direction y are equal to each other.

[0146] In this embodiment, if Figure 8 , Fig.12 As shown in FIG. 1 and FIG. 2 , each first opening 514 overlaps with the gap between the first conductive portion 32A and the second conductive portion 32B in a plan view. The plurality of first openings 514 are formed to facilitate the flow of the resin material between the upper side (z1 side in the thickness direction z) and the lower side (z2 side in the thickness direction z) near the main portion 51 (first conductive member 5) when the fluid resin material is injected to form the sealing resin 8.

[0147] like Figure 8 As shown in FIG. 1 , a plurality of first bonding portions 52 and a plurality of second bonding portions 53 are respectively connected to the main portion 51 and are arranged corresponding to the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. Specifically, each first bonding portion 52 is located on the x1 side of the first direction x relative to the main portion 51. Each second bonding portion 53 is located on the x2 side of the first direction x relative to the main portion 51. Fig.13As shown, the plurality of first bonding portions 52 are individually bonded to the second main surface electrodes 12 of the plurality of first semiconductor elements 10A via the conductive bonding material 59. The plurality of second bonding portions 53 are bonded to the second conductive portion 32B via the conductive bonding material 59. The constituent material of the conductive bonding material 59 is not particularly limited, and may be, for example, solder, metal paste, or sintered metal. In the present embodiment, the first bonding portion 52 has two portions spaced apart in the second direction y.

[0148] The second conductive component 6 conducts the second main surface electrode 12 (source electrode) of each second semiconductor element 10B to the first terminal 41 and the second terminal 42. The second conductive component 6 is formed integrally with the first terminal 41 and the second terminal 42. The second conductive component 6 constitutes a path for the main circuit current switched by the plurality of second semiconductor elements 10B. Figure 2 as well as Figure 5 to Figure 7 As shown, the second conductive component 6 includes a plurality of third bonding portions 61 , a first path portion 64 , a second path portion 65 , a plurality of third path portions 66 , and a fourth path portion 67 .

[0149] The plurality of third bonding portions 61 are portions that are bonded to the plurality of second semiconductor elements 10B individually. Each third bonding portion 61 is bonded to the second main surface electrode 12 of each second semiconductor element 10B via a conductive bonding material 69. The constituent material of the conductive bonding material 69 is not particularly limited, and may be, for example, solder, metal paste, or sintered metal. In the present embodiment, the third bonding portion 61 has two flat portions 611 and two first inclined portions 612.

[0150] The two flat portions 611 are arranged in the second direction y. The two flat portions 611 are spaced apart from each other in the second direction y. The shape of the flat portion 611 is not limited in any way, and is rectangular in the example shown. The two flat portions are bonded to the second main surface electrode 12 on both sides in the second direction y.

[0151] The two first inclined portions 612 are connected to the outer sides of the two flat portions 611 in the second direction y. That is, the first inclined portion 612 located on the y1 side of the second direction y is connected to the y1 side of the second direction y relative to the flat portion 611 located on the y1 side of the second direction y. In addition, the first inclined portion 612 located on the y2 side of the second direction y is connected to the y2 side of the second direction y relative to the flat portion 611 located on the y2 side of the second direction y. The first inclined portion 612 is inclined so as to be located on the z1 side of the thickness direction z as it is further away from the flat portion 611 in the second direction y.

[0152] The first path portion 64 is interposed between the plurality of third bonding portions 61 and the first terminal 41. In the illustrated example, the first path portion 64 is connected to the first terminal 41 via the first step portion 602. The first path portion 64 overlaps the first conductive portion 32A in a plan view. The first path portion 64 is shaped to extend in the first direction x as a whole.

[0153] The first path portion 64 includes a first strip portion 641 and a first extension portion 643. The first strip portion 641 is located on the x2 side in the first direction x relative to the first terminal 41 and is substantially parallel to the first main surface 301A. The first strip portion 641 is shaped to extend in the first direction x as a whole.

[0154] The first extension portion 643 extends from the side end of the first strip-shaped portion 641 on the y1 side in the second direction y to the z2 side in the thickness direction z. The first extension portion 643 is separated from the first conductive portion 32A. In the example shown in the figure, the first extension portion 643 is a shape along the thickness direction z, and is a long rectangular shape with the first direction x as the length direction. In addition, the first path portion 64 may also be a structure without the first extension portion 643.

[0155] The second path portion 65 is interposed between the plurality of third bonding portions 61 and the second terminal 42. In the illustrated example, the second path portion 65 is connected to the second terminal 42 via the second step portion 603. The second path portion 65 overlaps the first conductive portion 32A in a plan view. The second path portion 65 is shaped to extend in the first direction x as a whole.

[0156] The second path portion 65 includes a second strip portion 651 and a second extension portion 653. The second strip portion 651 is located on the x2 side in the first direction x relative to the second terminal 42 and is substantially parallel to the first main surface 301A. The second strip portion 651 is shaped to extend in the first direction x as a whole.

[0157] The second extension portion 653 extends from the side end of the second strip-shaped portion 651 on the y2 side in the second direction y to the z2 side in the thickness direction z. The second extension portion 653 is separated from the first conductive portion 32A. In the example shown in the figure, the second extension portion 653 is a shape along the thickness direction z, and is a long rectangular shape with the first direction x as the length direction. In addition, the second path portion 65 may also be a structure without the second extension portion 653.

[0158] The plurality of third path portions 66 are connected to the plurality of third bonding portions 61 individually. Each of the third path portions 66 is shaped to extend in the first direction x, and is arranged at intervals in the second direction y. The number of the plurality of third path portions 66 is not limited in any way, and in the example shown in the figure, five third path portions 66 are arranged. Each of the third path portions 66 is arranged to be located between the plurality of second semiconductor elements 10B in the second direction y, or to be located outside the plurality of second semiconductor elements 10B in the second direction y.

[0159] In the present embodiment, one third joint portion 61 is disposed between two third path portions 66 adjacent in the second direction y. In one third joint portion 61, the first inclined portion 612 located on the y1 side in the second direction y is connected to the third path portion 66 located on the y1 side in the second direction y of the two third path portions 66 adjacent in the second direction y. In one third joint portion 61, the first inclined portion 612 located on the y2 side in the second direction y is connected to the third path portion 66 located on the y2 side in the second direction y of the two third path portions 66 adjacent in the second direction y.

[0160] The fourth path portion 67 is connected to the ends on the x1 side of the first direction x of the plurality of third path portions 66. The fourth path portion 67 is shaped to extend long in the second direction y. The fourth path portion 67 is connected to the ends on the x2 side of the first direction x of the first strip-shaped portion 641 of the first path portion 64 and the second strip-shaped portion 651 of the second path portion 65. In the example shown in the figure, the first path portion 64 is connected to the end on the y1 side of the second direction y of the fourth path portion 67. In addition, the second path portion 65 is connected to the end on the y2 side of the second direction y of the fourth path portion 67.

[0161] Sealing resin 8: Sealing resin 8 covers the first semiconductor elements 10A, the second semiconductor elements 10B, the main substrate 3 (except the back surface 302), the first terminal 41, the second terminal 42, the third terminals 43 and the fourth terminals 44, the control terminals 45, the first sub-substrate 48A and the second sub-substrate 48B, the first conductive component 5, the second conductive component 6, and the metal wires 71 to 73. Sealing resin 8 is made of, for example, black epoxy resin. Sealing resin 8 is formed by, for example, molding. The size of sealing resin 8 is not limited in any way, for example, the size in the first direction x is about 35 mm to 60 mm, the size in the second direction y is about 35 mm to 50 mm, and the size in the thickness direction z is about 4 mm to 15 mm. These sizes are the sizes of the largest parts along each direction. Sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831 to 834.

[0162] like Fig.10 , Fig.12 as well as Fig.15 As shown in FIG. 1 , the resin main surface 81 and the resin back surface 82 are spaced apart in the thickness direction z. The resin main surface 81 faces the z1 side of the thickness direction z, and the resin back surface 82 faces the z2 side of the thickness direction z. A plurality of control terminals 45 (a plurality of control terminals 46A, 46B, 46E and a plurality of control terminals 47A to 47D) protrude from the resin main surface 81. Fig.11 As shown, the resin back surface 82 is in a frame shape surrounding the back surface 302 (the lower surface of the second main metal layer 33) of the main substrate 3 in a plan view. The back surface 302 of the main substrate 3 is exposed from the resin back surface 82 and is, for example, flush with the resin back surface 82.

[0163] The plurality of resin side surfaces 831 to 834 are connected to both the resin main surface 81 and the resin back surface 82, and are sandwiched by them in the thickness direction z. Figure 4 As shown in FIG. 1 , the resin side surface 831 and the resin side surface 832 are spaced apart in the first direction x. The resin side surface 831 faces the x2 side of the first direction x, and the resin side surface 832 faces the x1 side of the first direction x. The two third terminals 43 protrude from the resin side surface 831, and the first terminal 41, the second terminal 42, and the fourth terminal 44 protrude from the resin side surface 832. Figure 4 As shown in FIG. 8A and FIG. 8B , the resin side surface 833 and the resin side surface 834 are spaced apart in the second direction y. The resin side surface 833 faces the y2 side in the second direction y, and the resin side surface 834 faces the y1 side in the second direction y.

[0164] like Figure 4 As shown, a plurality of recesses 832a are formed on the resin side surface 832. Each recess 832a is a portion that is recessed in the first direction x when viewed from above. The plurality of recesses 832a have a portion formed between the first terminal 41 and the fourth terminal 44, and a portion formed between the second terminal 42 and the fourth terminal 44 when viewed from above. The plurality of recesses 832a are provided to increase the creepage distance between the first terminal 41 and the fourth terminal 44 along the resin side surface 832, and the creepage distance between the second terminal 42 and the fourth terminal 44 along the resin side surface 832.

[0165] Next, based on Fig. 20 Next, a vehicle B1 equipped with a semiconductor device A1 will be described. The vehicle B1 is, for example, an electric vehicle (EV).

[0166] like Fig. 20As shown, the vehicle B1 includes an on-board charger 91, a battery 92, and a drive system 93. Electricity is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. In addition, the supply mechanism for supplying electric power from the power supply facility to the on-board charger 91 may also be wired. A step-up DC-DC converter is formed in the on-board charger 91. The voltage of the electric power supplied to the on-board charger 91 is stepped up by the converter, and then the electric power is supplied to the battery 92. The stepped-up voltage is, for example, 600V.

[0167] The drive system 93 drives the vehicle B1. The drive system 93 includes an inverter 931 and a drive source 932. The semiconductor device A1 constitutes a part of the inverter 931. The power stored in the battery 92 is supplied to the inverter 931. The power supplied from the battery 92 to the inverter 931 is DC power. Fig. 20 Different from the power system shown, a step-up DC-DC converter may be further provided between the battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931 including the semiconductor device A1 is electrically connected to the drive source 932.

[0168] The driving source 932 has an AC motor and a transmission. If the AC power converted by the inverter 931 is supplied to the driving source 932, the AC motor rotates, and the rotation is transmitted to the transmission. The transmission rotates the drive shaft of the vehicle B1 on the basis of appropriately reducing the number of rotations transmitted from the AC motor. Thus, the vehicle B1 is driven. When the vehicle B1 is driven, it is necessary to freely operate the number of rotations of the AC motor according to information such as the amount of change of the accelerator pedal. In order for the semiconductor device A1 in the inverter 931 to correspond to the required number of rotations of the AC motor, it is necessary to output AC power with an appropriately varying frequency.

[0169] Next, the operation of the semiconductor device A1 will be described.

[0170] like Fig. 9 As shown, the region 482E of the first sub-substrate 48A is electrically connected to the first conductive portion 32A via the connecting conductive portion 485 and the second sub-metal layer 483. Fig.17 The control terminal 46E shown is connected to the first conductive portion 32A, and it is sufficient to connect the region 482D to the region 482E, and no other conductive component needs to be connected to the first conductive portion 32A. Therefore, the conductive path to the main substrate 3 can be set in a more diverse manner.

[0171] The first sub-metal layer 482 has a surface metal layer 4829. The plurality of metal wires 71, 72, 73 are connected to the surface metal layer 4829. Thus, the Kirkendall void phenomenon can be avoided at the connection portion between the plurality of metal wires 71, 72, 73 and the base material layer 4820. When the plurality of metal wires 71, 72, 73 include Al (aluminum) and the base material layer 4820 includes Cu (copper), the Kirkendall void phenomenon can be more reliably suppressed by providing the surface metal layer 4829 including Ni (nickel).

[0172] In addition, it is not necessary to connect a metal wire or the like to the first conductive portion 32A for the purpose of detecting the potential in the first conductive portion 32A through the control terminal 46E. Therefore, it is not necessary to provide a metal layer or the like for suppressing the Kirkendall void phenomenon on the first conductive portion 32A. This is preferable for reducing the cost of the semiconductor device A1.

[0173] like Fig.17 as well as Fig.18 As shown, the first sub-substrate 48A and the second sub-substrate 48B have a common structure. Fig.17 As shown, in the first sub-substrate 48A, the potential of the first conductive portion 32A based on the control terminal 46E can be detected by connecting the region 482E and the connecting portion 4821D using the metal wire 73. Fig.18 As shown, by connecting the thermistor 17 to the connection portion 4821C and the connection portion 4821D, temperature monitoring using the control terminal 47C and the control terminal 47D can be realized. In this way, two sub-substrates having different functions, the first sub-substrate 48A and the second sub-substrate 48B, can be realized using one sub-substrate, which is advantageous in reducing the cost of the semiconductor device A1.

[0174] Figure 21 to Figure 33 1 and 2 represent other embodiments of the modified examples of the present disclosure. In addition, in these figures, the same or similar elements as those in the above-mentioned embodiments are marked with the same symbols as those in the above-mentioned embodiments. In addition, the structures of each part in each modified example and each embodiment can be appropriately combined with each other within the range that does not cause technical contradictions. In addition, in the following modified examples and embodiments, unless otherwise specified, they are described as matters common to the first sub-substrate 48A and the second sub-substrate 48B.

[0175] First Embodiment First Modification Example: Fig.21The first modification of the semiconductor device A1 is shown. In the semiconductor device A11 of this modification, the structure of the connecting conductive portion 485 is different from the above-mentioned example. In this modification, the connecting conductive portion 485 penetrates the first sub-metal layer 482 (region 482E) and the sub-insulating layer 481, and enters a part of the second sub-metal layer 483. Such a connecting conductive portion 485 is formed, for example, in the following case, that is, when the first sub-metal layer 482 and the sub-insulating layer 481 are processed to form the connecting conductive portion 485, the process of removing from the z1 side to the z2 side in the thickness direction z of the first sub-metal layer 482 is continuously performed, and the connecting conductive portion 485 is formed when the first sub-metal layer 482 and the sub-insulating layer 481 are exceeded and a part of the second sub-metal layer 483 is removed. This removal process can be, for example, either mechanical processing or chemical processing such as etching.

[0176] According to this modification, the conduction path to the main substrate 3 can be set more diversely. In addition, in the removal process for forming the connecting conductive portion 485, a through hole is formed that completely penetrates the sub-insulating layer 481. Therefore, the connecting conductive portion 485 can be more reliably connected to the second sub-metal layer 483.

[0177] Second variation of the first embodiment: Fig. 22 A second modification of the semiconductor device A1 is shown. In the semiconductor device A12 of this modification, the connection conductive portion 485 penetrates the second sub-metal layer 483 and the sub-insulating layer 481 and is in contact with the first sub-metal layer 482 (region 482E).

[0178] According to this variation, it is also possible to set more various conduction paths to the main substrate 3. As can be understood from this variation, the connecting conductive portion 485 may be a structure that passes through the first sub-metal layer 482 or a structure that passes through the second sub-metal layer 483.

[0179] Third variation of the first embodiment: Fig.23 A third modification of the semiconductor device A1 is shown. In the semiconductor device A13 of this modification, the connecting conductive portion 485 penetrates the first sub-metal layer 482 (region 482E), the sub-insulating layer 481 , and the second sub-metal layer 483 .

[0180] According to this modification, the conduction path to the main substrate 3 can be set more variously. In addition, as understood from this modification, the connecting conductive portion 485 may be a structure that penetrates the entire first sub-substrate 48A and the second sub-substrate 48B in the thickness direction z.

[0181] Fourth variation of the first embodiment: Fig.244. The semiconductor device A14 of this modification is shown. In the semiconductor device A14 of this modification, the first sub-substrate 48A has a plurality of connecting conductive portions 485. In the example shown in the figure, the first sub-substrate 48A has three connecting conductive portions 485. One connecting conductive portion 485 makes the region 482E conductive with the second sub-metal layer 483. Two connecting conductive portions 485 make two regions 482F conductive with the second sub-metal layer 483. One of the two regions 482F is a region that is arranged closest to the y1 side in the second direction y among the plurality of regions 482F, and the other is a region 482F that is the third region from the y1 side in the second direction y among the plurality of regions 482F.

[0182] According to this modification, the conduction path to the main substrate 3 can be set more diversely. In addition, as understood from this modification, there is no limitation on the number of connecting conductive portions 485. The region 482F is not connected to the metal wires 71 to 73 or the control terminal 45. Therefore, even if the region 482F is connected to the second sub-metal layer 483 through the connecting conductive portion 485, the electrical function of the semiconductor device A14 can be achieved.

[0183] Second implementation method: Fig.25 as well as Fig.26 1 shows a semiconductor device of a second embodiment of the present disclosure. In the semiconductor device A2 of this embodiment, the method of conducting and bonding the second sub-metal layer 483 of the first sub-substrate 48A and the first conductive portion 32A is different from that of the above-mentioned embodiment. In this embodiment, laser bonding is used as the method of conducting and bonding the second sub-metal layer 483 of the first sub-substrate 48A and the first conductive portion 32A.

[0184] The sub-insulating layer 481 is provided with an opening 4811. The opening 4811 penetrates the sub-insulating layer 481 in the thickness direction z, and exposes the second sub-metal layer 483 on the z1 side in the thickness direction z. A bonding portion 4839 is formed in the second sub-metal layer 483.

[0185] The bonding portion 4839 is formed, for example, by irradiating a portion of the second sub-metal layer 483 exposed from the opening 4811 with laser light while the first sub-substrate 48A is placed on the first conductive portion 32A. By irradiating the laser light, a portion of the second sub-metal layer 483 and a portion of the first conductive portion 32A are melted to each other, thereby forming the bonding portion 4839 as shown in the figure.

[0186] In the example shown in the figure, the sub-insulating layer 481 has three openings 4811. In addition, the control terminal support body 48 (second sub-metal layer 483) has three joints 4839. The three openings 4811 and the three joints 4839 are spaced apart from each other in the second direction y. Two openings 4811 and two joints 4839 are formed at both ends of the first sub-substrate 48A in the second direction y. One opening 4811 and one joint 4839 are formed between the terminal portion 4822B and the terminal portion 4822C in the second direction y, and are formed approximately in the center of the first sub-substrate 48A in the second direction y.

[0187] According to this embodiment, the conduction path to the main substrate 3 can be set more diversely. In addition, when the first sub-substrate 48A is joined to the first conductive portion 32A by laser bonding, the heat applied to the first sub-substrate 48A and the first conductive portion 32A can be reduced. This is suitable for suppressing undesirable thermal deformation of the first sub-substrate 48A and the like.

[0188] Second Embodiment First Modification Example: Fig. 27 FIG. 1 shows a first modification of the semiconductor device A2 . In the semiconductor device A21 of this modification, a recess 48313 is formed in the second sub-metal layer 483 .

[0189] For example, in the removal process for forming the opening 4811, after penetrating the sub-insulating layer 481, a part of the sub-insulating layer 481 is removed, thereby forming the recess 4831. The bottom of the recess 4831 is irradiated with laser light, thereby forming the bonding portion 4839.

[0190] According to this modification, the conduction path to the main substrate 3 can be set more diversely. In addition, in this modification, the recess 4831 is formed, so that the opening 4811 penetrating the sub-insulating layer 481 can be formed more reliably. Therefore, in the laser bonding for forming the bonding portion 4839, a part of the sub-insulating layer 481 is left unintentionally, so that the bonding portion 4839 can be prevented from being insufficiently formed.

[0191] Second Embodiment Second Modification Example: Fig.28 FIG. 2 shows a second modification of the semiconductor device A2. In the semiconductor device A22 of this modification, the first sub-metal layer 482 has an opening 4825.

[0192] The opening 4825 penetrates the first sub-metal layer 482 in the thickness direction z. When viewed in the thickness direction z, the opening 4825 is substantially consistent with the opening 4811.

[0193] According to this modification, the conduction paths to the main substrate 3 can be set more variously. In addition, as understood from this modification, in the laser bonding for forming the bonding portion 4839, the first sub-metal layer 482 may be irradiated with laser through the opening 4825 and the opening 4811.

[0194] Third variation of the second embodiment: Fig.29 A third modification of the semiconductor device A2 is shown. In the semiconductor device A23 of this modification, the sub-insulating layer 481 has an opening 4811 , the first sub-metal layer 482 has an opening 4825 , and the second sub-metal layer 483 has a recess 4831 .

[0195] According to this modification, the conduction path to the main substrate 3 can be set more diversely. In addition, by forming the recessed portion 4831, in the laser bonding for forming the bonding portion 4839, the portion of the second sub-metal layer 483 irradiated with the laser is further away from the first sub-metal layer 482 to the z2 side in the thickness direction z. Therefore, it is possible to suppress the heat wave of the laser bonding from reaching the first sub-metal layer 482.

[0196] Fourth variation of the second embodiment: Fig.30 4 shows a fourth variation of the semiconductor device A2. In the semiconductor device A24 of this variation, the structure of the two openings 4811 formed at both ends of the first sub-substrate 48A in the second direction y is different from that of the above-mentioned example. In this variation, the two openings 4811 formed at both ends of the first sub-substrate 48A in the second direction y are connected to both end edges of the openings 4811 in the second direction y. That is, these openings 4811 are not closed when viewed in the thickness direction z, but are open to the outside of the sub-insulating layer 481.

[0197] According to this modification, the conduction path to the main substrate 3 can be set more diversely. In addition, as understood from this modification, the shape and arrangement of the opening 4811 are not limited in any way. According to this modification, for example, the dimension of the first sub-substrate 48A in the second direction y can be reduced compared to the semiconductor device A2.

[0198] Third embodiment: Fig.31 A semiconductor device according to a third embodiment of the present disclosure is shown. In a semiconductor device A3 according to this embodiment, the structures of a first sub-substrate 48A and a second sub-substrate 48B are different from those in the above-mentioned embodiments.

[0199] In the present embodiment, the first sub-substrate 48A and the second sub-substrate 48B are formed of glass epoxy substrates. The sub-insulating layer 481 is a layer formed of glass epoxy. The first sub-metal layer 482 and the second sub-metal layer 483 are, for example, metal plating layers formed on both sides of the sub-insulating layer 481, for example, containing Cu (copper). The shape observed in the thickness direction z of the first sub-metal layer 482 is, for example, the same as the first sub-metal layer 482 of the semiconductor device A1. The second sub-metal layer 483 is conductively bonded to the first conductive portion 32A or the second conductive portion 32B, for example, through the conductive bonding material 49.

[0200] The connecting conductive part 485 of this embodiment is a so-called through-hole conductive part, for example, and has a through hole penetrating the sub-insulating layer 481, the first sub-metal layer 482, and the second sub-metal layer 483, and is composed of a metal plating layer formed on the inner surface of the through hole.

[0201] According to this embodiment, the conduction path to the main substrate 3 can be set more diversely. In addition, as understood from this embodiment, the specific structure of the first sub-substrate 48A and the second sub-substrate 48B is not limited in any way. According to the first sub-substrate 48A and the second sub-substrate 48B composed of glass epoxy substrates, for example, it is suitable to process the first sub-metal layer 482 into a finer shape.

[0202] Third embodiment: First variation: Fig.32 as well as Fig.33 A first modification of the semiconductor device A3 is shown. In the semiconductor device A31 of this modification, the structure of the connecting conductive portion 485 is different from that of the above-described embodiment.

[0203] In this modification, a concave groove extending in the thickness direction z is formed at the end of the sub-insulating layer 481 on the y1 side in the second direction y. The connecting conductive portion 485 is formed to cover the groove and conduct the first sub-metal layer 482 and the second sub-metal layer 483.

[0204] According to this modification, the conduction path to the main substrate 3 can be set in a more diverse manner. In addition, as can be understood from this modification, the specific structure of the connecting conductive portion 485 is not limited in any way. According to this modification, Fig.33 As shown, it can be expected that the conductive bonding material 49 adheres along the connecting conductive portion 485. This is suitable for improving the bonding strength between the first sub-board 48A and the first conductive portion 32A.

[0205] The semiconductor device and the vehicle of the present disclosure are not limited to the above-mentioned embodiments, and the specific structures of the respective parts of the semiconductor device and the vehicle of the present disclosure can be freely changed in various designs.

[0206] Supplement 1A

[0207] A semiconductor device comprising:

[0208] a main substrate having a first main metal layer;

[0209] A first semiconductor element supported on the main substrate;

[0210] a first sub-substrate supported on the main substrate; and

[0211] a sealing resin covering the first semiconductor element,

[0212] The first sub-substrate includes a sub-insulating layer, and a first sub-metal layer and a second sub-metal layer arranged in a thickness direction with the sub-insulating layer interposed therebetween.

[0213] The second secondary metal layer is conductively bonded to the first primary metal layer.

[0214] The first sub-metal layer includes a first region,

[0215] The first sub-substrate further includes a connecting conductive portion that electrically connects the first region to the second sub-metal layer.

[0216] Supplement 2A

[0217] According to the semiconductor device described in Supplementary Note 1A,

[0218] The first semiconductor element is conductively bonded to the first main metal layer.

[0219] Supplementary Note 3A

[0220] A semiconductor device according to Supplement 1A or 2A,

[0221] A first control terminal is further provided, the first control terminal being electrically connected to the first region and protruding from the sealing resin.

[0222] Supplementary Note 4A

[0223] According to the semiconductor device described in Supplementary Note 3A,

[0224] The first sub-metal layer further includes a second region separated from the first region.

[0225] Note 5A

[0226] According to the semiconductor device described in Supplementary Note 4A,

[0227] The first control terminal is supported by the second region.

[0228] Supplementary Note 6A

[0229] According to the semiconductor device described in Supplementary Note 5A,

[0230] A first metal wire is further provided, and the first metal wire connects the first region and the second region.

[0231] Supplementary Note 7A

[0232] According to the semiconductor device described in Supplementary Note 6A,

[0233] The first sub-metal layer further includes a third region, which is separated from the first region and the second region and is located between the first region and the second region.

[0234] Supplementary Note 8A

[0235] A semiconductor device according to Supplementary Note 6A or 7A,

[0236] The first secondary metal layer includes a base metal layer and a surface metal layer.

[0237] Supplementary Note 9A

[0238] According to the semiconductor device described in Supplementary Note 8A,

[0239] The base material layer contains Cu.

[0240] Note 10A

[0241] According to the semiconductor device described in Supplementary Note 9A,

[0242] The surface metal layer contains Ni.

[0243] Supplementary Note 11A

[0244] According to the semiconductor device described in Supplementary Note 10A,

[0245] The first sub-metal layer includes Cu.

[0246] Supplementary Note 12A

[0247] According to the semiconductor device described in Supplementary Note 11A,

[0248] The first metal wire includes Al.

[0249] Supplementary Note 13A

[0250] A semiconductor device according to any one of Supplementary Notes 1A to 12A,

[0251] The second sub-metal layer is conductively bonded to the first main metal layer via a conductive bonding material.

[0252] Supplementary Note 14A

[0253] A semiconductor device according to any one of Supplementary Notes 1A to 12A,

[0254] The second sub-metal layer is conductively bonded to the first main metal layer by laser bonding.

[0255] Note 15A

[0256] According to the semiconductor device described in Supplementary Note 14A,

[0257] The second sub-metal layer has a joint portion formed by laser bonding.

[0258] The second sub-metal layer has an opening that includes the bonding portion when viewed in the thickness direction.

[0259] Supplementary Note 16A

[0260] A semiconductor device according to any one of Supplementary Notes 1A to 15A,

[0261] The sub-insulating layer includes ceramics.

[0262] Supplementary Note 17A

[0263] A semiconductor device according to any one of Supplementary Notes 1A to 15A,

[0264] The sub-insulating layer includes glass epoxy resin.

[0265] Supplementary Note 18A

[0266] A vehicle having:

[0267] a driving source; and

[0268] The semiconductor device according to any one of Supplementary Notes 1A to 17A,

[0269] The semiconductor device is electrically connected to the driving source.

[0270] Next, refer to Figure 34 to Figure 67 , the fourth to sixth embodiments of the present disclosure are described. Figure 34 to Figure 55 The semiconductor device of the fourth embodiment of the present disclosure is shown. The semiconductor device A1 of the present embodiment includes a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a thermistor 17, a support substrate 3, a first terminal 41, a second terminal 42, a plurality of third terminals 43, a fourth terminal 44, a plurality of control terminals 45, a control terminal support 48, a third conductive component 38, metal wires 71 to 74, a first conductive component 5, a second conductive component 6, and a sealing resin 8.

[0271] Fig.34 It is a perspective view showing the semiconductor device A1. Fig.35 , Fig.36 It is a partial perspective view showing the semiconductor device A1. Fig.37 It is a top view showing the semiconductor device A1. Fig.38 It is a partial top view showing the semiconductor device A1. Fig.39 It is a partial side view showing the semiconductor device A1. Fig.40 It is a partially enlarged top view showing the semiconductor device A1. Fig.41 , Fig.42 It is a partial top view showing the semiconductor device A1. Fig.43 It is a side view showing the semiconductor device A1. Fig.44 It is a bottom view showing the semiconductor device A1. Fig.45 is along Fig.38 Cross-sectional view of the XLV-XLV line. Fig.46 is along Fig.38 Cross-sectional view of line XLVI-XLVI. Fig.47 , Fig.48 It is a partially enlarged cross-sectional view showing the semiconductor device A1. Fig.49 is along Fig.38 Cross-sectional view of line XLIX-XLIX. Fig.50 is along Fig.38 Cross-sectional view of the L-L line. Fig.51 is along Fig.38 Cross-sectional view of the LI-LI line. Fig.52 is along Fig.38 Cross-sectional view of line LII-LII. Fig.53 is along Fig.38 Cross-sectional view of the LIII-LIII line. Fig.54 is along Fig.42 Cross-sectional view of the LIV-LIV line. Fig.55 3 is a cross-sectional view of the third conductive component 38 .

[0272] exist Figures 34 to 55 , the thickness direction z is the thickness direction of the present disclosure, the first direction x is the first direction of the present disclosure, and the second direction y is the second direction of the present disclosure. In addition, one side of the first direction x is referred to as the x1 side of the first direction x, and the other side of the first direction x is referred to as the x2 side of the first direction x. In addition, one side of the second direction y is referred to as the y1 side of the second direction y, and the other side of the second direction y is referred to as the y2 side of the second direction y. In addition, one side of the thickness direction z is referred to as the z1 side of the thickness direction z, and the other side of the thickness direction z is referred to as the z2 side of the thickness direction z.

[0273] The plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B are electronic components that are the functional core of the semiconductor device A1. The constituent materials of each first semiconductor element 10A and each second semiconductor element 10B are, for example, semiconductor materials based on SiC (silicon carbide). The semiconductor material is not limited to SiC, and may also be Si (silicon), GaN (gallium nitride) or C (diamond), etc. Each first semiconductor element 10A and each second semiconductor element 10B are, for example, power semiconductor chips with switching functions such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor). In the present embodiment, the first semiconductor element 10A and the second semiconductor element 10B are MOSFETs, but it is not limited to this, and may also be other transistors such as IGBT (Insulated Gate Bipolar Transistor). Each first semiconductor element 10A and each second semiconductor element 10B are the same element. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, an n-channel MOSFET, but may also be a p-channel MOSFET.

[0274] The first semiconductor element 10A and the second semiconductor element 10B are respectively Fig.47 , Fig.48 As shown, it has an element main surface 101 and an element back surface 102. In each first semiconductor element 10A and each second semiconductor element 10B, the element main surface 101 and the element back surface 102 are spaced apart in the thickness direction z. The element main surface 101 faces the z1 side of the thickness direction z, and the element back surface 102 faces the z2 side of the thickness direction z.

[0275] In this embodiment, the semiconductor device A1 includes four first semiconductor elements 10A and four second semiconductor elements 10B, but the number of the first semiconductor elements 10A and the number of the second semiconductor elements 10B are not limited to this structure and can be appropriately changed according to the performance required of the semiconductor device A1. Fig.41 , Fig.42 In the example, four first semiconductor elements 10A and four second semiconductor elements 10B are respectively configured. The number of first semiconductor elements 10A and second semiconductor elements 10B may be two or three, or five or more. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be equal to or different from each other. The number of first semiconductor elements 10A and second semiconductor elements 10B is determined according to the current capacity handled by semiconductor device A1.

[0276] The semiconductor device A1 is configured as a half-bridge switching circuit, for example. In this case, a plurality of first semiconductor elements 10A constitute an upper branch circuit of the semiconductor device A1, and a plurality of second semiconductor elements 10B constitute a lower branch circuit. In the upper branch circuit, a plurality of first semiconductor elements 10A are connected in parallel to each other, and in the lower branch circuit, a plurality of second semiconductor elements 10B are connected in parallel to each other. Each first semiconductor element 10A is connected in series with each second semiconductor element 10B to form a bridge layer.

[0277] The plurality of first semiconductor elements 10A are respectively as follows Fig.41 , Fig.42 as well as Fig.52 As shown in FIG. 1 and FIG. 2 , the first conductive portion 32A is mounted on the support substrate 3 described later. Fig.41 , Fig.42 In the example shown, a plurality of first semiconductor elements 10A are arranged, for example, in the second direction y, and are spaced apart from each other. Each first semiconductor element 10A is conductively bonded to the first conductive portion 32A via the first conductive bonding material 19A. When each first semiconductor element 10A is bonded to the first conductive portion 32A, the back surface 102 of the element is opposite to the first conductive portion 32A. In addition, unlike the present embodiment, a plurality of first semiconductor elements 10A may also be mounted on a metal component that is different from a part of the DBC substrate, etc. In this case, the metal component is equivalent to the first conductive portion in the present disclosure. The metal component may also be supported on the first conductive portion 32A, for example.

[0278] The plurality of second semiconductor elements 10B are respectively as follows Fig.41 , Fig.42 as well as Fig.51 As shown in FIG. 1 and FIG. 2 , the second conductive portion 32B is mounted on the support substrate 3 described later. Fig.41 , Fig.42 In the example shown, a plurality of second semiconductor elements 10B are arranged in the second direction y, for example, and are spaced apart from each other. Each second semiconductor element 10B is conductively bonded to the second conductive portion 32B via the second conductive bonding material 19B. When each second semiconductor element 10B is bonded to the second conductive portion 32B, the element back surface 102 faces the second conductive portion 32B. Fig.42 As can be understood, when viewed in the first direction x, the plurality of first semiconductor elements 10A overlap with the plurality of second semiconductor elements 10B, but they may not overlap. In addition, unlike the present embodiment, the plurality of second semiconductor elements 10B may be mounted on a metal component different from a part of the DBC substrate or the like. In this case, the metal component is equivalent to the second conductive portion in the present disclosure. The metal component may also be supported on the second conductive portion 32B, for example.

[0279] The plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B respectively include a first main surface electrode 11, a second main surface electrode 12, a third main surface electrode 13, and a back surface electrode 15. The structures of the first main surface electrode 11, the second main surface electrode 12, the third main surface electrode 13, and the back surface electrode 15 described below are common to each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The first main surface electrode 11, the second main surface electrode 12, and the third main surface electrode 13 are provided on the element main surface 101. The first main surface electrode 11, the second main surface electrode 12, and the third main surface electrode 13 are insulated by an insulating film not shown. The back surface electrode 15 is provided on the element back surface 102. The first main surface electrode 11 is, for example, a gate electrode, and a driving signal (for example, a gate voltage) for driving the first semiconductor element 10A (the second semiconductor element 10B) is input. In the first semiconductor element 10A (the second semiconductor element 10B), the second main surface electrode 12 is, for example, a source electrode, and a source current flows. The second main surface electrode 12 of this embodiment has a gate finger 121. The gate finger 121 is, for example, composed of a linear insulator extending in the first direction x, and divides the second main surface electrode 12 into two parts in the second direction y. The third main surface electrode 13 is, for example, a source sensing electrode, and a source current flows. The back electrode 15 is, for example, a drain electrode, and a drain current flows. The back electrode 15 covers substantially the entire area of ​​the back surface 102 of the element. The back electrode 15 is, for example, formed by Ag (silver) plating.

[0280] If a driving signal (gate voltage) is input to the first main surface electrode 11 (gate electrode), each first semiconductor element 10A (each second semiconductor element 10B) switches between the on state and the off state according to the driving signal. In the on state, the current flows from the back electrode 15 (drain electrode) to the second main surface electrode 12 (source electrode), and in the off state, the current does not flow. That is, each first semiconductor element 10A (each second semiconductor element 10B) performs a switching action. The semiconductor device A1 converts the DC voltage input between a fourth terminal 44 and the two first terminals 41 and the second terminal 42 into an AC voltage, for example, through the switching function of the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B, and outputs the AC voltage from the third terminal 43.

[0281] The thermistor 17 is used as a temperature detection sensor. In addition to the thermistor 17, the semiconductor device A1 may be provided with a temperature sensing diode or the like, for example, or may not be provided with the thermistor 17 or the like.

[0282] The support substrate 3 supports a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. The specific structure of the support substrate 3 is not limited in any way, and is, for example, composed of a DBC (Direct Bonded Copper) substrate or an AMB (Active Metal Brazing) substrate. The support substrate 3 includes an insulating layer 31, a surface metal layer 32, and a back metal layer 33. The surface metal layer 32 includes a first conductive portion 32A and a second conductive portion 32B. Here, the first conductive portion 32A corresponds to the first conductive part of the present disclosure. The dimension of the support substrate 3 in the thickness direction z is, for example, greater than 0.4 mm and less than 3.0 mm.

[0283] The insulating layer 31 is, for example, a ceramic having excellent thermal conductivity. Such a ceramic includes, for example, SiN (silicon nitride). The insulating layer 31 is not limited to ceramics, and may also be an insulating resin sheet or the like. The insulating layer 31 is, for example, rectangular in plan view. The dimension of the insulating layer 31 in the thickness direction z is, for example, greater than 0.05 mm and less than 1.0 mm.

[0284] The first conductive portion 32A supports a plurality of first semiconductor elements 10A, and the second conductive portion 32B supports a plurality of second semiconductor elements 10B. The first conductive portion 32A and the second conductive portion 32B are formed on the upper surface of the insulating layer 31 (the surface facing the z1 side of the thickness direction z). The constituent material of the first conductive portion 32A and the second conductive portion 32B includes, for example, Cu (copper). The constituent material may also include, for example, Al (aluminum) other than Cu (copper). The first conductive portion 32A and the second conductive portion 32B are spaced apart in the first direction x. The first conductive portion 32A is located on the x1 side of the first direction x of the second conductive portion 32B. The first conductive portion 32A and the second conductive portion 32B are, for example, rectangular in a plan view. The first conductive portion 32A and the second conductive portion 32B together with the first conductive component 5 and the second conductive component 6 constitute a path for the main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B.

[0285] The first conductive portion 32A has a first main surface 301A. The first main surface 301A is a plane facing the z1 side of the thickness direction z. On the first main surface 301A of the first conductive portion 32A, a plurality of first semiconductor elements 10A are bonded via the first conductive bonding material 19A. The second conductive portion 32B has a second main surface 301B. The second main surface 301B is a plane facing the z1 side of the thickness direction z. On the second main surface 301B of the second conductive portion 32B, a plurality of second semiconductor elements 10B are bonded via the second conductive bonding material 19B. The constituent materials of the first conductive bonding material 19A and the second conductive bonding material 19B are not particularly limited, and may be, for example, solder, a metal paste containing a metal such as Ag (silver), or a sintered metal containing a metal such as Ag (silver). The dimensions of the first conductive portion 32A and the second conductive portion 32B in the thickness direction z are, for example, greater than 0.1 mm and less than 1.5 mm.

[0286] The back metal layer 33 is formed on the lower surface of the insulating layer 31 (the surface facing the z2 side of the thickness direction z). The constituent material of the back metal layer 33 is the same as the constituent material of the surface metal layer 32. The back metal layer 33 has a back surface 302. The back surface 302 is a plane facing the z2 side of the thickness direction z. Fig.44 In the example shown, the back surface 302 is exposed from the sealing resin 8, for example. A heat dissipation component (for example, a heat sink) not shown in the figure can be mounted on the back surface 302. The back surface 302 may not be exposed from the sealing resin 8 but may be covered by the sealing resin 8. In a plan view, the back metal layer 33 overlaps both the first conductive portion 32A and the second conductive portion 32B.

[0287] The first terminal 41, the second terminal 42, the third terminals 43, and the fourth terminal 44 are each formed of a plate-shaped metal plate. The metal plate contains, for example, Cu (copper) or a Cu (copper) alloy. Figure 34 to Figure 38 , Fig.41 , Fig.42 as well as Fig.44 In the illustrated example, the semiconductor device A1 includes one first terminal 41 , one second terminal 42 , and one fourth terminal 44 , and two third terminals 43 , but the number of each terminal is not limited in any way.

[0288] A DC voltage to be the object of power conversion is input to the first terminal 41, the second terminal 42, and the fourth terminal 44. The fourth terminal 44 is a positive electrode (P terminal), and the first terminal 41 and the second terminal 42 are negative electrodes (N terminals). The AC voltage converted by the power of the first semiconductor element 10A and the second semiconductor element 10B is output from the plurality of third terminals 43. The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 each include a portion covered by the sealing resin 8 and a portion exposed from the sealing resin 8.

[0289] like Fig.46 As shown, the fourth terminal 44 is conductively bonded to the first conductive portion 32A. The conductive bonding method is not limited in any way, and a method such as ultrasonic bonding, laser bonding, welding, or a method using solder, metal paste, silver sintered body, etc. may be appropriately used. Fig.41 , Fig.42 As shown in FIG. 1 , the fourth terminal 44 is located on the x1 side of the first direction x relative to the plurality of first semiconductor elements 10A and the first conductive portion 32A. The fourth terminal 44 is electrically connected to the first conductive portion 32A and to the back surface electrode 15 (drain electrode) of each first semiconductor element 10A via the first conductive portion 32A.

[0290] The first terminal 41 and the second terminal 42 are electrically connected to the second conductive component 6. In the present embodiment, the first terminal 41 and the second conductive component 6 are formed integrally. The first terminal 41 and the second conductive component 6 are formed integrally, for example, by cutting and bending a single metal plate material, and do not include a structure including a bonding material for bonding them to each other. In addition, in the present embodiment, the second terminal 42 is formed integrally with the second conductive component 6. In addition, the first terminal 41 and the second terminal 42 only need to be electrically connected to the second conductive component 6, and may be a structure having a bonding portion for bonding them to each other, unlike the present embodiment. The first terminal 41 and the second terminal 42 are respectively as follows: Fig.35 , Fig.38 As shown in FIG. 1 , the first terminal 41 and the second terminal 42 are respectively connected to the second conductive member 6 and are connected to the second main surface electrode 12 (source electrode) of each second semiconductor element 10B via the second conductive member 6.

[0291] like Figure 34 to Figure 38 as well as Fig.44 As shown in the figures, the first terminal 41, the second terminal 42 and the fourth terminal 44 protrude from the sealing resin 8 to the x1 side of the first direction x in the semiconductor device A1. The first terminal 41, the second terminal 42 and the fourth terminal 44 are spaced apart from each other. The first terminal 41 and the second terminal 42 are located on the opposite sides of each other across the fourth terminal 44 in the second direction y. The first terminal 41 is located on the y1 side of the second direction y of the fourth terminal 44, and the second terminal 42 is located on the y2 side of the second direction y of the fourth terminal 44. The first terminal 41, the second terminal 42 and the fourth terminal 44 overlap each other when viewed in the second direction y.

[0292] The two third terminals 43 are respectively Fig.41 , Fig.42 as well as Fig.45As can be understood, the second conductive portion 32B is conductively connected. The conductive connection method is not limited in any way, and a method such as ultrasonic bonding, laser bonding, welding, or a method using solder, metal paste, silver sintered body, etc. is appropriately used. The two third terminals 43 are respectively as shown in FIG. Fig.41 As shown in the figure, the third terminals 43 are located on the x2 side of the first direction x relative to the plurality of second semiconductor elements 10B and the second conductive portion 32B. Each third terminal 43 is electrically connected to the second conductive portion 32B, and is electrically connected to the back electrode 15 (drain electrode) of each second semiconductor element 10B via the second conductive portion 32B. In addition, the number of third terminals 43 is not limited to two, and for example, it may be one or more than three. For example, when there is one third terminal 43, it is desirable to connect it to the central portion of the second conductive portion 32B in the second direction y.

[0293] The plurality of control terminals 45 are pin-shaped terminals for controlling each first semiconductor element 10A and each second semiconductor element 10B. The plurality of control terminals 45 include a plurality of first control terminals 46A to 46E and a plurality of second control terminals 47A to 47D. The plurality of first control terminals 46A to 46E are used for controlling each first semiconductor element 10A, etc. The plurality of second control terminals 47A to 47D are used for controlling each second semiconductor element 10B, etc.

[0294] The plurality of first control terminals 46A to 46E are arranged at intervals in the second direction y. Fig.41 , Fig.46 as well as Fig.53 As shown in FIG. 1 and FIG. 2 , each of the first control terminals 46A to 46E is supported by the first conductive portion 32A via a control terminal support body 48 (a first support portion 48A described later). Fig.38 as well as Fig.41 As shown, each of the first control terminals 46A to 46E is located between the plurality of first semiconductor elements 10A and the first terminal 41 , the second terminal 42 , and the fourth terminal 44 in the first direction x.

[0295] The first control terminal 46A is a terminal (gate terminal) for inputting a drive signal to the plurality of first semiconductor elements 10A. A drive signal (eg, a gate voltage is applied) for driving the plurality of first semiconductor elements 10A is input to the first control terminal 46A.

[0296] The first control terminal 46B is a terminal for detecting source signals of the plurality of first semiconductor elements 10A (source sensing terminal), and detects a voltage (voltage corresponding to a source current) applied from the first control terminal 46B to each second main surface electrode 12 (source electrode) of the plurality of first semiconductor elements 10A.

[0297] The first control terminal 46C and the first control terminal 46D are terminals that are electrically connected to the thermistor 17 .

[0298] The first control terminal 46E is a terminal (drain sense terminal) for detecting drain signals of the plurality of first semiconductor elements 10A, and detects a voltage (voltage corresponding to a drain current) applied from the first control terminal 46E to each back electrode 15 (drain electrode) of the plurality of first semiconductor elements 10A.

[0299] The plurality of second control terminals 47A to 47D are arranged at intervals in the second direction y. Fig.41 as well as Fig.46 As shown in FIG. 1 and FIG. 2 , each of the second control terminals 47A to 47D is supported by the second conductive portion 32B via a control terminal support 48 (a second support portion 48B described later). Fig.38 as well as Fig.41 As shown, each of the second control terminals 47A to 47D is located between the plurality of second semiconductor elements 10B and the two third terminals 43 in the first direction x.

[0300] The second control terminal 47A is a terminal (gate terminal) for inputting a drive signal to the plurality of second semiconductor elements 10B. A drive signal (e.g., a gate voltage) for driving the plurality of second semiconductor elements 10B is input to the second control terminal 47A. The second control terminal 47B is a terminal (source sensing terminal) for detecting a source signal of the plurality of second semiconductor elements 10B. The voltage (voltage corresponding to the source current) applied from the second control terminal 47B to each second main surface electrode 12 (source electrode) of the plurality of second semiconductor elements 10B is detected. The second control terminal 47C and the second control terminal 47D are terminals that are connected to the thermistor 17.

[0301] The plurality of control terminals 45 (the plurality of first control terminals 46A to 46E and the plurality of second control terminals 47A to 47D) each include a bracket 451 and a metal pin 452 .

[0302] The support 451 is made of a conductive material. Fig.47 , Fig.48 As shown, the bracket 451 is bonded to the control terminal support body 48 (the first metal layer 482 described later) via the conductive bonding material 459. The bracket 451 includes a cylindrical portion, an upper flange portion, and a lower flange portion. The upper flange portion is connected to the upper part of the cylindrical portion, and the lower flange portion is connected to the lower part of the cylindrical portion. A metal pin 452 is inserted through at least the upper flange portion and the cylindrical portion of the bracket 451. The bracket 451 is covered with a sealing resin 8 (the second protrusion 852 described later).

[0303] The metal pin 452 is a rod-shaped member extending in the thickness direction z. The metal pin 452 is supported by being pressed into the bracket 451. The metal pin 452 is electrically connected to the control terminal support body 48 (the first metal layer 482 described later) at least via the bracket 451. Fig.47 , Fig.48 As shown in the example shown, when the lower end of the metal pin 452 (the end on the z2 side in the thickness direction z) is in contact with the conductive bonding material 459 in the insertion hole of the bracket 451, the metal pin 452 is connected to the control terminal support body 48 via the conductive bonding material 459.

[0304] The control terminal support body 48 supports the plurality of control terminals 45. The control terminal support body 48 is interposed between the first main surface 301A and the second main surface 301B and the plurality of control terminals 45 in the thickness direction z.

[0305] The control terminal support body 48 includes a first support portion 48A and a second support portion 48B. The first support portion 48A is disposed on the first conductive portion 32A and supports a plurality of first control terminals 46A to 46E among the plurality of control terminals 45. Fig.47 As shown, the first support portion 48A is bonded to the first conductive portion 32A via a bonding material 49. The bonding material 49 may be conductive or insulating, such as solder. The second support portion 48B is disposed on the second conductive portion 32B and supports a plurality of second control terminals 47A to 47D among the plurality of control terminals 45. Fig.48 As shown, the second supporting portion 48B is bonded to the second conductive portion 32B via a bonding material 49 .

[0306] The control terminal support body 48 (the first support portion 48A and the second support portion 48B) is formed of, for example, a DBC (Direct Bonded Copper) substrate. The control terminal support body 48 includes an insulating layer 481, a first metal layer 482, and a second metal layer 483 which are stacked on each other.

[0307] The insulating layer 481 is made of, for example, ceramics and has, for example, a rectangular shape in a plan view.

[0308] like Fig.47 , Fig.48 As shown in FIG. 4 , the first metal layer 482 is formed on the upper surface of the insulating layer 481. Each control terminal 45 is vertically arranged on the first metal layer 482. The first metal layer 482 includes, for example, Cu (copper) or a Cu (copper) alloy. Fig.41As shown in the figures, the first metal layer 482 includes a first portion 482A, a second portion 482B, a third portion 482C, a fourth portion 482D, a fifth portion 482E, and a sixth portion 482F. The first portion 482A, the second portion 482B, the third portion 482C, the fourth portion 482D, the fifth portion 482E, and the sixth portion 482F are spaced apart from each other and insulated.

[0309] The first portion 482A is connected to a plurality of metal wires 71, and is electrically connected to the first main surface electrode 11 (gate electrode) of each first semiconductor element 10A (each second semiconductor element 10B) via each metal wire 71. The first portion 482A and the sixth portion 482F are connected to a plurality of metal wires 73. Thus, the sixth portion 482F is electrically connected to the first main surface electrode 11 (gate electrode) of each first semiconductor element 10A (each second semiconductor element 10B) via the metal wires 73 and the metal wires 71. Fig.41 As shown, the first control terminal 46A is joined to the sixth portion 482F of the first support portion 48A, and the second control terminal 47A is joined to the sixth portion 482F of the second support portion 48B.

[0310] A plurality of metal wires 72 are bonded to the second portion 482B. The second portion 482B is electrically connected to the third main surface electrode 13 (source sensing electrode) of each first semiconductor element 10A (each second semiconductor element 10B) via each metal wire 72. Fig.41 As shown, the first control terminal 46B is joined to the second portion 482B of the first support portion 48A, and the second control terminal 47B is joined to the second portion 482B of the second support portion 48B.

[0311] The thermistor 17 is joined to the third portion 482C and the fourth portion 482D. Fig.41 As shown, the first control terminals 46C and 46D are joined to the third portion 482C and the fourth portion 482D of the first support portion 48A, and the second control terminals 47C and 47D are joined to the third portion 482C and the fourth portion 482D of the second support portion 48B.

[0312] The fifth portion 482E is electrically connected to the first conductive portion 32A via the metal wire 74. Fig.41 As shown, the first control terminal 46E is joined to the fifth portion 482E of the first support portion 48A. The fifth portion 482E of the second support portion 48B is not electrically connected to other structural parts. The surface of the fifth portion 482E is plated with Ni (nickel) (not shown). The constituent material of the metal wires 71 to 74 includes, for example, any one of Au (gold), Al (aluminum) or Cu (copper).

[0313] like Fig.47 , Fig.48 As shown in FIG. 4 , the second metal layer 483 is formed on the lower surface of the insulating layer 481. Fig.47 As shown, the second metal layer 483 of the first support portion 48A is bonded to the first conductive portion 32A via the bonding material 49. Fig.48 As shown, the second metal layer 483 of the second support portion 48B is bonded to the second conductive portion 32B via the bonding material 49 .

[0314] The metal wire 74 connects the first conductive portion 32A and the fifth portion 482E to each other. The metal wire 74 corresponds to the second conductive component of the present disclosure. The metal wire 74 contains a second metal, and in the present embodiment, the second metal is a main component. The second metal is, for example, Al (aluminum).

[0315] like Fig.41 , Fig.42 , Fig.45 As shown, the third conductive component 38 is disposed between the surface metal layer 32 and the metal wire 74. The surface metal layer 32 includes a first metal, and in this embodiment, the first metal is a main component. The first metal is, for example, Cu (copper). Fig.42 As shown in FIG. 1 , the third conductive component 38 is located on the y2 side of the y direction relative to the first support portion 48A. The shape of the third conductive component 38 is not limited in any way. In the example shown in the figure, it is a rectangular shape when viewed in the z direction. The specific method of arranging the third conductive component 38 on the surface metal layer 32 is not limited in any way. In the present embodiment, the third conductive component 38 is conductively bonded to the surface metal layer 32 by, for example, a conductive bonding material 39.

[0316] The specific structure of the third conductive component 38 is not limited. In the example shown in the figure, Fig.54 as well as Fig.55 As shown, the third conductive part 38 has a core material 381 and a first layer 382. The core material 381 is mainly composed of the first metal. In addition, the core material 381 is conductively bonded to the surface metal layer 32 through the conductive bonding material 39. The first layer 382 is stacked on the z1 side of the z direction relative to the core material 381. The first layer 382 is mainly composed of the third metal. The third metal is, for example, Ni (nickel). The first layer 382 is directly bonded to the metal wire 74. The first layer 382 is formed on the surface of the core material 381, for example, by plating. In this case, the thickness of the first layer 382 in the z direction is thinner than the thickness of the core material 381 in the z direction.

[0317] The first conductive component 5 and the second conductive component 6 together with the first conductive portion 32A and the second conductive portion 32B constitute a path of the main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. The first conductive component 5 and the second conductive component 6 are spaced apart from the first main surface 301A and the second main surface 301B to the z1 side in the thickness direction z, and overlap with the first main surface 301A and the second main surface 301B when viewed from above. In the present embodiment, the first conductive component 5 and the second conductive component 6 are respectively formed of a metal plate. The metal includes, for example, Cu (copper) or a Cu (copper) alloy. Specifically, the first conductive component 5 and the second conductive component 6 are appropriately bent metal plates.

[0318] The first conductive component 5 is connected to the second main surface electrode 12 (source electrode) of each first semiconductor element 10A and the second conductive portion 32B, so that the second main surface electrode 12 of each first semiconductor element 10A and the second conductive portion 32B are conductively connected. The first conductive component 5 constitutes a path for the main circuit current switched by the plurality of first semiconductor elements 10A. Fig.40 as well as Fig.41 As shown, the first conductive component 5 includes a main portion 51 , a plurality of first bonding portions 52 , and a plurality of second bonding portions 53 .

[0319] The main portion 51 is located between the plurality of first semiconductor elements 10A and the second conductive portion 32B in the first direction x, and is a strip-shaped portion extending in the second direction y when viewed from above. The main portion 51 overlaps both the first conductive portion 32A and the second conductive portion 32B when viewed from above, and is spaced from the first main surface 301A and the second main surface 301B toward the z1 side of the thickness direction z in the thickness direction z. Fig.49 As shown in FIG. 1 , the main portion 51 is located on the z2 side in the thickness direction z relative to a third path portion 66 and a fourth path portion 67 of a second conductive member 6 described later, and is closer to the first main surface 301A and the second main surface 301B than the third path portion 66 and the fourth path portion 67 .

[0320] In the present embodiment, the main portion 51 is arranged parallel to the first main surface 301A and the second main surface 301B.

[0321] like Fig.41 As shown in FIG. 1 and FIG. 2 , the main portion 51 extends continuously in the second direction y corresponding to the region where the plurality of first semiconductor elements 10A are arranged. Fig.40 , Fig.41 , Fig.46As shown in the figures, in the present embodiment, a plurality of first openings 514 are formed in the main portion 51. The plurality of first openings 514 are, for example, through holes that penetrate in the thickness direction z (the plate thickness direction of the main portion 51). The plurality of first openings 514 are arranged at intervals in the second direction y. The plurality of first openings 514 are respectively provided corresponding to the plurality of first semiconductor elements 10A. In the present embodiment, four first openings 514 are provided in the main portion 51, and the positions of these first openings 514 and the plurality of (four) first semiconductor elements 10A in the second direction y are equal to each other.

[0322] In this embodiment, if Fig.41 , Fig.46 As shown in FIG. 1 and FIG. 2 , each first opening 514 overlaps with the gap between the first conductive portion 32A and the second conductive portion 32B in a plan view. The plurality of first openings 514 are formed to facilitate the flow of the resin material between the upper side (z1 side in the thickness direction z) and the lower side (z2 side in the thickness direction z) near the main portion 51 (first conductive member 5) when the fluid resin material is injected to form the sealing resin 8.

[0323] like Fig.41 As shown in FIG. 1 , a plurality of first bonding portions 52 and a plurality of second bonding portions 53 are respectively connected to the main portion 51 and are arranged corresponding to the plurality of first semiconductor elements 10A. Specifically, each first bonding portion 52 is located on the x1 side of the first direction x relative to the main portion 51. Each second bonding portion 53 is located on the x2 side of the first direction x relative to the main portion 51. Fig.47 As shown, each first bonding portion 52 is bonded to the second main surface electrode 12 of any corresponding first semiconductor element 10A via a conductive bonding material 59. Each second bonding portion 53 is bonded to the second conductive portion 32B via a conductive bonding material 59. The constituent material of the conductive bonding material 59 is not particularly limited, and may be, for example, solder, metal paste, or sintered metal. In the present embodiment, the first bonding portion 52 has two portions separated by a gap in the second direction y. The two portions are bonded to the second main surface electrode 12 on both sides of the second direction y via the gate finger 121 of the second main surface electrode 12 of the first semiconductor element 10A.

[0324] The second conductive component 6 conducts the second main surface electrode 12 (source electrode) of each second semiconductor element 10B to the first terminal 41 and the second terminal 42. The second conductive component 6 is formed integrally with the first terminal 41 and the second terminal 42. The second conductive component 6 constitutes a path for the main circuit current switched by the plurality of second semiconductor elements 10B. Fig.40As shown, the second conductive member 6 includes a plurality of third joint portions 61, a first path portion 64, a second path portion 65, a plurality of third path portions 66, and a fourth path portion 67. In the example shown, the second conductive member 6 includes a first step portion 602 and a second step portion 603.

[0325] The plurality of third bonding portions 61 are portions that are bonded to the plurality of second semiconductor elements 10B individually. Each third bonding portion 61 is bonded to the second main surface electrode 12 of each second semiconductor element 10B via a conductive bonding material 69. The constituent material of the conductive bonding material 69 is not particularly limited, and may be, for example, solder, metal paste, or sintered metal. In the present embodiment, the third bonding portion 61 has two flat portions 611 and two first inclined portions 612.

[0326] The two flat portions 611 are arranged in the second direction y. The two flat portions 611 are spaced apart from each other in the second direction y. The shape of the flat portion 611 is not limited in any way, and in the example shown in the figure, it is a rectangular shape. The two flat portions 611 are bonded to the second main surface electrode 12 on both sides of the second direction y via the gate fingers 121 of the second main surface electrode 12 of the second semiconductor element 10B.

[0327] The two first inclined portions 612 are connected to the outer sides of the two flat portions 611 in the second direction y. That is, the first inclined portion 612 located on the y1 side of the second direction y is connected to the y1 side of the second direction y relative to the flat portion 611 located on the y1 side of the second direction y. In addition, the first inclined portion 612 located on the y2 side of the second direction y is connected to the y2 side of the second direction y relative to the flat portion 611 located on the y2 side of the second direction y. The first inclined portion 612 is inclined so as to be located on the z1 side of the thickness direction z as it is further away from the flat portion 611 in the second direction y.

[0328] The first path portion 64 is interposed between the plurality of third bonding portions 61 and the first terminal 41. In the illustrated example, the first path portion 64 is connected to the first terminal 41 via the first step portion 602. The first path portion 64 overlaps the first conductive portion 32A in a plan view. The first path portion 64 is shaped to extend in the first direction x as a whole.

[0329] The first path portion 64 includes a first strip portion 641 and a first extension portion 643. The first strip portion 641 is located on the x2 side of the first direction x relative to the first terminal 41 and is substantially parallel to the first main surface 301A. The first strip portion 641 is a shape that extends in the first direction x as a whole. In the example shown in the figure, the first strip portion 641 has a recessed portion 649. The recessed portion 649 is a portion where a portion of the first strip portion 641 is recessed toward the y1 side of the second direction y.

[0330] The first extension portion 643 extends from the side end of the first strip-shaped portion 641 on the y1 side in the second direction y to the z2 side in the thickness direction z. The first extension portion 643 is separated from the first conductive portion 32A. In the example shown in the figure, the first extension portion 643 is a shape along the thickness direction z, and is a long rectangular shape with the first direction x as the length direction. In addition, the first path portion 64 may also be a structure without the first extension portion 643.

[0331] The second path portion 65 is interposed between the plurality of third bonding portions 61 and the second terminal 42. In the illustrated example, the second path portion 65 is connected to the second terminal 42 via the second step portion 603. The second path portion 65 overlaps the first conductive portion 32A in a plan view. The second path portion 65 is shaped to extend in the first direction x as a whole.

[0332] The second path portion 65 includes a second strip portion 651 and a second extension portion 653. The second strip portion 651 is located on the x2 side of the first direction x relative to the second terminal 42 and is substantially parallel to the first main surface 301A. The second strip portion 651 is a shape that extends in the first direction x as a whole. In the example shown in the figure, the second strip portion 651 has a recess 659. The recess 659 is a portion where a part of the second strip portion 651 is recessed toward the y2 side of the second direction y.

[0333] The second extension portion 653 extends from the side end of the second strip-shaped portion 651 on the y2 side in the second direction y to the z2 side in the thickness direction z. The second extension portion 653 is separated from the first conductive portion 32A. In the example shown in the figure, the second extension portion 653 is a shape along the thickness direction z, and is a long rectangular shape with the first direction x as the length direction. In addition, the second path portion 65 may also be a structure without the second extension portion 653.

[0334] In the following description, when describing variations and other embodiments related to the first path portion 64 , the structure related to the first path portion 64 , for example, is line-symmetrical about a center line extending in the first direction x, and can also be appropriately adopted in the second path portion 65 .

[0335] The plurality of third path portions 66 are connected to the plurality of third bonding portions 61 individually. Each of the third path portions 66 is shaped to extend in the first direction x, and is arranged at intervals from each other in the second direction y. The number of the plurality of third path portions 66 is not limited in any way, and in the example shown in the figure, five third path portions 66 are arranged. Each of the third path portions 66 is arranged to be located between the plurality of second semiconductor elements 10B in the second direction y, or to be located outside the plurality of second semiconductor elements 10B in the second direction y.

[0336] A recess 669 is formed in two third path portions 66 located on both outer sides in the second direction y. The recess 669 is recessed from the inner side toward the outer side in the second direction y. In the example shown in the figure, one recess 669 is formed in each of the two third path portions 66. Fig.38 In the figure, the second conductive portion 32B is presented through these recesses 669 .

[0337] In the present embodiment, one third joint portion 61 is disposed between two third path portions 66 adjacent in the second direction y. In one third joint portion 61, the first inclined portion 612 located on the y1 side in the second direction y is connected to the third path portion 66 located on the y1 side in the second direction y of the two third path portions 66 adjacent in the second direction y. In one third joint portion 61, the first inclined portion 612 located on the y2 side in the second direction y is connected to the third path portion 66 located on the y2 side in the second direction y of the two third path portions 66 adjacent in the second direction y.

[0338] The fourth path portion 67 is connected to the ends on the x1 side of the first direction x of the plurality of third path portions 66. The fourth path portion 67 is shaped to extend long in the second direction y. The fourth path portion 67 is connected to the ends on the x2 side of the first direction x of the first strip-shaped portion 641 of the first path portion 64 and the second strip-shaped portion 651 of the second path portion 65. In the example shown in the figure, the first path portion 64 is connected to the end on the y1 side of the second direction y of the fourth path portion 67. In addition, the second path portion 65 is connected to the end on the y2 side of the second direction y of the fourth path portion 67.

[0339] The sealing resin 8 covers the plurality of first semiconductor elements 10A, the plurality of second semiconductor elements 10B, the support substrate 3 (except the back surface 302), the first terminal 41, the second terminal 42, a portion of each of the plurality of third terminals 43 and the fourth terminal 44, a portion of each of the plurality of control terminals 45, the control terminal support 48, the first conductive component 5, the second conductive component 6, and the plurality of metal wires 71 to 74. The sealing resin 8 is made of, for example, a black epoxy resin. The sealing resin 8 is formed, for example, by molding. The sealing resin 8 has a dimension of, for example, about 35 mm to 60 mm in the first direction x, a dimension of, for example, about 35 mm to 50 mm in the second direction y, and a dimension of, for example, about 4 mm to 15 mm in the thickness direction z. These dimensions are the sizes of the largest parts along each direction. The sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831 to 834.

[0340] like Fig.43 , Fig.45 as well as Fig.51As shown in FIG. 1 , the resin main surface 81 and the resin back surface 82 are spaced apart in the thickness direction z. The resin main surface 81 faces the z1 side of the thickness direction z, and the resin back surface 82 faces the z2 side of the thickness direction z. A plurality of control terminals 45 (a plurality of first control terminals 46A to 46E and a plurality of second control terminals 47A to 47D) protrude from the resin main surface 81. Fig.44 As shown, the resin back surface 82 is a frame-shaped structure that surrounds the back surface 302 (the lower surface of the back metal layer 33) of the support substrate 3 when viewed from above. The back surface 302 of the support substrate 3 is exposed from the resin back surface 82, for example, on the same surface as the resin back surface 82. The plurality of resin side surfaces 831 to 834 are respectively connected to both the resin main surface 81 and the resin back surface 82, and are sandwiched by them in the thickness direction z. Fig.37 As shown in FIG. 1 , the resin side surface 831 and the resin side surface 832 are spaced apart in the first direction x. The resin side surface 831 faces the x2 side of the first direction x, and the resin side surface 832 faces the x1 side of the first direction x. The two third terminals 43 protrude from the resin side surface 831, and the first terminal 41, the second terminal 42, and the fourth terminal 44 protrude from the resin side surface 832. Fig.37 As shown in FIG. 8A and FIG. 8B , the resin side surface 833 and the resin side surface 834 are spaced apart in the second direction y. The resin side surface 833 faces the y2 side in the second direction y, and the resin side surface 834 faces the y1 side in the second direction y.

[0341] like Fig.37 As shown, a plurality of recesses 832a are formed on the resin side surface 832. Each recess 832a is a portion that is recessed in the first direction x when viewed from above. The plurality of recesses 832a have a portion formed between the first terminal 41 and the fourth terminal 44, and a portion formed between the second terminal 42 and the fourth terminal 44 when viewed from above. The plurality of recesses 832a are provided to increase the creepage distance between the first terminal 41 and the fourth terminal 44 along the resin side surface 832, and the creepage distance between the second terminal 42 and the fourth terminal 44 along the resin side surface 832.

[0342] like Fig.45 as well as Fig.46 As shown in FIGS. 8A and 8B , the sealing resin 8 has a plurality of first protrusions 851 , a plurality of second protrusions 852 , and a resin void 86 .

[0343] The plurality of first protrusions 851 protrude from the resin main surface 81 in the thickness direction z. The plurality of first protrusions 851 are arranged near the four corners of the sealing resin 8 in a plan view. A first protrusion end face 851a is formed at the front end (the end on the z1 side of the thickness direction z) of each first protrusion 851. Each first protrusion end face 851a of the plurality of first protrusions 851 is substantially parallel to the resin main surface 81 and is located on the same plane (x-y plane). Each first protrusion 851 is, for example, a truncated cone with a bottom and a hollow center. The plurality of first protrusions 851 are used as spacers when the semiconductor device A1 is mounted on a control circuit board or the like in a device using power generated by the semiconductor device A1. The plurality of first protrusions 851 each have a recess 851b and an inner wall surface 851c formed in the recess 851b. The shape of each first protrusion 851 may be a columnar shape, preferably a cylindrical shape. The shape of the recessed portion 851b is cylindrical, and the inner wall surface 851c is preferably a single perfect circle when viewed from above.

[0344] The semiconductor device A1 is sometimes mechanically fixed to a control circuit board or the like by screwing or the like. In this case, internal thread teeth can be formed on the inner wall surface 851c of the recessed portion 851b in the plurality of first protrusions 851. Nuts may also be embedded in the recessed portion 851b in the plurality of first protrusions 851.

[0345] like Fig.46 As shown in the figure, a plurality of second protrusions 852 protrude from the resin main surface 81 in the thickness direction z. The plurality of second protrusions 852 overlap with the plurality of control terminals 45 when viewed from above. Each metal pin 452 of the plurality of control terminals 45 protrudes from each second protrusion 852. Each second protrusion 852 is truncated cone-shaped. The second protrusion 852 covers a portion of the bracket 451 and the metal pin 452 in each control terminal 45.

[0346] Next, the operation of this embodiment will be described.

[0347] When the surface metal layer 32 is mainly composed of the first metal and the metal wire 74 is mainly composed of the second metal, if the metal wire 74 is directly connected to the surface metal layer 32, there is a possibility that an undesirable phenomenon will occur. In this embodiment, the third conductive component 38 is arranged between the surface metal layer 32 and the metal wire 74. The third conductive component 38 includes a third metal different from the first metal and the second metal. Therefore, it is possible to avoid the component composed of the first metal and the component composed of the second metal from being directly connected, and it is possible to suppress the occurrence of undesirable phenomena.

[0348] When the first metal is Cu (copper) and the second metal is Al (aluminum), the Kirkendall phenomenon may occur when the metal is left at high temperature, for example. Therefore, the Kirkendall phenomenon can be suppressed by making the third metal Ni (nickel).

[0349] The third conductive component 38 may be divided into a core material and a first layer 382, ​​and the first layer 382 containing the third metal as a main component may be formed on the surface in contact with the metal wire 74. In order to suppress the Kirkendall phenomenon, it is sufficient to form only the surface in contact with the metal wire 74 with a material containing the third metal as a main component. Thus, the cost of forming the third conductive component 38 can be reduced.

[0350] The third conductive component 38 is bonded to the surface metal layer 32 via the conductive bonding material 39. In the third conductive component 38, a second layer mainly composed of the third metal is formed on the surface in contact with the conductive bonding material 39. Thus, the occurrence of the Kirkendall phenomenon between the third conductive component 38 and the conductive bonding material 39 can be suppressed.

[0351] The control terminal support body 48 has a first metal layer 482 and a second metal layer 483 on the insulating layer 31 and on both sides thereof. The control terminal support body 48 is located on the support substrate 3. In this case, if the thickness T1 of the third conductive component 38 is smaller than the thickness T2 of the control terminal support body 48, it is possible to prevent other components from being caught on the third conductive component 38 during assembly.

[0352] The first terminal 41 is formed integrally with the second conductive component 6. Thus, compared with a structure in which the first terminal 41 and the second conductive component 6 are bonded, the bonding process in the manufacturing process of the semiconductor device A1 can be reduced. In addition, when the semiconductor device A1 is used, cracks, peeling, etc. can be avoided at the bonding portion. Therefore, the manufacturing process of the semiconductor device A1 can be simplified, or the reliability during use can be improved.

[0353] In addition, the second terminal 42 is formed integrally with the second conductive component 6. Thus, compared with a structure in which the second terminal 42 is bonded to the second conductive component 6, the bonding step in the manufacturing process of the semiconductor device A1 can be reduced. In addition, when the semiconductor device A1 is used, cracks, peeling, etc. can be avoided at the bonding portion. Therefore, the manufacturing process of the semiconductor device A1 can be simplified, or the reliability during use can be improved.

[0354] The second conductive member 6 has a first step portion 602 connected to the first terminal 41. Thus, the rigidity of the connection portion between the second conductive member 6 and the first terminal 41 can be improved.

[0355] The second conductive member 6 has a second step portion 603 connected to the second terminal 42. Thus, the rigidity of the connection portion between the second conductive member 6 and the second terminal 42 can be improved.

[0356] The third bonding portion 61 has two flat portions 611 and two first inclined portions 612. The two first inclined portions 612 are connected to the outer sides of the two flat portions 611 in the second direction y. Therefore, the current flowing in the second main surface electrode 12 flows from the second main surface electrode 12 to both sides of the second direction y via the flat portions 611 and the first inclined portions 612. Thus, it is possible to suppress the current flowing to the second main surface electrode 12 from being concentrated in one location.

[0357] The two flat portions 611 are spaced apart in the second direction y. This allows current to flow reliably to both the two flat portions 611 and the two first inclined portions 612 , which is preferable for suppressing current concentration.

[0358] By spacing the two flat portions 611 apart from each other, the gate finger 121 of the second main surface electrode 12 can be arranged between them.

[0359] One third junction portion 61 is disposed between two third path portions 66 adjacent to each other in the second direction y. Thus, the current flowing through the second main surface electrode 12 of one second semiconductor element 10B can be distributed to flow to the two third path portions 66 .

[0360] Next, a first variation of the fourth embodiment is shown. This variation is related to the third conductive component 38. In this variation, Fig.56 As shown, the first layer 382 is partially formed only in the portion in contact with the metal wire 74. That is, the first layer 382 is smaller than the core material 381 when viewed in the z direction. Since the Kirkendall phenomenon occurs at the junction of the metal wire 74 and the third conductive component 38, the first layer 382 may be formed only in this portion.

[0361] Next, a second variation of the fourth embodiment is shown. In this variation, Fig.57 As shown, the third conductive component 38 of this modification further includes a second layer 383. The second layer 383 is provided on the side opposite to the first layer 382 with respect to the core material 381, and is formed on the surface in contact with the conductive bonding material 39. In this case, since the conductive bonding material 39 is not in direct contact with the core material 381, the Kirkendall phenomenon can also be prevented from occurring in this portion.

[0362] Next, a third variation of the fourth embodiment is shown. Fig.58 as well as Fig.59As shown, in consideration of manufacturing convenience, plating may be applied to the entire surface of the core material 381. In this case, the third conductive component 38 further includes a third layer 384, a fourth layer 385, a fifth layer 386, and a sixth layer 387. The third layer 384, the fourth layer 385, the fifth layer 386, and the sixth layer 387 cover the four side surfaces of the core material 381 individually.

[0363] Figure 60 to Figure 67 1 and 2 represent other embodiments of the present disclosure. In addition, in these figures, for elements that are the same or similar to the above-mentioned embodiments, the same symbols as the above-mentioned embodiments are marked. In addition, the structures of each part in each modification and each embodiment can be appropriately combined with each other within the range that does not cause technical contradictions.

[0364] Figure 60 to Figure 64 A fifth embodiment of the present disclosure is shown. In a semiconductor device A2 of this embodiment, the arrangement positions and number of third conductive parts 38 are different from those in the above-described example.

[0365] In the fifth embodiment, the control terminal support 48 corresponds to the first conductive component of the present disclosure, and the metal wires 71 to 74 correspond to the second conductive component of the present disclosure. A plurality of third conductive components 38 are joined to the metal wires 71 to 74. The plurality of third conductive components 38 are joined to the plurality of control terminal support 48 via the conductive bonding material 39.

[0366] like Fig.60 as well as Fig.61 As shown, the metal wire 71 makes the first main surface electrode 11 and the first part 482A conductive. In this embodiment, the third conductive part 38 is arranged between the first part 482A and the metal wire 71. The first part 482A corresponds to the first conductive part of the present disclosure, and the metal wire 71 corresponds to the second conductive part. The core material 381 is conductively bonded to the first part 482A through the conductive bonding material 39. The first layer 382 is directly bonded to the metal wire 71.

[0367] like Fig.60 as well as Fig.62 As shown, the metal wire 72 makes the third main surface electrode 13 and the second part 482B conductive. In this embodiment, the third conductive part 38 is arranged between the second part 482B and the metal wire 72. The second part 482B corresponds to the first conductive part of the present disclosure, and the metal wire 72 corresponds to the second conductive part. The core material 381 is conductively bonded to the second part 482B through the conductive bonding material 39. The first layer 382 is directly bonded to the metal wire 72.

[0368] exist Fig.63, two third conductive parts 38 are shown. The metal wire 73 makes the first part 482A and the sixth part 482F conductive. In the present embodiment, one third conductive part 38 is arranged between the first part 482A and the metal wire 73, and the other third conductive part 38 is arranged between the sixth part 482F and the metal wire 73. The first part 482A and the sixth part 482F correspond to the first conductive part of the present disclosure, and the metal wire 73 corresponds to the second conductive part. The core material 381 is conductively bonded to the first part 482A and the sixth part 482F respectively through the conductive bonding material 39. The first layer 382 is directly bonded to the metal wire 73.

[0369] exist Fig.64 , two third conductive parts 38 are shown. The metal wire 74 makes the first part 482A and the surface metal layer 32 conductive. In the present embodiment, one third conductive part 38 is arranged between the first part 482A and the metal wire 74, and the other third conductive part 38 is arranged between the surface metal layer 32 and the metal wire 74. The first part 482A and the surface metal layer 32 correspond to the first conductive part of the present disclosure, and the metal wire 74 corresponds to the second conductive part. The core material 381 is conductively bonded to the first part 482A and the surface metal layer 32 respectively through the conductive bonding material 39. The first layer 382 and the metal wire 74, and the surface metal layer 32 and the metal wire 74 are directly bonded.

[0370] According to the present embodiment, it is also possible to suppress the Kirkendall phenomenon that occurs between the control terminal support 48 and the metal wires 71 to 74 .

[0371] Figure 65 to Figure 67 1 shows a semiconductor device of the sixth embodiment of the present disclosure. In the semiconductor device A3 of the present embodiment, the configuration position of the third conductive component 38 and the shape of the second conductive component 6 are different from the above-mentioned examples. The semiconductor device A3 further includes metal wires 75 and 76. The number and thickness of the metal wires 75 and 76 are not limited. In order to flow a large current, it is desirable to use a metal wire with a number of, for example, about four and a thickness thicker than the metal wires 71 to 74.

[0372] like Fig.65 , Fig.66 As shown, the metal wire 75 makes the second conductive part 32B and the first semiconductor element 10A conductive. In this embodiment, the third conductive part 38 is arranged between the second conductive part 32B and the metal wire 75. The second conductive part 32B corresponds to the first conductive part, and the metal wire 75 corresponds to the second conductive part. The core material 381 is conductively bonded to the second conductive part 32B through the conductive bonding material 39. The first layer 382 is directly bonded to the metal wire 75.

[0373] like Fig.65 , Fig.67As shown, the shape of the second conductive component 6 is different from that of the fourth embodiment, and the length in the first direction x is shorter. Therefore, the metal wire 76 makes the second conductive component 6 and the second semiconductor element 10B conductive. In this embodiment, the third conductive component 38 is arranged between the third path portion 66 and the metal wire 76. The insulator 324 is between the third path portion 66 and the first conductive portion 32A. The insulator 324 is a component with electrical insulation. Here, the second conductive component 6 corresponds to the first conductive component of the present disclosure, and the metal wire 76 corresponds to the second conductive component of the present disclosure. The core material 381 is conductively bonded to the second conductive component 6 through the conductive bonding material 39. The first layer 382 is directly bonded to the metal wire 76.

[0374] According to the present embodiment, it is also possible to suppress the Kirkendall phenomenon that occurs between the second conductive portion 32B and the metal wire 75 and between the second conductive member 6 and the metal wire 76 .

[0375] The semiconductor device of the present disclosure is not limited to the above-described embodiment, and the specific structure of each part of the semiconductor device of the present disclosure can be freely changed in various designs.

[0376] Note 1B.

[0377] A semiconductor device comprising:

[0378] a first conductive feature comprising a first metal;

[0379] a second conductive feature comprising a second metal; and

[0380] a third conductive part including a third metal,

[0381] The first metal, the second metal and the third metal are different from each other,

[0382] A third conductive component is arranged between the first conductive component and the second conductive component.

[0383] Note 2B.

[0384] According to the semiconductor device described in Supplementary Note 1B,

[0385] The third conductive component comprises a core material and a first layer.

[0386] The main component of the core material is the first metal.

[0387] The main component of the first layer is the third metal.

[0388] The first layer is directly bonded to the second conductive component.

[0389] Note 3B.

[0390] According to the semiconductor device described in Supplementary Note 2B,

[0391] The third conductive component further comprises a second layer,

[0392] The second layer is located on the opposite side of the first layer.

[0393] The second layer is mainly composed of the third metal.

[0394] The second layer is conductively connected to the first conductive component.

[0395] Note 4B.

[0396] A semiconductor device according to any one of Supplementary Notes 1B to 3B,

[0397] The first metal is Cu.

[0398] Note 5B.

[0399] A semiconductor device according to any one of Supplementary Notes 1B to 4B,

[0400] The first conductive component is mainly composed of the first metal.

[0401] Note 6B.

[0402] A semiconductor device according to any one of Supplementary Notes 1B to 5B,

[0403] The second metal is Al.

[0404] Note 7B.

[0405] A semiconductor device according to any one of Supplementary Notes 1B to 6B,

[0406] The second conductive component is mainly composed of the second metal.

[0407] Note 8B.

[0408] A semiconductor device according to any one of Supplementary Notes 1B to 7B,

[0409] The third metal is Ni.

[0410] Note 9B.

[0411] A semiconductor device according to any one of Supplementary Notes 1B to 8B,

[0412] The third conductive component is mainly composed of the third metal.

[0413] Note 10B.

[0414] A semiconductor device according to any one of Supplementary Notes 1B to 9B,

[0415] The first conductive component is in a plate shape.

[0416] Note 11B.

[0417] A semiconductor device according to any one of Supplementary Notes 1B to 10B,

[0418] The second conductive component is a metal wire.

[0419] Note 12B.

[0420] A semiconductor device according to any one of Supplementary Notes 1B to 11B,

[0421] The conductive bonding material is interposed between the first conductive component and the third conductive component.

[0422] Note 13B.

[0423] A semiconductor device according to any one of Supplementary Notes 1B to 12B,

[0424] The insulating layer and both sides thereof are provided with support substrates, the support substrates having conductive layers, one of the conductive layers being the first conductive component.

[0425] The semiconductor element is conductively connected to the first conductive component.

[0426] Note 14B.

[0427] According to the semiconductor device described in Supplementary Note 13B,

[0428] A control terminal support body is provided on the insulating layer and on both sides thereof, and the control terminal support body has a conductive first metal layer and a second metal layer.

[0429] The control terminal support body is located on the support substrate.

[0430] The thickness of the third conductive component is smaller than the thickness of the control terminal support body.

[0431] Note 15B.

[0432] A semiconductor device according to Supplementary Note 13B or 14B,

[0433] The control terminal support body is directly bonded to the second conductive component.

[0434] Explanation of symbols

[0435] (exist Figure 1 to Figure 33 Symbols used in

[0436] A1, A11, A12, A13, A14, A2, A21, A22, A23, A24, A3, A31—semiconductor device, B1—vehicle, 3—main substrate, 5—first conductive component, 6—second conductive component, 8—sealing resin, 10A—first semiconductor element, 10B—second semiconductor element, 11—first main surface electrode, 12—second main surface electrode, 13—third main surface electrode, 15—back electrode, 17—thermistor, 19A—first conductive bonding material, 19B—second conductive bonding material, 31—main insulating layer, 32—first main metal layer, 32A—first conductive portion, 32B—second conductive portion, 33—second main metal layer , 41—first terminal, 42—second terminal, 43—third terminal, 44—fourth terminal, 45, 46A, 46B, 47A, 47B, 47C, 47D—control terminal, 46E—control terminal (first control terminal), 48—control terminal support, 48A—first sub-substrate, 48B—second sub-substrate, 49—conductive bonding material, 51—main part, 52—first bonding part, 53—second bonding part, 59—conductive bonding material, 61—third bonding part, 64—first path part, 65—second path part, 66—third path part, 67—fourth path part, 69—conductive bonding material, 71, 72, 73—metal wire, 81—resin main part Surface, 82—resin back surface, 91—on-board charger, 92—battery, 93—drive system, 101—element main surface, 102—element back surface, 301A—first main surface, 301B—second main surface, 302—back surface, 451—bracket, 452—metal pin, 481—sub-insulating layer, 482—first sub-metal layer, 482A, 482B, 482F—region, 482E—region (first region), 482D—region (second region), 482C—region (third region), 483—second sub-metal layer, 485—connecting conductive portion, 514—first opening, 602—first step portion, 603—second step portion, 611—flat portion, 61 2—first inclined portion, 641—first strip-shaped portion, 643—first extending portion, 651—second strip-shaped portion, 653—second extending portion, 831, 832, 833, 834—resin side, 832a—recess, 931—inverter, 932—driving source, 4811—opening portion, 4820—parent material layer, 4821A, 4821B, 4821C, 4821D—connecting portion, 4822A, 4822B, 4822C, 4822D—terminal portion, 4825—opening portion, 4829—surface metal layer, 4831—recess, 4839—joining portion, 48313—recess, x—first direction, y—second direction, z—thickness direction.

[0437] (exist Figure 33 to Figure 67 Symbols used in

[0438] A1, A2, A3—semiconductor device, 3—support substrate, 5—first conductive component, 6—second conductive component, 8—sealing resin, 10A—first semiconductor element, 10B—second semiconductor element, 11—first main surface electrode, 12—second main surface electrode, 13—third main surface electrode, 15—back electrode, 17—thermistor, 19A—first conductive bonding material, 19B—second conductive bonding material, 31—insulating layer, 32—surface metal layer, 32A—first conductive part (first conductive part), 32B—second conductive part, 33—back metal layer, 38—third conductive part, 39—conductive bonding material, 41—first terminal, 42—second terminal, 43—third terminal, 44—first Four terminals, 45—control terminal, 46A—first control terminal, 46B—first control terminal, 46C—first control terminal, 46D—first control terminal, 46E—first control terminal, 47A—second control terminal, 47B—second control terminal, 47C—second control terminal, 47D—second control terminal, 48—control terminal support body, 48A—first support part, 48B—second support part, 49—joining material, 51—main part, 52—first joining part, 53—second joining part, 59—conductive joining material, 61—third joining part, 64—first path part, 65—second path part, 66—third path part, 67—fourth path part, 69—conductive joining material, 71, 72, 73, 74, 75, 76—metal wire (second conductive part), 81—resin main surface, 82—resin back surface, 86—resin gap, 101—element main surface, 102—element back surface, 121—gate finger, 301A—first main surface, 301B—second main surface, 302—back surface, 324—insulator, 381—core material, 382—first layer, 383—second layer, 384—third layer, 385—fourth layer, 386—fifth layer, 387—sixth layer, 451—bracket, 452—metal pin, 459—conductive bonding material, 481—insulating layer, 482—first metal layer, 482A—first part, 482B—second part, 482C—third part, 482D—third Four parts, 482E—the fifth part, 482F—the sixth part, 483—the second metal layer, 514—the first opening, 602—the first step portion, 603—the second step portion, 611—the flat portion, 612—the first inclined portion, 641—the first strip portion, 643—the first protruding portion, 649—the recessed portion, 651—the second strip portion, 653—the second protruding portion, 659, 669—the recessed portion, 831, 832, 833, 834—the resin side surface, 832a—the recessed portion, 851—the first protruding portion, 851a—the first protruding end surface, 851b—the recessed portion, 851c—the inner wall surface, 852—the second protruding portion, T1, T2—the thickness, x—the first direction, y—the second direction, z—the thickness direction.

Claims

1. A semiconductor device, characterized in that: have: a main substrate having a first main metal layer; A first semiconductor element supported on the main substrate; A first sub-baseboard supported on the main baseboard; as well as a sealing resin covering the first semiconductor element, The first sub-substrate includes a sub-insulating layer, and a first sub-metal layer and a second sub-metal layer arranged in a thickness direction with the sub-insulating layer interposed therebetween. The second secondary metal layer is conductively bonded to the first primary metal layer. The first sub-metal layer includes a first region, The first sub-substrate further includes a connecting conductive portion that electrically connects the first region to the second sub-metal layer.

2. The semiconductor device according to claim 1, wherein: The first semiconductor element is conductively bonded to the first main metal layer.

3. The semiconductor device according to claim 1 or 2, characterized in that: A first control terminal is further provided, the first control terminal being electrically connected to the first region and protruding from the sealing resin.

4. The semiconductor device according to claim 3, wherein: The first sub-metal layer further includes a second region, and the second region is separated from the first region.

5. The semiconductor device according to claim 4, wherein: The first control terminal is supported by the second region.

6. The semiconductor device according to claim 5, wherein: A first metal wire is further provided, and the first metal wire connects the first region and the second region.

7. The semiconductor device according to claim 6, wherein: The first sub-metal layer further includes a third region, which is separated from the first region and the second region and is located between the first region and the second region.

8. The semiconductor device according to claim 6 or 7, characterized in that: The first secondary metal layer includes a base metal layer and a surface metal layer.

9. The semiconductor device according to claim 8, wherein: The base material layer contains Cu.

10. The semiconductor device according to claim 9, wherein: The surface metal layer contains Ni.

11. The semiconductor device according to claim 10, wherein: The first sub-metal layer includes Cu.

12. The semiconductor device according to claim 11, wherein: The first metal wire includes Al.

13. The semiconductor device according to any one of claims 1 to 12, characterized in that The second sub-metal layer is conductively bonded to the first main metal layer via a conductive bonding material.

14. The semiconductor device according to any one of claims 1 to 12, characterized in that The second sub-metal layer is conductively bonded to the first main metal layer by laser bonding.

15. The semiconductor device according to claim 14, wherein: The second sub-metal layer has a bonding portion formed by laser bonding, and the second sub-metal layer has an opening that includes the bonding portion when viewed in the thickness direction.

16. The semiconductor device according to any one of claims 1 to 15, characterized in that The sub-insulating layer includes ceramics.

17. The semiconductor device according to any one of claims 1 to 15, characterized in that The sub-insulating layer includes glass epoxy resin.

18. A vehicle, characterized in that: have: a driving source; and The semiconductor device according to any one of claims 1 to 17, The semiconductor device is electrically connected to the driving source.

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