Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof. The manufacturing method of the semiconductor device comprises the following steps: providing a substrate; forming a buffer layer on the substrate; forming a hard mask layer on the buffer layer; forming an opening penetrating through the hard mask layer and the buffer layer; the buffer layer on the side wall of the opening is etched back, so that the buffer layer on the side wall of the opening shrinks inwards relative to the hard mask layer and the substrate to form an air gap; forming a barrier layer to seal the air gap; and performing local thermal oxidation on the substrate on the inner wall of the opening to form a field oxide layer. According to the technical scheme, a beak-shaped transverse extension part can be prevented from being formed on the edge of the field oxide layer, so that the area of the active region surrounded by the field oxide layer is prevented from being reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to a semiconductor device and a manufacturing method thereof. Background Art

[0002] LOCOS (Local Oxidation Of Silicon) and STI processes are mainstream technologies in device isolation technology and are widely used in isolation processes of various devices.

[0003] Among them, the LOCOS process uses the silicon nitride layer on the substrate as a mask, and uses water vapor and oxygen to locally thermally oxidize the substrate exposed by the silicon nitride layer to form a field oxide layer; however, during the oxidation process, the water vapor and oxygen will diffuse laterally into the silicon oxide buffer layer below the silicon nitride layer, causing the water vapor and oxygen in the silicon oxide buffer layer to react with the substrate below, thereby causing the edge of the field oxide layer to form a bird's beak-shaped lateral extension, thereby causing the area of ​​the active area surrounded by the field oxide layer to decrease.

[0004] Therefore, how to avoid the formation of a bird's beak-like structure at the edge of the field oxide layer is an urgent problem to be solved. Summary of the invention

[0005] The object of the present invention is to provide a semiconductor device and a manufacturing method thereof, which can prevent the edge of the field oxide layer from forming a bird's beak-shaped lateral extension portion, thereby avoiding the reduction of the area of ​​the active region surrounded by the field oxide layer.

[0006] To achieve the above object, the present invention provides a method for manufacturing a semiconductor device, comprising:

[0007] providing a substrate;

[0008] forming a buffer layer on the substrate;

[0009] forming a hard mask layer on the buffer layer;

[0010] forming an opening penetrating the hard mask layer and the buffer layer;

[0011] Etching back the buffer layer on the sidewall of the opening so that the buffer layer on the sidewall of the opening shrinks relative to the hard mask layer and the substrate to form an air gap;

[0012] forming a barrier layer to seal the air gap;

[0013] The substrate at the inner wall of the opening is locally thermally oxidized to form a field oxide layer.

[0014] Optionally, the buffer layer is formed on the substrate by an ISSG process or a thermal oxidation process.

[0015] Optionally, the thickness of the buffer layer is

[0016] Optionally, the hard mask layer is formed on the buffer layer by using an LPCVD process.

[0017] Optionally, before forming the opening penetrating the hard mask layer and the buffer layer, the method for manufacturing the semiconductor device further includes:

[0018] Ions are implanted into the hard mask layer, wherein the types of the ions include at least one of boron, phosphorus and arsenic.

[0019] Optionally, an etching selectivity ratio between the buffer layer and the hard mask layer and the substrate is greater than 20:1.

[0020] Optionally, the step of forming the barrier layer to seal the air gap comprises:

[0021] forming a barrier material layer on the inner wall of the opening and the hard mask layer at the periphery of the opening, wherein the barrier material layer seals the air gap;

[0022] The barrier material layer is etched to remove the barrier material layer on the bottom wall of the opening and the hard mask layer at the periphery of the opening, and the remaining barrier material layer serves as a barrier layer.

[0023] Optionally, the barrier layer is made of amorphous silicon, polycrystalline silicon, silicon oxide or silicon nitride.

[0024] Optionally, after forming an opening penetrating the hard mask layer and the buffer layer and before locally thermally oxidizing the substrate at an inner wall of the opening, the method for manufacturing a semiconductor device further includes:

[0025] Amorphization ion implantation is performed on the substrate at the inner wall of the opening, and the implanted ions include at least one of silicon, germanium, arsenic and argon.

[0026] The present invention also provides a semiconductor device manufactured by adopting the manufacturing method of the semiconductor device.

[0027] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0028] 1. The method for manufacturing a semiconductor device of the present invention comprises: after forming an opening penetrating the hard mask layer and the buffer layer on the substrate, etching back the buffer layer on the side wall of the opening so that the buffer layer on the side wall of the opening shrinks relative to the hard mask layer and the substrate to form the air gap, and forming the barrier layer to seal the air gap, which is equivalent to forming a dielectric-free area in the area near the opening between the hard mask layer and the substrate, so that water vapor and oxygen can be blocked from lateral diffusion into the buffer layer during the process of forming the field oxide layer by local thermal oxidation, thereby avoiding the The edge of the field oxide layer forms a bird's beak-shaped lateral extension portion, thereby avoiding the reduction of the area of ​​the active area surrounded by the field oxide layer; after forming an opening that penetrates the hard mask layer and the buffer layer and before locally thermally oxidizing the substrate on the inner wall of the opening, amorphizing ions are implanted into the substrate on the inner wall of the opening, so that when the substrate on the inner wall of the opening is locally thermally oxidized, the substrate on the inner wall of the opening is more easily oxidized, reducing the time required for oxidation, thereby further avoiding the formation of a bird's beak-shaped lateral extension portion at the edge of the field oxide layer.

[0029] 2. The semiconductor device of the present invention is manufactured by the manufacturing method of the semiconductor device, so that the edge of the field oxide layer can avoid the formation of a bird's beak-shaped lateral extension part, thereby avoiding the reduction of the area of ​​the active area surrounded by the field oxide layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0031] Figure 2a to Figure 2i yes Figure 1 A device schematic diagram of a method for manufacturing a semiconductor device is shown.

[0032] Among them, Figure 1 to Figure 2i The reference numerals are described as follows:

[0033] 10 - substrate; 11 - buffer layer; 12 - hard mask layer; 13 - opening; 14 - air gap; 15 - barrier layer; 151 - barrier material layer; 16 - field oxide layer. DETAILED DESCRIPTION

[0034] In order to make the purpose, advantages and features of the present invention more clear, the semiconductor device and the manufacturing method thereof proposed by the present invention are further described in detail below in conjunction with the accompanying drawings. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0035] An embodiment of the present invention provides a method for manufacturing a semiconductor device. Figure 1 , Figure 1 1 is a flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention, wherein the method for manufacturing a semiconductor device comprises:

[0036] Step S1, providing a substrate;

[0037] Step S2, forming a buffer layer on the substrate;

[0038] Step S3, forming a hard mask layer on the buffer layer;

[0039] Step S4, forming an opening penetrating the hard mask layer and the buffer layer;

[0040] Step S5, etching back the buffer layer on the sidewall of the opening so that the buffer layer on the sidewall of the opening shrinks inward relative to the hard mask layer and the substrate to form an air gap;

[0041] Step S6, forming a barrier layer to seal the air gap;

[0042] Step S7: performing local thermal oxidation on the substrate at the inner wall of the opening to form a field oxide layer.

[0043] See below Figure 2a to Figure 2i The method for manufacturing a semiconductor device provided in this embodiment is described in more detail. Figure 2a to Figure 2i It is a schematic diagram of a longitudinal cross-section of a semiconductor device.

[0044] According to step S1, Figure 2a As shown, a substrate 10 is provided.

[0045] The substrate 10 may be made of semiconductor materials such as silicon or germanium.

[0046] According to step S2, Figure 2a As shown, a buffer layer 11 is formed on the substrate 10 .

[0047] The buffer layer 11 may be made of insulating materials such as silicon oxide.

[0048] Preferably, the buffer layer 11 is formed on the substrate 10 by an ISSG (In Situ Steam Generation) process or a thermal oxidation process, so that the buffer layer 11 formed has good quality and small thickness, so that the buffer layer 11 can not only buffer the stress in the subsequently formed hard mask layer 12, but also facilitate the sealing of the subsequently formed air gap 14.

[0049] Among them, the ISSG process uses oxygen doped with a small amount of hydrogen as the reaction atmosphere. At high temperatures, hydrogen and oxygen produce a chemical reaction similar to combustion, generating a large number of gas-phase active free radicals, mainly atomic oxygen. Due to the strong oxidizing effect of atomic oxygen, the oxide film obtained by the reaction has fewer defects and a relatively small interface state density.

[0050] In one embodiment, the thickness of the buffer layer 11 can be

[0051] According to step S3, Figure 2b As shown, a hard mask layer 12 is formed on the buffer layer 11 .

[0052] The material of the hard mask layer 12 can be an insulating material such as silicon nitride.

[0053] The formed hard mask layer 12 has stress, and the stress in the hard mask layer 12 includes tensile stress or compressive stress. If the tensile stress is too large, it may cause problems such as the edge of the substrate 10 warping upward, the hard mask layer 12 breaking or falling off; if the compressive stress is too large, it may cause problems such as the edge of the substrate 10 warping downward or the hard mask layer 12 wrinkling.

[0054] Therefore, by forming the buffer layer 11 between the hard mask layer 12 and the substrate 10 , the stress in the hard mask layer 12 can be buffered to prevent the substrate 10 from being damaged and to prevent the hard mask layer 12 itself from having problems.

[0055] Preferably, the hard mask layer 12 is formed on the buffer layer 11 by an LPCVD (Low Pressure Chemical Vapor Deposition) process, so that the stress in the hard mask layer 12 can be reduced by adjusting process parameters such as the proportion of reaction gas and the pressure of the reaction chamber, thereby reducing the thickness of the buffer layer 11. That is, the stress in the hard mask layer 12 can be buffered by using the buffer layer 11 with a very low thickness, which can be beneficial to the sealing of the air gap 14 formed subsequently.

[0056] Taking the material of the hard mask layer 12 as silicon nitride as an example, the reaction gas may include NH3 and SiH2Cl2. By increasing the ratio of SiH2Cl2 to NH3 (for example, not less than 6:1) and reducing the pressure of the reaction chamber, the stress in the formed silicon nitride can be reduced.

[0057] Preferably, before subsequently forming the opening 13 penetrating the hard mask layer 12 and the buffer layer 11, the method for manufacturing the semiconductor device further comprises: injecting ions into the hard mask layer 12 so as to reduce the stress in the hard mask layer 12, thereby reducing the thickness of the buffer layer 11. The stress reduction caused by the ion implantation is proportional to the implantation energy and the implantation dose within a certain range.

[0058] The type of the ions may include elements of Group III and / or Group V, for example, the type of the ions may include at least one of boron, phosphorus, and arsenic.

[0059] Taking the material of the hard mask layer 12 as silicon nitride as an example, since part of the H in the reaction gas (NH3 and SiH2Cl2) will remain in the formed silicon nitride, the stress in the silicon nitride mainly comes from the Si-H bond and NH bond formed by H and silicon nitride, and the injected ions will destroy the Si-H bond and NH bond, thereby reducing the stress in the silicon nitride.

[0060] Further preferably, after the hard mask layer 12 is formed by the LPCVD process, the ions are continuously injected into the hard mask layer 12 to further reduce the stress in the hard mask layer 12 and ensure the stability of the low stress state. In other embodiments, the hard mask layer 12 may be formed by the LPCVD process alone without injecting the ions into the hard mask layer 12; or, the hard mask layer 12 may not be formed by the LPCVD process, but the ions are injected into the hard mask layer 12.

[0061] According to step S4 , an opening 13 penetrating the hard mask layer 12 and the buffer layer 11 is formed.

[0062] The opening 13 is formed by photolithography and etching processes.

[0063] In one embodiment, the opening 13 only penetrates the hard mask layer 12 and the buffer layer 11 to expose the upper surface of the substrate 10 .

[0064] Preferably, Figure 2c As shown, the opening 13 penetrates the hard mask layer 12 and the buffer layer 11 and extends into the substrate 10, so that the depth of the subsequently formed field oxide layer 16 in the substrate 10 is deepened, that is, the height of the field oxide layer 16 protruding from the upper surface of the substrate 10 is reduced, which is beneficial to the subsequent process (for example, when the gate layer is subsequently manufactured, the process of etching the polysilicon covering the substrate 10 and the field oxide layer 16 is easier).

[0065] According to step S5, Figure 2dAs shown, the buffer layer 11 on the sidewall of the opening 13 is etched back so that the buffer layer 11 on the sidewall of the opening 13 is retracted relative to the hard mask layer 12 and the substrate 10 to form an air gap 14 .

[0066] By selecting suitable materials for the hard mask layer 12, the substrate 10 and the buffer layer 11, the etching selectivity ratio between the buffer layer 11 and the hard mask layer 12 and the substrate 10 is increased, so that when the buffer layer 11 on the side wall of the opening 13 is back-etched, the hard mask layer 12 and the substrate 10 are avoided from being etched or only a small amount of etching is performed, thereby enabling the air gap 14 of the desired size to be formed.

[0067] In one embodiment, the etching selectivity ratios between the buffer layer 11 and the hard mask layer 12 and the substrate 10 are all greater than 20:1.

[0068] The buffer layer 11 on the sidewall of the opening 13 may be etched back using a wet etching process.

[0069] Taking the case where the material of the hard mask layer 12 is silicon nitride, the material of the buffer layer 11 is silicon oxide, and the material of the substrate 10 is silicon as an example, the buffer layer 11 on the sidewall of the opening 13 may be etched back with a hydrofluoric acid solution.

[0070] According to step S6, Figure 2f As shown, a barrier layer 15 is formed to seal the air gap 14 .

[0071] The air gap 14 after sealing is a hollow structure.

[0072] The step of forming the barrier layer 15 to seal the air gap 14 may include:

[0073] like Figure 2e As shown, a barrier material layer 151 is formed on the inner wall of the opening 13 and the hard mask layer 12 at the periphery of the opening 13, and the barrier material layer 151 seals the air gap 14;

[0074] like Figure 2f As shown, the barrier material layer 151 is etched to remove the barrier material layer 151 on the bottom wall of the opening 13 and the hard mask layer 12 around the opening 13 , and the remaining barrier material layer 151 serves as the barrier layer 15 .

[0075] The barrier layer 15 may be made of amorphous silicon, polycrystalline silicon, silicon oxide, silicon nitride or the like.

[0076] According to step S7 , a local thermal oxidation (LOCOS) is performed on the substrate 10 at the inner wall of the opening 13 to form a field oxide layer 16 .

[0077] Local thermal oxidation refers to oxidizing the substrate 10 at the inner wall of the opening 13 at high temperature using water vapor and oxygen with the hard mask layer 12 as a mask. A portion of the field oxide layer 16 is located in the substrate 10, and another portion protrudes from the upper surface of the substrate 10.

[0078] If the material of the barrier layer 15 is amorphous silicon or polycrystalline silicon, Figure 2g As shown, when the substrate 10 on the inner wall of the opening 13 is locally thermally oxidized, the barrier layer 15 is oxidized into silicon oxide, that is, the barrier layer 15 is oxidized to serve as a part of the field oxide layer 16, so that no additional process is required to remove the barrier layer 15.

[0079] If the material of the blocking layer 15 is silicon oxide, the blocking layer 15 can be used as a part of the field oxide layer 16 ; when the buffer layer 11 is subsequently removed, the blocking layer 15 above the upper surface of the substrate 10 can also be removed together.

[0080] If the material of the barrier layer 15 is silicon nitride, when the hard mask layer 12 is subsequently removed, the barrier layer 15 above the upper surface of the substrate 10 can also be removed.

[0081] After forming the field oxide layer 16, Figure 2h and Figure 2i As shown, the method for manufacturing the semiconductor device further includes: removing the hard mask layer 12 and the buffer layer 11 .

[0082] From the above content, it can be known that the buffer layer 11 on the side wall of the opening 13 is etched back so that the buffer layer 11 on the side wall of the opening 13 shrinks relative to the hard mask layer 12 and the substrate 10 to form the air gap 14, and the barrier layer 15 is formed to seal the air gap 14, which is equivalent to forming a dielectric-free area in the area near the opening 13 between the hard mask layer 12 and the substrate 10, so that water vapor and oxygen can be blocked from lateral diffusion into the buffer layer 11 during the process of local thermal oxidation to form the field oxide layer 16, thereby preventing the edge of the field oxide layer 16 from forming a bird's beak-shaped lateral extension portion, thereby avoiding the reduction of the active area surrounded by the field oxide layer 16.

[0083] Preferably, after forming an opening 13 penetrating the hard mask layer 12 and the buffer layer 11 and before locally thermally oxidizing the substrate 10 on the inner wall of the opening 13, the method for manufacturing the semiconductor device further includes: performing amorphization ion implantation on the substrate 10 on the inner wall of the opening 13, and the type of implanted ions may include at least one of silicon, germanium, arsenic and argon.

[0084] By performing amorphizing ion implantation on the substrate 10 on the inner wall of the opening 13, the substrate 10 on the inner wall of the opening 13 is amorphized, so that when the substrate 10 on the inner wall of the opening 13 is locally thermally oxidized, the substrate 10 on the inner wall of the opening 13 is more easily oxidized, thereby reducing the time required for oxidation, thereby further avoiding the formation of a bird's beak-shaped lateral extension portion at the edge of the field oxide layer 16.

[0085] Amorphization ion implantation may be performed on the substrate 10 at the inner wall of the opening 13 after forming the opening 13 , after etching back the buffer layer 11 at the sidewall of the opening 13 to form the air gap 14 , after forming the barrier material layer 151 , or after etching the barrier material layer 151 to form the barrier layer 15 .

[0086] Among them, when amorphizing ion implantation is performed on the substrate 10 at the inner wall of the opening 13 after the barrier material layer 151 is formed, since the ion bombardment of the barrier material layer 151 also has an etching effect, the barrier material layer 151 on the bottom wall of the opening 13 and the hard mask layer 12 outside the opening 13 can be removed by implanting ions on the barrier material layer 151, so that the retained barrier material layer 151 serves as the barrier layer 15, and after the barrier layer 15 is formed, ion implantation is continued on the substrate 10 at the bottom wall of the opening 13, so that the substrate 10 at the bottom wall of the opening 13 is amorphized.

[0087] In summary, the manufacturing method of the semiconductor device provided by the present invention includes: providing a substrate; forming a buffer layer on the substrate; forming a hard mask layer on the buffer layer; forming an opening penetrating the hard mask layer and the buffer layer; etching back the buffer layer on the side wall of the opening so that the buffer layer on the side wall of the opening shrinks relative to the hard mask layer and the substrate to form an air gap; forming a barrier layer to seal the air gap; and locally thermally oxidizing the substrate on the inner wall of the opening to form a field oxide layer. The manufacturing method of the semiconductor device of the present invention can avoid the formation of a bird's beak-shaped lateral extension portion at the edge of the field oxide layer, thereby avoiding the reduction of the area of ​​the active area surrounded by the field oxide layer.

[0088] An embodiment of the present invention provides a semiconductor device, which is manufactured using the semiconductor device manufacturing method.

[0089] The method for manufacturing the semiconductor device has been described above and will not be described in detail here.

[0090] Since the semiconductor device is manufactured by the semiconductor device manufacturing method, it is possible to avoid the edge of the field oxide layer from forming a bird's beak-shaped lateral extension portion, thereby avoiding the reduction of the area of ​​the active region surrounded by the field oxide layer.

[0091] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: include: providing a substrate; forming a buffer layer on the substrate; forming a hard mask layer on the buffer layer; forming an opening penetrating the hard mask layer and the buffer layer; Etching back the buffer layer on the sidewall of the opening so that the buffer layer on the sidewall of the opening shrinks relative to the hard mask layer and the substrate to form an air gap; forming a barrier layer to seal the air gap; The substrate at the inner wall of the opening is locally thermally oxidized to form a field oxide layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The buffer layer is formed on the substrate by adopting an ISSG process or a thermal oxidation process.

3. The method for manufacturing a semiconductor device according to claim 2, wherein: The thickness of the buffer layer is 4. The method for manufacturing a semiconductor device according to claim 1, wherein: The hard mask layer is formed on the buffer layer by using LPCVD process.

5. The method for manufacturing a semiconductor device according to claim 1, wherein: Before forming the opening penetrating the hard mask layer and the buffer layer, the method for manufacturing the semiconductor device further includes: Ions are implanted into the hard mask layer, wherein the types of the ions include at least one of boron, phosphorus and arsenic.

6. The method for manufacturing a semiconductor device according to claim 1, wherein: The etching selectivity ratios between the buffer layer and the hard mask layer and the substrate are both greater than 20:

1.

7. The method for manufacturing a semiconductor device according to claim 1, wherein: The step of forming the barrier layer to seal the air gap comprises: forming a barrier material layer on the inner wall of the opening and the hard mask layer at the periphery of the opening, wherein the barrier material layer seals the air gap; The barrier material layer is etched to remove the barrier material layer on the bottom wall of the opening and the hard mask layer at the periphery of the opening, and the remaining barrier material layer serves as a barrier layer.

8. The method for manufacturing a semiconductor device according to claim 1, wherein: The material of the barrier layer is amorphous silicon, polysilicon, silicon oxide or silicon nitride.

9. The method for manufacturing a semiconductor device according to claim 1, wherein: After forming an opening penetrating the hard mask layer and the buffer layer and before locally thermally oxidizing the substrate at an inner wall of the opening, the method for manufacturing a semiconductor device further includes: Amorphization ion implantation is performed on the substrate at the inner wall of the opening, and the implanted ions include at least one of silicon, germanium, arsenic and argon.

10. A semiconductor device, characterized in that: The semiconductor device is manufactured by the method for manufacturing a semiconductor device according to any one of claims 1 to 9.

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