Semiconductor device assembly and method for producing the same

Abstract

The invention relates to a semiconductor device assembly and a method for producing a semiconductor device assembly. The semiconductor device assembly includes: a substrate; a semiconductor die coupled to the substrate; and a conductive clip coupled to the semiconductor die. Conductive clips are arranged along a longitudinal axis and a transverse axis. The conductive clip has a length along a longitudinal axis, a width along a transverse axis, and a slot defined therethrough. The slot has a length along the longitudinal axis that is greater than or equal to 70% of a length of the conductive clip along the longitudinal axis. The slot has a width along the transverse axis that is greater than or equal to thirty percent of the width of the conductive clip along the transverse axis.

Description

Technical Field

[0001] The present application relates to semiconductor device assemblies and methods for producing semiconductor device assemblies.The present application relates to molded packages (eg, modules) for semiconductor device assemblies. Background Art

[0002] Existing semiconductor device packages, such as power device modules, experience delamination of the molding compound from the substrate of the package in the area below the conductive clip of the package. This delamination may be caused by moisture and / or thermal cycling of the semiconductor module and may lead to failure of the device, such as corrosion, die cracking, solder joint failure, etc. Summary of the invention

[0003] In a general aspect, a semiconductor device assembly includes: a substrate; a semiconductor die coupled to the substrate; and a conductive clip coupled to the semiconductor die. The conductive clip is arranged along a longitudinal axis and a transverse axis. The conductive clip has a length along the longitudinal axis, a width along the transverse axis, and a slot defined therethrough. The slot has a length along the longitudinal axis that is greater than or equal to seventy percent of the length of the conductive clip along the longitudinal axis. The slot has a width along the transverse axis that is greater than or equal to thirty percent of the width of the conductive clip along the transverse axis.

[0004] In another general aspect, a semiconductor device assembly includes: a substrate; a semiconductor die coupled to the substrate; and a conductive clip coupled to the semiconductor die. The conductive clip has a length and a width that define an area of ​​a footprint of the conductive clip. The conductive clip has at least one opening defined therethrough. The at least one opening has an area that is within the area of ​​the footprint of the conductive clip. The area of ​​the at least one opening is greater than or equal to twenty percent of the area of ​​the footprint of the conductive clip.

[0005] In another general aspect, a method for producing a semiconductor device assembly includes coupling a semiconductor die to a substrate, and coupling a conductive clip to the semiconductor die. The conductive clip includes a slot defined therethrough. The slot has an area that is at least twenty percent of the area of ​​a footprint of the conductive clip. The method also includes forming wire bonds with the semiconductor die, and applying an adhesion promoting material to the semiconductor die, the substrate, the conductive clip, and the wire bonds. The method also includes performing a molding process to encapsulate the semiconductor die and the conductive clip in a molding compound, and at least partially encapsulating the substrate in the molding compound. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a scanning acoustic tomography (SAT) image showing delamination of molding compound from substrate of a molded semiconductor device assembly with a conductive clip after reliability testing.

[0007] FIG. 2A to FIG. 2D is a diagram illustrating an exemplary semiconductor device assembly implemented using a slotted conductive clip.

[0008] Figure 3 is a diagram showing an example of a slotted conductive clip, such as Figure 2D The slotted conductive clip in the example of FIG.

[0009] Figure 4 It is shown that after reliability testing, Figure 2C A specific implementation of the semiconductor device assembly has a SAT image without mold compound delamination.

[0010] FIG. 5A to FIG. 5F It is shown Figure 2C and Figure 2D A graph comparing electrical performance parameters of a molded semiconductor device embodiment of the present invention with prior art molded semiconductor device embodiments.

[0011] Figure 6 is a flow chart illustrating an exemplary method of producing a molded semiconductor device assembly, such as the exemplary implementations described herein.

[0012] The same reference numerals in the various drawings indicate the same elements. For all such elements, the reference numerals of some similar elements may not be repeated. In some cases, different reference numerals may be used for the same or similar elements. Some reference numerals of some elements of a given embodiment may not be repeated in each of the drawings corresponding to the embodiment. Some reference numerals of some elements of a given embodiment may be repeated in other drawings corresponding to the embodiment, but may not be specifically discussed with reference to each corresponding drawing. The drawings are for the purpose of illustrating exemplary implementations and may not necessarily be drawn to scale. DETAILED DESCRIPTION

[0013] A power module (assembly, semiconductor device assembly, semiconductor device module, etc.) may include a direct bond metal (DBM) substrate, such as a direct bond copper (DBC) substrate. The DBM or DBC substrate may include a ceramic material layer, wherein a direct bond metal (e.g., a patterned metal layer) is disposed on at least one side of the ceramic material layer. One or more semiconductor dies may be disposed on a first direct bond metal layer portion of the substrate, and a conductive clip may be coupled to the semiconductor die, a second direct bond metal portion of the substrate, and / or a power terminal or a signal terminal. Additional elements may be included, such as wire bonds and / or a lead frame including one or more signal leads, one or more power terminals, etc.

[0014] In some implementations, such semiconductor device assemblies or modules can be molded (e.g., transfer molded) using an epoxy molding compound to encapsulate at least a portion of the substrate (e.g., a portion of the substrate on which the semiconductor die and the conductive clip are coupled), the semiconductor die, and the conductive clip. Other surfaces of the substrate can be exposed through the molding compound, such as a surface of a direct bonding metal layer disposed on a side of a ceramic material (e.g., of a DBM substrate) opposite the semiconductor die. In some implementations, a heat sink or other cooling mechanism can be coupled to such exposed surfaces of the DBM substrate.

[0015] Existing clip designs (e.g., solid or nearly solid clips) inhibit the flow of molding compound beneath the clip during a molding process (e.g., a transfer molding process). In addition, existing clip designs prevent the application of adhesion promoting substances (e.g., hydroxyl-containing substances) to portions of the substrate and / or semiconductor die beneath the conductive clip, wherein the adhesion promoting substances improve the adhesion of the molding compound to the substrate, the semiconductor die, the conductive clip, and / or one or more wire bonds. As demonstrated by reliability moisture testing and / or thermal cycle testing, at least these factors can cause the molding compound to form voids and / or delaminations from at least the corresponding substrate surface and / or semiconductor die surface. Such voids and / or delaminations can then result in damage to the semiconductor die, damage to the solder connection between the conductive clip and the substrate, damage to the solder connection between the conductive clip and the semiconductor die, etc., which can result in functional failure of the associated semiconductor device module.

[0016] Figure 1 is a scanning acoustic tomography (SAT) image showing delamination of the molding compound from the substrate of the molded semiconductor device assembly 100 after reliability testing (eg, temperature cycling). Figure 1 The image of molded semiconductor device assembly 100 in FIG. 1 is a perspective image (eg, internal components are visible).

[0017] like Figure 1 As shown, molded semiconductor device assembly 100 includes DBM substrate 105, semiconductor die 110 (two semiconductor dies) disposed on DBM substrate 105 (e.g., on a patterned metal layer of DBM substrate 105). Molded semiconductor device assembly 100 also includes conductive clip 115, which is a solid clip that can be made of copper, a copper alloy, a metal other than copper, or another metal alloy.

[0018] The molded semiconductor device assembly 100 also includes a molding compound 120, which can be an epoxy molding compound. In some implementations, the molding compound 120 can be applied to the molded semiconductor device assembly 100 using a transfer molding process, an injection molding process, etc. After the molding compound 120 is applied to the molded semiconductor device assembly 100, a curing operation can be performed to cure the molding compound, wherein the molding compound 120 protects other elements of the molded semiconductor device assembly 100 from damage and / or exposure to environmental conditions. For example, as described above, the molding compound 120 can encapsulate at least a portion of the DBM substrate 105, the semiconductor die 110, and the conductive clip 115.

[0019] Figure 1 The SAT images of the molded semiconductor device assembly 100 in FIG. 1 are obtained after a thermal cycle reliability test of the molded semiconductor device assembly 100 (eg, the ambient temperature of the molded semiconductor device assembly 100 is repeatedly cycled between -65 degrees Celsius (° C.) and 150° C.). Figure 1 As shown, as a result of the thermal cycle test, delamination 150 (and / or voids) of the molding compound 120 and the DBM substrate 105 are shown by shading in the SAT image of the molded semiconductor device assembly 100. As described above, the delamination 150 may cause damage to the elements of the molded semiconductor device assembly 100 (such as the semiconductor die 110, the solder connection between the semiconductor die 110 and the conductive clip 115, etc.). The damage may then lead to functional failure of the molded semiconductor device assembly 100 (e.g., improper operation of the semiconductor die 110 and / or the molded semiconductor device assembly 100). The delamination 150 may occur due to poor adhesion of the molding compound 120 to the DBM substrate 105, for example, due to the absence of an adhesion promoter on the DBM substrate 105 below the conductive clip 115, and / or due to poor flow of the molding compound 120 below the conductive clip 115 during the molding process.

[0020] FIG. 2A to FIG. 2D is a diagram illustrating an exemplary semiconductor device assembly implemented using a slotted conductive clip that can reduce and / or prevent molding compound delamination and / or voids, such as Figure 1 For example, in FIG. 2A to FIG. 2D In an example of the present invention, the slotted clip allows application of adhesion promoting materials (e.g., hydroxyl-containing substances) to portions of the corresponding substrate and semiconductor die disposed below the conductive clip, which would have been impeded by previous clip implementations. In addition, FIG. 2A to FIG. 2D The slotted clip shown in also allows for improved flow of the molding compound (e.g., in liquid form prior to a curing operation) during a molding process such as transfer molding, such as through the slots. FIG. 2A to FIG. 2DThe exemplary implementation of the invention promotes improved mold compound coverage and adhesion in areas of the semiconductor module that are susceptible to mold compound delamination and / or voids. That is, since the mold compound flows through the slots of the slotted conductive clip, the coverage of a portion of the semiconductor device assembly disposed between the substrate and the conductive clip can be improved. In addition, after curing, the mold compound can provide mechanical strength that helps prevent mold compound delamination when having the slots.

[0021] As used herein, the term slot refers to an opening, through hole, aperture, etc. defined in a conductive material (e.g., conductive material) for a conductive clip. Thus, as used herein, a slotted conductive clip refers to a conductive clip having one or more through holes, openings, apertures, etc. defined therein. In some implementations, the slot may be square, rectangular, circular, oval, or have other shapes. For example, the slot of a slotted conductive clip may be generally rectangular, wherein the slot is semicircular at one end and right angled at an opposite end, such as at Figure 2C and Figure 2D In the example of . Each of the one or more slots of the slotted clip has an area that is defined within the area of ​​the footprint (e.g., having an outer perimeter) of the corresponding conductive clip. In addition, due to FIG. 2A to FIG. 2D Examples include multiple similar aspects, so for the sake of brevity, the details of these similar aspects will not be repeated with respect to each of these examples.

[0022] Figure 2A 2 is a diagram showing an exemplary semiconductor device assembly 200a. Figure 1 2 is shown as a perspective image, in which internal elements of the semiconductor device assembly 200a are shown (e.g., elements that are not visible in the actual device). In this example, the semiconductor device assembly 200a includes a DBM substrate 205a and a semiconductor die 210a (two semiconductor dies) disposed on the DBM substrate 205a (e.g., on a patterned metal layer of the DBM substrate 205a). The semiconductor device assembly 200a also includes a slotted conductive clip 215a, which can be made of copper, a copper alloy, a metal other than copper, or another metal alloy.

[0023] In this example, the slotted conductive clip 215a has slots 217a1, 217a2, and 217a3 defined therein. As described herein, the slots 217a1, 217a2, and 217a3 can facilitate application of adhesion promoting material to portions of the DBM substrate 205a and / or semiconductor die 210a disposed below the slotted conductive clip 215a (in this figure). For example, the adhesion promoting material can be sprayed onto those portions of the DBM substrate 205a and semiconductor die 210a through the slots 217a1, 217a2, and / or 217a3.

[0024] like Figure 2A As can be seen in FIG. 1 , each of the slots 217a1, 217a2, and 217a3 has a corresponding area within the area of ​​the footprint of the slotted conductive clip 215a (the area associated with the outer perimeter of the slotted conductive clip 215a). In some implementations, such as Figure 2A For example, the sum of the respective areas of the slot 217a1, the slot 217a2, and the slot 217a3 (eg, the total area of ​​the slots) is greater than or equal to twenty percent of the area of ​​the occupied space of the slotted conductive clip 215a.

[0025] like Figure 2A As shown, the semiconductor device assembly 200a also includes a molding compound 220a, which can be an epoxy molding compound. In some specific implementations, the molding compound 220a can be applied to the semiconductor device assembly 200a using a transfer molding process, an injection molding process, etc. A curing operation can be formed to cure the molding compound 220a, which protects other components of the semiconductor device assembly 200a. For example, as described above, the molding compound 220a can encapsulate at least a portion of the DBM substrate 205a, the semiconductor die 210a, and the slotted conductive clip 215a.

[0026] The semiconductor device assembly 200a of this example also includes a wire bond 225a, a power terminal 230a, and a signal terminal 235a. The wire bond 225a can be used to couple the power terminal 230a with the DBM substrate 205a and / or the semiconductor die 210a, and the slotted conductive clip 215a can be further coupled to the power terminal 230a. For example, in this example, the semiconductor die 210a can include corresponding power field effect transistors (FETs), such as n-channel FETs (NFETs) coupled in parallel with each other. That is, in this example (and in Figure 2B , Figure 2C and Figure 2D2 ), the respective drain terminals of semiconductor die 210a are coupled to DBM substrate 205a, the respective source terminals of semiconductor die 210a are coupled to power terminals 230a via slotted conductive clip 215a, and wire bonds 225a couple the gate terminals of semiconductor die 210a to one of signal terminals 235a, and couple the source sense terminals to another signal terminal 235a shown in FIG. FIG. 2B to FIG. 2D An exemplary implementation is shown to achieve the same as with respect to Figure 2A The circuit described is the same circuit, so regarding FIG. 2B to FIG. 2D Don't repeat those details.

[0027] Figure 2B FIG. 2 shows a perspective image of a semiconductor device assembly 200 b. In this example, the semiconductor device assembly 200 b includes a DBM substrate 205 b, semiconductor die 210 b (two semiconductor dies), a slotted conductive clip 215 b, a molding compound 220 b, wire bonds 225 b, power terminals 230 a, and signal terminals 235 b. As described above, the semiconductor device assembly 200 b is connected to the semiconductor device assembly 200 b. Figure 2A Similar details are not mentioned in detail about the semiconductor device assembly 200a. Figure 2B The semiconductor device assembly 200b shown in FIG.

[0028] In this example, the slotted conductive clip 215b has slots 217b1 and 217b defined therein. As described herein, the slots 217b1 and 217b2 can facilitate application of adhesion promoting material to portions of the DBM substrate 205b and / or semiconductor die 210b disposed below the slotted conductive clip 215b (in this figure). For example, the adhesion promoting material can be sprayed onto those portions of the DBM substrate 205b and semiconductor die 210b through the slots 217b1 and 217b2.

[0029] like Figure 2B As can be seen in FIG. 1 , each of the slots 217b1 and 217b2 has a corresponding area within the area of ​​the footprint of the slotted conductive clip 215b (the area associated with the outer perimeter of the slotted conductive clip 215b). In some implementations, such as Figure 2B In an example, the sum of the respective areas of the slot 217b1 and the slot 217b2 (eg, the total area of ​​the slots) is greater than or equal to twenty percent of the area of ​​the occupied space of the slotted conductive clip 215b.

[0030] Figure 2CFIG. 2 shows a perspective image of a semiconductor device assembly 200 c. In this example, the semiconductor device assembly 200 c includes a DBM substrate 205 c, a semiconductor die 210 c (two semiconductor dies), a slotted conductive clip 215 c, a molding compound 220 c, wire bonds 225 c, power terminals 230 c, and signal terminals 235 c. As described above, the semiconductor device assembly 200 c is Figure 2A Similar details are not mentioned in detail about the semiconductor device assembly 200a. Figure 2C The semiconductor device assembly 200c shown in FIG.

[0031] In this example, the slotted conductive clip 215c has a slot 217c defined therein, wherein the slot 217c is continuous (a single slot that is not broken). That is, the slotted conductive clip 215c includes a conductive material (copper, copper alloy, etc.) that defines the perimeter (perimeter, etc.) of the slot 217c. As described herein, the slot 217c can facilitate application of an adhesion promoting material to portions of the DBM substrate 205c and / or semiconductor die 210c that are disposed below the slotted conductive clip 215c (in this figure). For example, the adhesion promoting material can be sprayed onto those portions of the DBM substrate 205c and semiconductor die 210c through the slot 217c.

[0032] like Figure 2C As can be seen in FIG. 2 , the slot 217 c has a corresponding area within the area of ​​the footprint of the slotted conductive clip 215 c (the area associated with the outer perimeter of the slotted conductive clip 215 c). In some implementations, the area of ​​the slot 217 c is greater than or equal to twenty percent of the area of ​​the footprint of the slotted conductive clip 215 c.

[0033] Figure 2D FIG. 2 shows a perspective image of a semiconductor device assembly 200 d. In this example, the semiconductor device assembly 200 d includes a DBM substrate 205 d, semiconductor die 210 d (two semiconductor dies), a slotted conductive clip 215 d, a molding compound 220 d, wire bonds 225 d, power terminals 230 a, and signal terminals 235 d. As described above, the semiconductor device assembly 200 d is Figure 2A Similar details are not mentioned in detail about the semiconductor device assembly 200a. Figure 2D The semiconductor device assembly 200d shown in FIG.

[0034] In this example, the slotted conductive clip 215d has a slot 217d defined therein, wherein the slot 217d is continuous (a single slot that is not broken). That is, the slotted conductive clip 215d includes a conductive material (copper, copper alloy, etc.) that defines the perimeter (periphery, etc.) of the slot 217d. As described herein, the slot 217d can facilitate the application of an adhesion promoting material to portions of the DBM substrate 205d and / or semiconductor die 210d that are disposed below the slotted conductive clip 215d (in this figure). For example, the adhesion promoting material can be sprayed onto those portions of the DBM substrate 205d and semiconductor die 210d through the slot 217d.

[0035] like Figure 2D As can be seen in FIG. 2 , slot 217d has a corresponding area that is within the area of ​​the footprint of slotted conductive clip 215d (the area associated with the outer perimeter of slotted conductive clip 215d). In some implementations, the area of ​​slot 217d is greater than or equal to twenty percent of the area of ​​the footprint of slotted conductive clip 215d. Compared to slotted conductive clip 215c, the height of slotted conductive clip 215d along line H can be greater than the height of slotted conductive clip 215c. In addition, the length of slot 217d along line H can be greater than the length of slot 217c along line H. In some implementations, the slotted conductive clip can have a width (transverse to line H) that is greater than 20 percent of the width of slot 217d. Figure 2C and Figure 2D The different widths of the slots are shown for the slot 217c and the slot 217d respectively.

[0036] Figure 3 is a diagram showing an example of a slotted conductive clip, such as Figure 2C 2. Although the specific dimensions may vary, the following discussion of the slotted conductive clip 215c may similarly apply to the semiconductor device assembly 200c. Figure 2D A specific implementation of a slotted conductive clip 215d is shown.

[0037] like Figure 3 As shown, the slotted conductive clip 215c can be arranged along the longitudinal axis L and the transverse axis T. That is, the slotted conductive clip 215c can be at least partially arranged in a plane defined by the longitudinal axis L and the transverse axis T. In this example, as shown in FIG. Figure 3 As shown, the slotted conductive clip 215c has a length L along the longitudinal axis L. C and the width W along the horizontal axis T C .like Figure 3 As further shown, the slot 217c of the slotted conductive clip 215c has a length L along the longitudinal axis L. S and the width W along the horizontal axis T S In some implementations, the length L of the slot 217c is S can be greater than or equal to the length L of the slotted conductive clip 215cC In addition, in some embodiments, such as this example, the width W of the slot 217c is S can be greater than or equal to the width W of the slotted conductive clip 215c C Thirty percent.

[0038] Figure 4 It is shown that after reliability testing, Figure 2C The SAT image of the semiconductor device assembly 200c of the embodiment without mold compound delamination. In this example, the semiconductor device assembly 200c was subjected to temperature cycle reliability testing, and Figure 1 The same as the molded semiconductor device assembly 100. Figure 4 It can be seen that Figure 1 In comparison, Figure 4 20c and the DBM substrate 205c, indicating that delamination of the molding compound 220c and the DBM substrate 205c has been significantly reduced or eliminated. That is, because the slots 217c in the slotted conductive clip 215c allow for improved flow of the molding compound under the clip (e.g., between the clip and the substrate) and improved adhesion promoter coverage, delamination is reduced and / or prevented from occurring as a result of such reliability testing, such as Figure 4 As shown in the SAT image.

[0039] FIG. 5A to FIG. 5F It is shown Figure 2C and Figure 2D FIG. 1 is a graph comparing normalized electrical performance parameters of an exemplary implementation of a molded semiconductor device of FIG. 1 to a prior art molded semiconductor device implementation that includes a through-body conductive clip (eg, without a slot). FIG. 5A to FIG. 5F The use of slotted conductive clips (such as Figure 2C and Figure 2D The exemplary clamp of FIG. 1 has negligible or insignificant effects on the electrical performance parameters of a specific implementation of the exemplary power module. FIG. 5A to FIG. 5F In the example of FIG. 1 , a power module having a pair of power transistors coupled in parallel with a common gate terminal is tested. Specifically, a power module having an existing clamp is compared with a power module having a pair of power transistors coupled in parallel with a power module having a common gate terminal. Figure 2C and Figure 2D The corresponding slotted conductive clips 215c and 215d are compared with the power modules of the specific implementations, such as FIG. 5A to FIG. 5F as shown in each of the figures.

[0040] Specifically, Figure 5A is a graph 500a showing a scatter plot comparing drain to source leakage of a prior implementation to implementations of semiconductor device assembly 200c and semiconductor device assembly 200d. Figure 5Bis a graph 500b showing a scatter plot comparing the gate-to-source leakage of a prior implementation device with the implementations of semiconductor device assembly 200c and semiconductor device assembly 200d. Figure 5C is a graph 500 c showing a scatter plot comparing the threshold voltage of a prior implementation device to the implementations of semiconductor device assembly 200 c and semiconductor device assembly 200 d . Figure 5D is a graph 500d showing a scatter plot comparing gate turn-on energies of prior implementations of devices with implementations of semiconductor device assembly 200c and semiconductor device assembly 200d. Figure 5E is a chart showing a scatter plot comparing gate turn-off energy of a prior art implementation to implementations of semiconductor device assembly 200 c and semiconductor device assembly 200 d . Fig. 5F 5 is a graph 500f showing a scatter plot comparing the short circuit energy of the prior art implementation to the implementations of semiconductor device assembly 200c and semiconductor device assembly 200d. In addition, the parasitic effect measurements of the modules used to obtain the results of FIG. 5 show negligible differences, for example, a change of zero to three percent in parasitic inductance measurements and a one percent reduction in gate capacitance.

[0041] Figure 6 6 is a flow chart illustrating an exemplary method 600 of producing a molded semiconductor device assembly, such as the exemplary implementations described herein. Figure 6 As shown, at block 610, method 600 includes coupling at least one semiconductor die to a substrate. For example, at least one semiconductor die may be soldered, sintered, etc. to a patterned metal layer of a DBM substrate. At block 620, the method includes coupling a slotted conductive clip to a power terminal of the semiconductor die and a lead frame, which may include soldering the clip to the semiconductor die and the power terminal. At block 620, depending on the particular implementation, the slotted conductive clip may also be coupled to the substrate (e.g., for electrical connection to a circuit of the component and / or for mechanical support). At block 630, method 600 includes forming at least one wire bond between the semiconductor die and a corresponding signal terminal of the lead frame. In some implementations, one or more wire bonds may also be coupled to the substrate, for example, to a gate connection busbar. At block 640, the method includes applying (spraying, etc.) an adhesion promoter, which includes applying (spraying) the adhesion promoter through one or more slots defined in the slotted conductive clip. At block 650 , method 600 includes performing molding and curing operations, for example, to encapsulate a semiconductor device assembly, such as in the examples described herein.

[0042] In a general aspect, a semiconductor device assembly includes: a substrate; a semiconductor die coupled to the substrate; and a conductive clip coupled to the semiconductor die. The conductive clip is arranged along a longitudinal axis and a transverse axis. The conductive clip has a length along the longitudinal axis, a width along the transverse axis, and a slot defined therethrough. The slot has a length along the longitudinal axis that is greater than or equal to seventy percent of the length of the conductive clip along the longitudinal axis. The slot has a width along the transverse axis that is greater than or equal to thirty percent of the width of the conductive clip along the transverse axis.

[0043] Implementations may include one or more of the following features or aspects, alone or in combination.For example, the slot in the conductive clip may be a continuous slot.

[0044] The conductive clip may include a conductive material defining a perimeter of the slot.

[0045] The semiconductor device assembly may include a molding compound that encapsulates the semiconductor die and the conductive clip and at least partially encapsulates the substrate. A first portion of the molding compound may be disposed between the conductive clip and the substrate, and a second portion of the molding compound may be disposed in the slot.

[0046] The semiconductor device assembly may include a lead frame having a power terminal. The conductive clip may be further coupled to the power terminal. The lead frame may include a signal terminal electrically coupled to the semiconductor die via a wire bond. The semiconductor die may include a field effect transistor (FET). The conductive clip may be coupled to a source terminal of the FET. The drain terminal of the FET may be coupled to the substrate. The wire bond may be coupled to a gate terminal of the FET.

[0047] In another general aspect, a semiconductor device assembly includes: a substrate; a semiconductor die coupled to the substrate; and a conductive clip coupled to the semiconductor die. The conductive clip has a length and a width that define an area of ​​a footprint of the conductive clip. The conductive clip has at least one opening defined therethrough. The at least one opening has an area that is within the area of ​​the footprint of the conductive clip. The area of ​​the at least one opening is greater than or equal to twenty percent of the area of ​​the footprint of the conductive clip.

[0048] Specific implementations may include one or more of the following features or aspects, alone or in combination. For example, at least one opening in the conductive clip may be a continuous slot. The conductive clip may include a conductive material defining a perimeter of the continuous slot.

[0049] The at least one opening in the conductive clip may include a plurality of openings in the conductive clip. The area of ​​the at least one opening may be the sum of the corresponding areas of the plurality of openings.

[0050] The semiconductor device assembly may include a molding compound that encapsulates the semiconductor die and the conductive clip and at least partially encapsulates the substrate. A first portion of the molding compound may be disposed between the conductive clip and the substrate. A second portion of the molding compound may be disposed in the at least one opening.

[0051] The semiconductor device assembly may include a lead frame including a power terminal. The conductive clip may be further coupled to the power terminal. The lead frame may include a signal terminal electrically coupled to the semiconductor die via a wire bond. The semiconductor die may include a field effect transistor (FET). The conductive clip may be coupled to a source terminal of the FET. The drain terminal of the FET may be coupled to the substrate. The wire bond may be coupled to a gate terminal of the FET.

[0052] In another general aspect, a method for producing a semiconductor device assembly includes coupling a semiconductor die to a substrate, and coupling a conductive clip to the semiconductor die. The conductive clip includes a slot defined therethrough. The slot has an area that is at least twenty percent of the area of ​​a footprint of the conductive clip. The method also includes forming wire bonds with the semiconductor die, and applying an adhesion promoting material to the semiconductor die, the substrate, the conductive clip, and the wire bonds. The method also includes performing a molding process to encapsulate the semiconductor die and the conductive clip in a molding compound, and at least partially encapsulating the substrate in the molding compound.

[0053] Specific implementations may include one or more of the following features or aspects, alone or in combination. For example, applying the adhesion promoting material may include spraying the adhesion promoting material. Applying the adhesion promoting material may include applying the adhesion promoting material to a portion of the substrate and a portion of the semiconductor die by spraying the adhesion promoting material through a slot.

[0054] The method may further include coupling a conductive clip to a power terminal of the lead frame.

[0055] Forming wire bonds with the semiconductor die may include electrically coupling the semiconductor die with signal terminals of a leadframe via the wire bonds.

[0056] It should be understood that in the foregoing description, when an element (such as a layer, a region or a substrate) is mentioned on another element, connected to another element, electrically connected to another element, coupled to another element, or electrically coupled to another element, the element may be directly on another element, connected or coupled to another element, or one or more intermediate elements may be present. On the contrary, when an element is mentioned directly on another element or layer, directly connected to another element or layer, or directly coupled to another element or layer, there is no intermediate element or layer. Although the term may not be used in the entire specific embodiment directly on ..., directly connected to ..., or directly coupled to ..., the element shown as directly on the element, directly connected or directly coupled can be mentioned in this manner. The claims of the present application may be revised to narrate the exemplary relationship described in the specification or shown in the drawings.

[0057] As used in this specification, unless the context clearly indicates a particular case, the singular form may include the plural form. In addition to the orientations shown in the drawings, spatially relative terms (e.g., above, above, above, below, below, below, below, at the top, at the bottom, etc.) are intended to cover different orientations of the device in use or operation. In some specific implementations, the relative terms above and below may include vertically above and vertically below, respectively. In some specific implementations, the term adjacent can include lateral adjacent or horizontal adjacent.

[0058] Some implementations may be implemented using various semiconductor processing and / or packaging technologies. Some implementations may be implemented using various types of semiconductor device processing technologies associated with semiconductor substrates, including but not limited to, for example, silicon (Si), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), etc.

[0059] Although certain features of the described implementations have been described as described herein, many modifications, alternatives, variations, and equivalents will now occur to those skilled in the art. Therefore, it should be understood that the appended claims are intended to cover all such modifications and variations that fall within the scope of the implementations. It should be understood that these modifications and variations are presented only by way of example and not limitation, and that various changes in form and detail may be made. In addition to mutually exclusive combinations, any part of the apparatus and / or method described herein may be combined in any combination. The implementations described herein may include various combinations and / or sub-combinations of the functions, components, and / or features of the different implementations described.

Claims

1. A semiconductor device assembly, comprising: substrate; a semiconductor die coupled to the substrate; and a conductive clip coupled to the semiconductor die, the conductive clip having a length and a width defining an area of ​​a footprint of the conductive clip, The conductive clip has at least one opening defined therethrough, the at least one opening having an area within the area of ​​the footprint of the conductive clip, the area of ​​the at least one opening being greater than or equal to twenty percent of the area of ​​the footprint of the conductive clip. 2 . The semiconductor device assembly of claim 1 , wherein the at least one opening in the conductive clip is a continuous slot. 3 . The semiconductor device assembly of claim 2 , wherein the conductive clip comprises a conductive material defining a perimeter of the continuous slot.

4. The semiconductor device assembly according to claim 1, wherein: The at least one opening in the conductive clip comprises a plurality of openings in the conductive clip; and The area of ​​the at least one opening is a sum of corresponding areas of the plurality of openings. 5 . The semiconductor device assembly of claim 1 , further comprising a molding compound encapsulating the semiconductor die and the conductive clip and at least partially encapsulating the substrate.

6. The semiconductor device assembly according to claim 5, wherein: A first portion of the molding compound is disposed between the conductive clip and the substrate, and A second portion of the molding compound is disposed in the at least one opening.

7. The semiconductor device assembly of claim 1, further comprising a lead frame, the lead frame comprising a power terminal, the conductive clip further coupled to the power terminal, in: The lead frame further includes a signal terminal electrically coupled to the semiconductor die via a wire bond; The semiconductor die includes a field effect transistor; The conductive clip is coupled to a source terminal of the field effect transistor; A drain terminal of the field effect transistor is coupled to the substrate; and The wire bond is coupled to a gate terminal of the field effect transistor.

8. A semiconductor device assembly, comprising: substrate; a semiconductor die coupled to the substrate; and a conductive clip coupled to the semiconductor die and having: length along the longitudinal axis; width along the horizontal axis; and A slot defined therethrough, the slot having: a length along the longitudinal axis, the length being greater than or equal to seventy percent of the length of the conductive clip along the longitudinal axis; and A width along the horizontal axis, the width being greater than or equal to thirty percent of the width of the conductive clip along the horizontal axis. 9 . The semiconductor device assembly of claim 8 , wherein the slot in the conductive clip is a continuous slot. 10 . The semiconductor device assembly of claim 8 , wherein the conductive clip comprises a conductive material defining a perimeter of the slot. 11 . The semiconductor device assembly of claim 8 , further comprising a molding compound encapsulating the semiconductor die and the conductive clip and at least partially encapsulating the substrate.

12. The semiconductor device assembly according to claim 11, wherein: A first portion of the molding compound is disposed between the conductive clip and the substrate, and A second portion of the molding compound is disposed in the slot. 13 . The semiconductor device assembly of claim 8 , further comprising a lead frame, the lead frame comprising a power terminal, the conductive clip further coupled to the power terminal. 14 . The semiconductor device assembly of claim 13 , wherein the lead frame further comprises signal terminals electrically coupled to the semiconductor die via wire bonds.

15. The semiconductor device assembly of claim 14, wherein: The semiconductor die includes a field effect transistor; The conductive clip is coupled to a source terminal of the field effect transistor; A drain terminal of the field effect transistor is coupled to the substrate; and The wire bond is coupled to a gate terminal of the field effect transistor.

16. A method for producing a semiconductor device component, the method comprising: coupling the semiconductor die to the substrate; coupling a conductive clip to the semiconductor die, the conductive clip including a slot defined therethrough, the slot having an area that is at least twenty percent of an area of ​​a footprint of the conductive clip; forming a wire bond with the semiconductor die; applying an adhesion promoting material to the semiconductor die, the substrate, the conductive clip, and the wire bonds; as well as A molding process is performed to encapsulate the semiconductor die and the conductive clip in a molding compound, and to at least partially encapsulate the substrate in the molding compound.

17. The method of claim 16, wherein applying the adhesion promoting material comprises: The adhesion promoting material is sprayed.

18. The method of claim 16, wherein applying the adhesion promoting material comprises: The adhesion promoting material is applied to a portion of the substrate and a portion of the semiconductor die by spraying the adhesion promoting material through the slot.

19. The method of claim 16, further comprising coupling the conductive clip to a power terminal of a lead frame.

20. The method of claim 16, wherein forming the wire bonds with the semiconductor die comprises: The semiconductor die is electrically coupled to a signal terminal of a lead frame via the wire bonds.

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