Substrate structure and manufacturing method thereof
By providing a second insulating layer on the first insulating layer of the substrate structure and printing the mark, the problem of marking occupying line space and being disturbed in the prior art is solved, and the read success rate of marking and design flexibility are improved.
Patent Information
- Application Number
- CN202311390090.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-19
- Filing Date
- 2023-10-25
- Publication Date
- 2025-04-22
AI Technical Summary
The existing substrate structure needs to reserve enough area to accommodate marks during design, resulting in reduced wiring space of line structures, and marks are easily disturbed by line, affecting the reading quality.
A second insulating layer is provided on the first insulating layer of the substrate structure, and a mark is printed on the second insulating layer to avoid direct interference between the mark and the line layer.
This design does not affect the wiring space of the substrate structure, and the success rate of reading marks is improved, and the design has greater elasticity and freedom.
Smart Images
Figure CN119864346A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a packaging substrate structure, in particular to a substrate structure with a mark and a manufacturing method thereof. Background Art
[0002] In modern life with the continuous advancement of technology, electronic products play an indispensable role in people's lives. As people's demand for electronic products increases, it is more important to trace the identity of electronic products. One of the current methods of tracing the identity of electronic products is to print marks on the substrate inside the electronic products.
[0003] Figure 1 This is a schematic diagram of the existing substrate structure with markings. Figure 1 The substrate structure 100 has a plurality of contacts 110 and a mark 120, wherein the contacts 110 and the mark 120 are located on a surface 100a of the substrate structure 100, and the contacts 110 and the mark 120 are electrically insulated. Next, a chip 200 is disposed on the substrate structure 100, wherein the chip 200 has an active surface 200a and a back surface (not shown), wherein the back surface of the chip 200 faces the surface 100a of the substrate structure 100, and the chip 200 further includes a plurality of bonding pads 210, wherein the bonding pads 210 are located on the active surface 200a.
[0004] However, in the above-mentioned prior art, when designing the substrate structure 100, it is usually necessary to reserve enough area on the surface 100a to accommodate the mark 120. The design of such a mark 120 often reduces the wiring space of other circuit structures located on the surface 100a of the substrate structure 100. Furthermore, the existing mark 120 is easily disturbed by the circuit structure, resulting in an uneven surface and allowing the circuit structure below to transmit light, thereby affecting the quality of the mark reading and making it difficult to find a suitable position to print the mark.
[0005] Therefore, how to overcome the various problems of the above-mentioned prior art has become a topic that needs to be solved urgently. Summary of the invention
[0006] In view of the various deficiencies of the above-mentioned prior art, the present invention provides a substrate structure, including: a substrate body, including a dielectric layer and a circuit layer formed on the dielectric layer; a first insulating layer, disposed on the substrate body and having a plurality of openings formed therein to expose a portion of the circuit layer; and a second insulating layer, disposed on a portion of the first insulating layer, and having a mark on the second insulating layer.
[0007] The present invention also provides a method for manufacturing a substrate structure, including: providing a substrate body, which includes a dielectric layer and a circuit layer formed in the dielectric layer; a first insulating layer is provided on the substrate body, and the first insulating layer is formed with multiple openings to expose a portion of the circuit layer; a second insulating layer is provided on a portion of the first insulating layer; and a mark is provided on the second insulating layer.
[0008] In the aforementioned substrate structure and manufacturing method thereof, the mark is ink.
[0009] In the aforementioned substrate structure and manufacturing method thereof, the mark is a concave hole.
[0010] In the aforementioned substrate structure and manufacturing method thereof, the cavity is formed on the second insulating layer by laser ablation.
[0011] In the aforementioned substrate structure and manufacturing method thereof, the depth of the concave hole is 5 to 10 um.
[0012] In the aforementioned substrate structure and manufacturing method thereof, the mark is text.
[0013] In the aforementioned substrate structure and manufacturing method thereof, the mark is a graphic.
[0014] In the aforementioned substrate structure and manufacturing method thereof, the mark is a two-dimensional barcode graphic.
[0015] In the aforementioned substrate structure and manufacturing method thereof, the vertical projection area of the second insulating layer is superimposed on the circuit layer.
[0016] As can be seen from the above, in the substrate structure and the manufacturing method of the present invention, in addition to the first insulating layer, a second insulating layer is further disposed on a portion of the first insulating layer on the substrate body including the dielectric layer and the circuit layer formed in the dielectric layer, and a mark is disposed on the second insulating layer. Therefore, compared with the prior art in which a mark is disposed on the same surface of the substrate structure where the circuit layer is disposed, the arrangement of the mark in the present invention will not affect the wiring space of the circuit layer of the substrate body, and the reading of the mark will not be disturbed by the circuit layer, thereby improving the reading success rate. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 A schematic diagram of an existing substrate structure with markings.
[0018] FIG. 2A to FIG. 2C It is a cross-sectional schematic diagram of a method for manufacturing a substrate structure of the present invention.
[0019] Figure 2C-1 for Figure 2C A local enlarged schematic diagram of the second insulating layer.
[0020] Figure 3 The figure is a cross-sectional schematic diagram of an electronic component using the substrate structure of the present invention.
[0021] Main component symbols
[0022] 1 Electronic packaging
[0023] 10 Substrate structure
[0024] 11 Substrate body
[0025] 11a First side
[0026] 11b Second side
[0027] 12 Dielectric layer
[0028] 13 Circuit layer
[0029] 14 First insulation layer
[0030] 140 Opening
[0031] 15 Second insulation layer
[0032] 16 Mark
[0033] 20 Electronic components
[0034] 20a Active surface
[0035] 20b Non-active surface
[0036] 201 Conductive bump
[0037] 202 Primer
[0038] 21 Conductive element
[0039] 100 Substrate Structure
[0040] 100a surface
[0041] 110 contacts
[0042] 120 Marks
[0043] 200 chips
[0044] 200a Active Surface
[0045] 210 Solder pad. DETAILED DESCRIPTION
[0046] The following describes the implementation of the present invention by means of specific embodiments. Those skilled in the art can easily understand other advantages and technical effects of the present invention from the contents disclosed in this specification.
[0047] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed by the present invention without affecting the technical effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", "second" and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical content.
[0048] FIG. 2A to FIG. 2C It is a cross-sectional schematic diagram of a method for manufacturing a substrate structure of the present invention.
[0049] First, if Figure 2A As shown, a substrate body 11 is provided. The substrate body 11 includes a dielectric layer 12 and a circuit layer 13 formed on the dielectric layer 12. The substrate body 11 has a first side 11a (such as an upper side) and a second side 11b (such as a lower side) opposite to each other, wherein the first side 11a of the substrate body 11 can be used as a die placement side for carrying electronic components, and the second side 11b of the substrate body 11 can be used as a ball planting side for sequentially placing solder balls (such as solder balls) and electronic devices (such as circuit boards).
[0050] The substrate body 11 is covered with a first insulating layer 14, and the first insulating layer 14 is formed with a plurality of openings 140 to expose a portion of the circuit layer 13. In this embodiment, the first insulating layer 14 is a green paint (Solder Mask), which can protect the circuit layer 13 combined therein, avoid short circuit and open circuit caused by scratches, and achieve a solder mask function.
[0051] The circuit layer 13 may be made of copper, and the circuit layer 13 may be manufactured by, for example, sputtering, vaporizing, electroplating, electroless plating, chemical plating, etc., but the present invention is not limited thereto.
[0052] like Figure 2B As shown, a second insulating layer 15 is disposed on a partial surface of the first insulating layer 14 at the first side 11 a of the substrate body 11 .
[0053] In this embodiment, the second insulating layer 15 is a green paint (Solder Mask). In addition, in this embodiment, the first insulating layer 14 and the second insulating layer 15 are formed of the same material, but the present invention is not limited thereto, and the first insulating layer 14 and the second insulating layer 15 can also be formed of different materials.
[0054] Furthermore, the second insulating layer 15 can be disposed at any position on the first insulating layer 14 except for the region where the electronic components or other components are to be disposed.
[0055] In addition, the second insulating layer 15 has a length of 2.1 mm, a width of 2.1 mm, and a height of 15 um, for example. However, it should be understood that the size of the second insulating layer 15 can be adjusted according to the size of the mark described below, and is not limited to the above.
[0056] like Figure 2C As shown, the second insulating layer 15 is irradiated with laser (eg Figure 2C ), so as to form a mark 16 on the second insulating layer 15, thereby obtaining the substrate structure 10 of the present invention. Since the vertical projection area of the second insulating layer 15 can be superimposed on the circuit layer 13, that is, the setting position of the second insulating layer 15 is not limited to the distribution position of the circuit layer 13 of the substrate body 11, the mark 16 can be freely set at a position convenient for subsequent identification, and there is no need to reserve a space for accommodating the mark 16, which can ensure that the circuit layer 13 of the substrate body 11 has sufficient wiring space. Therefore, when designing the substrate structure 10, it can have greater flexibility and freedom.
[0057] For more information, see Figure 2C-1 ,for Figure 2C 1. The second insulating layer of the present invention is a partially enlarged schematic diagram of the second insulating layer. In this embodiment, the mark 16 is formed into a hole in the second insulating layer 15 by laser ablation, and a two-dimensional barcode (2D code) pattern is produced. In addition, the overall length of the mark 16 is, for example, 1.6 mm, the width is, for example, 1.6 mm, and the depth is, for example, 5 to 10 um. However, it should be understood that the size of the mark 16 can be adjusted according to needs and is not limited to the above.
[0058] In addition, although the mark 16 is a two-dimensional barcode pattern formed by a concave hole in this embodiment, the present invention is not limited thereto. In other embodiments, text may be printed on the surface of the second insulating layer 15 by laser ablation, or graphics or text may be printed on the second insulating layer 15 by ink without using laser ablation, and the present invention is not limited to the above.
[0059] In addition, the mark 16 may include information about the product identity, or the mark 16 may also record, for example, all relevant processing flow records of the substrate structure 10 to trace all current processing flows of the substrate structure 10. When the mark 16 is a two-dimensional barcode graphic, the user may use a barcode scanning device (such as an automatic optical recognition device or a manual barcode scanning device) to identify the mark 16 to obtain relevant product information, and when the mark 16 is text, the user may directly obtain relevant product information visually.
[0060] Afterwards, if Figure 3 As shown, at least one electronic component 20 is disposed on the first side 11a of the substrate body 11 of the substrate structure 10, and a plurality of conductive elements 21 such as metal pillars such as copper pillars, metal bumps coated with insulating blocks, solder balls, solder balls with core copper balls (Cu core balls) or other conductive structures are disposed on the second side 11b of the substrate body 11 to obtain an electronic package 1. Subsequently, these conductive elements 21 can be used to connect an electronic device such as a circuit board (not shown).
[0061] The electronic component 20 may be an active component, a passive component or a combination thereof, for example, the active component is a semiconductor chip, etc., and the passive component is a resistor, a capacitor or an inductor, etc. In the present embodiment, the electronic component 20 may be a semiconductor chip and has an active surface 20a and an inactive surface 20b opposite to each other, and the active surface 20a of the electronic component 20 may have a plurality of electrode pads (not shown), so that the plurality of electrode pads are combined and electrically connected to the circuit layer 13 of the substrate body 11 in a flip-chip manner through a plurality of conductive bumps 201 such as solder materials, and then a coating layer such as a primer 202 is filled and formed between the first side 11a of the substrate body 11 and the active surface 20a of the electronic component 20 to cover the plurality of conductive bumps 201.
[0062] In other embodiments, the electronic component 20 may be electrically connected to the circuit layer of the substrate body 11 by bonding multiple wires (not shown); or, the electronic component 20 may directly contact the circuit layer of the substrate body 11. It should be understood that there are many ways to electrically connect the electronic component 20 to the substrate structure 10, and the required type and number of electronic components 20 may be placed on the substrate structure 10, but the present invention is not limited thereto.
[0063] Based on the above, in the manufacturing method of the substrate structure 10 of the present invention, there is no need to reserve space for accommodating the mark 16 when designing the circuit layer 13 of the substrate body 11, thereby ensuring that the circuit layer 13 has sufficient wiring space, and in actual use, since the mark 16 is formed on the second insulating layer 15 independent of the circuit layer 13 of the substrate body 11, it will not be interfered by the circuit layer 13 of the substrate body 11, and the reading success rate can be improved.
[0064] The present invention also provides a substrate structure 10 including a substrate body 11 , a first insulating layer 14 and a second insulating layer 15 .
[0065] The substrate body 11 includes a dielectric layer 12 and a circuit layer 13 formed on the dielectric layer 12 .
[0066] The first insulating layer 14 is disposed on the substrate body 11 and has a plurality of openings 140 formed therein to expose a portion of the circuit layer 13. The second insulating layer 15 is disposed on a portion of the first insulating layer 14 and has a mark 16 thereon.
[0067] In one embodiment, the mark 16 is ink.
[0068] In one embodiment, the mark 16 is a concave hole.
[0069] In one embodiment, the depth of the cavity is 5 to 10 um.
[0070] In one embodiment, the mark 16 is text.
[0071] In one embodiment, the mark 16 is a graphic.
[0072] In one embodiment, the mark 16 is a two-dimensional barcode graphic.
[0073] In one embodiment, a vertical projection area of the second insulating layer 15 overlaps the circuit layer 13 .
[0074] In summary, in the substrate structure and manufacturing method of the present invention, in addition to disposing a first insulating layer on the substrate body having a circuit layer, a second insulating layer is further disposed on a portion of the first insulating layer, and a mark is disposed on the second insulating layer. In this way, the mark and the arrangement of the circuit layer will not interfere with each other, and the reading success rate can be improved.
[0075] Furthermore, when designing the substrate structure, there is no need to reserve space on the surface to accommodate the mark, which can ensure that the circuit layer of the substrate body has sufficient wiring space, and the mark can be set at a convenient position for identification as required, with great design flexibility and freedom.
[0076] The above embodiments are used to illustrate the principles and technical effects of the present invention, but are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the inventive concept and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.
Claims
1. A substrate structure, comprising: The substrate body comprises a dielectric layer and a circuit layer formed on the dielectric layer; A first insulating layer is disposed on the substrate body and is formed with a plurality of openings to expose a portion of the circuit layer; as well as The second insulating layer is disposed on a portion of the first insulating layer, and a mark is disposed on the second insulating layer.
2. The substrate structure according to claim 1, wherein: The marking is ink.
3. The substrate structure according to claim 1, wherein: The mark is a concave hole.
4. The substrate structure according to claim 3, wherein: The depth of the cavity is 5 to 10 um.
5. The substrate structure according to claim 1, wherein: The tag is text.
6. The substrate structure according to claim 1, wherein: The mark is a graphic.
7. The substrate structure according to claim 6, wherein: The mark is a two-dimensional barcode graphic.
8. The substrate structure according to claim 1, wherein: The vertical projection area of the second insulating layer is superimposed on the circuit layer.
9. A method for manufacturing a substrate structure, comprising: Providing a substrate body, which includes a dielectric layer and a circuit layer formed on the dielectric layer; A first insulating layer is disposed on the substrate body, and the first insulating layer is formed with a plurality of openings to expose a portion of the circuit layer; Disposing a second insulating layer on a portion of the first insulating layer; as well as A mark is disposed on the second insulating layer.
10. The method for manufacturing a substrate structure according to claim 9, wherein: The marking is ink.
11. The method for manufacturing a substrate structure according to claim 9, wherein: The mark is a concave hole.
12. The method for manufacturing a substrate structure according to claim 11, wherein: The concave hole is formed on the second insulating layer by laser ablation.
13. The method for manufacturing a substrate structure according to claim 11, wherein: The depth of the cavity is 5 to 10 um.
14. The method for manufacturing a substrate structure according to claim 9, wherein: The tag is text.
15. The method for manufacturing a substrate structure according to claim 9, wherein: The mark is a graphic.
16. The method for manufacturing a substrate structure according to claim 15, wherein: The mark is a two-dimensional barcode graphic.
17. The method for manufacturing a substrate structure according to claim 9, wherein: The vertical projection area of the second insulating layer is superimposed on the circuit layer.