Electronic device

Abstract

The invention provides an electronic device. The electronic device comprises a protective layer, a chip surrounded by the protective layer, a first connecting piece electrically connected with the chip, and an antenna unit arranged on the first connecting piece and electrically connected with the chip. The antenna unit comprises a pattern layer and a covering layer arranged on the pattern layer. The pattern layer includes a first surface and the cover layer includes a second surface. The roughness of the first surface is larger than that of the second surface.

Description

Technical Field

[0001] The invention relates to an electronic device, and in particular to a wiring structure integrating an antenna unit. Background Art

[0002] Electronic devices have become an indispensable product in modern life. However, with the trend of electronic devices being miniaturized, current display devices still fail to meet expectations in all aspects. For example, in existing automotive millimeter-wave radars, the antenna unit and the signal processing chip are configured in different areas on the same circuit board. Therefore, in such a separate configuration, the device size is larger and the cost is also higher. Therefore, developing a design that can meet the miniaturization of electronic devices is one of the topics that the industry is currently committed to researching. Summary of the invention

[0003] The present invention provides an electronic device, comprising: a protective layer, a chip surrounded by the protective layer, a first connector electrically connected to the chip, and an antenna unit disposed on the first connector and electrically connected to the chip. The antenna unit comprises a pattern layer and a covering layer disposed on the pattern layer. The pattern layer comprises a first surface and the covering layer comprises a second surface. The roughness of the first surface is greater than the roughness of the second surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] In order to make the above-mentioned objects, features and advantages of the present invention more clearly understood, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein:

[0005] Figure 1 A schematic cross-sectional view of an electronic device according to some embodiments of the present invention is shown;

[0006] Figure 2A-2C Schematic cross-sectional views showing different configurations of antenna units of electronic devices according to some embodiments of the present invention;

[0007] Figures 3A-3F A schematic cross-sectional view showing a method of forming an electronic device according to some embodiments of the present invention;

[0008] Figure 4 Showing schematic cross-sectional views of electronic devices according to some other embodiments of the present invention;

[0009] Figure 5 Showing schematic cross-sectional views of electronic devices according to yet other embodiments of the present invention;

[0010] Figures 6A-6E Schematic cross-sectional views showing methods of forming electronic devices according to yet other embodiments of the present invention.

[0011] Reference numerals:

[0012] 10: Electronic devices

[0013] 20: Electronic devices

[0014] 30: Electronic devices

[0015] 100: Protective layer

[0016] 200: Chip

[0017] 300: Dielectric layer

[0018] 400: first connecting member

[0019] 400M1: Conductive layer

[0020] 400M2: Conductive layer

[0021] 400C: Connecting line segments

[0022] 400D: Dielectric layer

[0023] 500: Antenna unit

[0024] 510: Pattern layer

[0025] 520: Covering layer

[0026] 600: Second connecting piece

[0027] 600M1: Conductive layer

[0028] 600M2: Conductive layer

[0029] 600C: Connecting line segments

[0030] 600D: Dielectric layer

[0031] 700:Substrate

[0032] B:Joint assembly

[0033] F: Functional components

[0034] V: Guide hole

[0035] TV: Via

[0036] HS:Heat sink

[0037] P1: pad

[0038] P2: pad

[0039] X: First direction

[0040] Z: Second direction DETAILED DESCRIPTION

[0041] The following is a detailed description of the electronic device of an embodiment of the present invention. It should be understood that the following description provides many different embodiments for implementing different aspects of some embodiments of the present invention. The specific components and arrangements described below are only for simple and clear description of some embodiments of the present invention. Of course, these are only used as examples and are not limitations of the present invention. In addition, similar and / or corresponding numbers may be used in different embodiments to indicate similar and / or corresponding components to clearly describe the present invention. However, the use of these similar and / or corresponding numbers is only for the simple and clear description of some embodiments of the present invention, and does not represent any correlation between the different embodiments and / or structures discussed.

[0042] The present invention can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that in order to facilitate the understanding of the readers and the simplicity of the drawings, the multiple drawings in the present invention only depict a portion of the electronic device, and the specific components in the drawings are not drawn according to the actual scale. In addition, the number and size of each component in the drawings are only for illustration and are not intended to limit the scope of the present invention.

[0043] It should be understood that the components or devices of the drawings may exist in various forms known to those skilled in the art. In addition, relative terms, such as "lower" or "bottom" or "upper" or "top", may be used in the embodiments to describe the relative relationship of one component of the drawings to another component. It is understood that if the device of the drawings is turned upside down, the component described on the "lower" side will become the component on the "upper" side. The embodiments of the present invention may be used in conjunction with the attached drawings. Figure 1 It is also understood that the drawings of the present invention are also considered as part of the invention description. Furthermore, when a first material layer is mentioned as being located on or above a second material layer, it includes the situation where the first material layer is in direct contact with the second material layer, or there may be one or more other material layers in between, in which case the first material layer and the second material layer may not be in direct contact.

[0044] Certain words are used throughout the specification and the appended claims to refer to specific components. It should be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. It is not intended to distinguish between components that have the same function but different names. In the following specification and claims, the words "include", "contain", "have" and the like are open-ended words, and therefore should be interpreted as "including but not limited to...". Therefore, when the terms "include", "contain" and / or "have" are used in the description of the present invention, they specify the existence of corresponding features, regions, steps, operations and / or components, but do not exclude the existence of one or more corresponding features, regions, steps, operations and / or components.

[0045] The directional terms mentioned herein, such as "up", "down", "front", "back", "left", "right", etc., are only referenced to the directions of the drawings. Therefore, the directional terms used are for illustration and not for limiting the present invention. In the drawings, each figure shows the general characteristics of the methods, structures and / or materials used in a particular embodiment. However, these drawings should not be interpreted as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative size, thickness and position of each film layer, region and / or structure may be reduced or enlarged.

[0046] When a corresponding component (such as a film layer or region) is referred to as being "on another component", it may be directly on the other component, or other components may exist between the two. On the other hand, when a component is referred to as being "directly on another component", there is no component between the two. In addition, when a component is referred to as being "on another component", the two have a top-down relationship in a top-down direction, and the component may be above or below the other component, and the top-down relationship depends on the orientation of the device.

[0047] In addition, it should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various components, assemblies, or parts, these components, assemblies, or parts should not be limited by these terms. These terms are only used to distinguish different components, assemblies, regions, layers, or parts. Therefore, a first component, component, region, layer, or part discussed below may be referred to as a second component, component, region, layer, or part without departing from the teachings of the present invention.

[0048] In the text, the terms "about" and "substantially" generally indicate a range within 10%, 5%, 3%, 2%, 1%, or 0.5% of a given value. The numbers given here are approximate numbers, that is, in the absence of specific descriptions of "about" and "substantially", the meaning of "about" and "substantially" can still be implied. In addition, the term "a range between a first value and a second value" means that the range includes the first value, the second value, and other values ​​between them.

[0049] It should be understood that the following embodiments may replace, reorganize, or mix features in several different embodiments to complete other embodiments without departing from the spirit of the present invention. Features between embodiments may be mixed and matched as long as they do not violate the spirit of the invention or conflict with each other.

[0050] In the present invention, the thickness, length and width can be measured by an optical microscope, and the thickness can be measured by a cross-sectional image in an electron microscope, but it is not limited to this. In addition, any two values ​​or directions used for comparison may have a certain error. If the first value is equal to the second value, it implies that there may be an error of about 10% between the first value and the second value; if the first direction is perpendicular to the second direction, the angle between the first direction and the second direction may be between 80 degrees and 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may be between 0 degrees and 10 degrees.

[0051] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as commonly understood by those skilled in the art to which the present invention belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present invention, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the embodiments of the present invention.

[0052] The embodiment of the present invention integrates the antenna unit and the signal processing chip in the vertical direction to make the device integrated, thereby achieving the effect of reducing size and reducing cost. In addition, the embodiment of the present invention can protect the pattern layer by setting the cover layer on the pattern layer in the antenna unit. Moreover, by making the surface roughness between the cover layer and the pattern layer greater than the surface roughness of the cover layer contacting the air, it is possible to prevent oxidation and reduce signal loss while ensuring the adhesion of the pattern layer.

[0053] First, please refer to Figure 1 , Figure 1 A cross-sectional schematic diagram of an electronic device 10 according to some embodiments of the present invention is shown.

[0054] In some embodiments, the electronic device 10 may include a power module, a semiconductor packaging device, a display device, a backlight device, an antenna device, a sensing device, or a splicing device, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. The electronic components may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. The diode may include a light emitting diode or a photodiode, but is not limited thereto.

[0055] The display device may be a non-self-luminous display device or a self-luminous display device. The self-luminous display device may include a light emitting diode, such as an organic light emitting diode (OLED), a sub-millimeter light emitting diode (mini LED), a micro light emitting diode (micro LED) or a quantum dot light emitting diode (quantum dot LED, such as QLED, QDLED), fluorescence, phosphorescence, but not limited thereto. The non-self-luminous display device may be an electrowetting display device, an electrophoretic display device or a liquid crystal display device, but not limited thereto. The liquid crystal display device may be a twisted nematic (TN) type liquid crystal display device, a super twisted nematic (STN) type liquid crystal display device, a double layer super twisted nematic (DSTN) type liquid crystal display device, a vertical alignment (VA) type liquid crystal display device, an in-plane switching (IPS) type liquid crystal display device, a cholesteric type liquid crystal display device, a blue phase (Blue Phase) type liquid crystal display device, a marginal field effect (FFS) type liquid crystal display device, a low temperature polycrystalline silicon liquid crystal display device (LTPS) or any other suitable liquid crystal display device.

[0056] The antenna device may be a liquid crystal antenna device or a non-liquid crystal antenna device, the sensing device may be a sensing device for sensing capacitance, light, heat or ultrasound, but is not limited thereto. The splicing device may be, for example, a display splicing device or an antenna splicing device, but is not limited thereto.

[0057] In some embodiments, the electronic device 10 may be, for example, a semiconductor package component, including a ball grid array package (BGA), a chip scale package (CSP), a 2.5D / 3D package, a Chip on Wafer on Substrate (CoWoS), (including CoW (Chip-on-Wafer) and WoS (Wafer-on-Substrate)), but not limited thereto. The following will use a semiconductor package component as an electronic device to illustrate the contents of the embodiments of the present invention, but the embodiments of the present invention are not limited thereto.

[0058] First, if Figure 1As shown, the electronic device 10 includes a protective layer 100. In some embodiments, the protective layer 100 is used to protect the chip 200 to avoid the influence of subsequent processes. That is, the protective layer 100 can be an encapsulation layer of the chip. In some embodiments, the protective layer 100 can be a single-layer or multi-layer structure. In some embodiments, the thickness of the protective layer 100 can be, for example, 100um-700um, but is not limited thereto. In some embodiments, the protective layer 100 can include solid molding materials (such as epoxy molding compound, EMC), other organic materials, inorganic materials, for example, organic resins, epoxy resins, epoxy molding compounds (EMC), ceramics, polymethyl methacrylate (PMMA), polydimethylsiloxane (PDMS), glass, other suitable materials or combinations of the above materials, but is not limited thereto. The protective layer 100 can include fillers, such as silicon oxide, but is not limited thereto. According to some embodiments, the particle size of the filler is greater than or equal to 0.05 micrometers (mm) and less than or equal to 30 micrometers (mm), or greater than or equal to 0.1 micrometers (mm) and less than or equal to 25 micrometers (mm). For example, the protective layer 100 can include more than one epoxy resin, phenolic resin, free radical initiator, catalyst, silica powder, etc.

[0059] In some embodiments, the protection layer 100 may include at least one via TV penetrating from one surface of the protection layer 100 to another surface thereof, so as to electrically connect the first connection member 400 described later with the second connection member 600 described later.

[0060] Then, if Figure 1 As shown, the electronic device 10 includes a chip 200. In one embodiment, the chip 200 may be disposed on the protection layer 100. In another embodiment, the chip 200 is surrounded by the protection layer 100. In some embodiments, the bottom surface and the side surface of the chip 200 may be completely covered by the protection layer 100.

[0061] In some embodiments, the chip 200 may be made of, for example, a silicon wafer, a III-V compound (such as gallium arsenide (GaAs), gallium nitride (GaN) and silicon carbide (SiC)), a sapphire or a glass wafer, but is not limited thereto. The chip 200 may be a known good die (KGD), and may include, for example, an integrated circuit (IC), a transistor, a silicon controlled rectifier (SCR), a valve, a thin film transistor (TFT), a capacitor, an inductor, a variable capacitance, a filter, a resistor, a diode, a light emitting diode, a microelectromechanical system (MEMS), a liquid crystal chip, a connector, an interposer, a redistribution layer (RDL), and other components, but is not limited thereto. In the embodiment of the present invention, the chip 200 is described by taking an integrated circuit (IC) as an example.

[0062] Then, if Figure 1 As shown, the electronic device 10 includes a plurality of pads P1 and a plurality of vias V, so that the chip 200 is electrically connected to the subsequent first connecting member 400. The pads P1 and the vias V may include the same or different conductive materials, such as metals, metal alloys, but not limited thereto. For example, nickel (Ni), copper (Cu), gold (Au), tin (Sn), aluminum (Al) may be used.

[0063] It should be noted that, in this document, “electrical connection” may include direct or indirect electrical connection through actual wiring, or coupling through direct physical contact or non-physical contact to transmit signals.

[0064] Then, if Figure 1 As shown, the electronic device 10 includes a dielectric layer 300 disposed on the chip 200 to protect the chip from being affected by subsequent processes (such as processes for forming the first connecting member 400 and the antenna unit 500 ) and avoid damage.

[0065] In some embodiments, dielectric layer 300 may completely cover the top surface of chip 200. For example, in Figure 1 In the embodiment of the present invention, the top surface of the chip 200 is covered by the dielectric layer 300 described later. In other embodiments, the dielectric layer 300 may be divided into a plurality of dielectric blocks and only cover a portion of the top surface of the chip 200 (see Figure 4 ).

[0066] In some embodiments, the dielectric layer 300 may include a dielectric material. For example, polyethylene terephthalate (PET), polyimide, photosensitive polyimide (PSPI), liquid crystal polymer (LCP), cyclo olefin polymer (COP), epoxy resin, Ajinomoto Build-up Film (ABF), bismaleimide, fluororesin and / or other suitable materials or combinations thereof, but not limited thereto. In an embodiment of the present invention, the dielectric layer 300 has a different dielectric material from the protective layer 100. For example, the dielectric layer 300 includes Ajinomoto Build-up Film (ABF) and the protective layer 100 includes epoxy plastic sealing material (EMC).

[0067] Then, if Figure 1 As shown, the electronic device 10 includes a first connector 400 electrically connected to the chip 200. In some embodiments, the first connector 400 can realize the electrical connection relationship required by each component, for example, it can be a redistribution layer (RDL) structure, and include multiple dielectric layers and multiple conductive layers. For example, the redistribution structure is electrically connected to each chip 200 through a bonding pad. The redistribution layer may include at least one conductive layer and at least one dielectric layer, or redistribute the circuit and / or further increase the circuit fan-out area, or different electronic components can be electrically connected to each other through the redistribution structure. For example, in an embodiment of the present invention, the first connector 400 is a redistribution structure, and is electrically connected to the chip 200 through multiple vias V and pads P1.

[0068] In one embodiment, the chip 200 can be electrically connected to at least one external component through the first connector 400 and the second connector 600, wherein the external component may include another chip, a resistor, a capacitor, an inductor, an antenna unit, a sensing unit, a printed circuit board, a driving unit, a combination of the above or other suitable external components or electronic units.

[0069] In one embodiment, during the process of forming an electronic device, the warping of the structure can be suppressed by a warpage reduction device, and then a rewiring structure can be formed by processes such as thin film deposition, acid etching, alkaline etching, surface treatment, plasma treatment, exposure and / or laser, but is not limited to this.

[0070] In some embodiments, the first connector 400 may include a conductive layer 400M1, a connecting line segment 400C, a conductive layer 400M2, and a dielectric layer 400D. The conductive layer 400M1 and the conductive layer 400M2 may extend along the first direction X, and the connecting line segment 400C may extend along the second direction Z and electrically connect the conductive layer 400M1 and the conductive layer 400M2. The conductive layer 400M1 may be disposed on the guide hole V and / or the protective layer 100. The conductive layer 400M2 may be electrically connected to the ground end, and is further referred to as a grounding line. The conductive layer 400M2 overlaps with the chip 200 in the second direction Z. For example, when the conductive layer 400M2 and the chip 200 are projected onto the protective layer 100 along the second direction Z, the area of ​​the conductive layer 400M2 may cover more than 2 / 3 of the area of ​​the chip 200. In this way, the signal interference of the antenna unit 400 with the chip 200 may be shielded. The conductive layer may include copper, aluminum, titanium, tantalum or other suitable conductive materials and may be a single layer or a multi-layer stack. The dielectric layer may include organic materials, inorganic materials, dielectric materials or other suitable insulating materials, such as (but not limited to) polyimide, epoxy resin and / or silicon dioxide, and may be a single layer or a multi-layer stack. In one embodiment, the dielectric layer has a thickness ranging from 0.1 micrometers to 40 micrometers.

[0071] It should be noted that, for the sake of simplicity, only the conductive layer 400M1 and the conductive layer 400M2 are marked in the drawings for illustration, and a person having ordinary knowledge in the technical field to which the present invention belongs can arbitrarily set other numbers of conductive layers under the conductive layer 400M1, between the conductive layer 400M1 and the conductive layer 400M2, or on the conductive layer 400M2 according to actual needs.

[0072] The conductive layer 400M1, the connecting line segment 400C, and the conductive layer 400M2 may include the same or different conductive materials, such as one or more metals, metal nitrides, conductive metal oxides, suitable materials, or combinations thereof. The metal may include molybdenum, tungsten, titanium, tantalum, platinum, or hafnium, but is not limited thereto. The metal nitride may include molybdenum nitride, tungsten nitride, titanium nitride, and tantalum nitride, but is not limited thereto. The conductive metal oxide may include ruthenium oxide and indium tin oxide, but is not limited thereto.

[0073] The dielectric layer 400D may include an organic or inorganic dielectric material, such as polyimide, epoxy resin, silicon oxide, silicon nitride, silicon oxynitride, photosensitive resin, dielectric material, or any other suitable dielectric material, or a combination thereof, but not limited thereto. The photosensitive resin may include photosensitive polyimide (PSPI). The dielectric material may include metal oxides, metal nitrides, metal silicides, transition metal oxides, transition metal nitrides, transition metal silicides, metal oxynitrides, metal aluminates, zirconium silicates, zirconium aluminates, etc., but not limited thereto. For example, the high-k dielectric material may be LaO, AlO, ZrO, TiO, Ta2O5, Y2O3, SrTiO3 (STO), BaTiO3 (BTO), BaZrO, HfO2, HfO3, HfZrO, HfLaO, HfSiO, HfSiON, LaSiO, AlSiO, HfTaO, HfTiO, HfTaTiO, HfAlON, (Ba, Sr)TiO3 (BST), Al2O3, other suitable materials, or combinations thereof, but are not limited thereto. In an embodiment of the present invention, the dielectric layer 400D may include a dielectric material different from the dielectric layer 300 and / or the protective layer 100, for example, the dielectric layer 400D may include photosensitive polyimide (PSPI).

[0074] Then, if Figure 1 As shown, the electronic device 10 includes an antenna unit 500 disposed on the first connector 400 and electrically connected to the chip 200. In some embodiments, the antenna unit 500 is used to receive and / or transmit antenna signals. In some embodiments, the antenna unit 500 may have a transmitting part and a receiving part separated from each other. For example, the antenna unit 500 may be a transmitting end and / or a receiving end of an antenna.

[0075] In some embodiments, the antenna unit 500 includes a pattern layer 510 and a cover layer 520 disposed thereon. The pattern layer 510 may be a layer that has a signal receiving or transmitting function after being patterned, for example. The cover layer 520 is used to protect the pattern layer 510 and reduce signal loss.

[0076] In some embodiments, the top surface of the cover layer 520 is in direct contact with the air. In some embodiments, the width of the cover layer 520 can be less than, equal to, or greater than the pattern layer 510 (for details, see Figure 2A to Figure 2C ). In some embodiments, the cover layer 520 partially overlaps the pattern layer 510. It should be noted that, herein, the so-called “width” refers to the length in the first direction X on the cross section of the first direction X and the second direction Z.

[0077] In some embodiments, the roughness of the first surface S1 between the pattern layer 510 and the cover layer 520 is greater than the roughness of the second surface S2 of the cover layer 520 exposed to air (see Figure 2A to Figure 2C ). That is, the second surface S2 of the cover layer 520 is a relatively smooth surface, and the first surface S1 is a relatively rough surface. Thus, the cover layer 520 can protect the pattern layer 510 and prevent it from being oxidized.

[0078] It should be noted that the so-called "surface" herein may include interfaces between layers, surfaces contacting air, etc. In addition, when the "surface" is an interface between a first layer and a second layer, the "surface" may be the surface of the first layer and the surface of the second layer at the same time.

[0079] In addition, the measurement of size and roughness described in the present case may include using a scanning electron microscope (SEM), a transmission electron microscope (TEM), etc. to observe the surface undulations at the same appropriate magnification. And compare the undulations by taking a unit length (e.g., 10 μm). Here, "appropriate magnification" means that at least one surface can see at least 10 undulating peaks under the field of view of this magnification. In one embodiment, the roughness value is obtained by the ten point height of irregularities (Rz), which is defined as the average value between the five highest peaks and the five deepest valleys within a measuring length.

[0080] In some embodiments, the pattern layer 510 may include a conductive material similar to the aforementioned one, which will not be described in detail herein. The cover layer 520 may include a metal or a metal alloy, such as copper, titanium, molybdenum, nickel, nickel-gold, nickel-palladium-gold, etc. In an embodiment of the present invention, the pattern layer 510 may be electroplated copper, which has a relatively rough surface, thereby increasing its adhesion to the surrounding dielectric layer. By using the above-mentioned material (which is relatively dense), the cover layer 520 may further make the surface smoother.

[0081] Then, if Figure 1 As shown, the electronic device 10 includes a second connector 600 disposed on the protection layer 100 on the opposite side of the first connector 400. Similar to the first connector 400, the second connector 600 can also realize the electrical connection relationship required by each component, for example, it can be a redistribution (RDL) structure, and includes multiple dielectric layers and multiple conductive layers. For example, in an embodiment of the present invention, the second connector 600 is a redistribution structure, and is electrically connected to the chip 200 through the via TV, multiple vias V and the pad P1.

[0082] In some embodiments, the second connector 600 is similar to the first connector 400, and may include a conductive layer 600M1, a connecting line segment 600C, a conductive layer 600M2, and a dielectric layer 600D surrounding the plurality of conductive layers. The conductive layer 600M1 and the conductive layer 600M2 may extend along a first direction X, and the connecting line segment 600C may extend along a second direction Z and electrically connect the conductive layer 600M1 and the conductive layer 600M2. The conductive layer 600M2 may serve as a pad and be electrically connected to the bonding component B described later. Similarly, a person having ordinary knowledge in the technical field to which the present invention belongs may arbitrarily set other number of conductive layers under the conductive layer 600M1, between the conductive layer 600M1 and the conductive layer 600M2, or on the conductive layer 600M2 according to actual needs.

[0083] In addition, the materials of the conductive layer 600M1 , the conductive layer 600M2 , the connecting line segment 600C and the dielectric layer 600D may be similar to those of the conductive layer 400M1 , the conductive layer 400M2 , the connecting line segment 400C and the dielectric layer 400D, and are not described in detail herein.

[0084] Then, if Figure 1 As shown, the electronic device 10 includes at least one bonding component B disposed on the second connector 600. In some embodiments, the bonding component B and the antenna unit 500 are on opposite sides of the chip 200. In some embodiments, the bonding component B can be electrically connected to the conductive layer 600M2 of the second connector 600. In some embodiments, the bonding component B can include a binary, ternary or multinary alloy composed of metals such as copper, silver, gold, nickel, titanium, tin, indium, germanium, platinum, palladium, etc., but is not limited thereto. In some embodiments, the bonding component B can be a solder ball, a bump, a pad, a copper column or other suitable bonding component. The bonding component B, for example, includes copper, tin, nickel, gold, lead, silver, gallium, other suitable conductive materials or a combination of the above materials, but is not limited to the above. The second connector 600 is electrically connected to the substrate 700 described later (see also) through the bonding component B. Figure 4 ).

[0085] As mentioned above, the embodiment of the present invention can achieve the effect of reducing size and cost by integrating the chip 200 and the antenna unit 500 in the second direction Z. In addition, the embodiment of the present invention can protect the underlying pattern layer 510 and reduce signal loss by using the cover layer 520 in the antenna unit 500. Moreover, by having the roughness of the first surface of the cover layer 520 contacting the air greater than the roughness of the second surface contacting the pattern layer 510, the pattern layer 510 can be prevented from being oxidized.

[0086] Next, you can refer to Figure 2A-2C , which are cross-sectional schematic diagrams showing different configurations of the antenna unit 500 of the electronic device 10 .

[0087] First, if Figure 2A As shown, the width of the pattern layer 510 is greater than the width of the covering layer 520. That is, in the first direction X, the length of the pattern layer 510 is greater than the length of the covering layer 520. In addition, the first surface S1 is the surface of the pattern layer 510 in contact with the covering layer 520. The second surface S2 is the surface of the covering layer 520 in contact with the air (or the surface away from the pattern layer 510). That is, the first surface S1 may belong to the pattern layer 510, may belong to the covering layer 520, or may belong to both the pattern layer 510 and the covering layer 520.

[0088] like Figure 2B As shown, the width of the pattern layer 510 is smaller than the width of the cover layer 520. That is, in the first direction X, the length of the pattern layer 510 is smaller than the length of the cover layer 520.

[0089] like Figure 2C As shown, the width of the pattern layer 510 is smaller than the width of the covering layer 520 . Also, the covering layer 520 covers the side surface of the pattern layer 510 .

[0090] Next, please refer to Figures 3A-3F , which is an example showing a method of forming the electronic device 10.

[0091] like Figure 3A As shown, a chip 200 is provided, and a pad P1 and a dielectric layer 300 are formed thereon. Next, an opening H is formed on the dielectric layer 300 corresponding to the pad P1.

[0092] The formation of the pad P1 may include a deposition process and a patterning process (including a photolithography process and an etching process), but is not limited thereto. The deposition process may include a deposition method including chemical vapor deposition (CVD), physical vapor deposition (PVD), sputtering, resistance heating evaporation, electron beam evaporation, or any other suitable method. The etching process may include a dry etching process or a wet etching process, such as reactive ion etching (RIE), neutral beam etching (NBE), a suitable etching process, or a combination thereof, but is not limited thereto.

[0093] The formation of the dielectric layer 300 may include a deposition process, such as chemical vapor deposition (CVD), atomic layer deposition (ALD), lamination or spin coating or other suitable processes, but not limited thereto. The chemical vapor deposition method may be, for example, low pressure chemical vapor deposition (LPCVD), low temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD), etc., but not limited thereto. The formation of the opening H may include an etching process similar to the above, which will not be repeated here.

[0094] like Figure 3A As shown, the chip 200 having the dielectric layer 300 and the opening H formed thereon is adhered to a carrier C1 having an adhesive layer G1 .

[0095] The carrier C1 may be a non-sticky substrate material, such as glass, steel plate, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) or other suitable materials, but not limited thereto. The adhesive layer G1 may include polycrystalline carbonate, polycarbodiimide, epoxy resin, polyvinyl acetal, acrylic resin, polyester, other suitable adhesive materials or combinations thereof, but not limited thereto. In some embodiments, the adhesive layer G1 may have thermal release or optical release properties.

[0096] like Figure 3A As shown, a protective layer 100 is formed on the carrier C1 and covers the chip 200. The formation of the protective layer 100 may include transfer molding and compression molding. For example, granular molding compound (GMC) may be uniformly spread and then compressed by heating and pressurizing.

[0097] like Figure 3B As shown, the chip 200 surrounded by the protective layer 100 is inverted and adhered to the carrier C2 having the adhesive layer G2. In addition, a guide hole V is formed in the opening H, and a conductive layer 400M1 is formed on the protective layer 100. The guide hole V and the conductive layer 400M1 can be formed simultaneously by a deposition process (such as electroplating), and then a predetermined pattern is formed by a patterning process. According to some embodiments, a groove can be dug in the protective layer 100, and then the chip 200 is arranged in the groove, and a conductive layer 400M1 is formed on the protective layer 100 so that the conductive layer is electrically connected to the chip, but it is not limited thereto. According to some embodiments, the conductive layer 400M1 can be a dummy or alignment mark, but it is not limited thereto.

[0098] like Figure 3C As shown, a dielectric layer 400D, a connecting line segment 400C and a conductive layer 400M2, a pattern layer 510 and a covering layer 520 are formed on the protective layer 100, thereby completing the first connector 400 and the antenna unit 500. The formation of the first connector 400 may include multiple deposition processes and etching processes, which are similar to the above and are not repeated here. The formation of the antenna unit 500 may include a deposition process and a patterning process, so that the pattern layer 510 and the covering layer 520 become a predetermined pattern. The relevant processes are similar to the above and are not repeated here.

[0099] like Figure 3D As shown, the chip 200 and the first connector 400 surrounded by the protective layer 100 are inverted and adhered to the carrier C3 having the adhesive layer G3. In addition, a through hole H is formed in the protective layer 100. The through hole H can have different shapes, such as a straight tube shape, a neck shape, or a trapezoidal shape. The formation of the through hole H can include penetrating the protective layer 100 from the surface of the protective layer 100 exposed to the air by laser drilling or mechanical drilling until the conductive layer 400M1 of the first connector 400 is exposed.

[0100] like Figure 3E As shown, a via hole TV is formed in the through hole H. The formation of the via hole TV may include electroplating, deposition processes, etc., such as deep hole electroplating.

[0101] like Figure 3F As shown, a conductive layer 600M1, a dielectric layer 600D, a connecting line segment 600C, and a conductive layer 600M2 are formed on the via TV to complete the second connector 600. The formation of the second connector 600 may include multiple deposition processes and etching processes, which are similar to the above and are not repeated here.

[0102] like Figure 3FAs shown, after forming the bonding element B on the second connecting member 600 corresponding to the conductive layer 600M2, another carrier C3 having the adhesive layer G3 is removed, and the following can be obtained: Figure 1 The electronic device 10. The formation of the bonding component B may include reflow soldering and the like, but is not limited thereto.

[0103] Next, please refer to Figure 4 , Figure 4 Schematic cross-sectional views of electronic devices according to some other embodiments of the present invention are shown.

[0104] In detail, Figure 4 The electronic device 20 is similar to Figure 1 The electronic device 10 of the embodiment of the present invention is different in that the electronic device 20 further includes a substrate 700 disposed on the bonding element B. That is, the bonding element B is disposed between the substrate 700 and the second connecting member 600. The bonding element B and the substrate 700 are on one side of the protective layer 100, and the antenna unit 500 is on the other side of the protective layer 100. That is, the bonding element B and the antenna unit 500 are on opposite sides of the protective layer 100.

[0105] In some embodiments, the substrate 700 may be a driving component, such as a printed circuit board (PCB) or a flexible printed circuit (FPC), a chip on film (COF), an integrated circuit (IC), or a combination thereof, but not limited thereto. The substrate 700 in the present invention may include a steel plate, glass, polyimide (PI), polyethylene terephthalate (PET), a wafer, other suitable materials, or a combination of the above materials.

[0106] In addition, the electronic device 20 further includes a pad P2 disposed between the substrate 700 and the bonding element B to electrically connect the two. The formation and material of the pad P2 are similar to those described above and will not be described in detail herein.

[0107] In addition, the electronic device 20 further includes a functional component F, which can be electrically connected to the conductive layer 400M1. The functional component F can be an integrated passive device (IPD), a thin film transistor (TFT), a sensor, or other suitable components.

[0108] In addition, the electronic device 20 uses the conductive layer 400M1 instead of the via V to electrically connect the chip 200 and the antenna unit 500 and / or the bonding element B. It should be noted that the features of each embodiment can be mixed and matched as long as they do not violate the spirit of the invention or conflict with each other.

[0109] Next, please refer to Figure 5 , Figure 5 Schematic cross-sectional views of electronic devices according to still other embodiments of the present invention are shown.

[0110] In detail, Figure 5 The electronic device 30 is similar to the electronic device 20 of FIG. 2 , except that the substrate 700 and the antenna unit 500 in the electronic device 30 are disposed on the same side of the protective layer 100. In addition, the electronic device 30 does not have the second connector 600. That is, the bonding component B is disposed between the substrate 700 and the first connector 400. Figure 5 As shown in the embodiment of FIG. 5 , the substrate 700 has an opening O, which corresponds to the antenna unit 500. That is, in the first direction X, the antenna unit 500 does not overlap with the substrate 700. Figure 5 In the embodiment, in the opening O close to the left side (direction -X side), the signal is exemplified by the antenna unit 500 transmitting the signal; and in the opening O close to the right side (direction +X side), the signal is exemplified by the antenna unit receiving the signal.

[0111] In addition, the electronic device 30 further includes a heat sink HS disposed on a side of the protective layer 100 relative to the first connector 400. Furthermore, the heat sink HS can be electrically connected to the conductive layer 400M1 via the via TV. This helps the electronic device to dissipate heat. Here, different types of vias TV can be used to increase heat dissipation or improve electromagnetic interference (EMI). For example, the via TV can be in a straight cylindrical shape, a trapezoidal shape, or a neck shape. Figure 5 In one embodiment, the via TV is neck-shaped. In one embodiment, in a cross-sectional view, the aspect ratio of the via TV is 2:1-20:1.

[0112] It should be noted that the features of the various embodiments may be mixed and matched as long as they do not violate the spirit of the invention or conflict with each other.

[0113] The following will briefly describe the method of forming the electronic device 30. Figures 6A-6E shown. Figures 6A-6E An example of a method of forming the electronic device 30 is shown. Figures 6A-6E Similar to Figures 3A-3F For brevity, only the differences are briefly described below.

[0114] Figure 6A-6B and Figure 3A-3BThe same, no further description is given here. Figure 6C As shown, the first connecting member 400 is formed. It should be noted that at this time, a position for forming the joint component B must also be reserved on the first connecting member 400, so it may be necessary to have a relatively large Figure 3C Large area. Figure 6D-6E As shown, the antenna unit 500 is formed at a predetermined position on the first connecting member 400. Also, a bonding component B is formed at a position where the antenna unit 500 is not formed.

[0115] By locating the antenna unit 500 and the bonding element B on the same side of the protective layer 100 , the steps of forming the second connector can be reduced (without the second connector 600 ), and the process complexity can be further simplified, thereby reducing the manufacturing cost.

[0116] In summary, the antenna unit of the embodiment of the present invention can protect the pattern layer with signal receiving or transmitting function and reduce signal loss by including a covering layer. Moreover, by making the surface roughness between the covering layer and the pattern layer greater than the surface roughness of the covering layer contacting the air, it is possible to prevent oxidation and reduce signal loss while ensuring the adhesion of the pattern layer. In addition, the embodiment of the present invention integrates the antenna unit and the chip in the second direction to integrate the device, thereby achieving the effect of reducing size and cost.

[0117] Although the embodiments of the present invention and their advantages have been disclosed as above, it should be understood that any person with ordinary knowledge in the art can make changes, substitutions and modifications without departing from the spirit and scope of the present invention. The features between the embodiments of the present invention can be mixed and matched as needed as long as they do not violate the spirit of the invention or conflict with each other. In addition, the scope of protection of the present invention is not limited to the processes, machines, manufacturing, material compositions, devices, methods and steps in the specific embodiments described in the specification. Any person with ordinary knowledge in the art can understand the current or future developed processes, machines, manufacturing, material compositions, devices, methods and steps from the disclosure of the present invention. As long as they can implement roughly the same functions or obtain roughly the same results in the embodiments described herein, they can be used according to the present invention. Therefore, the scope of protection of the present invention includes the above-mentioned processes, machines, manufacturing, material compositions, devices, methods and steps. The scope of protection of the present invention shall be subject to the scope of the claims attached above. Any embodiment or claim of the present invention does not need to achieve all the purposes, advantages and features disclosed in the present invention.

Claims

1. An electronic device, comprising: A protective layer; a chip disposed on the protective layer; a first connecting member electrically connected to the chip; and an antenna unit, disposed on the first connecting member and electrically connected to the chip, The antenna unit includes a pattern layer and a covering layer disposed on the pattern layer. The pattern layer includes a first surface, and the cover layer includes a second surface. The roughness of the first surface is greater than the roughness of the second surface.

2. The electronic device according to claim 1, wherein: The first surface contacts the cover layer.

3. The electronic device according to claim 1, wherein: The second surface is away from the pattern layer.

4. The electronic device according to claim 1, wherein: The first connecting member includes: at least one conductive layer, wherein the conductive layer overlaps with the chip in a second direction, wherein the at least one conductive layer is electrically connected to a ground terminal.

5. The electronic device according to claim 1, wherein: In a cross-sectional view, the width of the covering layer is smaller than the width of the pattern layer.

6. The electronic device as claimed in claim 1, wherein: In a cross-sectional view, the width of the covering layer is greater than or equal to the width of the pattern layer.

7. The electronic device according to claim 1, wherein: The covering layer partially overlaps with the pattern layer in a direction perpendicular to a second direction.

8. The electronic device as claimed in claim 1, wherein: Also includes: a second connecting member, disposed on the protective layer; at least one bonding component disposed on the second connecting member and on the opposite side of the chip as the antenna unit; and A substrate is disposed on the at least one bonding component, wherein the at least one bonding component is disposed between the substrate and the second connecting member.

9. The electronic device as claimed in claim 1, wherein: Also includes: at least one bonding component disposed on the first connecting member and on the same side of the chip as the antenna unit; and A substrate is disposed on the at least one bonding component, wherein the at least one bonding component is disposed between the substrate and the first connecting member, wherein the substrate has at least one opening exposing the antenna unit.

10. The electronic device according to claim 1, wherein: The protection layer further includes: at least one conducting hole penetrating from one surface of the protection layer to another surface.

Images