A readout circuit for optical signals and an image sensor

Abstract

The present invention discloses a readout circuit for optical signals and an image sensor, which relates to the field of electronic information. When a photosensitive pixel receives an optical signal and generates a corresponding photocurrent, a logarithmic conversion module will perform logarithmic conversion on the photocurrent flowing through the photosensitive pixel, and then an output buffer module will buffer the converted voltage signal as the final readout electrical signal. By using the logarithmic conversion module to convert the photocurrent signal that originally has an exponential relationship with the light intensity, a voltage signal that has a logarithmic relationship with the photocurrent signal is obtained, realizing the compression of the exponential signal, so that the relationship between the voltage signal finally output by the readout circuit and the input light intensity signal returns to a linear relationship, effectively avoiding the limitation of the dynamic range of the voltage signal, realizing the readout of the optical signal by generating a voltage signal with better linearity and dynamic range, reducing the error caused by non-linearity, and improving the accuracy and reliability of the entire optical signal readout process.

Description

Technical Field

[0001] The present invention relates to the field of electronic information, and particularly to a readout circuit for optical signals and an image sensor. Background Art

[0002] As an important device for acquiring visual information, an image sensor can convert the sensed optical signal into an electrical signal for output, and can be applied in fields such as photography, videography, imaging, etc. With the continuous development and wide application of image sensors, users' requirements for their performance are also constantly increasing. A resistive modulation type photosensitive device can capture an optical signal, and the optical signal changes the resistance of the resistive modulation type photosensitive device. The change in this resistance can be quantified by detecting the voltage across the resistance and then detecting the change in the current flowing through the resistance, thereby converting the optical signal into an electrical signal of a current change value, realizing the readout of the optical signal. However, in the prior art, the relationship between the electrical signal generated by linearly amplifying the photocurrent through the resistance and the light intensity is an exponential relationship. When the light intensity changes, the electrical signal shows an exponential increase, resulting in poor linearity in the process of reading out the optical signal; and once the input range of the light intensity signal is too wide, it is easy for the electrical signal to saturate, limiting the dynamic range of the electrical signal. Summary of the Invention

[0003] The object of the present invention is to provide a readout circuit for optical signals and an image sensor, so that the relationship between the voltage signal finally output by the readout circuit and the input light intensity signal returns to a linear relationship, effectively avoiding the limitation of the dynamic range of the voltage signal, realizing the readout of the optical signal by generating a voltage signal with better linearity and dynamic range, reducing the error caused by non-linearity, and improving the accuracy and reliability of the entire process of reading out the optical signal.

[0004] To solve the above technical problems, the present invention provides a readout circuit for optical signals, including:

[0005] A logarithmic conversion module, with its input end connected to the photosensitive pixel, for performing logarithmic conversion on the photocurrent flowing through the photosensitive pixel to generate a voltage signal having a logarithmic relationship with the photocurrent;

[0006] An output buffer module, with its input end connected to the output end of the logarithmic conversion module, for buffering and outputting the voltage signal.

[0007] Optionally, the output buffer module includes:

[0008] A source follower, with its control end connected to the output end of the logarithmic conversion module, for amplifying and outputting the voltage signal output by the logarithmic conversion module;

[0009] The first current bias module, whose output terminal is connected to one end of the source follower and serves as the output terminal of the output buffer module, is used to provide a bias current for the source follower.

[0010] Optionally, the image sensor includes a pixel array composed of a plurality of photosensitive pixels; the readout circuit further includes:

[0011] A strobe switch, whose control terminal is connected to an output selection signal, the first terminal is connected to one end of the source follower, and the second terminal is connected to the output terminal of the first current bias module, is used to conduct when the photosensitive pixel is selected for output and turn off when the photosensitive pixel is not selected for output.

[0012] Optionally, the first terminal of the photosensitive pixel is connected to a first power supply, and the second terminal is connected to the input terminal of the logarithmic conversion module. The logarithmic conversion module includes:

[0013] A first amplification unit of class A;

[0014] For any first amplification unit, the first amplification unit includes a first conversion switch transistor and a first amplification switch transistor. The control terminal of the first amplification switch transistor is connected to the first terminal of the first conversion switch transistor and serves as the first input terminal of the first amplification unit. The first terminal of the first amplification switch transistor serves as the second input terminal of the first amplification unit. The second terminal of the first conversion switch transistor serves as the first output terminal of the first amplification unit. The control terminal of the first conversion switch transistor is connected to the second terminal of the first amplification switch transistor and serves as the second output terminal of the first amplification unit;

[0015] The first input terminal of the first stage of the first amplification unit is connected to the second terminal of the photosensitive pixel. The second input terminal of the first stage of the first amplification unit is connected to a second power supply. The first output terminal of the first amplification unit of class A is grounded. The first output terminal of the i-th stage of the first amplification unit is connected to the first input terminal of the (i + 1)-th stage of the first amplification unit. The second output terminal of the i-th stage of the first amplification unit is connected to the second input terminal of the (i + 1)-th stage of the first amplification unit; A is a positive integer, and i is a positive integer less than A;

[0016] A second current bias module, whose output terminal is connected to the second output terminal of the first amplification unit of class A and serves as the output terminal of the logarithmic conversion module.

[0017] Optionally, the first terminal of the photosensitive pixel is connected to a first power supply, and the second terminal is connected to the input terminal of the logarithmic conversion module. The logarithmic conversion module includes:

[0018] A second amplification switch transistor, whose first terminal is connected to a second power supply;

[0019] The second conversion switch transistor, the first end of which is respectively connected to the control end of the second amplification switch transistor and the second end of the photosensitive pixel;

[0020] The third conversion switch transistor, the first end of which is respectively connected to the second end of the second conversion switch transistor and the control end of the second conversion switch transistor, and the second end is grounded;

[0021] The third current bias module, the output end of which is respectively connected to the control end of the third conversion switch transistor and the second end of the second amplification switch transistor, and serves as the output end of the logarithmic conversion module.

[0022] Optionally, the first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module. The logarithmic conversion module includes:

[0023] The third amplification switch transistor, the first end of which is connected to the second power supply;

[0024] The fourth conversion switch transistor, the first end of which is respectively connected to the control end of the third amplification switch transistor and the second end of the photosensitive pixel, and the control end is connected to a first preset bias voltage;

[0025] The fourth current bias module, the output end of which is respectively connected to the second end of the fourth conversion switch transistor and the second end of the third amplification switch transistor, and serves as the output end of the logarithmic conversion module.

[0026] Optionally, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module. The logarithmic conversion module includes:

[0027] Level B second amplification unit;

[0028] For any second amplification unit, the second amplification unit includes a fifth conversion switch transistor and a fourth amplification switch transistor. The control end of the fourth amplification switch transistor is connected to the first end of the fifth conversion switch transistor and serves as the first input end of the second amplification unit. The first end of the fourth amplification switch transistor serves as the second input end of the second amplification unit. The second end of the fifth conversion switch transistor serves as the first output end of the second amplification unit. The control end of the fifth conversion switch transistor is connected to the second end of the fourth amplification switch transistor and serves as the second output end of the second amplification unit;

[0029] The first input terminal of the first-stage second amplification unit is connected to the second terminal of the photosensitive pixel, the second input terminal of the first-stage second amplification unit is grounded, the first output terminal of the B-stage second amplification unit is connected to the second power supply, the first output terminal of the j-stage second amplification unit is connected to the first input terminal of the j+1-stage second amplification unit, and the second output terminal of the j-stage second amplification unit is connected to the second input terminal of the j+1-stage second amplification unit; B is a positive integer, and j is a positive integer less than B;

[0030] The fifth current biasing module, with its output terminal connected to the second output terminal of the B-stage second amplification unit and serving as the output terminal of the logarithmic conversion module.

[0031] Optionally, the first terminal of the photosensitive pixel is grounded, the second terminal is connected to the input terminal of the logarithmic conversion module, and the logarithmic conversion module includes:

[0032] The fifth amplification switch transistor, with its first terminal grounded;

[0033] The sixth conversion switch transistor, with its first terminal connected to the control terminal of the fifth amplification switch transistor and the second terminal of the photosensitive pixel respectively;

[0034] The seventh conversion switch transistor, with its first terminal connected to the second terminal of the sixth conversion switch transistor and the control terminal of the sixth conversion switch transistor respectively, and its second terminal connected to the second power supply;

[0035] The sixth current biasing module, with its output terminal connected to the control terminal of the seventh conversion switch transistor and the second terminal of the fifth amplification switch transistor respectively, and serving as the output terminal of the logarithmic conversion module.

[0036] Optionally, the first terminal of the photosensitive pixel is grounded, the second terminal is connected to the input terminal of the logarithmic conversion module, and the logarithmic conversion module includes:

[0037] The sixth amplification switch transistor, with its first terminal grounded;

[0038] The eighth conversion switch transistor, with its first terminal connected to the second terminal of the photosensitive pixel and the control terminal of the sixth amplification switch transistor respectively, and its control terminal connected to the second preset bias voltage;

[0039] The seventh current biasing module, with its output terminal connected to the second terminal of the eighth conversion switch transistor and the second terminal of the sixth amplification switch transistor respectively, and serving as the output terminal of the logarithmic conversion module.

[0040] To solve the above technical problems, the present invention also provides an image sensor, which includes a photosensitive pixel and the readout circuit for the optical signal as described above. The input terminal of the readout circuit for the optical signal is connected to the photosensitive pixel and is used to convert the optical signal captured by the photosensitive pixel into an electrical signal.

[0041] The present invention provides a readout circuit for optical signals, which includes a logarithmic conversion module and an output buffer module. When a photosensitive pixel receives an optical signal and generates a corresponding photocurrent, the logarithmic conversion module will perform logarithmic conversion on the photocurrent flowing through the photosensitive pixel, and then the output buffer module will buffer the converted voltage signal as the final readout electrical signal. By using the logarithmic conversion module to convert the photocurrent signal that originally has an exponential relationship with the light intensity into a voltage signal that has a logarithmic relationship with the photocurrent signal, the compression of the exponential signal is realized, so that the relationship between the voltage signal finally output by the readout circuit and the input light intensity signal returns to a linear relationship, effectively avoiding the limitation of the dynamic range of the voltage signal. The readout of the optical signal is realized by generating a voltage signal with better linearity and dynamic range, reducing the error caused by non-linearity, and improving the accuracy and reliability of the entire optical signal readout process.

[0042] The present invention also provides an image sensor, which has the same beneficial effects as the above-mentioned readout circuit for optical signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the prior art and the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0044] Figure 1 It is a schematic structural diagram of a readout circuit for optical signals provided by the present invention;

[0045] Figure 2 It is a schematic structural diagram of a photosensitive pixel provided by the present invention;

[0046] Figure 3 It is a schematic structural diagram of a readout circuit for optical signals when a photosensitive pixel is connected to a high bias voltage provided by the present invention;

[0047] Figure 4 It is a schematic structural diagram of a readout circuit for optical signals when a photosensitive pixel is connected to a low bias voltage provided by the present invention;

[0048] Figure 5 It is a schematic structural diagram of another readout circuit for optical signals provided by the present invention;

[0049] Figure 6 It is a schematic diagram of a setting method of an output buffer circuit provided by the present invention;

[0050] Figure 7 It is a schematic diagram of another setting method of an output buffer circuit provided by the present invention;

[0051] Figure 8 Schematic diagram of a readout circuit for optical signals using a pixel array provided by the present invention;

[0052] Figure 9 Schematic diagram of the first photosensitive pixel connected to a high bias voltage and a logarithmic conversion module provided by the present invention;

[0053] Figure 10 Schematic diagram of the second photosensitive pixel connected to a high bias voltage and a logarithmic conversion module provided by the present invention;

[0054] Figure 11 Schematic diagram of the third photosensitive pixel connected to a high bias voltage and a logarithmic conversion module provided by the present invention;

[0055] Figure 12 Schematic diagram of the fourth photosensitive pixel connected to a high bias voltage and a logarithmic conversion module provided by the present invention;

[0056] Figure 13 Schematic diagram of the first photosensitive pixel connected to a low bias voltage and a logarithmic conversion module provided by the present invention;

[0057] Figure 14 Schematic diagram of the second photosensitive pixel connected to a low bias voltage and a logarithmic conversion module provided by the present invention;

[0058] Figure 15 Schematic diagram of the third photosensitive pixel connected to a low bias voltage and a logarithmic conversion module provided by the present invention;

[0059] Figure 16 Schematic diagram of the fourth photosensitive pixel connected to a low bias voltage and a logarithmic conversion module provided by the present invention. Detailed implementation manners

[0060] The core of the present invention is to provide a readout circuit for optical signals and an image sensor, so that the relationship between the voltage signal finally output by the readout circuit and the input optical intensity signal returns to a linear relationship, effectively avoiding the limitation of the dynamic range of the voltage signal, realizing the readout of optical signals by generating a voltage signal with better linearity and dynamic range, reducing the error caused by non-linearity, and improving the accuracy and reliability of the entire optical signal readout process.

[0061] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0062] It should be noted that the present invention mainly aims at photosensitive pixels using two-dimensional sheet materials. Such pixels belong to resistive modulation type photosensitive devices. In two different situations of being irradiated by light and not being irradiated by light, the two-dimensional material will present different resistance values, and its resistance value and the radiation illuminance of light are in an exponential relationship, thereby realizing the readout and conversion of optical signals. This type of photosensitive pixel includes two nodes, an electrode terminal and a signal readout terminal. Its photosensitive part is composed of two-dimensional material graphene distributed between the two nodes and quantum dots connected to the graphene. The material of the quantum dots can be cadmium sulfide, cadmium selenide, cadmium telluride, zinc selenide, lead sulfide, lead selenide, indium phosphide, etc. Using quantum dots as photosensitive materials can optimize the wavelength of absorbed light. For example, using PbS can absorb and measure light in the short-wave infrared band; silicon material itself can also be directly used for photosensing to realize the capture and acquisition of optical signals. The two-dimensional material can also be molybdenum disulfide, etc. For this type of photosensitive pixel, the present invention provides a readout circuit for optical signals to realize the readout and conversion of optical signals captured by the photosensitive pixel, and the specific implementation manner is described below.

[0063] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of a readout circuit for optical signals provided by the present invention; please refer to Figure 2 , Figure 2 which is a schematic structural diagram of a photosensitive pixel provided by the present invention. The electrical signal after photoelectric conversion in the photosensitive pixel is transmitted to the signal readout terminal 31 and then output. The electrode terminal 32 provides necessary electrical energy for each component in the photosensitive pixel. The photosensitive pixel uses silicon dioxide 33 to isolate different electrodes and circuit elements in the photosensitive pixel. Graphene 34 is provided in the photosensitive area to quickly collect and transmit the charges generated in the photoelectric conversion process. Quantum dots 35 are provided in the photosensitive area to absorb photons; to solve the above technical problems, the present invention provides a readout circuit for optical signals, including:

[0064] A logarithmic conversion module 1, whose input terminal is connected to the photosensitive pixel, is used for logarithmically converting the photocurrent flowing through the photosensitive pixel to generate a voltage signal having a logarithmic relationship with the photocurrent;

[0065] An output buffer module 2, whose input terminal is connected to the output terminal of the logarithmic conversion module 1, is used for buffering the voltage signal and then outputting it.

[0066] It is not difficult to understand that, in order to achieve a more accurate and reliable readout of optical signals, the present invention provides a logarithmic conversion module 1 in the readout circuit of optical signals. The logarithmic conversion module 1 performs logarithmic conversion on the photocurrent flowing through the photosensitive pixel to generate a corresponding voltage signal, and the optical signal is read out based on the voltage signal. The logarithmic conversion module 1 is connected in series with the photosensitive pixel. When the photosensitive pixel is irradiated with light, its resistance value changes with the change of the optical signal, and the resistance value has an exponential relationship with the irradiance of light; when the power supply connected to the photosensitive pixel remains unchanged, the photocurrent flowing through the photosensitive pixel is inversely proportional to the resistance value of the photosensitive pixel. Therefore, the photocurrent flowing through the photosensitive pixel can also effectively represent the optical signal received by the photosensitive pixel and has an exponential relationship with the irradiance of light. After the photocurrent flowing through the photosensitive pixel is input into the logarithmic conversion module 1, the logarithmic conversion module 1 performs logarithmic conversion on it to obtain a voltage signal having a linear relationship with the irradiance of light. Thus, the mechanism of exponential transformation in the photosensitive pixel is offset by using logarithmic transformation, and linear compensation of light intensity is efficiently achieved.

[0067] It can be understood that considering that the voltage signal obtained after the logarithmic conversion module 1 performs conversion may have abnormal jitter due to noise and interference signals, etc., and considering that the voltage signal read out by the readout circuit also needs to be input into circuits such as an analog-to-digital conversion circuit and an upper computer for further processing to achieve functions such as image generation, in the readout circuit of optical signals, the present invention further provides an output buffer module 2. The voltage signal output by the logarithmic conversion module 1 will pass through the output buffer module 2 to achieve the final readout of the electrical signal. The output buffer module 2 can not only play a role in signal isolation, avoiding mutual interference of signals between other circuit modules and the logarithmic conversion module 1, preventing the voltage signal from being affected by noise, interference signals, etc. that may appear in the subsequent circuit, but also absorb abnormal reverse current and back electromotive force to protect the logarithmic conversion module 1 and ensure the safety and reliability of the entire readout circuit. At the same time, by providing the output buffer module 2, the signal quality of the voltage signal can be further improved. The output buffer module can shape the voltage signal to achieve level matching of the voltage signal, improve the driving ability of the voltage signal, etc., ensure the complete transmission of the voltage signal, and reduce signal jitter; improve the stability and reliability of the entire readout circuit.

[0068] It should be noted that the present application does not make special limitations on the specific types and implementation manners of the logarithmic conversion circuit and the output buffer module 2 here. It can be implemented by a circuit architecture composed of devices such as MOS transistors (Metal-Oxide-Semiconductor Field-Effect Transistors), bipolar transistors, etc. The specific types and implementation manners of the photosensitive pixels can also be set and adjusted according to actual application situations, and the present application does not make special limitations here. Please refer toFigure 3 , Figure 3 is a schematic structural diagram of a readout circuit for optical signals when a photosensitive pixel is connected to a high bias voltage; please refer to Figure 4 , Figure 4 is a schematic structural diagram of a readout circuit for optical signals when a photosensitive pixel is connected to a low bias voltage; VDD is the supply voltage, and Rpix represents the resistance of the photosensitive pixel; there are two possibilities in the application of the photosensitive pixel. One is that the photosensitive pixel needs to be connected to a high bias voltage for application (Vdd represents the high bias voltage in this embodiment), and the other is that the pixel needs to be connected to a low bias voltage for application (GND represents the low bias voltage in this embodiment).

[0069] It is not difficult to understand that the present invention can be applied to various devices such as image sensors that use resistance modulation type photosensitive pixels. Please refer to Figure 5 , Figure 5 is a schematic structural diagram of another readout circuit for optical signals provided by the present invention; a bias voltage is connected to the node of the electrode terminal in the photosensitive pixel, and the node of the signal readout terminal is connected to the logarithmic conversion module 1. The logarithmic conversion module 1 converts the photocurrent into a voltage signal, and the magnitude of this voltage signal has a logarithmic relationship with the magnitude of the photocurrent. Then, this voltage is buffered and signal-amplified by the source follower SF of the output buffer module 2, and then connected to the shared signal readout line in the pixel array through the strobe switch SEL, thereby realizing the readout and conversion of optical signals.

[0070] It can be understood that for resistance modulation type photosensitive devices, especially sensors using new materials represented by two-dimensional sheet materials (graphene or molybdenum disulfide) + quantum dots as photosensitive devices, the logarithmic conversion module 1 is used to process the photocurrent of the photosensitive pixel to generate a voltage signal with better linearity and dynamic range. The relationship between the resistance change of the photosensitive pixel caused by light and the light intensity is exponential. By using the logarithmic conversion module 1, the compression of the exponential signal is realized, and the relationship between the output voltage signal and the input light intensity signal returns to a linear relationship. Thus, problems such as poor linearity of the readout signal and limited dynamic range are solved.

[0071] The present invention provides a readout circuit for optical signals, which includes a logarithmic conversion module 1 and an output buffer module 2. When the photosensitive pixel receives an optical signal and generates a corresponding photocurrent, the logarithmic conversion module 1 will perform logarithmic conversion on the photocurrent flowing through the photosensitive pixel, and then the output buffer module 2 will buffer the converted voltage signal and use it as the final readout electrical signal. By using the logarithmic conversion module 1 to convert the photocurrent signal that originally has an exponential relationship with the light intensity, a voltage signal that has a logarithmic relationship with the photocurrent signal is obtained, realizing the compression of the exponential signal, so that the relationship between the voltage signal finally output by the readout circuit and the input light intensity signal returns to a linear relationship, effectively avoiding the limitation of the dynamic range of the voltage signal, and realizing the readout of optical signals by generating a voltage signal with better linearity and dynamic range, reducing the error caused by non-linearity, and improving the accuracy and reliability of the entire optical signal readout process.

[0072] Based on the above embodiments:

[0073] Please refer to Figure 6 , Figure 6 which is a schematic diagram of the setting method of an output buffer circuit provided by the present invention; please refer to Figure 7 , Figure 7 which is another schematic diagram of the setting method of an output buffer circuit provided by the present invention; As an optional embodiment, the output buffer module 2 includes:

[0074] A source follower SF, whose control end is connected to the output end of the logarithmic conversion module 1, and is used to amplify and output the voltage signal output by the logarithmic conversion module 1;

[0075] A first current biasing module Q31, whose output end is connected to one end of the source follower SF and serves as the output end of the output buffer module 2, and is used to provide a biasing current for the source follower SF.

[0076] It is not difficult to understand that the transformed voltage signal needs to be further buffered and amplified before being read out. The output buffer module 2 can be specifically implemented by a source follower SF. The voltage signal output by the logarithmic conversion module 1 acts on the gate of the source follower SF, causing the potential of the source of the source follower SF to change with the change of the voltage signal, thereby realizing the function of voltage following. At the same time, the input impedance of the source follower SF itself is relatively high, which can effectively buffer the voltage signal. Considering that the source follower SF needs to work in a specific state, generally the saturation region can realize the buffering and amplification of the input signal. Therefore, a first current biasing module Q31 needs to be set in the output buffer module 2 to provide a biasing current for the source follower SF to support its operation in the saturation region, ensuring that the source follower SF can effectively buffer and amplify the voltage signal. The specific types and implementation methods of the source follower SF and the first current biasing module Q31 are not particularly limited in this application.

[0077] As a specific embodiment, as Figure 6 shown, the source follower SF can be implemented by a PMOS transistor with its drain grounded, and the first current bias module Q31 can be implemented by a PMOS transistor with its source connected to the power supply and its gate connected to a preset fixed bias voltage Vbias_peri, generating a fixed bias current using the fixed bias voltage to supply the source follower SF; the specific value of the bias voltage connected to the first current bias module Q31 and the implementation method, etc. are not particularly limited in this application. As Figure 7 shown, the source follower SF can be implemented by an NMOS transistor with its drain connected to the power supply, and the first current bias module Q31 can be implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias_peri. The source of the source follower is connected to the analog-to-digital conversion circuit through a selection switch SEL, so as to further convert the voltage signal output by the readout voltage into a digital signal, facilitating subsequent processing by devices such as a processor. Figure 6 Shown is the implementation method when the logarithmic conversion module, the first current bias module, and the output buffer module use the same power supply and are grounded. In practical applications, the implementation methods of the power supplies and ground points used by the logarithmic conversion module, the first current bias module, and the output buffer module can be different, that is, the VDD connected to the fifth switching transistor Q15, the VDD connected to the fifth current bias module Q35, and the VDD connected to the first current bias module Q31 can be implemented using different power supplies, and the ground points of the photosensitive pixel, the fourth amplification switch transistor Q24, and the source follower SF can also be implemented in different ways.

[0078] Specifically, by using the source follower SF to implement the output buffer module 2, it can effectively buffer and amplify the converted voltage signal. At the same time, the first current bias module Q31 is set to ensure the accurate application of the source follower SF, improving the accuracy and stability of the finally output voltage signal and ensuring the accuracy and reliability of the entire readout circuit.

[0079] Please refer to Figure 8 , Figure 8 which is a schematic structural diagram of a readout circuit for optical signals using a pixel array provided by the present invention; as an optional embodiment, the image sensor includes a pixel array composed of a plurality of photosensitive pixels; the readout circuit further includes:

[0080] A selection switch SEL, with its control terminal connected to an output selection signal, its first terminal connected to one end of the source follower SF, and its second terminal connected to the output terminal of the first current bias module Q31, for conducting when the photosensitive pixel is selected for output and turning off when the photosensitive pixel is not selected for output.

[0081] It can be understood that generally multiple photosensitive pixels are arranged in an image sensor in an array manner, so as to achieve a detailed, comprehensive and complete image presentation through the pixel array. At this time, the readout circuit of the optical signal needs to read the signals of all the photosensitive pixels in the pixel array. Therefore, for the convenience of management and to achieve the accurate readout of each photosensitive pixel, several selection switches SEL that are connected in one-to-one correspondence with several photosensitive pixels in the pixel array are also arranged in the readout circuit. The selection switch SEL is connected in series between the source of the source follower SF and the output end of the readout circuit, and can control whether the voltage signal finally obtained by the readout circuit is output. When a certain selection switch SEL is turned on, the readout circuit outputs the voltage signal converted by the corresponding photosensitive pixel. When a certain selection switch SEL is turned off, the voltage signal converted by the corresponding photosensitive pixel will not be output to the subsequent circuit; thus, the accurate readout of the voltage signals corresponding to different photosensitive pixels is achieved. The specific type and implementation manner of the selection switch SEL are not particularly limited in this application. The specific type and implementation manner of the output selection signal for controlling its operation can be set and connected according to the actual application situation, and are not particularly limited in this application. As Figure 6 and Figure 7 shown, the selection switch SEL can be directly implemented by a PMOS transistor or an NMOS transistor connected in series with the source follower SF.

[0082] It can be understood that for different biasing methods of the photosensitive pixels, corresponding logarithmic conversion modules 1 and different output buffer modules 2 need to be set, and different source followers SF and other methods are used to cover each photosensitive pixel in the image sensor, so as to achieve the readout of the optical signals obtained by the entire image sensor, so as to realize functions such as image display.

[0083] As a specific embodiment, such as Figure 8As shown, the pixel array includes N×M (row×column) photosensitive pixels, and a corresponding pixel circuit including a logarithmic conversion module 1, a source follower SF, and a strobe switch SEL is provided for each photosensitive pixel. In this embodiment, the strobe switch SEL is taken as an example of a row selection switch. The controller generates N row selection signals RowSel as output selection signals. The N photosensitive pixels in each column share a first current bias module Q31 and an analog-to-digital conversion circuit. Only M first current bias modules Q31 and M analog-to-digital conversion circuits need to be provided for the entire pixel array. The controller controls the corresponding strobe switch SEL through the row selection signals RowSel1-RowSelN. Each time, taking rows as units, the strobe switches SEL corresponding to the photosensitive pixels in one row are turned on to simultaneously read out the data of one row, and a row parallel readout circuit is used to read and perform analog-to-digital conversion on the optical signal after Log transformation. The settings of the row selection signals and the strobe switch SEL are both for controlling the reading of pixels in different rows when using the pixel array. In the architecture of a row parallel analog-to-digital converter (ADC), each analog-to-digital conversion needs to select and read out pixels row by row. Depending on the number of row parallel ADCs, half a row, one row, or multiple rows can be read out each time.

[0084] Specifically, the accurate reading of the corresponding signals of each photosensitive pixel in the application scenario of the pixel array can be achieved by setting the strobe switch SEL. At the same time, the simultaneous reading of the corresponding signals of multiple photosensitive pixels can be achieved by means of row selection signals or column selection signals, etc., which improves the reading speed of the optical signal, effectively reduces the number of circuit connections, and simplifies the circuit structure; further considering the setting method of the reading circuit in the case of the pixel array, the flexibility of the reading circuit is improved, and the applicable range is expanded.

[0085] Please refer to Figure 9 , Figure 9 which is the structural schematic diagram of the logarithmic conversion module when the first photosensitive pixel is connected to the high bias voltage provided by the present invention; please refer to Figure 10 , Figure 10 which is the structural schematic diagram of the logarithmic conversion module when the second photosensitive pixel is connected to the high bias voltage provided by the present invention; As an optional embodiment, the first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0086] a first amplification unit of class A;

[0087] For any first amplification unit, the first amplification unit includes a first switching transistor Q11 and a first amplifying switching transistor Q21. The control end of the first amplifying switching transistor Q21 is connected to the first end of the first switching transistor Q11 and serves as the first input end of the first amplification unit. The first end of the first amplifying switching transistor Q21 serves as the second input end of the first amplification unit. The second end of the first switching transistor Q11 serves as the first output end of the first amplification unit. The control end of the first switching transistor Q11 is connected to the second end of the first amplifying switching transistor Q21 and serves as the second output end of the first amplification unit;

[0088] The first input end of the first-stage first amplification unit is connected to the second end of the photosensitive pixel. The second input end of the first-stage first amplification unit is connected to the second power supply. The first output end of the A-stage first amplification unit is grounded. The first output end of the i-th stage first amplification unit is connected to the first input end of the (i + 1)-th stage first amplification unit. The second output end of the i-th stage first amplification unit is connected to the second input end of the (i + 1)-th stage first amplification unit; A is a positive integer, and i is a positive integer less than A;

[0089] The second current bias module Q32, the output end of which is connected to the second output end of the A-stage first amplification unit and serves as the output end of the logarithmic conversion module 1.

[0090] It is not difficult to understand that when the photosensitive pixel is in a state of being connected to a high bias voltage, the logarithmic conversion module 1 can be implemented by using a first amplification unit of type A. For any stage of the first amplification unit, including a first conversion switch transistor Q11 and a first amplification switch transistor Q21, the first conversion switch transistor Q11 and the first amplification switch transistor Q21 cooperate to perform logarithmic conversion and signal amplification on the photocurrent corresponding to the second terminal voltage Vsens of the photosensitive pixel, and then convert it into a voltage signal Vsig_log for output. The first conversion switch transistor Q11 plays a role in logarithmic conversion, and the first amplification switch transistor Q21 plays a role in signal amplification. The specific types and implementation methods of the first conversion switch transistor Q11 and the first amplification switch transistor Q21 are not particularly limited in this application. They can be implemented by using switching devices such as MOS transistors and bipolar transistors, or other methods can also be used. Considering that the first conversion switch transistor Q11 and the first amplification switch transistor Q21 in the first amplification unit need to work in a specific operating state to achieve the corresponding logarithmic conversion and signal amplification functions, a second current bias module Q32 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the first conversion switch transistor Q11 and the first amplification switch transistor Q21. The specific type of the second current bias module Q32 and the specific value of the bias current it provides and other implementation methods are not particularly limited in this application. The specific types and implementation methods of the first power supply and the second power supply are not particularly limited in this application. They can be implemented by using the same power supply, or different power supplies can be selected according to actual application requirements.

[0091] As a specific embodiment, as Figure 9 shown, the logarithmic conversion module 1 includes a first amplification unit of one stage. The second current bias module Q32 is implemented by using an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias. As Figure 10 shown, the logarithmic conversion module 1 includes two stages of first amplification units. The second current bias module Q32 is implemented by using an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias.

[0092] Specifically, the logarithmic conversion module 1 composed of the first conversion switch transistor Q11, the first amplification switch transistor Q21, and the second current bias module Q32 can be specifically used to implement the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout circuit.

[0093] Please refer to Figure 11 , Figure 11 which is a schematic structural diagram of the logarithmic conversion module when the third photosensitive pixel is connected to a high bias voltage provided by the present invention; as an optional embodiment, the first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0094] The second amplification switch transistor Q22, with its first terminal connected to the second power supply.

[0095] The second conversion switch transistor Q12, with its first terminal connected to the control terminal of the second amplification switch transistor Q22 and the second terminal of the photosensitive pixel respectively.

[0096] The third conversion switch transistor Q13, with its first terminal connected to the second terminal of the second conversion switch transistor Q12 and the control terminal of the second conversion switch transistor Q12 respectively, and its second terminal grounded.

[0097] The third current bias module Q33, with its output terminal connected to the control terminal of the third conversion switch transistor Q13 and the second terminal of the second amplification switch transistor Q22 respectively, and serving as the output terminal of the logarithmic conversion module 1.

[0098] It can be understood that when the photosensitive pixel is in a state of being connected to a high bias voltage, the logarithmic conversion module 1 may specifically include the second amplification switch transistor Q22, the second conversion switch transistor Q12, the third conversion switch transistor Q13, and the third current bias module Q33. The second conversion switch transistor Q12 and the third conversion switch transistor Q13 play a role in logarithmic conversion, and the second amplification switch transistor Q22 plays a role in signal amplification. The specific types and implementation manners of the second amplification switch transistor Q22, the second conversion switch transistor Q12, and the third conversion switch transistor Q13 are not particularly limited in this application. They can be implemented using switching devices such as MOS transistors and bipolar transistors, or other methods. Considering that the second amplification switch transistor Q22, the second conversion switch transistor Q12, and the third conversion switch transistor Q13 all need to work in specific operating states to achieve the corresponding logarithmic conversion and signal amplification functions, a third current bias module Q33 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the second amplification switch transistor Q22, the second conversion switch transistor Q12, and the third conversion switch transistor Q13. The specific type of the third current bias module Q33 and the specific value of the bias current it provides and other implementation manners are not particularly limited in this application. As Figure 11 shown, the third current bias module Q33 can be implemented using an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias.

[0099] Specifically, the logarithmic conversion of the photocurrent flowing through the photosensitive pixel can be specifically achieved by using the logarithmic conversion module 1 composed of the second amplification switch transistor Q22, the second conversion switch transistor Q12, the third conversion switch transistor Q13, and the third current bias module Q33. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout circuit.

[0100] Please refer to Figure 12 , Figure 12Schematic diagram of the structure of the fourth photosensitive pixel connecting the high bias voltage to the logarithmic conversion module provided by the present invention; As an optional embodiment, the first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0101] The third amplification switch transistor Q23, the first end of which is connected to the second power supply;

[0102] The fourth conversion switch transistor Q14, the first end of which is respectively connected to the control end of the third amplification switch transistor Q23 and the second end of the photosensitive pixel, and the control end is connected to the first preset bias voltage;

[0103] The fourth current bias module Q34, the output end of which is respectively connected to the second end of the fourth conversion switch transistor Q14 and the second end of the third amplification switch transistor Q23, and serves as the output end of the logarithmic conversion module 1.

[0104] It is not difficult to understand that when the photosensitive pixel is in the state of connecting the high bias voltage, the logarithmic conversion module 1 may specifically include the third amplification switch transistor Q23, the fourth conversion switch transistor Q14 and the fourth current bias module Q34. The fourth conversion switch transistor Q14 plays the role of logarithmic conversion, and the third amplification switch transistor Q23 plays the role of signal amplification. The specific types and implementation methods of the third amplification switch transistor Q23 and the fourth conversion switch transistor Q14 are not particularly limited in this application. They can be implemented by switching devices such as MOS transistors and bipolar transistors, or other methods can be used. Considering that the third amplification switch transistor Q23 needs to work in a specific working state to achieve the corresponding signal amplification function, a fourth current bias module Q34 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the third amplification switch transistor Q23. At the same time, the control end of the fourth conversion switch transistor Q14 is connected to the first preset bias voltage to ensure its stable bias and guarantee its logarithmic conversion function. The specific type of the fourth current bias module Q34 and the specific value of the bias current provided by it and other implementation methods are not particularly limited in this application. The specific value of the first preset bias voltage and the implementation method are not particularly limited in this application, and can be set and adjusted according to the actual application situation of the fourth conversion switch. As Figure 12 shown, the fourth current bias module Q34 can be implemented by an NMOS transistor with the source grounded and the gate connected to the preset fixed bias voltage Vbias2.

[0105] Specifically, the logarithmic conversion module 1 composed of the third amplification switch transistor Q23, the fourth conversion switch transistor Q14 and the fourth current bias module Q34 can be specifically used to realize the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout circuit.

[0106] Please refer toFigure 13 , Figure 13 is a schematic structural diagram of the first logarithmic conversion module when the photosensitive pixel is connected to a low bias voltage provided by the present invention; please refer to Figure 14 , Figure 14 is a schematic structural diagram of the second logarithmic conversion module when the photosensitive pixel is connected to a low bias voltage provided by the present invention; as an optional embodiment, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0107] The second amplification unit of level B;

[0108] For any second amplification unit, the second amplification unit includes a fifth switching transistor Q15 and a fourth amplification switching transistor Q24. The control end of the fourth amplification switching transistor Q24 is connected to the first end of the fifth switching transistor Q15 and serves as the first input end of the second amplification unit. The first end of the fourth amplification switching transistor Q24 serves as the second input end of the second amplification unit. The second end of the fifth switching transistor Q15 serves as the first output end of the second amplification unit. The control end of the fifth switching transistor Q15 is connected to the second end of the fourth amplification switching transistor Q24 and serves as the second output end of the second amplification unit;

[0109] The first input end of the first-level second amplification unit is connected to the second end of the photosensitive pixel. The second input end of the first-level second amplification unit is grounded. The first output end of the B-level second amplification unit is connected to the second power supply. The first output end of the j-level second amplification unit is connected to the first input end of the j+1-level second amplification unit. The second output end of the j-level second amplification unit is connected to the second input end of the j+1-level second amplification unit; B is a positive integer, and j is a positive integer less than B;

[0110] The fifth current bias module Q35, the output end of which is connected to the second output end of the B-level second amplification unit and serves as the output end of the logarithmic conversion module 1.

[0111] It can be understood that when the photosensitive pixel is in a state of being connected to a low bias voltage, the bias voltage connected to the first end of the photosensitive pixel changes from a high bias voltage to a low bias voltage. The setting method of the logarithmic conversion module 1 can refer to the setting method when the photosensitive pixel is connected to a high bias voltage, and it only needs to be symmetric with the setting method when the photosensitive pixel is connected to a high bias voltage. Specifically, the logarithmic conversion module 1 can be implemented by a second amplification unit of level B. For any level of the second amplification unit, including a fifth conversion switch transistor Q15 and a fourth amplification switch transistor Q24, the fifth conversion switch transistor Q15 and the fourth amplification switch transistor Q24 cooperate to perform logarithmic conversion and signal amplification on the photocurrent corresponding to the voltage Vsens at the second end of the photosensitive pixel, and then convert it into a voltage signal Vsig_log for output. The fifth conversion switch transistor Q15 plays a role in logarithmic conversion, and the fourth amplification switch transistor Q24 plays a role in signal amplification. The specific types and implementation methods of the fifth conversion switch transistor Q15 and the fourth amplification switch transistor Q24 are not particularly limited in this application. They can be implemented by switching devices such as MOS transistors and bipolar transistors, or other methods can also be used. Considering that the fifth conversion switch transistor Q15 and the fourth amplification switch transistor Q24 in the second amplification unit need to work in a specific working state to achieve the corresponding logarithmic conversion and signal amplification functions, a fifth current bias module Q35 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the fifth conversion switch transistor Q15 and the fourth amplification switch transistor Q24. The specific type of the fifth current bias module Q35 and the specific value of the bias current it provides and other implementation methods are not particularly limited in this application.

[0112] As a specific embodiment, as Figure 13 shown, the logarithmic conversion module 1 includes a single-level second amplification unit, and the fifth current bias module Q35 is implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias. As Figure 14 shown, the logarithmic conversion module 1 includes two-level second amplification units, and the fifth current bias module Q35 is implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias.

[0113] Specifically, the logarithmic conversion module 1 composed of the fifth conversion switch transistor Q15, the fourth amplification switch transistor Q24, and the fifth current bias module Q35 can be specifically used to achieve the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout circuit.

[0114] Please refer to Figure 15 , Figure 15 which is the structural schematic diagram of the logarithmic conversion module when the third photosensitive pixel is connected to a low bias voltage provided by the present invention; As an optional embodiment, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0115] The fifth amplification switch transistor Q25 has its first terminal grounded.

[0116] The sixth switching transistor Q16 has its first terminal connected to the control terminal of the fifth amplification switch transistor Q25 and the second terminal of the photosensitive pixel respectively.

[0117] The seventh switching transistor Q17 has its first terminal connected to the second terminal and the control terminal of the sixth switching transistor Q16 respectively, and its second terminal is connected to the second power supply.

[0118] The sixth current biasing module Q36 has its output terminal connected to the control terminal of the seventh switching transistor Q17 and the second terminal of the fifth amplification switch transistor Q25 respectively, and serves as the output terminal of the logarithmic conversion module 1.

[0119] It is not difficult to understand that when the photosensitive pixel is in a state of being connected to a low bias voltage, the logarithmic conversion module 1 may specifically include the fifth amplification switch transistor Q25, the sixth switching transistor Q16, the seventh switching transistor Q17, and the sixth current biasing module Q36. The sixth switching transistor Q16 and the seventh switching transistor Q17 play a role in logarithmic conversion, and the fifth amplification switch transistor Q25 plays a role in signal amplification. Specific types and implementation manners of the fifth amplification switch transistor Q25, the sixth switching transistor Q16, and the seventh switching transistor Q17 are not particularly limited in this application. They can be implemented by switching devices such as MOS transistors and bipolar transistors, or can be implemented in other ways. Considering that the fifth amplification switch transistor Q25, the sixth switching transistor Q16, and the seventh switching transistor Q17 all need to work in specific working states to achieve the corresponding logarithmic conversion and signal amplification functions, a sixth current biasing module Q36 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the fifth amplification switch transistor Q25, the sixth switching transistor Q16, and the seventh switching transistor Q17. Specific types of the sixth current biasing module Q36 and specific values of the bias current provided by it and other implementation manners are not particularly limited in this application. As Figure 15 shown, the sixth current biasing module Q36 can be implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias.

[0120] Specifically, the logarithmic conversion of the photocurrent flowing through the photosensitive pixel can be specifically implemented by using the logarithmic conversion module 1 composed of the fifth amplification switch transistor Q25, the sixth switching transistor Q16, the seventh switching transistor Q17, and the sixth current biasing module Q36. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout circuit.

[0121] Please refer to Figure 16 , Figure 16FIG. 0 is a schematic structural diagram of a logarithmic conversion module when the fourth photosensitive pixel is connected to a low bias voltage. As an alternative embodiment, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0122] The sixth amplification switch transistor Q26, with the first end grounded;

[0123] The eighth conversion switch transistor Q18, with the first end connected to the second end of the photosensitive pixel and the control end of the sixth amplification switch transistor Q26 respectively, and the control end is connected to a second preset bias voltage;

[0124] The seventh current bias module Q37, with the output end connected to the second end of the eighth conversion switch transistor Q18 and the second end of the sixth amplification switch transistor Q26 respectively, and serves as the output end of the logarithmic conversion module 1.

[0125] It can be understood that when the photosensitive pixel is in the state of being connected to a low bias voltage, the logarithmic conversion module 1 specifically may include the sixth amplification switch transistor Q26, the eighth conversion switch transistor Q18, and the seventh current bias module Q37. The eighth conversion switch transistor Q18 plays a role in logarithmic conversion, and the sixth amplification switch transistor Q26 plays a role in signal amplification. The specific types and implementation manners of the sixth amplification switch transistor Q26 and the eighth conversion switch transistor Q18 are not particularly limited in this application. They can be implemented by switching devices such as MOS transistors and bipolar transistors, or other methods can also be used. Considering that the sixth amplification switch transistor Q26 needs to work in a specific working state to achieve the corresponding signal amplification function, a seventh current bias module Q37 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the sixth amplification switch transistor Q26. At the same time, the control end of the eighth conversion switch transistor Q18 is connected to a first preset bias voltage to ensure its stable bias and guarantee its logarithmic conversion function. The specific type of the seventh current bias module Q37 and the specific value of the bias current it provides and other implementation manners are not particularly limited in this application. The specific value of the first preset bias voltage and its implementation manner are not particularly limited in this application either, and can be set and adjusted according to the actual application situation of the fourth conversion switch. As Figure 16 shown, the seventh current bias module Q37 can be implemented by an NMOS transistor with the source grounded and the gate connected to a preset fixed bias voltage Vbias2.

[0126] Specifically, the logarithmic conversion module 1 composed of the sixth amplification switch transistor Q26, the eighth conversion switch transistor Q18, and the seventh current bias module Q37 can be specifically used to achieve the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout circuit.

[0127] To solve the above technical problems, the present invention further provides an image sensor, which includes photosensitive pixels and a readout circuit for optical signals as described above. The input end of the readout circuit for optical signals is connected to the photosensitive pixels and is used to convert the optical signals captured by the photosensitive pixels into electrical signals.

[0128] It is not difficult to understand that in the image sensor, a single photosensitive pixel or multiple photosensitive pixels can be set according to the actual application situation, or a pixel array composed of multiple photosensitive pixels can be directly used. Multiple photosensitive pixels can directly use the same readout circuit for optical signals to read out the optical signals. It only needs to set corresponding strobe switches in the readout circuit to control the accurate readout of the optical signals corresponding to each photosensitive pixel, thereby greatly simplifying the circuit structure in the image sensor and reducing the cost and volume. When the number of photosensitive pixels is relatively small, readout circuits corresponding to each photosensitive pixel can also be set to separately read out the optical signals corresponding to each photosensitive pixel. The specific setting methods of the photosensitive pixels and the corresponding readout circuits in the image sensor are not particularly limited in this application and can be set and adjusted according to the actual application situation.

[0129] For the introduction of an image sensor provided by the present invention, please refer to the embodiments of the readout circuit for optical signals above, and the present invention will not be elaborated here.

[0130] In this specification, each embodiment is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other. It should also be noted that in this specification, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of another identical element in the process, method, article or device including the said element.

[0131] The foregoing description of the disclosed embodiments enables those skilled in the art to practice or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A readout circuit for an optical signal, characterized in that: include: A logarithmic conversion module, the input end of which is connected to a photosensitive pixel, and is used to perform logarithmic conversion on a photocurrent flowing through the photosensitive pixel to generate a voltage signal that is logarithmically related to the photocurrent; wherein the photosensitive pixel is a photosensitive pixel of a two-dimensional sheet material, and the resistance value of the photosensitive pixel is exponentially related to the radiation illumination of the light; and the voltage signal is linearly related to the radiation illumination of the light; An output buffer module, whose input end is connected to the output end of the logarithmic conversion module, and is used to buffer the voltage signal and then output it; The output buffer module comprises: A source follower, whose control end is connected to the output end of the logarithmic conversion module, and is used to amplify and output the voltage signal output by the logarithmic conversion module; A first current bias module, whose output end is connected to one end of the source follower and serves as the output end of the output buffer module, and is used to provide a bias current for the source follower; The image sensor includes a pixel array composed of a plurality of photosensitive pixels; the readout circuit also includes: A selection switch, the control end of which is connected to an output selection signal, the first end of which is connected to one end of the source follower, and the second end of which is connected to the output end of the first current bias module, is used to turn on when the photosensitive pixel is selected for output, and to turn off when the photosensitive pixel is not selected for output.

2. The optical signal readout circuit according to claim 1, characterized in that: The first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: A-level first amplification unit; For any first amplifying unit, the first amplifying unit includes a first conversion switch tube and a first amplifying switch tube, the control end of the first amplifying switch tube is connected to the first end of the first conversion switch tube and serves as the first input end of the first amplifying unit, the first end of the first amplifying switch tube serves as the second input end of the first amplifying unit, the second end of the first conversion switch tube serves as the first output end of the first amplifying unit, and the control end of the first conversion switch tube is connected to the second end of the first amplifying switch tube and serves as the second output end of the first amplifying unit; The first input end of the first amplifier unit of the first stage is connected to the second end of the photosensitive pixel, the second input end of the first amplifier unit of the first stage is connected to the second power supply, the first output end of the A-th first amplifier unit is grounded, the first output end of the i-th first amplifier unit is connected to the first input end of the i+1-th first amplifier unit, and the second output end of the i-th first amplifier unit is connected to the second input end of the i+1-th first amplifier unit; A is a positive integer, and i is a positive integer less than A; The second current bias module has an output end connected to the second output end of the A-th level first amplification unit and serves as the output end of the logarithmic conversion module.

3. The optical signal readout circuit according to claim 1, characterized in that: The first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: A second amplifying switch tube, a first end of which is connected to a second power supply; A second conversion switch tube, a first end of which is respectively connected to the control end of the second amplifying switch tube and the second end of the photosensitive pixel; A third conversion switch tube, a first end of which is respectively connected to the second end of the second conversion switch tube and the control end of the second conversion switch tube, and a second end of which is grounded; The third current bias module has an output end respectively connected to the control end of the third conversion switch tube and the second end of the second amplification switch tube, and serves as the output end of the logarithmic conversion module.

4. The optical signal readout circuit according to claim 1, characterized in that: The first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: A third amplifying switch tube, a first end of which is connected to the second power supply; A fourth conversion switch tube, a first end of which is respectively connected to the control end of the third amplifying switch tube and the second end of the photosensitive pixel, and a control end is connected to a first preset bias voltage; The fourth current bias module has an output end connected to the second end of the fourth conversion switch tube and the second end of the third amplification switch tube respectively, and serves as the output end of the logarithmic conversion module.

5. The optical signal readout circuit according to claim 1, characterized in that: The first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: Class B second amplifier unit; For any second amplifying unit, the second amplifying unit includes a fifth conversion switch tube and a fourth amplifying switch tube, the control end of the fourth amplifying switch tube is connected to the first end of the fifth conversion switch tube and serves as the first input end of the second amplifying unit, the first end of the fourth amplifying switch tube serves as the second input end of the second amplifying unit, the second end of the fifth conversion switch tube serves as the first output end of the second amplifying unit, and the control end of the fifth conversion switch tube is connected to the second end of the fourth amplifying switch tube and serves as the second output end of the second amplifying unit; The first input end of the second amplifying unit of the first stage is connected to the second end of the photosensitive pixel, the second input end of the second amplifying unit of the first stage is grounded, the first output end of the second amplifying unit of the Bth stage is connected to the second power supply, the first output end of the second amplifying unit of the jth stage is connected to the first input end of the second amplifying unit of the j+1th stage, and the second output end of the second amplifying unit of the jth stage is connected to the second input end of the second amplifying unit of the j+1th stage; B is a positive integer, and j is a positive integer less than B; The fifth current bias module has an output end connected to the second output end of the second amplifying unit of the Bth stage and serves as the output end of the logarithmic conversion module.

6. The optical signal readout circuit according to claim 1, characterized in that: The first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: A fifth amplifying switch tube, a first end of which is grounded; a sixth conversion switch tube, a first end of which is respectively connected to the control end of the fifth amplifying switch tube and the second end of the photosensitive pixel; a seventh conversion switch tube, wherein a first end is respectively connected to the second end of the sixth conversion switch tube and the control end of the sixth conversion switch tube, and a second end is connected to a second power supply; The sixth current bias module has an output end respectively connected to the control end of the seventh conversion switch tube and the second end of the fifth amplification switch tube, and serves as the output end of the logarithmic conversion module.

7. The optical signal readout circuit according to claim 1, characterized in that: The first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: A sixth amplifying switch tube, a first end of which is grounded; An eighth conversion switch tube, wherein a first end is respectively connected to the second end of the photosensitive pixel and the control end of the sixth amplifying switch tube, and the control end is connected to a second preset bias voltage; The seventh current bias module has an output end connected to the second end of the eighth conversion switch tube and the second end of the sixth amplification switch tube respectively, and serves as the output end of the logarithmic conversion module.

8. An image sensor, characterized in that: It comprises a photosensitive pixel and a light signal readout circuit as claimed in any one of claims 1 to 7, wherein the input end of the light signal readout circuit is connected to the photosensitive pixel and is used to convert the light signal captured by the photosensitive pixel into an electrical signal.

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