Micro-display chip and preparation method thereof

Abstract

The invention provides a micro-display chip and a preparation method thereof. The micro-display chip comprises a driving substrate and a plurality of light-emitting units which are arranged on the driving substrate and can be independently driven by the driving substrate. Each light-emitting unit comprises a bonding layer and an epitaxial layer; the bonding layer comprises a first electrode layer, a reflective layer and a transparent electrode layer which are sequentially arranged, the reflective layer is wrapped by the first electrode layer and the transparent electrode layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer. According to the micro-display chip provided by the invention, the reflective layer is embedded in the bonding layer, so that an overflow phenomenon of a high-reflective material is prevented; the reflective layer is coated by the first electrode layer and the transparent electrode layer, so that the oxidation resistance of the reflective layer is improved; the adhesion between the reflective layer and the first electrode layer and the transparent electrode layer is stronger, so that the product yield is improved; by arranging the transparent electrode layer with high transmittance, the light reflecting brightness of the light reflecting layer is ensured, and the light emitting brightness is improved.

Description

Technical Field

[0001] The present application relates to the technical field of display chips, and in particular to a micro display chip and a method for preparing the same. Background Art

[0002] Micro-LED, also known as micro light-emitting diode, is an array of micron-level LED light-emitting units integrated on an active addressing drive substrate to achieve individual control and lighting, thereby outputting display images. Full-color micro-display has a wide range of applications, especially near-eye display (including AR, VR, etc.).

[0003] With the rapid development of information technology in modern society, the brightness requirements for display devices are constantly increasing, and the display brightness requirements for micro-display chips or related devices based on micro-display Micro-LED are also getting higher and higher. In order to improve the display brightness of micro-display chips, the existing technology usually uses silver mirror reflection.

[0004] Chinese patent document CN115498088A discloses a micro light emitting diode and a preparation method. The structure of the patent document includes a bonding layer, a second barrier layer, a reflective layer, a first barrier layer, a conductive layer and an LED unit from bottom to top. During the preparation process, a first opening is set at the position corresponding to the contact of the LED unit, and the process of setting the first opening is to etch the LED unit, the conductive layer, the first barrier layer and the reflective layer in sequence. And because the dry etching machines required for the first barrier layer and the reflective layer are different, different etching methods are used for the first barrier layer and the reflective layer. During the etching process of Chinese patent document CN115498088A, the reflective layer is in a non-sealed state (that is, the side wall of the reflective layer is partially exposed), and the reflective layer material is prone to overflow. Once the reflective layer material overflows, an irreversible defect occurs, resulting in a low product yield of the micro display chip. And it is necessary to change the etching method during the etching process, and the preparation process is more complicated and the preparation difficulty is higher.

[0005] Chinese patent document CN114824047A discloses a micro light-emitting diode display chip and a preparation method. The structure of the patent document is that the reflective unit array is arranged between the LED pixel point and the bonding layer, the reflective unit is set corresponding to the LED pixel point, and the bonding layer covers the reflective unit. In the preparation process of Chinese patent document CN114824047A, although the reflective unit material does not overflow, its reflective unit is directly bonded under the LED pixel point, and the adhesion between the reflective unit material and the epitaxial layer material is poor. In addition, the direct connection between the reflective unit and the LED pixel point will affect the anti-oxidation stability of the reflective unit, thereby reducing the life of the micro display chip.

[0006] How to improve the yield and lifespan of Micro-LED while enhancing the brightness of Micro-LED has become an important issue that needs to be solved urgently. Summary of the invention

[0007] To solve the above problems, the embodiments of the present application provide a micro display chip and a preparation method thereof, wherein a reflective layer is "embedded" in a bonding layer to prevent overflow of highly reflective materials; the reflective layer is coated by a first electrode layer and a transparent electrode layer to improve the oxidation resistance of the reflective layer; the reflective layer has stronger adhesion to the first electrode layer and the transparent electrode layer, thereby improving the product yield; and by providing a transparent electrode layer with higher transmittance, the reflective brightness of the reflective layer is ensured, thereby improving the luminous brightness.

[0008] The present application embodiment adopts the following technical solutions: In a first aspect, a micro display chip is provided, the micro display chip comprising: a driving substrate, and a plurality of light emitting units arranged on the driving substrate and capable of being driven individually by the driving substrate; Each light-emitting unit includes: a bonding layer and an epitaxial layer; The bonding layer includes a first electrode layer, a reflective layer and a transparent electrode layer which are arranged in sequence. The first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

[0009] In some embodiments, the reflective layer is disposed on a portion of the surface of the first electrode layer, and the transparent electrode layer covers the reflective layer and is disposed on the other surface of the first electrode layer.

[0010] In some embodiments, the first electrode layer uses a conductive thin film material, and the conductive thin film material includes at least one of Cr, Ti, Pt, Au, Al, Cu, Ge, Ni, Sn, Ag, Pb, or indium tin oxide.

[0011] In some embodiments, the reflective layer is made of highly reflective material, and the highly reflective material includes at least one of Ag, Cu, Al, Pd, Ni, and Rh.

[0012] In some embodiments, the thickness of the light reflecting layer is greater than 10 nm.

[0013] In some embodiments, the transparent electrode layer is made of a conductive high-light-transmittance thin film material, and the conductive high-light-transmittance thin film material includes: at least one of an indium tin compound, conductive SiO2, conductive PI, molybdenum, and silver.

[0014] In some embodiments, the epitaxial layer includes: a first semiconductor layer, a light-emitting layer, and a second semiconductor layer arranged in sequence, and the first semiconductor layer is connected to the transparent electrode layer.

[0015] In some embodiments, the first electrode layers of adjacent light-emitting units are connected as a whole, the transparent electrode layers of adjacent light-emitting units are connected as a whole, and the plurality of first electrode contacts of the driving substrate are respectively located between adjacent epitaxial layers; The integrally connected first electrode layer and the integrally connected transparent electrode layer have a first opening at a location corresponding to each first electrode contact.

[0016] In some embodiments, the microdisplay chip further comprises: a passivation layer; Wherein, the passivation layer comprises: A first passivation layer is located on the top surface of each epitaxial layer, and the first passivation layer has a second opening corresponding to the top surface of each epitaxial layer; A second passivation layer located on each side surface of the epitaxial layer, the top surface of the transparent electrode layer, and each side surface of the first opening; The first passivation layer is integrally connected to the second passivation layer, and the passivation layer exposes a plurality of first electrode contacts.

[0017] In some embodiments, each light emitting unit further includes: a second electrode layer; Wherein, the second electrode layer is located on the passivation layer; The second electrode layer connects the epitaxial layer and the corresponding first electrode contact through the second opening.

[0018] In a second aspect, a method for preparing a micro display chip is provided, the method comprising: forming a plurality of light emitting units on the driving substrate, each of which can be driven individually by the driving substrate; Wherein, each light-emitting unit includes: a bonding layer and an epitaxial layer; The bonding layer comprises a first electrode layer, a reflective layer and a transparent electrode layer which are arranged in sequence. The first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

[0019] In some embodiments, the preparation method comprises the following steps: coating a transparent electrode material on the epitaxial material; Plating a first electrode material on the driving substrate, and forming a plurality of light reflecting layers on the first electrode material, wherein each light reflecting layer is located between adjacent first electrode contacts of the driving substrate; Bonding the transparent electrode material to the first electrode material facing each other; A plurality of epitaxial layers are formed, and a first opening is opened at a position of the transparent electrode material and the first electrode material corresponding to each first electrode contact, wherein each epitaxial layer is directly opposite to each light reflecting layer.

[0020] In some embodiments, forming a transparent electrode material on an epitaxial material includes: providing a substrate; Plating epitaxial material on the substrate by vacuum evaporation coating; Transparent electrode material is coated on the epitaxial material by vacuum evaporation coating, and high temperature annealing is performed.

[0021] In some embodiments, a first electrode material is plated on the driving substrate, and a plurality of reflective layers are formed on the first electrode material, including: Plating a first electrode material on the driving substrate by vacuum sputtering or vacuum ion plating; coating a reflective material on the first electrode material by vacuum evaporation coating; According to the pattern designed by the first patterned mask, the reflective material is etched to form a plurality of reflective layers.

[0022] In some embodiments, bonding the transparent electrode material to the first electrode material in a facing relationship includes: Bonding the transparent electrode material and the first electrode layer material by means of high pressure and high temperature; Remove the substrate.

[0023] In some embodiments, forming a plurality of epitaxial layers, and opening a first opening in the transparent electrode material and the first electrode material corresponding to each first electrode contact, comprises: The epitaxial material is etched into a step structure, wherein the step structure enables the epitaxial material to form a plurality of epitaxial layers; According to the mesa pattern designed by the second patterned mask, the transparent electrode material and the first electrode material are etched to form a first opening corresponding to each first electrode contact.

[0024] In some embodiments, the preparation method further comprises: Depositing passivation materials; Etching the passivation material corresponding to the top surface of each epitaxial layer to form a second opening; The passivation material is etched corresponding to each first electrode contact to expose each first electrode contact.

[0025] In some embodiments, the preparation method further comprises: Evaporating a second electrode material; The second electrode material is etched to form a plurality of second electrode layers, and each second electrode layer connects the epitaxial layer and the corresponding first electrode contact through the second opening.

[0026] At least one of the above technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects: The chip provided in the present application includes: a driving substrate, and a plurality of light-emitting units arranged on the driving substrate and capable of being driven individually by the driving substrate; each light-emitting unit includes: a bonding layer and an epitaxial layer; wherein the bonding layer includes a first electrode layer, a reflective layer and a transparent electrode layer arranged in sequence, the first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

[0027] The micro-display chip proposed in this application uses the first electrode layer and the transparent electrode layer to seal the reflective layer, that is, the reflective layer is "embedded" in the bonding layer. In the subsequent process, the highly reflective material will not overflow and will not produce irreparable defects, thereby improving the yield of Micro-LED.

[0028] The micro display chip proposed in the present application has better adhesion between the reflective layer and the first electrode layer, and between the reflective layer and the transparent electrode layer. The reflective layer is coated by the first electrode layer and the transparent electrode layer, which improves the anti-oxidation stability of the reflective layer and ensures the quality and life of the micro display chip.

[0029] The micro display chip proposed in the present application uses a conductive high-transmittance thin film material for the transparent electrode layer, and performs a high-temperature annealing treatment to further improve the transmittance, thereby ensuring the reflective brightness of the reflective layer and further improving the luminous brightness. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 A schematic structural diagram of a micro display chip according to an embodiment of the present application is shown; Figure 2 A schematic flow chart showing a method for preparing a micro display chip according to an embodiment of the present application; Figure 3 A schematic diagram of a structure after epitaxial material is plated on a substrate according to an embodiment of the present application is shown; Figure 4 A schematic diagram showing a structure after a transparent electrode material is plated on an epitaxial material according to an embodiment of the present application; Figure 5 A schematic diagram showing a structure after a first electrode material is plated on a driving substrate according to an embodiment of the present application; Figure 6 A schematic diagram showing a structure after a reflective material is plated on a first electrode material according to an embodiment of the present application; Figure 7 A schematic diagram showing the structure after etching the reflective material according to an embodiment of the present application; Figure 8 A schematic diagram showing bonding according to an embodiment of the present application; Fig. 9 A schematic diagram of a structure after bonding according to an embodiment of the present application is shown; Fig.10 A schematic diagram showing a structure after etching an epitaxial material according to an embodiment of the present application; Fig.11 A schematic diagram showing a structure after etching a bonding structure according to an embodiment of the present application is shown; Fig.12 A schematic diagram of a structure after forming a passivation layer according to an embodiment of the present application is shown; Fig.13 A schematic diagram of the structure after forming the second electrode layer according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0031] The exemplary embodiments of the present application will be described in more detail below. However, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present application and to enable the scope of the present application to be fully communicated to those skilled in the art.

[0032] The disclosure of the present invention provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described in the present invention. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplicity and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0033] Generally, the terms may be understood at least in part based on the usage of the above invention. For example, the term "one or more" used in the present invention depends at least in part on the above invention, and may be used to describe any component, structure or feature in a singular form, or may be used to describe a combination of components, structures or features in a plural form. Similarly, terms such as "one", "an" or "the" may also be understood at least in part based on the above invention as conveying singular usage or conveying plural usage. In addition, the term "based on..." may be understood as not necessarily intended to convey a set of exclusive factors, but may alternatively, at least in part depending on the context, allow for the presence of additional factors that do not necessarily have to be explicitly described.

[0034] It should be noted that, in the description of the present application, the meanings of the terms "on", "over", "above", "over", etc. should be interpreted in the broadest way, meaning that the description containing these terms is interpreted as "the component can be set on another component in direct contact, or there can be intermediate components or layers between the components."

[0035] For ease of description, the present application may also use spatially relative terms such as "under", "beneath", "below", "under", "upper", "lower", etc. to describe the relationship of one component to another component shown in the drawings. In addition to the orientations described in the drawings, the spatially relative terms are also intended to cover different orientations of the device in use or operation. The device can be oriented in other ways, and the spatially relative descriptions used in the present application can be interpreted accordingly.

[0036] In the present application, the term "layer" used refers to a material portion including an area with a certain thickness. The layer can extend over the entire lower or upper structure, or can extend in a local range of the lower or upper structure. In addition, a layer can be a region of a homogeneous or inhomogeneous continuous structure, whose thickness is less than the thickness of the continuous structure. For example, a layer can be located between the top surface bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically and / or along a tapered surface. The substrate can be a layer, one or more layers can be included therein, and / or one or more layers can be present on, above and / or below it. A layer can include multiple layers. For example, a semiconductor layer can include one or more doped or undoped semiconductor layers, and can have the same or different materials.

[0037] Figure 1 FIG. 1 is a schematic diagram showing the structure of a micro display chip proposed in one embodiment of the present application. Figure 1 The transverse direction may correspond to the cross-sectional extension direction of the microdisplay chip, and the longitudinal direction may correspond to the ideal light beam propagation direction of the microdisplay chip.

[0038] Reference Figure 1 The micro display chip may include: a driving substrate 11, and a plurality of light-emitting units 12 arranged on the driving substrate 11 and capable of being driven individually by the driving substrate 11. Each light-emitting unit 12 includes: a bonding layer 121 and an epitaxial layer 122; wherein the bonding layer 121 includes a first electrode layer 1211, a reflective layer 1212 and a transparent electrode layer 1213 arranged in sequence, the first electrode layer 1211 and the transparent electrode layer 1213 cover the reflective layer 1212, and the epitaxial layer 122 is arranged on the surface of the transparent electrode layer 1213.

[0039] The plurality of light emitting units 12 may be arranged on the driving substrate 11 in a regular or irregular manner as pixels of a micro display chip. The driving substrate 11 may refer to a control panel of the plurality of light emitting units 12. The driving substrate 11 generates a driving signal based on an image to be displayed and applies the driving signal to the plurality of light emitting units 12 so that each light emitting unit 12 independently releases a light beam in response to the driving signal.

[0040] In some embodiments, the driving substrate 11 includes: a silicon-based CMOS backplane or a thin film field effect transistor.

[0041] The driving substrate 11 may include a substrate, a driving circuit, and a plurality of first electrode contacts 112 connected to the driving circuit. The driving substrate 11 may be provided with a circuit layer including a silicon-based CMOS (Complementary Metal Oxide Semiconductor) backplane, a TFT glass substrate, or a thin film field effect transistor to form a driving circuit. The material of the substrate may include semiconductor materials such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, cobalt phosphide, etc.; it may also include non-conductive materials such as glass, plastic, sapphire wafer, etc. The driving substrate 11 may be bonded to the corresponding light-emitting unit 12 through each first electrode contact 112.

[0042] Each light emitting unit 12 includes a bonding layer 121 and an epitaxial layer 122 sequentially stacked on the driving substrate 11. The bonding layer 121 includes a first electrode layer 1211, a reflective layer 1212 and a transparent electrode layer 1213 sequentially stacked on the driving substrate 11.

[0043] In some embodiments, the first electrode layer 1211 may be a conductive film material, which may include a metal conductive film such as Cr, Ti, Pt, Au, Al, Cu, Ge, Ni, Sn, Ag or Pb, or a non-metallic conductive film such as indium tin oxide.

[0044] In some embodiments, the transparent electrode layer 1213 may be a conductive high-light-transmittance thin film material, and the conductive high-light-transmittance thin film material may include: indium tin compound, conductive SiO2, conductive PI, molybdenum, silver, etc.

[0045] In some embodiments, the reflective layer 1212 may be made of a highly reflective material, and the highly reflective material may include Ag, Cu, Al, Pd, Ni, or Rh.

[0046] During the preparation of the micro display chip, if the etching operation causes the reflective layer 1212 to splash onto the sidewalls of the first electrode layer 1211 and / or the transparent electrode layer 1213 and / or the epitaxial layer 122, the micro display chip will have irreparable defects, which will not only affect the light-emitting effect but also reduce the yield of the micro display chip. Therefore, in order to ensure that the reflective layer 1212 does not overflow, the size of the reflective layer 1212 is limited as follows.

[0047] The size of the reflective layer 1212 is smaller than the size of the first electrode layer 1211 and the transparent electrode layer 1213. That is, the size of the first electrode layer 1211 and the transparent electrode layer 1213 is the same. As the size of the light-emitting point mesa, the size of the reflective layer 1212 needs to be smaller than the size of the light-emitting point mesa. For example, the size of the light-emitting point mesa can be 2 μm in diameter, and the diameter of the reflective layer 1212 is less than 2 μm. The reflective layer 1212 can be located at the center of the first electrode layer 1211, and the upper surface and side surface of the reflective layer 1212 are covered by the transparent electrode layer 1213, and the lower surface of the transparent electrode layer 1213 that is not covered with the reflective layer 1212 is bonded to the upper surface of the first electrode layer 1211 that is not provided with the reflective layer 1212.

[0048] In some embodiments, the thickness of the reflective layer 1212 is greater than 10 nm to ensure a good light emitting effect.

[0049] In some embodiments, the epitaxial layer 122 includes: a first semiconductor layer, a light emitting layer, and a second semiconductor layer; wherein the first semiconductor layer is connected to the transparent electrode layer 1213 .

[0050] Each epitaxial layer 122 includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer stacked sequentially on a transparent electrode layer 1213. The first semiconductor layer and the transparent electrode layer 1213 can be disposed continuously to improve the adhesion between the epitaxial layer 122 and the bonding layer 121 and prevent the epitaxial layer 122 from peeling off.

[0051] The side wall of the epitaxial layer 122 may be inclined relative to the light emitting surface, and the angle between the side wall of the epitaxial layer 122 and the top surface may be an obtuse angle. That is, each light emitting unit 12 is a trapezoidal structure and forms an array of trapezoidal light emitting units 12. Since the trapezoidal side wall can reflect light, the trapezoidal side wall helps to improve the light emitting efficiency of the light emitting unit 12.

[0052] The first semiconductor layer and / or the second semiconductor layer may be a doped semiconductor layer. In this case, the first semiconductor layer and / or the second semiconductor layer may include one or more layers based on II-VI materials (such as ZnSe or ZnO) or III-V materials (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and alloys thereof).

[0053] The light emitting layer recombine holes provided from the first semiconductor layer and electrons provided from the second semiconductor layer and output light of a specific wavelength. The light emitting layer may have a single quantum well structure, or a multi-quantum well structure in which well layers and barrier layers are alternately stacked.

[0054] In some embodiments, the epitaxial layer 122 may be made of a blue light emitting material.

[0055] In some embodiments, the first electrode layers 1211 of adjacent light-emitting units 12 are integrally connected, the transparent electrode layers 1213 of adjacent light-emitting units 12 are integrally connected, and the multiple first electrode contacts 112 of the driving substrate 11 are respectively located between adjacent epitaxial layers 122; the integrally connected first electrode layer 1211 and the integrally connected transparent electrode layer 1213 have a first opening corresponding to each first electrode contact 112.

[0056] Although each light-emitting unit 12 includes a first electrode layer 1211, the first electrode layer 1211 of each light-emitting unit 12 may be integrally connected, and only have a first opening at a position corresponding to the first electrode contact 112. Although each light-emitting unit 12 includes a transparent electrode layer 1213, the transparent electrode layer 1213 of each light-emitting unit 12 may be integrally connected, and only have a first opening at a position corresponding to the first electrode contact 112. That is, each light-emitting unit 12 shares the first electrode layer 1211 and the transparent electrode layer 1213 that are integrally connected.

[0057] In some embodiments, the micro display chip further includes: a passivation layer 123; wherein the passivation layer 123 includes: a first passivation layer located on the top surface of each epitaxial layer 122, the first passivation layer having a second opening corresponding to the top surface of each epitaxial layer 122; a second passivation layer located on the side surface of each epitaxial layer 122, the top surface of the transparent electrode layer 1213 and the side surface of each first opening; the first passivation layer and the second passivation layer are integrally connected, and the passivation layer 123 exposes a plurality of first electrode contacts 112.

[0058] A second opening is opened on the top surface of the epitaxial layer 122, so that the second semiconductor layer of the epitaxial layer 122 is exposed through the second opening. A passivation layer 123 is deposited on the side surface of each first opening to expose the first electrode contact 112. The passivation layer 123 can be used to protect and isolate the light emitting point.

[0059] The passivation layer 123 and the epitaxial layer 122 may have different refractive indices. By adjusting the inclination angle of the passivation layer 123, the light formed by the epitaxial layer 122 is totally reflected into the inside of the epitaxial layer 122, so that the light is emitted only from the second opening. The material of the passivation layer 123 includes inorganic materials or organic materials, and the inorganic materials include at least one of SiO2, Al2O3, ZrO2, TiO2, SiN, and HfO2; the organic materials include at least one of black matrix photoresist, color filter photoresist, polyimide, barrier glue (BANK), Overcoat glue, near-ultraviolet negative photoresist, and styrene.

[0060] In some embodiments, each light-emitting unit 12 further includes: a second electrode layer 124 ; wherein the second electrode layer 124 is located on the passivation layer 123 ; and the second electrode layer 124 connects the epitaxial layer 122 and the corresponding first electrode contact 112 through the second opening.

[0061] The second electrode layer 124 may be located outside the passivation layer 123. One end of the second electrode layer 124 may be electrically connected to the second semiconductor layer of the epitaxial layer 122 through the second opening, and the other end of the second electrode layer 124 may be electrically connected to the corresponding first electrode contact 112. At this time, the light emitting unit 12 is driven alone through the corresponding first electrode contact 112.

[0062] The second electrode layer 124 may be made of a transparent conductive film.

[0063] The present application also proposes a method for preparing a micro display chip, the method comprising: forming a plurality of light emitting units on the driving substrate, each of which can be driven individually by the driving substrate; Wherein, each light-emitting unit includes: a bonding layer and an epitaxial layer; The bonding layer comprises a first electrode layer, a reflective layer and a transparent electrode layer which are arranged in sequence. The first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

[0064] Figure 2 The schematic diagram of the process of preparing a micro display chip according to an embodiment of the present application is shown. Figure 2 , the present application proposes a method for preparing a micro display chip. The preparation method comprises the following steps: S1, coating a transparent electrode material 1213 - 1 on the epitaxial material 122 - 1; S2, coating a first electrode material 1211 - 1 on the driving substrate 11, and forming a plurality of light reflecting layers 1212 on the first electrode material 1211 - 1, wherein each light reflecting layer 1212 is located between adjacent first electrode contacts 112 of the driving substrate 11; S3, bonding the transparent electrode material 1213-1 and the first electrode material 1211-1 in a facing relationship; S4, forming a plurality of epitaxial layers 122, and opening a first opening in the transparent electrode material 1213-1 and the first electrode material 1211-1 corresponding to each first electrode contact 112, wherein each epitaxial layer 122 is opposite to each light reflecting layer 1212 respectively.

[0065] In some embodiments, the preparation method further comprises: S5, depositing passivation material; S6 , etching the passivation material corresponding to the top surface of each epitaxial layer 122 to form a second opening, and etching the passivation material corresponding to each first electrode contact 112 to expose the first electrode contact 112 .

[0066] In some embodiments, the preparation method further comprises: S7, evaporating a second electrode material; S8, etching the second electrode material to form a plurality of second electrode layers 124, each second electrode layer 124 connects the epitaxial layer 122 and the corresponding first electrode contact 112 through the second opening.

[0067] Figures 3 to 13 Schematic diagram showing different stages in the microdisplay chip fabrication process.

[0068] See also Figure 3 to Figure 4 , a transparent electrode material 1213 - 1 is plated on the epitaxial material 122 - 1 .

[0069] In some embodiments, a substrate 13 is provided; an epitaxial material 122-1 is plated on the substrate 13 by vacuum evaporation coating, such as Figure 3 As shown; a transparent electrode material 1213-1 is plated on the epitaxial material 122-1 by vacuum evaporation coating, and high temperature annealing is performed, such as Figure 4 shown.

[0070] The substrate 13 may be a semiconductor material, such as silicon, gallium nitride, etc., or the substrate 13 may be a non-conductive material, such as sapphire or glass, etc. The epitaxial material 122-1 may be a blue light emitting material.

[0071] Transparent electrode material 1213-1 is evaporated on the surface of epitaxial material 122-1, and then high temperature annealing is performed to further improve the light transmittance of transparent electrode material 1213-1, thereby ensuring the brightness of reflective layer 1212. Transparent electrode material 1213-1 may include indium tin compound, conductive SiO2, conductive PI, molybdenum, silver and other materials.

[0072] See also Figures 5 to 7, a first electrode material 1211 - 1 is plated on the driving substrate 11 , and a plurality of light reflecting layers 1212 are formed on the first electrode material 1211 - 1 .

[0073] In some embodiments, the first electrode material 1211 - 1 is plated on the driving substrate 11 by vacuum sputtering or vacuum ion plating. Figure 5 As shown; by vacuum evaporation coating on the first electrode material 1211-1 coating reflective material 1212-1, as Figure 6 According to the pattern of the first patterned mask design, the reflective material 1212-1 is etched to form a plurality of reflective layers 1212, such as Figure 7 shown.

[0074] The driving substrate 11 may be a silicon-based CMOS backplane or a thin film field effect transistor. The driving substrate 11 includes a plurality of first electrode contacts 112 .

[0075] The first electrode material 1211-1 is plated on the driving substrate 11 by vacuum sputtering or vacuum ion plating, and the reflective material 1212-1 is evaporated on the first electrode material 1211-1. The first electrode material 1211-1 can be a conductive film material, and the reflective material 1212-1 can be a highly reflective material. The thickness of the reflective material 1212-1 is greater than 10nm.

[0076] According to the pattern designed by the first patterned mask, the reflective material 1212 - 1 is etched to form a plurality of reflective layers 1212 . Each reflective layer 1212 is located between adjacent first electrode contacts 112 of the driving substrate 11 .

[0077] See also Figures 8 to 9 , the transparent electrode material 1213 - 1 is bonded to the first electrode material 1211 - 1 in a facing relationship.

[0078] In some embodiments, the transparent electrode material 1213-1 and the first electrode material 1211-1 are bonded by high pressure and high temperature, such as Figure 8 As shown; remove the substrate 13, as Fig. 9 shown.

[0079] The substrate 13 coated with the epitaxial material 122-1 and the transparent electrode material 1213-1 is flipped over and bonded to the driving substrate 11 coated with the first electrode material 1211-1 and forming the reflective layer 1212, so that the multiple reflective layers 1212 are "embedded" between the transparent electrode material 1213-1 and the first electrode material 1211-1 to form a bonding structure.

[0080] The removal method of the substrate 13 may include, but is not limited to, laser lift-off, dry etching, wet etching, mechanical polishing, etc.

[0081] See also Figure 10 to Figure 11 , forming a plurality of epitaxial layers 122 , and opening a first opening in the transparent electrode material 1213 - 1 and the first electrode material 1211 - 1 corresponding to each first electrode contact 112 .

[0082] In some embodiments, the epitaxial material 122-1 is etched into a step structure, and the step structure enables the epitaxial material 122-1 to form a plurality of epitaxial layers 122, such as Fig.10 According to the mesa pattern designed by the second patterned mask, the transparent electrode material 1213-1 and the first electrode material 1211-1 are etched to form a first opening corresponding to each first electrode contact 112, such as Fig.11 shown.

[0083] The epitaxial material 122 - 1 is etched into a step structure, which disconnects and electrically isolates the first semiconductor layer, the second semiconductor layer, and the light-emitting layer of adjacent light-emitting units 12 from each other.

[0084] Under the mesa pattern designed by the second patterned mask, the first electrode layer 1211 and the transparent electrode layer 1213 are etched to expose the first electrode contact 112 , and ensure that the reflective layer 1212 is “embedded” in the first electrode layer 1211 and the transparent electrode layer 1213 .

[0085] During the etching of the epitaxial material 122-1 and / or the bonding structure, the reflective layer 1212 will not overflow and will not splash back onto the first electrode layer 1211, the transparent electrode layer 1213, or the sidewall of the epitaxial layer 122, thereby avoiding irreversible defects and improving the yield.

[0086] See also Fig.12 , deposit a passivation material, and etch the passivation material to form a passivation layer 123.

[0087] In some embodiments, the passivation material is deposited by plasma chemical vapor deposition; the passivation material is etched according to the mesa pattern designed by the third patterned mask to form a second opening corresponding to the top surface of each epitaxial layer 122 and an opening exposing the first electrode contact 112.

[0088] The passivation material may be an inorganic or organic dielectric material, which is used to passivate and electrically isolate the light emitting point.

[0089] The passivation material can be evaporated or deposited by PECVD (plasma chemical vapor deposition).

[0090] See also Fig.13 , evaporate a second electrode material, and etch the second electrode material to form a plurality of second electrode layers 124 .

[0091] In some embodiments, the second electrode material is deposited by vacuum evaporation; the second electrode material is etched according to the mesa pattern designed by the fourth graphical mask to form a plurality of second electrode layers 124, and each second electrode layer 124 connects the epitaxial layer 122 and the corresponding first electrode contact 112 through the second opening.

[0092] The second electrode material may be a transparent conductive film.

[0093] Compared with the existing technologies, such as Chinese patent documents CN115498088A and CN114824047A, the micro-display chip proposed in this application uses the first electrode layer and the transparent electrode layer to seal the reflective layer, that is, the reflective layer is "embedded" in the bonding layer. In the subsequent process, the highly reflective material will not overflow and will not produce irreversible defects, thereby improving the yield of Micro-LED.

[0094] The micro display chip proposed in the present application has better adhesion between the reflective layer and the first electrode layer, and between the reflective layer and the transparent electrode layer. The reflective layer is coated by the first electrode layer and the transparent electrode layer, which improves the anti-oxidation stability of the reflective layer and ensures the quality and life of the micro display chip.

[0095] The micro display chip proposed in the present application uses a conductive high-transmittance thin film material for the transparent electrode layer, and performs a high-temperature annealing treatment to further improve the transmittance, thereby ensuring the reflective brightness of the reflective layer and further improving the luminous brightness.

[0096] The above is only a specific implementation of the present application. Under the above teachings of the present application, those skilled in the art can make other improvements or modifications based on the above embodiments. Those skilled in the art should understand that the above specific description is only to better explain the purpose of the present application, and the protection scope of the present application shall be based on the protection scope of the claims.

[0097] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims below, any one of the claimed embodiments may be used in any combination.

Claims

1. A micro display chip, characterized in that: The micro display chip includes: a driving substrate, and a plurality of light emitting units arranged on the driving substrate and capable of being driven individually by the driving substrate; Each of the light-emitting units comprises: a bonding layer and an epitaxial layer; The bonding layer includes a first electrode layer, a reflective layer and a transparent electrode layer which are arranged in sequence. The first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

2. The micro display chip according to claim 1, characterized in that: The light reflecting layer is disposed on a portion of the surface of the first electrode layer, and the transparent electrode layer covers the light reflecting layer and is disposed on the other surface of the first electrode layer.

3. The micro display chip according to claim 1, characterized in that: The first electrode layer is made of a conductive film material, and the conductive film material includes at least one of Cr, Ti, Pt, Au, Al, Cu, Ge, Ni, Sn, Ag, Pb or indium tin oxide.

4. The micro display chip according to claim 1, characterized in that: The reflective layer is made of a highly reflective material, and the highly reflective material includes at least one of Ag, Cu, Al, Pd, Ni, and Rh.

5. The micro display chip according to claim 1, characterized in that: The thickness of the light reflecting layer is greater than 10 nm.

6. The micro display chip according to claim 1, characterized in that: The transparent electrode layer is made of a conductive high-light-transmittance film material, and the conductive high-light-transmittance film material includes: at least one of indium tin compound, conductive SiO2, conductive PI, molybdenum, and silver.

7. The micro display chip according to claim 1, characterized in that: The epitaxial layer includes: a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are arranged in sequence, and the first semiconductor layer is connected to the transparent electrode layer.

8. The micro display chip according to claim 1, characterized in that: The first electrode layers of adjacent light-emitting units are connected as one, the transparent electrode layers of adjacent light-emitting units are connected as one, and a plurality of first electrode contacts of the driving substrate are respectively located between adjacent epitaxial layers; The first electrode layer connected in one piece and the transparent electrode layer connected in one piece have a first opening at a location corresponding to each of the first electrode contacts.

9. The micro display chip according to claim 8, characterized in that: The micro display chip further comprises: a passivation layer; Wherein, the passivation layer comprises: A first passivation layer located on the top surface of each epitaxial layer, wherein the first passivation layer has a second opening corresponding to the top surface of each epitaxial layer; A second passivation layer located on each side surface of the epitaxial layer, the top surface of the transparent electrode layer, and each side surface of the first opening; The first passivation layer is integrally connected to the second passivation layer, and the passivation layer exposes a plurality of the first electrode contacts.

10. The micro display chip according to claim 9, characterized in that: Each of the light-emitting units further comprises: a second electrode layer; Wherein, the second electrode layer is located on the passivation layer; The second electrode layer connects the epitaxial layer and the corresponding first electrode contact through the second opening.

11. A method for preparing a micro display chip, characterized in that: The preparation method comprises: forming a plurality of light emitting units on a driving substrate, each of which can be driven individually by the driving substrate; Wherein, each of the light-emitting units comprises: a bonding layer and an epitaxial layer; The bonding layer includes a first electrode layer, a reflective layer and a transparent electrode layer which are arranged in sequence. The first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

12. The method for preparing a micro display chip according to claim 11, characterized in that: The preparation method comprises the following steps: coating a transparent electrode material on the epitaxial material; Plating a first electrode material on the driving substrate, and forming a plurality of the light reflecting layers on the first electrode material, wherein each of the light reflecting layers is located between adjacent first electrode contacts of the driving substrate; Bonding the transparent electrode material and the first electrode material facing each other; A plurality of epitaxial layers are formed, and a first opening is opened in the transparent electrode material and the first electrode material at a position corresponding to each of the first electrode contacts, wherein each of the epitaxial layers is directly opposite to each of the light reflecting layers.

13. The method for preparing a micro display chip according to claim 12, characterized in that: The step of plating a transparent electrode material on the epitaxial material comprises: providing a substrate; coating the epitaxial material on the substrate by vacuum evaporation coating; The transparent electrode material is plated on the epitaxial material by vacuum evaporation coating, and high-temperature annealing is performed.

14. The method for preparing a micro display chip according to claim 12, characterized in that: The step of plating a first electrode material on the driving substrate and forming a plurality of light reflecting layers on the first electrode material comprises: Plating the first electrode material on the driving substrate by vacuum sputtering or vacuum ion plating; coating the first electrode material with a reflective material by vacuum evaporation coating; The reflective material is etched according to the pattern designed by the first patterned mask to form a plurality of reflective layers.

15. The method for preparing a micro display chip according to claim 13, characterized in that: The step of bonding the transparent electrode material and the first electrode material facing each other comprises: Bonding the transparent electrode material and the first electrode material by means of high pressure and high temperature; The substrate is removed.

16. The method for preparing a micro display chip according to claim 12, characterized in that: The forming of the plurality of epitaxial layers and the opening of a first opening at each of the transparent electrode material and the first electrode material corresponding to each of the first electrode contacts comprises: Etching the epitaxial material into a step structure, wherein the step structure enables the epitaxial material to form a plurality of epitaxial layers; The transparent electrode material and the first electrode material are etched according to the mesa pattern designed by the second patterned mask to form the first opening corresponding to each of the first electrode contacts.

17. The method for preparing a micro display chip according to claim 12, characterized in that: The preparation method further comprises: Depositing passivation materials; Corresponding to the top surface of each epitaxial layer, the passivation material is etched to form a second opening; The passivation material is etched corresponding to each of the first electrode contacts to expose each of the first electrode contacts.

18. The method for preparing a micro display chip according to claim 17, characterized in that: The preparation method further comprises: Evaporating a second electrode material; The second electrode material is etched to form a plurality of second electrode layers, and each of the second electrode layers connects the epitaxial layer and the corresponding first electrode contact through the second opening.

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