A method for bonding SiC / InP hetero-wafer based on magnetron sputtering amorphous silicon

By forming a nanoscale silicon interface layer on the surface of SiC and InP wafers and utilizing plasma activation technology, the problems of low bonding strength and complex process in SiC/InP heterostructure bonding were solved, achieving high-quality, low-energy heterostructure bonding.

CN119876870BActive Publication Date: 2025-11-25WUHAN UNIV OF TECH
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202410879458.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-07-02
Publication Date
2025-11-25
Estimated Expiration
2044-07-02

AI Technical Summary

Technical Problem

Existing wafer bonding methods suffer from problems such as low bonding strength, complex processes, high costs, difficulty in material selection, and thermal expansion coefficient and lattice mismatch, which are particularly evident in SiC/InP heterobonding.

Method used

A nanoscale silicon interface layer was formed on the surface of SiC and InP wafers by magnetron sputtering of amorphous silicon. The interface layer was then treated with plasma activation technology and combined with low-temperature annealing to achieve homogeneous interface conversion and high-quality bonding of heterogeneous wafers.

Benefits of technology

This improved the bonding strength and interface stability of heterogeneous wafers, reduced process energy consumption and equipment complexity, avoided thermal stress and lattice mismatch problems caused by high temperature, and achieved high-quality heterogeneous wafer bonding.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119876870B_ABST
    Figure CN119876870B_ABST
Patent Text Reader

Abstract

The application relates to the chip manufacturing technical field, in particular to a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon. The method comprises the following steps: S1, providing a first wafer and a second wafer, and depositing an interface layer on the bonding surfaces of the first wafer and the second wafer by a magnetron sputtering method to realize homo-interface conversion of the hetero wafer; S2, adopting plasma to activate the interface layer; S3, pre-bonding the bonding surfaces of the first wafer and the second wafer, and obtaining the hetero wafer through low-temperature annealing treatment. The method forms an ultrathin nanoscale silicon material interface layer on the surface of the hetero wafer through magnetron sputtering amorphous silicon sputtering technology, realizes homo-interface conversion of the hetero wafer, and improves the normal-temperature direct bonding capacity of the hetero wafer; meanwhile, the plasma surface activation technology is adopted to activate the silicon material interface layer, remove the surface impurities of the amorphous silicon layer, and improve the surface activity of the amorphous silicon, so that the SiC and InP hetero wafer ultrathin interface bonding is realized.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chip manufacturing technology, and in particular to a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon. BACKGROUND

[0002] Wafer bonding technology is an advanced manufacturing technology that combines polished semiconductor wafers together. This technology has a wide range of applications in microelectronic manufacturing, microelectromechanical system packaging, multifunctional chip integration, and other emerging fields. Traditional high-temperature bonding methods are no longer suitable for some temperature-sensitive devices or materials with large differences in thermal expansion coefficients. Therefore, achieving firm bonding at lower annealing temperatures or even room temperature without heating has become a challenge in the field of wafer bonding.

[0003] Silicon carbide (SiC) and indium phosphide (InP) are two semiconductor materials with important advantages. SiC can withstand greater current and voltage, has higher switching speed and smaller energy loss, and performs well in high-temperature environments. Therefore, power modules made of SiC can significantly reduce the components of capacitors, inductors, coils, and heat dissipation components, making the entire power device module more lightweight, energy-efficient, and powerful, and enhancing reliability. At the same time, InP has high saturated electron drift speed, strong radiation resistance, good thermal conductivity, and high photoelectric conversion efficiency, and its wafer substrate has high transmittance in the medium wavelength infrared range. Because the thermal expansion coefficients of the two materials are similar and the lattice constants are similar, they have become one of the ideal materials for hetero bonding. This hetero bonding technology can fully utilize the advantages of both materials, bringing more possibilities and application prospects to the fields of microelectronic manufacturing, optoelectronic devices, etc.

[0004] The existing wafer bonding methods have the following disadvantages: (1) Wet activation bonding is used, the concentration of the solution and the degree of treatment cannot be effectively controlled, and other phenomena such as metal contamination and chemical corrosion may occur; (2) Surface activation bonding (SAB) is used, ① this method is not suitable for oxide wafers (such as silicon dioxide, quartz, and glass), the room temperature bonding strength is low, and high-temperature annealing process is still required; ② this method requires a high vacuum system, which is complex and expensive; (3) Single plasma surface activation technology is used, after activating the surface of the hetero wafer material, the void rate of the bonded wafer is high, and the bonding strength is not high; (4) Material selection, when bonding hetero wafers, factors such as thermal expansion coefficient, lattice matching, and chemical properties of the material need to be considered to ensure the stability and reliability of the bonding; (5) For SiC / InP hetero wafer bonding completed by other methods such as wet activation, the bonding strength is not high or it is not bonded directly. SUMMARY

[0005] Therefore, the application provides a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, so as to solve the technical problems of thick bonding interface, poor bonding quality and high process requirement in the prior art.

[0006] The technical scheme of the application is as follows: the application provides a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, and comprises the following steps:

[0007] S1, providing a first wafer and a second wafer, and depositing an interface layer on the bonding surfaces of the first wafer and the second wafer by a magnetron sputtering method to realize homo-interface conversion of the hetero wafer;

[0008] S2, activating the interface layer by using plasma;

[0009] S3, performing pre-bonding treatment on the bonding surfaces of the first wafer and the second wafer, and obtaining the hetero wafer by low-temperature annealing treatment.

[0010] Preferably, the material of the first wafer is SiC, and the material of the second wafer is InP.

[0011] In the application, a uniform amorphous silicon interface layer is deposited on the wafer surfaces of different materials such as SiC and InP to form a homo-interface structure, wherein a high-quality amorphous silicon interface layer is prepared by precisely controlling the deposition process parameters by using the magnetron sputtering technology, and the homo-interface is beneficial to the subsequent bonding process. Then, the interface layer can be activated by plasma treatment to generate a large number of active groups such as hydroxyl (-OH), so as to increase the interatomic force of the bonding interface. The homo-interface reduces the interface mismatch, and the plasma activation optimizes the bonding interface properties, and the two cooperate with each other to greatly improve the bonding strength and interface stability of the hetero wafer. The synergistic effect ensures that the subsequent pre-bonding and low-temperature annealing treatment can be successfully performed to obtain a high-quality hetero wafer structure. The pre-bonding forms initial bonding at low temperature, and the interatomic diffusion can be further promoted in the low-temperature annealing process to eliminate defects and stress at the interface, so that the hetero wafer with stable structure and excellent interface performance is obtained.

[0012] Preferably, after the interface layer deposition in step S1, the method further comprises pre-treating the interface layer surfaces of the first wafer and the second wafer, and the pre-treatment specifically comprises:

[0013] The interface layer surface of the first wafer and the second wafer is cleaned by using the alkaline cleaning agent for 8-12 minutes, then the interface layer surface of the first wafer and the second wafer is cleaned by using the acidic cleaning agent for 8-12 minutes, and finally the interface layer surface of the first wafer and the second wafer is cleaned by using the DHF cleaning agent for 2-3 minutes. After each cleaning, the wafer interface layer surface is cleaned twice with ultrapure water, and the wafer interface layer surface is dried by using nitrogen.

[0014] On the basis of the above technical scheme, preferably, the composition of the alkaline cleaning agent comprises: ammonia, hydrogen peroxide and water in a volume ratio of 0.8-1.2:1:5; the composition of the acidic cleaning agent comprises: hydrochloric acid, hydrogen peroxide and water in a volume ratio of 0.8-1.2:1:6; and the composition of the DHF cleaning agent comprises: hydrofluoric acid and water in a volume ratio of 1:8-12.

[0015] Specifically, the alkaline cleaning is first performed, in which the synergistic effect of ammonia and hydrogen peroxide can oxidize and dissolve silicon, oxides and organic contaminants on the interface layer surface of the wafer; then the acidic cleaning is performed, in which hydrochloric acid and hydrogen peroxide have strong corrosion, which can further dissolve and oxidize the alkaline residues and trace metals on the interface layer surface of the wafer; finally, the DHF cleaning is performed, in which hydrofluoric acid can chemically react with silicon oxide on the interface layer surface of the wafer to generate soluble hexafluorosilicate, thereby removing the oxides and silicon dioxide on the surface and reducing the surface metal.

[0016] On the basis of the above technical scheme, preferably, the magnetron sputtering method controls the plasma by creating a magnetic field, so that the sputtered particles are more efficiently deposited on the substrate, and the ultra-thin nanoscale silicon material interface layer is deposited on the bonding surface of the SiC and InP wafers to realize the conversion of the heterogeneous wafer into a homogeneous interface. Specifically, the magnetron sputtering method controls the plasma by creating a magnetic field, which includes: (1) an annular magnetron array is arranged between the target material and the substrate in the vacuum chamber; (2) the radio frequency power source is connected with the magnetron array to form a radio frequency driven magnetron sputtering system; and (3) the magnetic field strength and the magnetic field line distribution generated by the magnetron are controlled by adjusting the magnetron sputtering parameters.

[0017] On the basis of the above technical scheme, preferably, the process parameters of the magnetron sputtering method in step S1 include: the target material is amorphous silicon, the sputtering pressure is 1Pa-2Pa, the sputtering power is 10W-20W, the gas used in the magnetron sputtering is argon, the argon flow is 50sccm-60sccm, and the sputtering time is 30s-60s.

[0018] Specifically, in the magnetron sputtering process, Ar +The ion bombardment to the surface of the silicon target material causes physical escape and escape of atoms on the surface of the silicon target material, and the broken atoms are sprayed to the surface of the substrate (wafer) in the form of atoms or molecules to form thin film deposition, thereby obtaining a silicon interface layer.

[0019] On the basis of the above technical scheme, preferably, in the step S1, the material of the interface layer is nanometer silicon, and the thickness of the interface layer is 100-200 nm.

[0020] The nanometer silicon can form a dense and flat homogeneous interface with SiC and InP at the atomic level, and the interface defects and impurities are few; as a semiconductor material, the nanometer silicon has excellent electrical properties such as carrier mobility, which is beneficial to the electrical properties of the heterostructure. The nanometer thickness of 100-200 nm can minimize the stress accumulation between materials while ensuring sufficient strength and electrical integrity.

[0021] On the basis of the above technical scheme, preferably, in the step S2, the process parameters of the plasma activation method include: in a pure oxygen atmosphere, the power is 200-300 W, the activation treatment time is 30-90 s, and the oxygen flow rate is 150-250 ml / min.

[0022] The prepared SiC and InP samples are placed in a plasma activation device, and the ultra-thin silicon interface layer on the surface of the SiC and InP is activated by pure oxygen plasma. The principle is to remove the surface impurities by chemical method. The inorganic gas is excited to plasma state, and then the plasma gas phase high-energy substance is sprayed on the surface to be treated. Then the solid surface molecules react with the adsorbed high-energy groups to decompose and generate gas phase products to separate from the surface, generate free radicals and expose the high-energy surface. This surface chemical activation process is beneficial to the deposition and bonding of the subsequent interface layer, and improves the adhesion of the interface.

[0023] On the basis of the above technical scheme, preferably, in the step S3, the pressure of the pre-bonding treatment is 0.8-1.2 MPa, and the treatment time is 8-24 h.

[0024] On the basis of the above technical scheme, preferably, in the step S3, the temperature of the low-temperature annealing treatment is 200-300℃, and the annealing time is 12-24 h.

[0025] By depositing a nanometer-scale silicon interface layer with a thickness of only 100-200 nm on the wafer bonding surface, and activating the silicon interface layer by plasma, the interface is effectively activated, atomic migration and combination are promoted, and the bonding surface can be annealed at a relatively mild temperature of 200-300℃ to realize a high-quality bonding interface, thereby greatly reducing the energy consumption and complexity of the process.

[0026] In another aspect, the application provides a hetero wafer prepared by the hetero wafer bonding method as described in any one of the above, wherein the bonding layer of the hetero wafer has a thickness of 10-30 nm.

[0027] The SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon of the application has the following beneficial effects compared with the prior art:

[0028] (1) The application forms a super-thin nanoscale silicon interface layer on the surface of the hetero wafer by magnetron sputtering amorphous silicon, realizes the homogenization of the surface of the hetero wafer, and eliminates the problems of thermal stress and lattice mismatch due to the deposition of the silicon interface layer on the surface of the hetero wafer, thereby greatly improving the bonding strength of the wafer.

[0029] (2) On this basis, the plasma surface activation technology is used to activate the silicon material interface layer, remove the surface impurities of the amorphous silicon layer, and improve the surface activity of the amorphous silicon, realize the super-thin interface bonding of the SiC and InP hetero wafer, and improve the bonding quality.

[0030] (3) Through the synergistic effect of the super-thin nanoscale silicon interface layer and the plasma surface activation, the bonding strength of the hetero wafer can be improved, the subsequent annealing process can be carried out at low temperature (<300℃), and the problems of thermal stress and lattice mismatch caused by high temperature are further avoided, and the preparation process is simple, without high temperature and high pressure and strict vacuum environment. BRIEF DESCRIPTION OF DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0032] Figure 1 The preparation flow chart of the SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon of the application is shown in the figure.

[0033] Figure 2 The flow chart of the interface layer prepared by magnetron sputtering of the application is shown in the figure.

[0034] Figure 3 The principle diagram of the interface layer activated by plasma of the application is shown in the figure.

[0035] Figure 4 The SEM diagram of the hetero wafer prepared in Example 2 of the application is shown in the figure. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0037] Embodiment 1

[0038] The present embodiment discloses a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, as shown in Figure 1 , specifically comprising the following steps:

[0039] (1) providing a first wafer and a second wafer, the material of the first wafer is SiC, and the material of the second wafer is InP, using ultrasonic cleaning to clean the target material, the first wafer and the second wafer, and depositing an interface layer on the bonding surface of the first wafer and the second wafer by a magnetron sputtering method to realize the homo-interface conversion of the hetero wafer (as shown in Figure 2 ), specifically comprising: inside the vacuum cavity, an annular magnetron array is arranged between the target material and the substrate; connecting the radio frequency power source with the magnetron array to form a radio frequency driven magnetron sputtering system; by adjusting the magnetic field strength and the distribution of the magnetic field lines generated by the magnetron, the parameters of the magnetron sputtering are set as follows: the plasma used in the magnetron sputtering is Ar, the target material used is amorphous silicon target, the sputtering pressure is 1.5 Pa, the sputtering power is 15 W, the argon flow rate is 55 sccm, the sputtering time is 45 s, and the thickness of the deposited interface layer is 150 nm.

[0040] (2) using plasma to activate the interface layer (for details of the activation principle, see Figure 3 ), placing the first wafer and the second wafer on a glass sheet, and then placing them on a placement table in a plasma device, and setting the parameters as follows: the gas is pure oxygen, the power is set to 250 W, the processing time is 60 s, the flow rate is set to 200 ml / min, and after the processing is completed, the wafer is rinsed with ultrapure water again.

[0041] (3) using tweezers to align the bonding surface of the first wafer and the second wafer, since the UPW remaining on the surface can realize automatic centering, then placing them in a clamp for pre-bonding treatment, applying a pressure of 1 Mpa, and pre-bonding for 16 hours. After the pre-bonding is completed, the wafer is placed in a muffle furnace, the temperature is set to 250℃, and the annealing time is 18 hours. After the annealing is completed, the wafer is naturally cooled to room temperature, and then the bonded wafer is taken out.

[0042] Embodiment 2

[0043] The embodiment discloses a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, and the specific operation steps are the same as those in embodiment 1, and the difference lies in that in step (1), after the deposition of the interface layer, the interface layer surface of the first wafer and the second wafer is pretreated, and the pretreatment comprises:

[0044] The interface layer surfaces of the first wafer and the second wafer are cleaned with an alkaline cleaning agent (ammonia, hydrogen peroxide and ultrapure water in a volume ratio of 1:1:5) for 10 min, after the cleaning, the wafers are cleaned with ultrapure water, and dried with nitrogen; then the interface layer surfaces of the first wafer and the second wafer are cleaned with an acidic cleaning agent (hydrochloric acid, hydrogen peroxide and ultrapure water in a volume ratio of 1:1:6) for 10 min, after the cleaning, the wafers are cleaned with ultrapure water, and dried with nitrogen; finally, the bonding surface of the first wafer and the second wafer is cleaned with a DHF cleaning agent (hydrofluoric acid and ultrapure water in a volume ratio of 1:10) for 2 min, after the cleaning, the wafers are cleaned with ultrapure water, and dried with nitrogen.

[0045] Embodiment 3

[0046] The embodiment discloses a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, and the specific operation steps are the same as those in embodiment 1, and the difference lies in that in step (1), after the deposition of the interface layer, the interface layer surface of the first wafer and the second wafer is pretreated, and the pretreatment comprises:

[0047] (1) providing a first wafer and a second wafer, the material of the first wafer is SiC, and the material of the second wafer is InP. The interface layer is deposited on the bonding surface of the first wafer and the second wafer by a magnetron sputtering method to realize the homo-interface conversion of the hetero wafer, and the specific steps include: in the vacuum cavity, an annular magnetron array is arranged between the target material and the substrate; the radio frequency power source is connected with the magnetron array to form a radio frequency driven magnetron sputtering system; the magnetic field strength and the distribution of the magnetic field lines generated by the magnetron are controlled by adjusting the magnetron sputtering parameters, and the parameters of the magnetron sputtering are set as follows: the plasma used in the magnetron sputtering is Ar, the target material used is amorphous silicon target, the sputtering pressure is 1 Pa, the sputtering power is 10 W, the argon flow rate is 50 sccm, the sputtering time is 30 s, and the thickness of the deposited interface layer is 100 nm.

[0048] The interface layer surfaces of the first wafer and the second wafer are cleaned with an alkaline cleaning agent (ammonia, hydrogen peroxide and ultrapure water in a volume ratio of 0.8:1:5) for 8 min, after the cleaning, the wafers are cleaned with ultrapure water, and dried with nitrogen; then the interface layer surfaces of the first wafer and the second wafer are cleaned with an acidic cleaning agent (hydrochloric acid, hydrogen peroxide and ultrapure water in a volume ratio of 0.8:1:6) for 8 min, after the cleaning, the wafers are cleaned with ultrapure water, and dried with nitrogen; finally, the interface layer surfaces of the first wafer and the second wafer are cleaned with a DHF cleaning agent (hydrofluoric acid and ultrapure water in a volume ratio of 1:8) for 2 min, after the cleaning, the wafers are cleaned with ultrapure water, and dried with nitrogen.

[0049] (2) Using plasma to activate the interface layer, place the first wafer and the second wafer on a glass sheet, and then place it on the placement table in the plasma device. Set the parameters as follows: select pure oxygen as the gas, set the power to 200W, the processing time to 30s, and the flow rate to 150ml / min. After processing, rinse the wafer with ultrapure water again.

[0050] (3) Use tweezers to align the bonding surfaces of the first wafer and the second wafer. Since the UPW remaining on the surface can achieve automatic centering, then place it in a clamp for pre-bonding treatment, apply a pressure of 0.8Mpa for 8 hours of pre-bonding pressure. After pre-bonding is completed, place the wafer in a muffle furnace, set the temperature to 200℃, and anneal for 12 hours. After annealing is completed, naturally cool it to room temperature, and then take out the bonded wafer.

[0051] Example 4

[0052] The embodiment discloses a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, which specifically comprises the following steps:

[0053] (1) Provide a first wafer and a second wafer, the material of the first wafer is SiC, and the material of the second wafer is InP. An interface layer is deposited on the bonding surface of the first wafer and the second wafer by a magnetron sputtering method to realize the conversion of the hetero wafer to a homogeneous interface, which specifically comprises: inside a vacuum cavity, an annular magnetron array is arranged between the target material and the substrate; connect the radio frequency power source to the magnetron array to form a radio frequency driven magnetron sputtering system; adjust the magnetic field strength and the distribution of the magnetic field lines generated by the magnetron by adjusting the magnetron sputtering parameters, and set the magnetron sputtering parameters as follows: the plasma used in the magnetron sputtering is Ar, the target material used is amorphous silicon target, the sputtering pressure is 2Pa, the sputtering power is 20W, the argon flow rate is 60sccm, the sputtering time is 60s, and the thickness of the deposited interface layer is 200nm.

[0054] Use an alkaline cleaning agent (ammonia, hydrogen peroxide and ultrapure water in a volume ratio of 1.2:1:5) to clean the surface of the interface layer of the first wafer and the second wafer for 12min, and then use ultrapure water to clean the wafer and dry it with nitrogen after cleaning; then use an acidic cleaning agent (hydrochloric acid, hydrogen peroxide and water in a volume ratio of 1.2:1:6) to clean the surface of the interface layer of the first wafer and the second wafer for 12min, and then use ultrapure water to clean the wafer and dry it with nitrogen after cleaning; finally, use a DHF cleaning agent (hydrofluoric acid and ultrapure water in a volume ratio of 1:12) to clean the interface layer of the first wafer and the second wafer for 3min, and then use ultrapure water to clean the wafer and dry it with nitrogen after cleaning.

[0055] (2) Using plasma-activated interface layer, the first wafer and the second wafer are placed on a glass sheet, and then placed on a placement table in a plasma device, and the parameters are set as follows: the gas is pure oxygen, the power is set between 300W, the processing time is between 90s, the flow rate is set to 250ml / min, and after the processing is completed, the wafer is rinsed again with ultrapure water.

[0056] (3) The bonding surfaces of the first wafer and the second wafer are attached with tweezers, and the UPW remaining on the surface can achieve automatic centering, and then they are placed in a clamp for pre-bonding treatment, a pressure of 1.2Mpa is applied, and the pre-bonding pressure is 24 hours. After the pre-bonding is completed, the wafer is placed in a muffle furnace, the temperature is set to 300℃, and the annealing time is 24 hours. After annealing is completed, it is naturally cooled to room temperature, and the bonded wafer can be taken out.

[0057] Example 5

[0058] The embodiment discloses a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, and the specific operation steps are the same as those of example 2, and the difference lies in that in step (1), the parameters of magnetron sputtering are set as follows: the plasma used in magnetron sputtering is Ar, the target material used is amorphous silicon target, the sputtering pressure is 1.5Pa, the sputtering power is 5W, the argon flow rate is 55sccm, the sputtering time is 20s, and the thickness of the deposited interface layer is 50nm.

[0059] Example 6

[0060] The embodiment discloses a SiC / InP hetero wafer bonding method based on magnetron sputtering amorphous silicon, and the specific operation steps are the same as those of example 2, and the difference lies in that in step (1), the parameters of magnetron sputtering are set as follows: the plasma used in magnetron sputtering is Ar, the target material used is amorphous silicon target, the sputtering pressure is 1.5Pa, the sputtering power is 25W, the argon flow rate is 55sccm, the sputtering time is 60s, and the thickness of the deposited interface layer is 250nm.

[0061] The comparative example discloses a hetero wafer bonding method, which specifically comprises the following steps:

[0062] (1) provide a first wafer and a second wafer, the material of the first wafer is SiC, the material of the second wafer is InP, the bonding surface of the first wafer and the second wafer is cleaned by using alkaline cleaning agent (ammonia, hydrogen peroxide and ultrapure water with a volume ratio of 1:1:5) for 10 min, after cleaning, the wafer is cleaned by using ultrapure water, and dried by nitrogen; then the bonding surface of the first wafer and the second wafer is cleaned by using acidic cleaning agent (hydrochloric acid, hydrogen peroxide and ultrapure water with a volume ratio of 1:1:6) for 10 min, after cleaning, the wafer is cleaned by using ultrapure water, and dried by nitrogen; finally, the bonding surface of the first wafer and the second wafer is cleaned by using DHF cleaning agent (hydrofluoric acid and ultrapure water with a volume ratio of 1:10) for 10 min, after cleaning, the wafer is cleaned by using ultrapure water, and dried by nitrogen.

[0063] (2) the interface layer is activated by using plasma, the first wafer and the second wafer are placed on a glass sheet, and then placed on a placing table in a plasma device, and the parameters are set as follows: the gas is pure oxygen, the power is set between 250 W, the processing time is 60 s, the flow rate is set to 200 ml / min, after processing, the wafer is washed again by using ultrapure water.

[0064] (3) the bonding surface of the first wafer and the second wafer is attached by using tweezers, since the UPW remaining on the surface can realize automatic centering, then the wafer is placed in a clamp for pre-bonding treatment, a pressure of 1Mpa is applied, and the pre-bonding pressure is 16 hours. After the pre-bonding is completed, the wafer is placed in a muffle furnace, the temperature is set to be between 250℃, and the annealing time is between 18 hours. After annealing is completed, the bonded wafer is taken out after natural cooling to room temperature.

[0065] Performance detection

[0066] The bonding quality of the hetero-wafer prepared by the examples and the comparative examples is detected, wherein the detection indexes include the bonding layer thickness and the bonding defect, the bonding defect of the hetero-wafer is detected by using ultrasonic scanning (C-SAM) method, that is, the two wafers bonded together are immersed in deionized water, and whether there is a bonding defect between the two wafers is detected by ultrasonic scanning. The detection results are shown in Table 1.

[0067] Table 1

[0068]

[0069] Figure 4 The SEM diagram of the hetero-wafer prepared by the example 2 of the present application is shown, as shown in the diagram, the SiC wafer and the InP wafer are well bonded, and a uniform bonding layer can be seen between the two wafers.

[0070] From Table 1, it can be seen from the comparison of Examples 1-2 that the pretreatment of the wafer can avoid the influence of metal ions and contaminants on the wafer surface on wafer bonding, resulting in delamination or peeling of the wafer; from the comparison of Examples 2-4, it can be seen that the technical scheme of the present application can better achieve ultra-thin bonding; from the comparison of Example 2 and Comparative Example 1, it can be seen that the deposition of the interface layer on the wafer surface to achieve the homogenous conversion of the heterogeneous wafers is conducive to improving the wafer bonding quality, and in Comparative Example 1, the interface layer is not provided, so it is difficult to better bond; from the comparison of Example 2 and Examples 5 and 6, it can be seen that the interface layer is too thin to achieve the effect of homogenous conversion, so it will affect wafer bonding, and although the interface layer is too thick to achieve wafer bonding, it will increase the resistance and affect the device performance.

[0071] The above description is merely preferred embodiments of the present application, but not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for SiC / InP wafer bonding based on magnetron sputtering of amorphous silicon, characterized by: The method comprises the following steps: S1, providing a first wafer and a second wafer, and depositing an interface layer on the bonding surfaces of the first wafer and the second wafer by a magnetron sputtering method to realize homogeneous interface conversion of the heterogeneous wafer; S2, activating the interface layer by a plasma method; S3, pre-bonding the bonding surfaces of the first wafer and the second wafer, and obtaining the heterogeneous wafer by low-temperature annealing treatment; In step S1, the material of the first wafer is SiC, the material of the second wafer is InP, and the material of the interface layer is nano-silicon, and the thickness of the interface layer is 100-200 nm; the process parameters of the magnetron sputtering method in step S1 include: the target material is amorphous silicon target, the sputtering pressure is 1-2 Pa, the sputtering power is 10-20 W, the gas used for magnetron sputtering is argon, the argon flow rate is 50-60 sccm, and the sputtering time is 30-60 s; In step S3, the pre-bonding pressure is 0.8-1.2 MPa, and the processing time is 8-24 h; the low-temperature annealing temperature is 200-300℃, and the annealing time is 12-24 h.

2. A method for SiC / InP wafer bonding based on magnetron sputtering of amorphous silicon as claimed in claim 1, wherein: In step S1, after the interface layer is deposited, the interface layer surfaces of the first wafer and the second wafer are pretreated, and the pretreatment specifically includes: The interface layer surfaces of the first wafer and the second wafer are cleaned with an alkaline cleaning agent for 8-12 min, then cleaned with an acidic cleaning agent for 8-12 min, and finally cleaned with a DHF cleaning agent for 2-3 min.

3. A method for SiC / InP wafer bonding based on magnetron sputtering of amorphous silicon as claimed in claim 2, wherein: The composition of the alkaline cleaning agent includes: ammonia, hydrogen peroxide and water in a volume ratio of 0.8-1.2:1:5; the composition of the acidic cleaning agent includes: hydrochloric acid, hydrogen peroxide and water in a volume ratio of 0.8-1.2:1:6; and the composition of the DHF cleaning agent includes: hydrofluoric acid and water in a volume ratio of 1:8-12.

4. A method for SiC / InP wafer bonding based on magnetron sputtering of amorphous silicon as claimed in claim 1, wherein: The process parameters of the plasma activation method in step S2 include: in a pure oxygen atmosphere, the power is 200-300 W, the activation processing time is 30-90 s, and the oxygen flow rate is 150-250 ml / min.

5. A hetero-wafer, characterized by: The bonding layer of the heterogeneous wafer is prepared by the bonding method of the heterogeneous wafer according to any one of claims 1-4, and the thickness of the bonding layer of the heterogeneous wafer is 10-30 nm.

Citation Information

Patent Citations

  • Wafer cleaning method

    CN102074453A

  • Method for low temperature bonding and bonded structure

    US20030211705A1