Low-dropout linear voltage stabilizing circuit, low-dropout linear voltage stabilizing device, and electronic device

Abstract

The application provides a low-dropout linear voltage stabilizing circuit, a low-dropout linear voltage stabilizer and an electronic device, and relates to the technical field of integrated circuits. One end of a suppression voltage ripple unit is connected with an input stage of an error amplifier in a low-dropout voltage stabilizing unit, and the other end is connected with a transient response unit and a shared bias unit respectively; one end of the transient response unit is connected with an output end of the low-dropout voltage stabilizing unit, and the other end is connected with the suppression voltage ripple unit and the shared bias unit respectively; one end of the shared bias unit is connected with a second end of a power tube in the low-dropout voltage stabilizing unit, and the other end is connected with the suppression voltage ripple unit and the transient response unit respectively. The application expands the bandwidth of the low-dropout linear voltage stabilizing circuit, pushes the PSR drop frequency of the whole circuit to a higher frequency, and improves the value of the PSR at high frequency. The application enhances the transient response, improves the transient response speed of the whole circuit, reduces the overshoot voltage, reduces the compensation requirement of the whole circuit, and improves the response speed of the loop.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a low-dropout linear voltage stabilizing circuit, a low-dropout linear voltage stabilizer and an electronic device. BACKGROUND

[0002] At present, in an LDO (Low-dropout regulator) circuit, the PSR (power supply rejection ratio, generally refers to the ability to suppress input voltage ripple, also known as power supply rejection ratio) will decrease with the increase of frequency, resulting in that the PSR of the circuit will decrease very low at high frequency. This is because the PSR is affected by the gain of the error amplifier in the LDO circuit, the higher the gain of the error amplifier, the greater the PSR. When the frequency is higher than the main pole frequency of the error amplifier, the gain will decrease with the increase of frequency, so that the PSR of the LDO circuit decreases with the decrease of the gain of the error amplifier.

[0003] At present, in order to solve the above problem, the traditional way is to use the PSR improvement technology, but the circuit structure of this kind of PSR improvement technology is relatively complex, and more components are used, resulting in more static current consumption. SUMMARY

[0004] In view of the above problems, the present application is proposed to provide a low-dropout linear voltage stabilizing circuit, a low-dropout linear voltage stabilizer and an electronic device to solve the above problems or partially solve the above problems.

[0005] The first aspect of the embodiment of the present application provides a low-dropout linear voltage stabilizing circuit, which comprises:

[0006] a low-dropout voltage stabilizing unit, a voltage ripple suppressing unit, a transient response unit and a shared bias unit;

[0007] One end of the voltage ripple suppressing unit is connected with an input stage of an error amplifier in the low-dropout voltage stabilizing unit, and the other end is connected with the transient response unit and the shared bias unit respectively;

[0008] One end of the transient response unit is connected with an output end of the low-dropout voltage stabilizing unit, and the other end is connected with the voltage ripple suppressing unit and the shared bias unit respectively;

[0009] One end of the shared bias unit is connected with a second end of a power tube in the low-dropout voltage stabilizing unit, and the other end is connected with the voltage ripple suppressing unit and the transient response unit respectively;

[0010] The voltage rejection unit is configured to obtain a target current, and inject the target current into a tail current of a differential input stage of the error amplifier, the target current having a same variation trend as a second load current generated by a power tube;

[0011] The transient response unit is configured to generate a first load current, and the first load current and the second load current together provide a load current for a load;

[0012] The common bias unit is configured to provide a bias current for the voltage rejection unit and the transient response unit.

[0013] Optionally, the voltage rejection unit comprises a current mirror structure.

[0014] A first end of an input branch of the current mirror structure and a first end of a replication branch of the current mirror structure are connected to a power supply end.

[0015] A third end of the replication branch is connected to the input stage of the error amplifier.

[0016] The input branch is connected to the transient response unit and the common bias unit through a second end of a first target tube, and the first target tube is a transistor with a first end grounded in the input branch.

[0017] The input branch is configured to not work when the load current is zero, and when the load current gradually increases, a current flowing through the input branch has a same variation trend as the second load current.

[0018] The replication branch is configured to not work when the load current is zero, and when the load current gradually increases, the replication branch replicates the current flowing through the input branch to obtain the target current.

[0019] Optionally, the current mirror structure comprises a sixth transistor, a seventh transistor and a ninth transistor.

[0020] A first end of the sixth transistor is connected to the power supply end, a second end of the sixth transistor is connected to a second end of the seventh transistor, and a third end of the sixth transistor is connected to the input stage of the error amplifier.

[0021] A third end of the seventh transistor is connected to the second end of the seventh transistor and a third end of the ninth transistor.

[0022] The ninth transistor is the first target tube, a second end of the ninth transistor is connected to the transient response unit and the common bias unit, and a first end of the ninth transistor is grounded.

[0023] Optionally, the transient response unit comprises: a current limiting structure and a large current structure; the current limiting structure comprises: a providing current branch and a controlled branch, the controlled branch replicates the current of the providing current branch;

[0024] The providing current branch, the controlled branch and the first end of the large current structure are connected with the power supply end;

[0025] The third end of the providing current branch is grounded through a current source;

[0026] The third end of the large current structure is connected with the output end of the low dropout regulator unit;

[0027] The second end of the large current structure is connected with the controlled branch;

[0028] The controlled branch is connected with the second end of the first target transistor and the common bias unit through the second end of the second target transistor, and the second target transistor is a transistor with the first end grounded in the controlled branch;

[0029] The providing current branch is used for providing a preset current;

[0030] The controlled branch is used for not working in the no-load state, gradually increasing the current flowing through itself and reducing the voltage of the second end of the large current structure when the load current gradually increases;

[0031] The large current structure is used for not working in the no-load state and providing gradually increasing current to obtain the first load current when the load current gradually increases.

[0032] Optionally, the providing current branch comprises: a twelfth transistor and a fourth current source; the controlled branch comprises: an eighth transistor and a thirteenth transistor;

[0033] The third end of the eighth transistor is connected with the third end of the thirteenth transistor and the large current structure;

[0034] The eighth transistor is used as the second target transistor, the second end of the eighth transistor is connected with the second end of the first target transistor and the common bias unit, and the first end of the eighth transistor is grounded;

[0035] The first end of the thirteenth transistor is connected with the power supply end, and the second end of the thirteenth transistor is connected with the second end and the third end of the twelfth transistor;

[0036] The first end of the twelfth transistor is connected with the power supply end, and the third end of the twelfth transistor is grounded through the fourth current source.

[0037] Optionally, the large current structure comprises: a fourteenth transistor;

[0038] The first end of the fourteenth transistor is connected with the power supply end, and the second end is respectively connected with the third end of the thirteenth transistor and the third end of the eighth transistor;

[0039] The third end of the fourteenth transistor is connected with the output end of the low-dropout voltage regulator unit.

[0040] Optionally, the common bias unit comprises a tenth transistor and an eleventh transistor.

[0041] The second end of the tenth transistor is respectively connected with the third end of itself, the second end of the eighth transistor and the second end of the ninth transistor;

[0042] The third end of the tenth transistor is connected with the third end of the eleventh transistor, and the first end is grounded.

[0043] The first end of the eleventh transistor is connected with the power supply end, and the second end is connected with the second end of the power transistor.

[0044] Optionally, the low-dropout voltage regulator unit comprises the error amplifier, the power transistor, a negative feedback structure, a first current source, a second current source and a third current source.

[0045] The input stage of the error amplifier is connected with the third end of the sixth transistor, and is connected with the power supply end through the first current source;

[0046] The error amplifier is respectively connected with a reference voltage end and the negative feedback structure;

[0047] The output end of the error amplifier is connected with the second end of the power transistor, and is connected with the power supply end through the second current source;

[0048] The first end of the power transistor is connected with the power supply end;

[0049] The third end of the power transistor is respectively connected with the negative feedback structure and the third end of the fourteenth transistor, and is grounded through the third current source.

[0050] The error amplifier is used for receiving the inflow of the target current in the tail current of the input stage of itself when the load current gradually increases, so that the total tail current gradually increases, and then the main pole frequency of the error amplifier increases together with the output pole frequency of the low-dropout voltage regulator unit;

[0051] The size of the power transistor is smaller than the size of the fourteenth transistor, and the power transistor is used for adjusting the voltage of the second end of itself quickly by the error amplifier when the load current changes rapidly, so that the output voltage of the power transistor is quickly stabilized.

[0052] Optionally, the error amplifier comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor; the negative feedback structure comprises a first resistor and a second resistor;

[0053] The first end of the first transistor and the first end of the second transistor are connected with the third end of the sixth transistor, and are connected with the power supply end through the first current source;

[0054] The second end of the first transistor is connected with the second end of the first resistor and the first end of the second resistor respectively;

[0055] The second end of the second transistor is connected with the reference voltage end;

[0056] The third end of the first transistor is connected with the third end and the second end of the third transistor and the second end of the fourth transistor respectively;

[0057] The third end of the second transistor is connected with the third end of the fourth transistor and the second end of the fifth transistor respectively, and is connected with the first end of the first resistor and the third end of the power tube respectively through a compensation capacitor;

[0058] The first end of the third transistor and the first end of the fourth transistor are grounded;

[0059] The first end of the fifth transistor is connected with the second end of the power tube and the second end of the eleventh transistor respectively, and is connected with the power supply end through the second current source;

[0060] The third end of the fifth transistor is grounded;

[0061] The first end of the power tube is connected with the power supply end;

[0062] The third end of the power tube serves as the output end of the low-dropout voltage regulator unit, and is connected with the first end of the first resistor and the third end of the fourteenth transistor respectively, and is grounded through the third current source;

[0063] The second end of the second resistor is grounded.

[0064] Optionally, when the load is empty, the second end voltage of the eleventh transistor is set to a preset value, so that the eleventh transistor is in sub-threshold conduction;

[0065] When the second end voltage of the power tube remains unchanged, the second end voltage of the eleventh transistor remains unchanged, and the third end voltage of the eleventh transistor is insufficient to turn on the tenth transistor, so that the eighth transistor, the ninth transistor and the tenth transistor are all in the off state;

[0066] The ninth transistor is in off state, the current flowing through the seventh transistor is 0, the sixth transistor replicates the current flowing through the seventh transistor and also is 0, no additional current flows into the error amplifier differential input stage;

[0067] The eighth transistor is in off state, and the current flowing through the twelfth transistor is equal to the current provided by the fourth current source, the thirteenth transistor has no current path;

[0068] The thirteenth transistor replicates the current flowing through the twelfth transistor, and the thirteenth transistor has no current path, the thirteenth transistor is in deep linear region, the third terminal voltage of the thirteenth transistor is close to the voltage provided by the power supply terminal, the second terminal voltage of the fourteenth transistor is close to the voltage provided by the power supply terminal, and the fourteenth transistor is off;

[0069] The inhibit voltage cell and the common bias cell are not working, only the twelfth transistor in the transient response unit and the fourth current source are working.

[0070] Optionally, when working with load and the load current gradually increases, the second terminal voltage of the power transistor gradually decreases, and the second terminal voltage of the eleventh transistor gradually decreases;

[0071] The second terminal voltage of the eleventh transistor gradually decreases, and the third terminal voltage of the eleventh transistor gradually increases;

[0072] The third terminal voltage of the eleventh transistor gradually increases, the eighth transistor, the ninth transistor and the tenth transistor are turned on, and the current flowing through the eighth transistor, the ninth transistor and the tenth transistor gradually increases;

[0073] The current flowing through the seventh transistor is the same as the current flowing through the ninth transistor, and the current flowing through the seventh transistor gradually increases;

[0074] The current flowing through the seventh transistor gradually increases, and the replication current of the sixth transistor replicating the current flowing through the seventh transistor gradually increases, which is injected into the tail current of the error amplifier differential input stage.

[0075] Optionally, when working with load and the load current gradually increases, the second terminal voltage of the power transistor gradually decreases, and the second terminal voltage of the eleventh transistor gradually decreases;

[0076] The second terminal voltage of the eleventh transistor gradually decreases, and the third terminal voltage of the eleventh transistor gradually increases;

[0077] The third terminal voltage of the eleventh transistor gradually increases, and the eighth transistor is turned on, and the current flowing through the eighth transistor gradually increases.

[0078] The current flowing through the eighth transistor gradually increases, and the current flowing through the thirteenth transistor in the deep linear region also gradually increases, and the third terminal voltage of the thirteenth transistor gradually decreases, so that the fourteenth transistor is turned on, and the thirteenth transistor enters the saturation region.

[0079] When the load current further increases, the second terminal voltage of the power transistor further decreases, and the current flowing through the eighth transistor further increases.

[0080] When the current flowing through the eighth transistor further increases until the current is greater than the maximum current copied by the thirteenth transistor, the eighth transistor enters the linear region, and the second terminal voltage of the fourteenth transistor further decreases, thereby providing the larger load current.

[0081] The second aspect of the embodiment of the application provides a low-dropout linear voltage regulator, which comprises the low-dropout linear voltage regulator circuit according to any one of the first aspect.

[0082] The third aspect of the embodiment of the application provides an electronic device, which comprises the low-dropout linear voltage regulator according to the second aspect.

[0083] The low-dropout linear voltage regulator circuit provided by the application comprises a low-dropout voltage stabilizing unit, a voltage ripple suppressing unit, a transient response unit and a shared biasing unit. One end of the voltage ripple suppressing unit is connected to an input stage of an error amplifier in the low-dropout voltage stabilizing unit, and the other end is connected to the transient response unit and the shared biasing unit respectively. The voltage ripple suppressing unit is used to obtain a target current and inject the target current into a tail current of the differential input stage of the error amplifier, and the target current is a current having the same change trend as a second load current generated by a power transistor.

[0084] One end of the transient response unit is connected to an output terminal of the low-dropout voltage stabilizing unit, and the other end is connected to the voltage ripple suppressing unit and the shared biasing unit respectively. The transient response unit is used to generate a first load current, and the first load current and the second load current together provide a load current for a load. The first load current is greater than the second load current.

[0085] One end of the shared biasing unit is connected to a second terminal of the power transistor in the low-dropout voltage stabilizing unit, and the other end is connected to the voltage ripple suppressing unit and the transient response unit respectively. The shared biasing unit is used to provide a biasing current for the voltage ripple suppressing unit and the transient response unit.

[0086] The low-dropout linear voltage stabilizing circuit has the creative points that the voltage ripple suppressing unit, the transient response unit and the shared bias unit are proposed on the basis of the traditional LDO circuit, the current with the same change trend as the second load current generated by the power tube is generated by the voltage ripple suppressing unit under the premise of not increasing the static power consumption, and the current is injected into the tail current of the differential input stage of the error amplifier, so that the main pole frequency of the error amplifier increases together with the output pole frequency of the low-dropout linear voltage stabilizing circuit, the bandwidth of the low-dropout linear voltage stabilizing circuit is expanded, the PSR falling frequency of the low-dropout linear voltage stabilizing circuit is pushed to a higher frequency, and the value of the PSR at high frequency is improved. The voltage ripple suppressing unit has fewer components and consumes little static current. Moreover, the tail current of the differential input stage of the error amplifier is increased, the error amplifier can process a larger input voltage range, and the error amplifier can cope with a larger fluctuation range of the feedback voltage provided by the feedback structure.

[0087] The transient response unit generates the first load current which is larger than the second load current, and the two together provide the load current for the load. Since the transient response unit can generate a larger load current, the size of the power tube driven by the error amplifier can be reduced under the premise of maintaining the large load driving capability of the low-dropout linear voltage stabilizing circuit. The size of the power tube is reduced, the natural parasitic capacitance is reduced, the transient response of the low-dropout linear voltage stabilizing circuit is enhanced, the transient response speed of the low-dropout linear voltage stabilizing circuit is improved, the overshoot voltage is reduced, the compensation requirement of the loop of the low-dropout linear voltage stabilizing circuit is reduced, and the response speed of the loop is improved.

[0088] In addition, since the fluctuation range of the voltage across the power tube (i.e. the gate-source voltage) is reduced, the minimum swing limit required for the output end of the error amplifier is reduced, and more selection space is left for the output stage design of the error amplifier. In summary, the low-dropout linear voltage stabilizing circuit has high practical value. BRIEF DESCRIPTION OF DRAWINGS

[0089] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments of the present application will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0090] Figure 1 is a modular schematic diagram of a low-dropout linear voltage stabilizing circuit according to an embodiment of the present application;

[0091] Figure 2 is a structural schematic diagram of a preferred low-dropout linear voltage stabilizing circuit according to an embodiment of the present application;

[0092] Figure 3 is the PSR curve diagram obtained by measuring the traditional LDO circuit and the circuit proposed in the embodiment of the application;

[0093] Figure 4 is the transient response curve diagram obtained by measuring the traditional LDO circuit and the circuit proposed in the embodiment of the application. DETAILED DESCRIPTION

[0094] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application will be further described in detail below with reference to the drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and only a part of the embodiments of the present application, but not all the embodiments, and are not used to limit the present application.

[0095] The inventors found that in the traditional LDO circuit, in order to solve the problem of PSR decline at high frequency, the circuit structure of the proposed PSR improvement technology is relatively complex, and many components are used, which leads to more static current consumption. This obviously does not meet the design and development trend of LDO circuit.

[0096] In addition, the inventors also found that in the traditional LDO circuit, in order to have fast transient response capability, it is usually required that the gate-source voltage of the power tube can be quickly adjusted when the load current is constantly changing, the conduction degree of the power tube is controlled, and then the size of the power tube output current is adjusted, so as to quickly restore the output voltage to a stable value. The faster this process is, the smaller the overshoot voltage and reverse overshoot voltage value will be.

[0097] In order to improve PSR and transient response, the circuit structure of the PSR improvement circuit and the slew rate enhancement circuit used is complex, which needs to consume a lot of static power consumption. This obviously does not meet the low-power development demand. In addition, in the LDO circuit, the circuit is required to have a large load capacity and a low voltage difference, and a large load capacity and a low voltage difference often require a large size (width-length ratio) power tube. Therefore, the power tube driven by the error amplifier is generally large in size, which represents a large parasitic capacitance, and also makes the compensation of the error amplifier difficult, increases the compensation demand, which reduces the working speed of the LDO circuit.

[0098] Based on the above problems, the inventors creatively proposed a low-dropout linear voltage stabilizing circuit, a low-dropout linear voltage stabilizer and an electronic device. The technical solutions proposed in the present application will be explained and described in detail below.

[0099] The low-dropout linear voltage stabilizing circuit in the embodiment of the present application, with reference to Figure 1The modular schematic diagram of the low dropout linear voltage regulator circuit shown, comprising: a low dropout voltage regulator unit, a voltage ripple suppression unit, a transient response unit and a common bias unit. One end of the voltage ripple suppression unit is connected with the error amplifier input stage in the low dropout voltage regulator unit, and the other end is connected with the transient response unit and the common bias unit respectively.

[0100] The voltage ripple suppression unit is used to obtain a target current, and inject the target current into the tail current of the error amplifier differential input stage. The target current is a current having the same change trend as the second load current generated by the power tube, that is, the voltage ripple suppression unit can obtain a current having the same change trend as the second load current generated by the power tube, and then inject the current into the tail current of the error amplifier differential input stage, so that the main pole frequency of the error amplifier increases together with the pole frequency of the LDO output (i.e. the output of the power tube), expands the bandwidth of the LDO, and pushes the PSR drop frequency of the LDO to a higher frequency, thereby improving the value of the PSR at high frequency. And because the tail current of the error amplifier differential input stage is increased, the error amplifier can also handle a larger input voltage range and can cope with a larger fluctuation range of the feedback voltage provided by the feedback structure.

[0101] One end of the transient response unit is connected with the output end of the low dropout voltage regulator unit, and the other end is connected with the voltage ripple suppression unit and the common bias unit respectively. The transient response unit is used to generate a first load current, which together with the second load current provides a load current for the load, and the first load current is greater than the second load current. That is, the transient response unit can generate a larger current relative to the power tube, so that the load current demand is met while the load current required to be provided by the power tube is reduced as much as possible, and the size (generally referring to the width-length ratio) of the power tube can be reduced. The size of the power tube is reduced, and the parasitic capacitance is naturally reduced, which enhances the transient response of the LDO, improves the transient response speed of the LDO, reduces the overshoot voltage, and reduces the compensation requirement of the LDO loop, and improves the response speed of the loop. In addition, because the load current required to be provided by the power tube is reduced, the fluctuation range of its gate-source voltage is also reduced, and the minimum swing limit required by the output end of the error amplifier is also reduced, leaving more selection space for the output stage design of the error amplifier.

[0102] One end of the shared bias unit is connected with the second end of the power tube in the low-dropout voltage stabilizing unit, and the other end is connected with the suppression voltage ripple unit and the transient response unit respectively. The shared bias unit is used to provide bias current for the suppression voltage ripple unit and the transient response unit. Meanwhile, the shared bias unit is set skillfully, so that the suppression voltage ripple unit, the transient response unit and the shared bias unit do not work when the low-dropout linear voltage stabilizing unit is in an idle state (i.e. the entire low-dropout linear voltage stabilizing circuit is not loaded), and only consume a very small static current.

[0103] In an embodiment of the present application, the suppression voltage ripple unit can have various implementation manners, which are not described one by one. One preferred structure of the suppression voltage ripple unit includes a current mirror structure. The first end of the input branch and the first end of the replication branch in the current mirror structure are connected with the power supply end; the third end of the replication branch is connected with the input stage of the error amplifier; the input branch is connected with the transient response unit and the shared bias unit through the second end of the first target tube. Herein, the first target tube is a transistor with the first end grounded.

[0104] The input branch is used to not work when idle, and when the load current gradually increases, the current flowing through the input branch has the same change trend as the second load current; the replication branch is used to not work when idle, and when the load current gradually increases, the current flowing through the replication branch has the same change trend as the second load current, so the current obtained by the replication branch also has the same change trend as the second load current, thereby obtaining the target current.

[0105] The current mirror structure described above can be composed of a variety of basic electronic components, one of the preferred compositions is that the current mirror structure is composed of transistors. Transistors refer to all single elements based on semiconductor materials, transistors have many functions such as detection, rectification, amplification, switching, voltage stabilization, signal modulation, etc., and transistors can be used for various digital and analog functions. It includes but is not limited to diodes, transistors, field effect tubes, thyristors (the latter three are three-terminal) made of various semiconductor materials. Due to its fast response speed and high accuracy, transistors can be used for various digital and analog functions. Transistors can be packaged independently or in a very small area, which can accommodate one hundred million or more transistors as part of an integrated circuit. The transistors mentioned in the present application are all three-terminal structures, that is, devices with three-terminal structures such as transistors, field effect tubes, and thyristors. The first end, the second end, and the third end of the transistor described in the embodiments of the present application correspond to the source, the gate, and the drain, respectively, if the transistor uses a field effect tube or a thyristor; if the transistor uses a transistor, the first end, the second end, and the third end correspond to the base, the emitter, and the collector, respectively. The above correspondence is obtained from the perspective of the current flow direction of the field effect tube and the transistor.

[0106] In a field effect tube, the gate is responsible for controlling the current between the source and the drain. Similarly, in a transistor, the base plays a role in controlling the current between the emitter and the collector. Therefore, from a functional point of view, the gate and the base of the transistor have similarities, both of which play a role in controlling the current. The source is the starting point of the current in the field effect tube, similar to the emitter of the transistor. The emitter in the transistor is the emission end of the current and is responsible for the output of the current. Although there are differences in physical structure and working principle, from the perspective of current flow, the source and the emitter play a role in the output of the current in their respective devices. The drain is the end of the current in the field effect tube, similar to the collector in the transistor. The collector in the transistor is responsible for collecting the current emitted from the emitter. Therefore, from the perspective of current flow, the drain and the collector play a role in the reception of the current in their respective devices. Based on this principle, other similar devices (including existing devices or similar functional devices that may be designed in the future) can be equivalent to the above-mentioned transistors as long as they have the same or similar current relationship.

[0107] Based on the above transistor, a preferred current mirror structure includes: a sixth transistor, a seventh transistor and a ninth transistor; the first end of the sixth transistor is connected with a power supply end, the second end is connected with the second end of the seventh transistor, and the third end is connected with an error amplifier input stage; the third end of the seventh transistor is respectively connected with the second end of the seventh transistor and the third end of the ninth transistor; the ninth transistor is used as a first target tube, the second end is respectively connected with a transient response unit and a shared bias unit, and the first end of the ninth transistor is grounded. The specific working principle is described below in combination with the accompanying Figure 2 It is explained that it is not described in detail.

[0108] In an embodiment of the present application, the transient response unit can have various implementation modes, which are not described one by one. One preferred transient response unit includes: a current limiting structure and a large current structure; the current limiting structure includes: a current providing branch and a controlled branch, the controlled branch replicates the current of the current providing branch, that is, the current limiting structure can also be regarded as a current mirror structure, but the specific structure is slightly different from the corresponding current mirror structure of the above-mentioned voltage ripple suppression unit.

[0109] The first end of the current providing branch, the controlled branch and the first end of the large current structure are connected with a power supply end; the third end of the current providing branch is grounded through a current source; the third end of the large current structure is connected with the output end of a low dropout regulator (also the output end of a power tube); the second end of the large current structure is connected with the controlled branch; the controlled branch is respectively connected with the second end of the first target tube and a shared bias unit through the second end of a second target tube. Among them, the second target tube is a transistor with the first end grounded in the controlled branch.

[0110] The current providing branch is used to provide a preset current (that is, the current provided by the current source connected therewith); the controlled branch is used to not work in an idle state, and gradually increase the current flowing therethrough when the load current gradually increases, so as to reduce the voltage at the second end of the large current structure; the large current structure is used to not work in an idle state, and provide a gradually increasing current when the load current gradually increases, so as to obtain a first load current. That is, the large current structure generates the first load current, which is larger than the second load current output by the power tube.

[0111] The above-mentioned current providing branch, controlled branch and large current structure can also be composed of various basic electronic components, wherein one preferred structure of the current providing branch includes: a twelfth transistor and a fourth current source; and one preferred structure of the controlled branch includes: an eighth transistor and a thirteenth transistor. The specific connection relationship is as follows:

[0112] The third end of the eighth transistor is respectively connected with the third end of the thirteenth transistor and the large current structure; the eighth transistor is used as a second target tube, the second end is respectively connected with the second end of the first target tube and a shared bias unit, and the first end of the eighth transistor is grounded.

[0113] The first end of the thirteenth transistor is connected with a power supply end, and the second end and the third end of the thirteenth transistor are respectively connected with the second end and the third end of the twelfth transistor; the first end of the twelfth transistor is connected with the power supply end, and the third end of the twelfth transistor is connected with the fourth current source.

[0114] One of the preferred large current structures comprises: a fourteenth transistor; the first end of the fourteenth transistor is connected with the power supply end, and the second end of the fourteenth transistor is connected with the third end of the thirteenth transistor and the third end of the eighth transistor; the third end of the fourteenth transistor is connected with the output end of the low dropout regulator unit, i.e. the output end of the power tube.

[0115] In one embodiment of the present application, the common bias unit comprises: a tenth transistor and an eleventh transistor; the second end of the tenth transistor is connected with the third end of the tenth transistor, the second end of the eighth transistor and the second end of the ninth transistor; the third end of the tenth transistor is connected with the third end of the eleventh transistor, and the first end of the tenth transistor is connected with the ground; the first end of the eleventh transistor is connected with the power supply end, and the second end of the eleventh transistor, i.e. the output end of the large current structure, is connected with the second end of the power tube, i.e. the output end of the power tube.

[0116] In one embodiment of the present application, for the low dropout regulator unit, a traditional LDO circuit can be used, or other circuit structures similar to the function of the traditional LDO circuit can be used instead. One of the preferred structures of the low dropout regulator unit comprises: an error amplifier, a power tube, a negative feedback structure, a first current source, a second current source and a third current source.

[0117] The input stage of the error amplifier is connected with the third end of the sixth transistor and connected with the power supply end through the first current source; the error amplifier is connected with the reference voltage end and the negative feedback structure; the output end of the error amplifier is connected with the second end of the power tube, and the output end of the error amplifier is connected with the power supply end through the second current source. In addition to the functions of the error amplifier in the traditional LDO circuit, in the circuit structure of the present application, the error amplifier is also used to receive the influx of the target current in the tail current of the input stage when the load current gradually increases, so that the total tail current gradually increases, and then the main pole frequency of the error amplifier increases together with the output pole frequency of the low dropout regulator unit; the frequency band of the entire circuit is expanded, so that the PSR of the entire circuit decreases more slowly at high frequencies, thereby improving the PSR at high frequencies. At the same time, the input voltage range of the error amplifier is also increased.

[0118] The first end of the power tube is connected with the power supply end; the third end of the power tube is respectively connected with the negative feedback structure and the third end of the fourteenth transistor, and is grounded through the third current source. The size of the power tube is smaller than the size of the fourteenth transistor, so that the power tube can realize the functions of the power tube in the traditional LDO circuit, and in the circuit structure, the voltage of the second end of the power tube is quickly adjusted by the error amplifier when the load current changes rapidly, so that the output voltage of the power tube is quickly stabilized, the transient response speed of the whole circuit is improved, and the overshoot voltage is reduced. At the same time, since the size of the power tube is small, the parasitic capacitance of the power tube is also small, so that the pole frequency of the output end of the error amplifier is increased, the compensation requirement of the whole circuit loop is reduced, and the response speed of the loop is improved.

[0119] In an embodiment of the present application, for the error amplifier, a preferred structure of the error amplifier comprises: a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor; the negative feedback structure comprises: a first resistor and a second resistor.

[0120] The first end of the first transistor and the first end of the second transistor are connected with the third end of the sixth transistor, and are connected with the power supply end through the first current source; the second end of the first transistor is respectively connected with the second end of the first resistor and the first end of the second resistor; the second end of the second transistor is connected with the reference voltage end; the third end of the first transistor is respectively connected with the third end and the second end of the third transistor and the second end of the fourth transistor; the third end of the second transistor is respectively connected with the third end of the fourth transistor and the second end of the fifth transistor, and is respectively connected with the first end of the first resistor and the third end of the power tube through a compensation capacitor.

[0121] The first end of the third transistor and the first end of the fourth transistor are grounded; the first end of the fifth transistor is respectively connected with the second end of the power tube and the second end of the eleventh transistor, and is connected with the power supply end through the second current source; the third end of the fifth transistor is grounded.

[0122] The first end of the power tube is connected with the power supply end; the third end of the power tube (that is, the output end of the power tube) is used as the output end of the low-dropout voltage regulator unit, and is respectively connected with the first end of the first resistor and the third end of the fourteenth transistor, and is grounded through the third current source; the second end of the second resistor is grounded.

[0123] In order to better understand the structure of the low-dropout voltage regulator unit, the voltage ripple suppression unit, the transient response unit and the shared bias unit, and the working principle of the whole voltage difference linear voltage regulator circuit, refer to the structure schematic diagram of a preferred low-dropout linear voltage regulator circuit shown in Figure 2 . Figure 2The above is shown by taking specific NMOS and PMOS tubes as examples. MOS tubes (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET is generally abbreviated as MOS, Chinese name: Metal-Oxide-Semiconductor Field-Effect Transistor, commonly known as Metal-Oxide-Semiconductor Field-Effect Transistor). MOS tubes are generally divided into PMOS tubes (P-channel type) and NMOS (N-channel type) tubes, which belong to insulated gate field effect tubes.

[0124] PMOS refers to n-type substrate, p-channel, and MOS tube relying on the flow of holes to transport current. P-channel silicon MOS tube has two P+ regions on N-type silicon substrate, respectively called source and drain, and the two poles are not connected. When a sufficient positive voltage is applied to the source (gate is grounded), the N-type silicon surface under the gate becomes a P-type inversion layer, which becomes a channel connecting the source and the drain. Changing the gate voltage can change the hole density in the channel, thereby changing the resistance of the channel. Such MOS tubes are called P-channel enhancement mode field effect transistors. If the N-type silicon substrate surface already has a P-type inversion layer channel without gate voltage, and a suitable bias is applied, the resistance of the channel can be increased or decreased. Such MOS field effect transistors are called P-channel depletion mode field effect transistors. Both are collectively referred to as PMOS tubes. The hole mobility of PMOS is low, so under the condition that the geometric size and absolute value of the working voltage of the MOS tube are equal, the transconductance of PMOS is smaller than that of NMOS. In addition, the absolute value of the threshold voltage of PMOS is generally high, requiring a higher working voltage. The size and polarity of the power supply voltage of PMOS are incompatible with bipolar transistor-transistor logic circuits. Because the circuit technology of PMOS is simple and cheap, most medium-scale and small-scale digital control circuits use PMOS circuit technology.

[0125] NMSO tube is made of a P-type silicon substrate with a lower doping concentration (providing a large number of movable holes), two N+ regions with a high doping concentration (N+ regions have a large number of electron sources for current flow), and two electrodes are led out by metal, respectively as drain D and source S. Then a very thin layer of silicon dioxide (SiO2) insulating layer is covered on the semiconductor surface, and a metal electrode (usually polysilicon) is added on the insulating layer between the drain and the source as the gate G. An electrode B is also led out on the substrate, which constitutes an N-channel enhancement mode MOS tube. The most important difference between NMOS and PMOS is that when the gate G is high, the NMOS is turned on, and when the gate G is low, the NMOS is turned off, and the PMOS is just the opposite.

[0126] Based on the above PMOS and NMOS, combined with Figure 2The gate (corresponding to the second terminal of the transistor), source (corresponding to the first terminal of the transistor), and drain (corresponding to the third terminal of the transistor) of the MOS transistor are used to explain the circuit structure and working principle:

[0127] Figure 2 The part in the middle black frame 10 is the circuit structure of the low dropout regulator unit, which can be regarded as a traditional LDO circuit; the black frame 20 is the circuit structure of the suppression voltage unit, the transient response unit, and the common bias unit.

[0128] For the error amplifier, it includes: a first transistor (PMOS) M1, a second transistor (PMOS) M2, a third transistor (NMOS) M3, a fourth transistor (NMOS) M4, and a fifth transistor (PMOS) M5. The negative feedback structure includes: a first resistor R1 and a second resistor R2.

[0129] The source of the first transistor M1 and the source of the second transistor M2 are connected to the drain of the sixth transistor M6, and the source of the first transistor M1 and the source of the second transistor M2 are connected to the power supply terminal AVDD through the first current source I1.

[0130] The gate of the first transistor M1 is connected to the second end of the first resistor R1 and the first end of the second resistor R2, respectively; the gate of the second transistor M2 is connected to the reference voltage terminal VREF; the drain and gate of the third transistor M3 and the gate of the fourth transistor M4 are connected to the drain of the first transistor M1, respectively; the drain of the fourth transistor M4 and the gate of the fifth transistor M5 are connected to the drain of the second transistor M2, respectively, and are also connected to the first end of the first resistor R1 and the drain of the power transistor MPOW through a compensation capacitor CM.

[0131] The source of the third transistor M3 and the source of the fourth transistor M4 are both connected to the ground GND; the source of the fifth transistor M5 is connected to the gate of the power transistor MPOW and the gate of the eleventh transistor M11, respectively, and is connected to the power supply terminal AVDD through the second current source I2; the drain of the fifth transistor M5 is connected to the ground GND.

[0132] The first end of the power transistor MPOW is connected to the power supply terminal AVDD; the drain of the power transistor MPOW (i.e. the output terminal of the power transistor MPOW) serves as the output terminal of the low dropout regulator unit, i.e. the output of the entire low dropout linear voltage regulator circuit, which is connected to the first end of the first resistor R1 and the drain of the fourteenth transistor M14, respectively, and is connected to the ground GND through the third current source I3; the second end of the second resistor R2 is connected to the ground GND. At the same time, Figure 2 In order to represent the load of the low dropout linear voltage regulator circuit, the load resistor RL and the load capacitor CL are used to represent the load it carries.

[0133] The source of the sixth transistor M6 is connected with the power supply terminal AVDD, the gate of the sixth transistor M6 is connected with the gate of the seventh transistor M7, and the drain of the sixth transistor M6 is connected with the input stage of the error amplifier (i.e. the source of the first transistor M1 and the second transistor M2); the drain of the seventh transistor M7 is connected with the gate of the seventh transistor M7 and the drain of the ninth transistor M9 respectively; the gate of the ninth transistor is connected with the gate of the eighth transistor M8 and the gate of the tenth transistor M10 respectively, and the first end of the ninth transistor M9 is grounded GND.

[0134] The drain of the eighth transistor M8 is connected with the drain of the thirteenth transistor M13 and the gate of the fourteenth transistor M14 respectively; the source of the eighth transistor is grounded GND. The source of the thirteenth transistor M13 is connected with the power supply terminal AVDD, the gate of the thirteenth transistor M13 is connected with the gate of the twelfth transistor M12 and the drain of the twelfth transistor M12 respectively; the source of the twelfth transistor M12 is connected with the power supply terminal AVDD, and the drain of the twelfth transistor M12 is grounded GND through the fourth current source I4. The source of the fourteenth transistor M14 is connected with the power supply terminal AVDD, and the drain of the fourteenth transistor M14 is connected with the drain of the power transistor MPOW.

[0135] The working principle is as follows: assuming that only the low dropout regulator unit is working with load and the rest of the units are not working, the first resistor R1 and the second resistor R2 detect the change of the output voltage VOUT, and then compare with the reference voltage VREF (VREF is usually provided by the previous circuit such as a bandgap reference) received by the gate of the second transistor M2, the gate voltage of the power transistor MPOW is adjusted through the error amplifier (the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5) to control the on current flowing through the power transistor MPOW, so as to adjust the output voltage VOUT. For example: when the load current suddenly increases, the current flowing through the power transistor MPOW does not change, which will inevitably cause the current flowing through the first resistor R1 and the second resistor R2 to decrease, resulting in the decrease of VOUT and the feedback voltage VFB (i.e. the gate voltage of the first transistor M1), the gate voltage of the fourth transistor M4 increases, the gate voltage of the fifth transistor M5 decreases, which causes the gate voltage of the power transistor MPOW to decrease, and the current flowing through the power transistor MPOW increases, so that the output voltage VOUT rises to keep the output voltage unchanged. When the load current decreases, the above feedback process changes reversely.

[0136] However, when the frequency is higher than the dominant pole frequency of the error amplifier, the gain will decrease with the increase of the frequency, so that the PSR of the low dropout voltage circuit will follow the decrease of the gain of the error amplifier. Meanwhile, when the load current is constantly changing, the gate-source voltage of the power transistor MPOW needs to be quickly adjusted to control the conduction degree of the power transistor MPOW, and then the size of the output current of the power transistor MPOW is adjusted to quickly restore the output voltage to a stable value. The faster the process is, the smaller the overshoot voltage and the reverse overshoot voltage caused will be. Since the circuit is required to have a large load capacity and a low dropout voltage, a large power transistor MPOW is often required, which has a large size (width-length ratio). Therefore, the power transistor MPOW driven by the error amplifier is generally large in size, which represents a large parasitic capacitance. As a result, the gate-source voltage of the power transistor cannot be quickly established, the transient response is slow, and the compensation of the error amplifier becomes difficult, which increases the compensation requirement and reduces the working speed of the LDO.

[0137] In the low dropout voltage circuit with the suppression voltage ripple unit, the transient response unit and the shared bias unit, when the load is empty, the gate voltage of the eleventh transistor M11 is set to a preset value, so that the eleventh transistor M11 is in sub-threshold conduction. Since the gate voltage of the power transistor MPOW remains unchanged, the gate voltage of the eleventh transistor M11 remains unchanged, and the drain voltage of the eleventh transistor M11 is insufficient to turn on the tenth transistor M10. Therefore, the eighth transistor M8, the ninth transistor M9 and the tenth transistor M10 are all in the off state.

[0138] Since the ninth transistor M9 is in the off state, the current flowing through the seventh transistor M7 is 0, and the current flowing through the sixth transistor M6, which replicates the current flowing through the seventh transistor M7, is also 0. Therefore, no additional current flows into the differential input stage of the error amplifier.

[0139] Since the eighth transistor M8 is in the off state and the current flowing through the twelfth transistor M12 is equal to the current provided by the fourth current source I4, even if the thirteenth transistor M13 replicates the current flowing through the twelfth transistor M12, it has no current path due to the off state of the eighth transistor M8.

[0140] Since the thirteenth transistor M13 replicates the current flowing through the twelfth transistor M12 but has no current path, the thirteenth transistor M13 is in the deep linear region, and the drain voltage of the thirteenth transistor M13 is close to the voltage provided by the power supply terminal AVDD. Therefore, the gate voltage of the fourteenth transistor M14 is close to the voltage provided by the power supply terminal AVDD, so that the fourteenth transistor M14 is cut off.

[0141] In this way, the suppression voltage ripple unit and the shared bias unit do not work, only the twelfth transistor M12 and the fourth current source I4 in the transient response unit work, and the static current consumption is very low.

[0142] When the low-dropout linear voltage regulator is working with load and the load current gradually increases from 0, the gate voltage of the power transistor MPOW starts to gradually decrease, and the gate voltage of the eleventh transistor M11 also starts to gradually decrease.

[0143] The eleventh transistor M11 enters the saturation region from the sub-threshold region, and its drain voltage starts to gradually increase. The drain voltage of the eleventh transistor M11 gradually increases, and the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 are turned on, and the current flowing through the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 starts to gradually increase.

[0144] Since the current flowing through the seventh transistor M7 is the same as the current flowing through the ninth transistor M9, the current flowing through the seventh transistor M7 gradually increases. The current flowing through the seventh transistor M7 gradually increases, and the sixth transistor M6 copies the current flowing through the seventh transistor M7, and the copied current starts to gradually increase from 0, which is injected into the tail current of the error amplifier differential input stage.

[0145] The above process shows that as the load current gradually increases, the tail current of the error amplifier differential input stage also gradually increases. Its advantages are that as the load current gradually increases, the main pole frequency of the error amplifier follows the increase of the output pole frequency of the entire circuit, expands the bandwidth of the entire circuit, and pushes the PSR drop frequency to a higher frequency, thereby improving the value of the PSR at high frequencies. The increase of the tail current of the error amplifier differential input stage also enables the error amplifier to handle larger input signals and cope with larger fluctuations in the feedback voltage VFB.

[0146] At the same time, when the low-dropout linear voltage regulator is working with load and the load current gradually increases from 0, as described above, the gate voltage of the power transistor MPOW gradually decreases, the gate voltage of the eleventh transistor M11 gradually decreases, the eighth transistor M8 is turned on, and the current flowing through the eighth transistor M8 gradually increases.

[0147] The current flowing through the eighth transistor M8 gradually increases, and the thirteenth transistor M13 in the deep linear region has a current path, and the current flowing through it also starts to gradually increase. The drain voltage of the thirteenth transistor M13 starts to gradually decrease, making the fourteenth transistor M14 conductive, and the thirteenth transistor M13 enters the saturation region from the deep linear region.

[0148] Since the size of the fourteenth transistor M14 is relatively large, it can be used to replace the power transistor MPOW to provide a larger load current, and the power transistor MPOW only needs to increase a small load current to meet the demand of the load current. When the load current is further increased, the gate voltage of the power transistor MPOW is further reduced, and the current flowing through the eighth transistor M8 is further increased.

[0149] When the current flowing through the eighth transistor M8 is further increased until the current is greater than the maximum current copied by the thirteenth transistor M13, the eighth transistor M8 enters the linear region, and the gate voltage of the fourteenth transistor M14 is further reduced to provide a larger load current. In this process, the gate voltage of the power transistor MPOW changes only in a small range, and the change of the current of the rest of the circuit is controlled through this small range, and then the gate voltage of the fourteenth transistor M14 changes in a large range, from the thirteenth transistor M13 entering the deep linear region when the gate voltage of the fourteenth transistor M14 is close to the power supply voltage AVDD to the eighth transistor M8 entering the linear region when the gate voltage of the fourteenth transistor M14 is close to the ground GND, and the fourteenth transistor M14 is driven to provide an output current changing from 0 to a large range to meet the demand of the load current.

[0150] The advantages of the above regulation are that the power transistor MPOW does not need to be large in size to provide a large current, so that the power transistor MPOW can be selected to be small in size, and the small size means that the power transistor MPOW has smaller parasitic capacitance. When the load current changes rapidly, the charging time required by the error amplifier for the gate capacitance of the power transistor MPOW is shorter, so that the regulation speed of the gate voltage of the power transistor MPOW is faster, and then the output voltage tends to be stable faster, and the amplitude of the overshoot voltage is reduced, and the transient response of the entire circuit is greatly improved. At the same time, since the power transistor MPOW reduces the parasitic capacitance, the pole frequency of the output end of the error amplifier is raised, the compensation requirement of the loop of the entire circuit is reduced, and the response speed of the loop is improved. The conventional slew rate enhancement circuit realizes the rapid charging and discharging of the gate voltage of the power transistor MPOW by additionally injecting a charging and discharging current to the gate of the power transistor MPOW when the load current changes, and does not change the large size of the power transistor MPOW. Therefore, the large size represents a large parasitic capacitance, which makes the compensation of the loop of the conventional LDO circuit difficult and increases the compensation requirement, which reduces the working speed of the conventional LDO. At the same time, the slew rate enhancement circuit usually consumes more static current.

[0151] When using the traditional LDO circuit, since the power tube MPOW needs to drive the load current ranging from zero to hundreds of milliamperes or even higher, the gate-source voltage of the power tube MPOW is required to have a large swing range. Generally, the power tube of the LDO is a PMOS, and the source thereof is generally connected to the power supply, so the gate of the power tube MPOW needs to have sufficient voltage swing. The gate of the power tube MPOW is connected to the output terminal of the error amplifier, and in order to meet the swing of the gate voltage of the power tube MPOW, the output voltage swing of the error amplifier is required to be greater than the swing of the gate voltage of the power tube MPOW. Otherwise, if the swing of the gate voltage of the power tube MPOW exceeds the output voltage swing of the error amplifier, the gain of the error amplifier will decrease, thereby affecting the output voltage precision of the traditional LDO. Due to this limitation, the design difficulty of the error amplifier is increased or the ability of the traditional LDO to drive a large load is limited. At this time, if the size of the power tube is increased to reduce the swing of the gate voltage of the power tube, increasing the size of the power tube will bring large parasitic capacitance. The increase of the circuit proposed in the present application solves this problem well. Since the power tube MPOW does not need to output a large load current, the gate voltage of the power tube MPOW does not need a large swing, thereby effectively eliminating or weakening the above-mentioned limitation.

[0152] In order to verify the effectiveness of the low-dropout linear voltage stabilizing circuit proposed in the present application, the traditional LDO circuit and the circuit proposed in the present application are measured, and the PSR curve as shown in Figure 3 is obtained, Figure 3 where the horizontal coordinate is the frequency freq, in hertz (Hz), and the vertical coordinate is the PSR value, in decibel (dB). The black solid line is the PSR curve of the traditional LDO circuit, and the black dashed line is the PSR curve of the circuit proposed in the present application. It can be seen that the PSR of the circuit proposed in the present application is obviously improved in the medium and high frequency bands.

[0153] The transient response curve as shown in Figure 4 is obtained, Figure 4 where the horizontal coordinate is the time time, in microseconds (μs), and the vertical coordinate is the overshoot voltage value v, in volts (V). The upper part is the overshoot voltage value curve of the traditional LDO circuit, and the lower part is the overshoot voltage value curve of the circuit proposed in the present application. It can be seen that the amplitude of the overshoot voltage value of the circuit proposed in the present application is obviously reduced.

[0154] It should be noted that the structure of the low-dropout linear voltage stabilizing circuit described above can be applied to various traditional LDO circuits by appropriate modification and adjustment, including but not limited to transistor type replacement, such as simple replacement of NMOS tubes and PMOS tubes, replacement of MOS tubes with transistors, and the like. Circuit structures that can be realized by simple reasoning or replacement on the basis of the technical solutions described above are within the protection scope of the present application.

[0155] Based on the low dropout linear voltage regulator circuit, the embodiment of the present application further provides a low dropout linear voltage regulator, which comprises the low dropout linear voltage regulator circuit as any of the above.

[0156] Based on the low dropout linear voltage regulator, the embodiment of the present application further provides an electronic device, which comprises the low dropout linear voltage regulator as above.

[0157] In summary, the low dropout linear voltage regulator circuit has the following advantages: the inventive low dropout linear voltage regulator circuit is based on the traditional LDO circuit and comprises a voltage ripple suppression unit, a transient response unit and a shared bias unit. Without increasing the static power consumption, the voltage ripple suppression unit generates a current with the same variation trend as the second load current generated by the power transistor, and the current is injected into the tail current of the differential input stage of the error amplifier. Thus, the main pole frequency of the error amplifier increases together with the output pole frequency of the low dropout linear voltage regulator circuit, the bandwidth of the low dropout linear voltage regulator circuit is expanded, and the PSR drop frequency of the low dropout linear voltage regulator circuit is pushed to a higher frequency, so as to improve the value of the PSR at high frequency. The voltage ripple suppression unit has fewer components and consumes less static current. Moreover, the increase of the tail current of the differential input stage of the error amplifier enables the error amplifier to process a larger input voltage range and cope with a larger fluctuation range of the feedback voltage provided by the feedback structure.

[0158] The transient response unit generates the first load current, which is larger than the second load current, and the two currents together provide the load current. Since the transient response unit can generate a larger load current, the size of the power transistor driven by the error amplifier can be reduced while maintaining the large load driving capability of the low dropout linear voltage regulator circuit. The reduction of the size of the power transistor naturally reduces the parasitic capacitance, enhances the transient response of the low dropout linear voltage regulator circuit, improves the transient response speed of the low dropout linear voltage regulator circuit, reduces the overshoot voltage, and reduces the compensation requirement of the loop of the low dropout linear voltage regulator circuit, thereby improving the response speed of the loop.

[0159] In addition, since the fluctuation range of the voltage across the power transistor (i.e. the gate-source voltage) is reduced, the minimum swing limit required by the output terminal of the error amplifier is also reduced, thereby leaving more selection space for the design of the output stage of the error amplifier. In summary, the low dropout linear voltage regulator circuit has high practical value.

[0160] Although the preferred embodiments of the embodiments of the present application have been described, those skilled in the art can make other changes and modifications to the embodiments once they know the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the embodiments of the present application.

[0161] It is to be noted that, in the present document, relational terms such as first and second and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0162] The embodiments of the present application described above are merely intended to illustrate the present application, but not to limit the present application. The above-described embodiments are merely illustrative, but not restrictive, and those skilled in the art can make many modifications under the guidance of the present application without departing from the spirit and scope of the present application, which are defined by the appended claims.

Claims

1. A low dropout linear voltage regulator circuit, characterized by comprising: The low dropout linear voltage stabilizing circuit comprises a low dropout voltage stabilizing unit, a voltage ripple suppressing unit, a transient response unit and a shared biasing unit; One end of the voltage ripple suppressing unit is connected with the input stage of the error amplifier in the low dropout voltage stabilizing unit, and the other end is connected with the transient response unit and the shared biasing unit respectively; One end of the transient response unit is connected with the output end of the low dropout voltage stabilizing unit, and the other end is connected with the voltage ripple suppressing unit and the shared biasing unit respectively; One end of the shared biasing unit is connected with the second end of the power tube in the low dropout voltage stabilizing unit, and the other end is connected with the voltage ripple suppressing unit and the transient response unit respectively; The voltage ripple suppressing unit is used to obtain a target current and inject the target current into the tail current of the differential input stage of the error amplifier, and the target current is a current having the same change trend as the second load current generated by the power tube; The transient response unit is used to generate a first load current, which, together with the second load current, provides load current for the load, and the first load current is greater than the second load current; The shared biasing unit is used to provide biasing current for the voltage ripple suppressing unit and the transient response unit.

2. The low dropout linear regulator circuit of claim 1, wherein, The voltage ripple suppressing unit comprises a current mirror structure; The first end of the input branch and the first end of the replication branch of the current mirror structure are connected with the power supply end; The third end of the replication branch is connected with the input stage of the error amplifier; The input branch is connected with the transient response unit and the shared biasing unit through the second end of the first target tube, and the first target tube is a transistor with the first end grounded in the input branch; The input branch is used to not work in the idle state, and when the load current gradually increases, the current flowing through the input branch has the same change trend as the second load current; The replication branch is used to not work in the idle state, and when the load current gradually increases, the replication branch replicates the current flowing through the input branch to obtain the target current.

3. The low dropout linear regulator of claim 2, wherein, The current mirror structure comprises a sixth transistor, a seventh transistor and a ninth transistor; The first end of the sixth transistor is connected with the power supply end, the second end is connected with the second end of the seventh transistor, and the third end is connected with the input stage of the error amplifier; The third end of the seventh transistor is connected with the second end of the seventh transistor and the third end of the ninth transistor respectively; The ninth transistor serves as the first target tube, the second end of the ninth transistor is connected with the transient response unit and the shared biasing unit respectively, and the first end is grounded.

4. The low dropout linear regulator of claim 3, wherein, The transient response unit comprises a current limiting structure and a large current structure; the current limiting structure comprises a current providing branch and a controlled branch, and the controlled branch replicates the current of the current providing branch; The current providing branch, the controlled branch and the first end of the large current structure are all connected with the power supply end; The third end of the current providing branch is grounded through a current source; The third end of the large current structure is connected with the output end of the low dropout voltage stabilizing unit; The second end of the large current structure is connected with the controlled branch. The controlled branch is connected with the second end of the first target tube and the common bias unit through the second end of the second target tube, and the second target tube is a transistor with the first end grounded in the controlled branch; The current providing branch is configured to provide a preset current; The controlled branch is configured to be inoperative when the load current is zero, and gradually increase the current flowing therethrough when the load current gradually increases, so as to reduce the second end voltage of the large current structure; The large current structure is configured to be inoperative when the load current is zero, and provide a gradually increasing current when the load current gradually increases, so as to obtain the first load current.

5. The low dropout linear regulator of claim 4, wherein, The current providing branch comprises a twelfth transistor and a fourth current source, and the controlled branch comprises an eighth transistor and a thirteenth transistor; The third end of the eighth transistor is connected with the third end of the thirteenth transistor and the large current structure; The eighth transistor is the second target tube, and the second end of the eighth transistor is connected with the second end of the first target tube and the common bias unit; The first end of the thirteenth transistor is connected with the power supply end, and the second end of the thirteenth transistor is connected with the second end and the third end of the twelfth transistor respectively; The first end of the twelfth transistor is connected with the power supply end, and the third end of the twelfth transistor is grounded through the fourth current source.

6. The low dropout linear regulator of claim 5, wherein, The large current structure comprises a fourteenth transistor; The first end of the fourteenth transistor is connected with the power supply end, and the second end of the fourteenth transistor is connected with the third end of the thirteenth transistor and the third end of the eighth transistor respectively; The third end of the fourteenth transistor is connected with the output end of the low dropout regulator.

7. The low dropout linear regulator of claim 6, wherein, The common bias unit comprises a tenth transistor and an eleventh transistor; The second end of the tenth transistor is connected with the third end of the tenth transistor, the second end of the eighth transistor and the second end of the ninth transistor respectively; The third end of the tenth transistor is connected with the third end of the eleventh transistor, and the first end of the tenth transistor is grounded; The first end of the eleventh transistor is connected with the power supply end, and the second end of the eleventh transistor is connected with the second end of the power tube.

8. The low dropout linear regulator of claim 7, wherein, The low dropout regulator comprises the error amplifier, the power tube, a negative feedback structure, a first current source, a second current source and a third current source; The input stage of the error amplifier is connected with the third end of the sixth transistor, and the error amplifier is connected with the power supply end through the first current source; The error amplifier is connected with a reference voltage end and the negative feedback structure respectively; The output end of the error amplifier is connected with the second end of the power tube, and the error amplifier is connected with the power supply end through the second current source; The first end of the power tube is connected with the power supply end; The third end of the power tube is connected with the negative feedback structure and the third end of the fourteenth transistor respectively, and the third end of the power tube is grounded through the third current source; The error amplifier is configured to receive the target current in the tail current of the input stage of the error amplifier when the load current gradually increases, so that the total tail current gradually increases, and then the main pole frequency of the error amplifier increases together with the output pole frequency of the low dropout regulator. The size of the power tube is smaller than the size of the fourteenth transistor, and the power tube is used to adjust the voltage of the second end of the power tube quickly by the error amplifier when the load current changes quickly, so as to stabilize the output voltage of the power tube quickly.

9. The low dropout linear regulator of claim 8, wherein, The error amplifier comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, and the negative feedback structure comprises a first resistor and a second resistor. The first end of the first transistor and the first end of the second transistor are connected with the third end of the sixth transistor, and are connected with the power supply end through the first current source. The second end of the first transistor is connected with the second end of the first resistor and the first end of the second resistor respectively. The second end of the second transistor is connected with the reference voltage end. The third end of the first transistor is connected with the third end and the second end of the third transistor and the second end of the fourth transistor respectively. The third end of the second transistor is connected with the third end of the fourth transistor and the second end of the fifth transistor respectively, and is connected with the first end of the first resistor and the third end of the power tube through a compensation capacitor respectively. The first end of the third transistor and the first end of the fourth transistor are grounded. The first end of the fifth transistor is connected with the second end of the power tube and the second end of the eleventh transistor respectively, and is connected with the power supply end through the second current source. The third end of the fifth transistor is grounded. The first end of the power tube is connected with the power supply end. The third end of the power tube is used as the output end of the low dropout regulator, and is connected with the first end of the first resistor and the third end of the fourteenth transistor respectively, and is grounded through the third current source. The second end of the second resistor is grounded.

10. The low dropout linear regulator of claim 9, wherein, When the load is empty, the second end of the eleventh transistor is set to a preset value, so that the eleventh transistor is in a sub-threshold conduction state. When the second end voltage of the power tube remains unchanged, the second end voltage of the eleventh transistor remains unchanged, and the third end voltage of the eleventh transistor is insufficient to turn on the tenth transistor, so that the eighth transistor, the ninth transistor and the tenth transistor are all in an off state. When the ninth transistor is in an off state, the current flowing through the seventh transistor is 0, the current flowing through the sixth transistor is also 0, and no additional current flows into the differential input stage of the error amplifier. When the eighth transistor is in an off state, and the current flowing through the twelfth transistor is equal to the current provided by the fourth current source, the thirteenth transistor has no current path. The thirteenth transistor replicates the current flowing through the twelfth transistor, and the thirteenth transistor has no current path, so that the thirteenth transistor is in a deep linear region, the third end voltage of the thirteenth transistor is close to the voltage provided by the power supply end, the second end voltage of the fourteenth transistor is close to the voltage provided by the power supply end, and the fourteenth transistor is cut off. The voltage ripple inhibiting unit and the common bias unit are not working, only the twelfth transistor and the fourth current source in the transient response unit are working.

11. The low dropout linear regulator of claim 9, wherein, When the load current gradually increases, the second end voltage of the power tube gradually decreases, and the second end voltage of the eleventh transistor gradually decreases. The second end voltage of the eleventh transistor gradually decreases, and the third end voltage of the eleventh transistor gradually increases. The third end voltage of the eleventh transistor gradually increases, and the eighth transistor, the ninth transistor and the tenth transistor are turned on, and the current flowing through the eighth transistor, the ninth transistor and the tenth transistor gradually increases. The current flowing through the seventh transistor is the same as the current flowing through the ninth transistor, and the current flowing through the seventh transistor gradually increases. The current flowing through the seventh transistor gradually increases, and the current flowing through the sixth transistor gradually increases, which is injected into the tail current of the error amplifier differential input stage.

12. The low dropout linear regulator of claim 9, wherein, When the load current gradually increases, the second end voltage of the power tube gradually decreases, and the second end voltage of the eleventh transistor gradually decreases. The second end voltage of the eleventh transistor gradually decreases, and the third end voltage of the eleventh transistor gradually increases. The third end voltage of the eleventh transistor gradually increases, and the eighth transistor is turned on, and the current flowing through the eighth transistor gradually increases. The current flowing through the eighth transistor gradually increases, and the current flowing through the thirteenth transistor in the deep linear region also gradually increases, and the third end voltage of the thirteenth transistor gradually decreases, so that the fourteenth transistor is turned on, and the thirteenth transistor enters the saturation region. When the load current further increases, the second end voltage of the power tube further decreases, and the current flowing through the eighth transistor further increases. When the current flowing through the eighth transistor further increases until the current is greater than the maximum current copied by the thirteenth transistor, the eighth transistor enters the linear region, and the second end voltage of the fourteenth transistor further decreases, thereby providing a first load current greater than a second load current.

13. A low-dropout linear voltage regulator, comprising: The low dropout linear voltage regulator comprises the low dropout linear voltage regulator circuit according to any one of claims 1-12.

14. An electronic device, comprising: The electronic device comprises the low dropout linear voltage regulator according to claim 13.

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