Multi-modular redundancy system based on RISC-V architecture and control method

Abstract

The invention discloses a multi-modular redundancy system based on an RISC-V framework and a control method. The system comprises at least four RISC-V processor modules used for executing calculation tasks and data processing; the data communication and synchronization module is used for performing data communication and synchronization management in the RISC-V multi-core processing module; the fault monitoring and automatic recovery module is used for monitoring the running state of the RISC-V multi-core processing module and triggering a recovery mechanism when a fault occurs; the shared resource management and distribution module is used for managing and dynamically distributing memory, storage and I / O equipment; and the system configuration and state monitoring module is used for system initialization configuration, state monitoring and remote management. The system has the technical advantages of high performance, high reliability, low cost and easiness in expansion, and can meet the urgent requirements of a modern embedded system on high performance, high reliability and flexibility.

Description

Technical Field

[0001] The present invention relates to the field of embedded systems, and more specifically to a multi-mode redundant system and a control method based on a RISC-V architecture. Background Art

[0002] In recent years, with the development of emerging technologies such as the Internet of Things, edge computing, and artificial intelligence, the complexity and functional requirements of embedded systems have continued to increase. Especially in mission-critical environments such as aerospace, medical monitoring, and autonomous driving, the system not only needs to handle complex computing tasks, but also needs to have high availability and fault tolerance to ensure stable operation even under extreme conditions.

[0003] Traditional embedded systems mostly use a single processor or dual-mode redundant architecture to achieve basic task processing and reliability assurance. However, with the growth of computing needs and the diversification of application scenarios, this traditional architecture has gradually exposed its limitations. For example, when building a high-availability system, the traditional three-mode redundant architecture improves the system's fault tolerance by working in parallel with multiple processors, but introduces an arbitrator to coordinate the work between the processors. The use of the arbitrator not only increases the complexity and cost of the system, but also brings additional software complexity and maintenance difficulties. In addition, the presence of the arbitrator may cause the system to respond more slowly, especially under high load conditions, affecting the overall performance and energy efficiency. This makes it difficult for traditional redundant architectures to meet the pursuit of low power consumption and low cost in modern embedded systems.

[0004] Redundancy design in existing technologies is often based on fixed redundancy strategies, lacking flexibility and adaptability. For different application scenarios, especially those that require dynamic adjustment of resource allocation and task scheduling, traditional redundant architectures are unable to cope with them. When faced with complex computing tasks, the overall performance of the system may be affected due to the limitations of the redundancy mechanism itself, and it cannot fully meet the dual requirements of modern embedded systems for high performance and high reliability.

[0005] Therefore, how to design a multi-mode redundant system based on the RISC-V architecture that can not only eliminate the complexity and cost increase brought by the traditional arbitrator, but also flexibly respond to diverse application scenarios while ensuring the high reliability and high efficiency of the system is an urgent problem that technical personnel in this field need to solve. Summary of the invention

[0006] In view of this, the present invention provides a multi-mode redundant system based on the RISC-V architecture. By adopting at least 4 RISC-V processors and omitting the arbitrator, a new multi-mode redundant architecture is constructed, thereby providing a more efficient, economical and flexible technical path for the design of embedded systems.

[0007] In order to achieve the above object, the present invention adopts the following technical solution:

[0008] In a first aspect, the present invention provides a multi-mode redundant system based on a RISC-V architecture, comprising the following steps:

[0009] At least 4 RISC-V processor modules: used to perform computing tasks and data processing;

[0010] Data communication and synchronization module: used for data communication and synchronization management within the RISC-V multi-core processing module;

[0011] Fault monitoring and automatic recovery module: used to monitor the operating status of the RISC-V multi-core processing module and trigger the recovery mechanism when a fault occurs;

[0012] Shared resource management and allocation module: used to manage and dynamically allocate memory, storage, and I / O devices;

[0013] System configuration and status monitoring module: used for system initialization configuration, status monitoring and remote management.

[0014] Preferably, each RISC-V processor module comprises:

[0015] Instruction execution unit: used to execute instruction sets, integer operations, multiplication and division, floating-point operations, and atomic operations;

[0016] Cache management unit: includes L1 instruction cache, L1 data cache and L2 cache, and uses MESI protocol to manage cache status;

[0017] High-speed interface circuit unit: Efficient communication and data exchange through PCIe or AXI high-speed serial interface.

[0018] Preferably, the data communication and synchronization module comprises:

[0019] Message passing unit, used for communication and data exchange between different RISC-V processor modules;

[0020] Lock-free data structure unit, used to store and access shared data to avoid access conflicts between different RISC-V processor modules;

[0021] Synchronization control unit: used to maintain the synchronization state of different RISC-V processor modules to ensure the consistency of data flow.

[0022] Preferably, the fault monitoring and automatic recovery module includes:

[0023] Health monitoring unit: used to receive health status reports of different RISC-V processor modules within a preset time period;

[0024] Fault location unit: used to determine the corresponding faulty module through health status report;

[0025] Task migration unit: used to migrate tasks on the faulty module to other RISC-V processor modules;

[0026] Fault recovery unit: used to restart the faulty module, update the firmware or perform hardware self-test operations.

[0027] Preferably, the shared resource management and allocation module includes:

[0028] Resource sharing unit: used to manage and coordinate concurrent access to shared resources by different RISC-V processor modules;

[0029] Dynamic allocation unit: used to adjust resource allocation strategies based on load and performance requirements;

[0030] Consistency maintenance unit: used to ensure the consistency of system status in different RISC-V processor modules through distributed coordination services.

[0031] Preferably, the system configuration and status monitoring module includes:

[0032] Initialization configuration unit: responsible for configuration settings when the system starts;

[0033] Real-time monitoring unit: used to monitor the system operation status and record log information;

[0034] Remote Management Unit: Used to allow users to remotely configure, monitor and manage the system.

[0035] In a second aspect, the present invention provides a control method, which is applied to the above-mentioned multi-mode redundant system based on RISC-V architecture, comprising the following steps:

[0036] System initialization and configuration: Complete system initialization settings through the system configuration and status monitoring module to ensure that all modules in the system are correctly configured;

[0037] Task allocation and execution: Based on the current load and performance requirements, computing tasks are allocated to different RISC-V processor modules for data processing and instruction execution;

[0038] Synchronization and communication management: Use data communication and synchronization modules to ensure data flow consistency and access synchronization of different RISC-V processor modules;

[0039] Fault monitoring and automatic recovery: Continuously monitor the health status of the system. If a fault is detected, the automatic recovery mechanism is triggered, including task migration and restarting or repairing the faulty module.

[0040] Dynamic resource management: Dynamically manage and allocate shared resources according to real-time performance requirements to ensure optimal resource use;

[0041] Status monitoring and remote management: Real-time recording of system operation status and provision of log information, allowing users to remotely configure and monitor, and respond promptly to changing requirements and potential problems.

[0042] It can be seen from the above technical solution that compared with the prior art, the technical solution of the present invention has the following advantages:

[0043] Beneficial effects:

[0044] 1. This multi-mode redundant system based on the RISC-V architecture integrates at least four RISC-V processor modules and combines fault monitoring and automatic recovery modules to significantly enhance the reliability and fault tolerance of the system. Each processor module can not only independently perform computing tasks and data processing, but also quickly take over the tasks of other modules when they fail, ensuring the continuous operation of the system. The fault monitoring and automatic recovery mechanism monitors the health status of each processor in real time, and can immediately trigger the recovery process when a fault is detected, including task migration, restart or firmware update operations, so that the system can maintain high performance and stability even when some components fail, which is particularly suitable for mission-critical environments with extremely high reliability requirements.

[0045] 2. The shared resource management and allocation module and the data communication and synchronization module in the system work together to achieve efficient management and optimal utilization of resources, while supporting powerful parallel processing performance. The resource sharing unit coordinates the concurrent access of different RISC-V processor modules to memory, storage and I / O devices, and the dynamic allocation unit adjusts the resource allocation strategy according to the real-time load to ensure the optimization of resource utilization. In addition, the lock-free data structure unit and the synchronization control unit ensure the consistency of data flow and access synchronization, avoid conflicts between different processors, and improve the overall data processing efficiency. Its efficient resource management and parallel processing capabilities enable the system to maintain excellent performance in complex computing tasks and meet the strict requirements for speed and response time in modern computing environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0047] Figure 1A structural framework diagram of a multi-mode redundant system based on the RISC-V architecture provided in an embodiment of the present invention;

[0048] Figure 2 A flow chart of a control method for a multi-mode redundant system based on a RISC-V architecture provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0050] Embodiment 1;

[0051] like Figure 1 As shown, this embodiment provides a multi-mode redundant system based on RISC-V architecture, including:

[0052] At least 4 RISC-V processor modules: used to perform computing tasks and data processing;

[0053] Data communication and synchronization module: used for data communication and synchronization management within the RISC-V multi-core processing module;

[0054] Fault monitoring and automatic recovery module: used to monitor the operating status of the RISC-V multi-core processing module and trigger the recovery mechanism when a fault occurs;

[0055] Shared resource management and allocation module: used to manage and dynamically allocate memory, storage, and I / O devices;

[0056] System configuration and status monitoring module: used for system initialization configuration, status monitoring and remote management.

[0057] This multi-mode redundant system based on the RISC-V architecture integrates at least four RISC-V processor modules, combined with efficient data communication and synchronization, fault monitoring and automatic recovery, and dynamic resource management mechanisms, which significantly improves the reliability and performance of the system. Its innovative design eliminates the traditional arbitrator, simplifies the system structure and reduces costs, while enhancing the flexibility and adaptability of the system. Efficient fault detection and automatic recovery mechanisms ensure that the system can quickly resume normal operation even if some components fail, while flexible resource allocation strategies optimize resource utilization and meet the strict requirements of modern embedded systems for high availability and real-time response.

[0058] The following is a further detailed description of each module in the above system:

[0059] In this embodiment, each RISC-V processor module includes:

[0060] Instruction execution unit: used to execute instruction sets, integer operations, multiplication and division, floating-point operations, and atomic operations; the instruction execution unit is the core of each RISC-V processor module, responsible for executing a 64-bit instruction set, covering integer operations, multiplication and division, floating-point operations, and atomic operations. It uses an optimized five-stage pipeline design and an efficient branch prediction algorithm to ensure high throughput and fast instruction processing. Single-cycle integer operations, two-cycle multiplication operations, and four-cycle division operations, as well as support for single-precision and double-precision floating-point operations of the IEEE754 standard, enable the unit to provide excellent performance in complex computing tasks.

[0061] Cache management unit: Contains L1 instruction cache, L1 data cache and L2 cache, and uses MESI protocol to manage cache status; the cache management unit contains a multi-level cache system, including 32KB L1 instruction cache and 32KB L1 data cache, both using 8-way set associative structure and 64-byte line size; L2 cache capacity is between 512KB and 2MB, using 16-way set associative structure. This unit uses MESI protocol to manage cache status to ensure data consistency and access efficiency between multiple processor modules. High-speed SRAM is used for L1 cache, providing low latency characteristics, while larger capacity DRAM is used for L2 cache, balancing access speed and storage capacity, suitable for large-scale data access needs.

[0062] High-speed interface circuit unit: Efficient communication and data exchange through PCIe or AXI high-speed serial interface. PCIe Gen4 high-speed serial interface can be used to support data transfer rates up to 16GT / s, and can be configured as x1, x4, x8 and x16 channels, suitable for high-performance computing and large data transmission scenarios. AXI4 interface can be used to support 64-bit address width and 512-bit data width, with burst transmission mode to improve data transmission efficiency. These interface designs focus on low latency and high bandwidth to ensure seamless connection and efficient communication between modules, while using differential signal transmission and error detection mechanisms to ensure the integrity and stability of data transmission.

[0063] The three units in each RISC-V processor module work together to form a high-performance, low-power and highly reliable multi-mode redundant system that can meet the stringent requirements of modern embedded systems for high availability and real-time response.

[0064] In this embodiment, the data communication and synchronization module includes:

[0065] The message passing unit is used for communication and data exchange between different RISC-V processor modules. It implements synchronous and asynchronous communication between modules through an efficient message passing protocol to ensure reliable data transmission. Specifically, the unit supports multiple message formats and transmission modes, such as point-to-point communication, broadcast, and multicast, to adapt to different application scenarios. The message passing unit also integrates a flow control mechanism to prevent network congestion, and provides error detection and retransmission functions to ensure the integrity of data transmission.

[0066] The lock-free data structure unit is used to store and access shared data to avoid access conflicts between different RISC-V processor modules. This unit uses a lock-free algorithm to achieve the security of concurrent access, ensuring that multiple processors can read and write shared resources at the same time without conflicts. This not only improves the system's response speed, but also reduces the performance bottleneck caused by lock contention.

[0067] Synchronous control unit: used to maintain the synchronization status of different RISC-V processor modules and ensure the consistency of data flow. It monitors the status of each module and coordinates work through synchronization mechanisms such as timestamps and heartbeat signals. When a module is detected to be lagging behind, the data synchronization process can be automatically triggered to ensure that all modules maintain the latest data status. In addition, the unit also supports fault-tolerant mechanisms, which can maintain the normal operation of the system even when some modules fail.

[0068] This module significantly improves the communication efficiency, concurrent processing capability and data consistency of the multi-mode redundant system by integrating an efficient message passing unit, a lock-free data structure unit and a synchronization control unit.

[0069] In this embodiment, the fault monitoring and automatic recovery module includes:

[0070] Health monitoring unit: used to receive health status reports of different RISC-V processor modules within a preset time period; this unit regularly collects key performance indicators from each processor module and performs real-time analysis. It can receive up to thousands of status reports per second with a latency as low as 10 milliseconds, ensuring that any abnormal situation is captured in a timely manner.

[0071] Fault location unit: used to identify the corresponding faulty module through health status reports; once an abnormality or fault sign is detected, the fault location unit immediately starts a detailed fault diagnosis procedure. By comparing the status differences, log records and hardware diagnostic information between modules, the faulty module can be quickly and accurately located. Task migration unit: used to migrate tasks on the faulty module to other RISC-V processor modules; when the faulty module is confirmed, the task migration unit will trigger a switching command to completely migrate the task to the backup module. It ensures the integrity and continuity of task migration through pre-established task backup and status synchronization mechanisms, reducing the risk of data loss and service interruption.

[0072] Fault recovery unit: used to restart the faulty module, update the firmware, or perform hardware self-check operations. When the faulty module is isolated, the fault recovery unit attempts a series of recovery operations, including restarting the module, updating the firmware, or performing hardware self-checks. If the recovery fails, the module is marked as unavailable and removed from the system. At the same time, the task allocation of the remaining modules is dynamically adjusted according to the current load and performance requirements to maintain high availability and performance of the system.

[0073] This module realizes comprehensive protection and efficient management of the RISC-V multi-mode redundant system, significantly enhances the stability and fault tolerance of the system, and ensures reliable operation and service quality in complex computing environments.

[0074] In this embodiment, the shared resource management and allocation module includes:

[0075] Resource Sharing Unit: It is used to manage and coordinate the concurrent access of different RISC-V processor modules to shared resources. It ensures that multiple processors can safely access shared resources without conflicts through fine-grained locking mechanisms or lock-free algorithms. The resource sharing unit can support millions of concurrent access requests per second, with response times as low as microseconds. In addition, the unit also supports priority scheduling to ensure that high-priority tasks can get the required resources first.

[0076] Dynamic allocation unit: used to adjust resource allocation strategies according to load and performance requirements; when the load of a processor module suddenly increases, the dynamic allocation unit can reallocate additional memory resources within a few milliseconds to ensure smooth execution of tasks. This flexibility not only improves the system's response speed, but also ensures stable operation under high load conditions.

[0077] Consistency maintenance unit: used to ensure the consistency of system status in different RISC-V processor modules through distributed coordination services. When a module is detected to be lagging behind, the consistency maintenance unit can trigger the data synchronization process within 100 milliseconds to ensure that all modules maintain the latest data status.

[0078] This module ensures efficient and fair access to shared resources by different RISC-V processor modules, dynamically adapts to the system's load and performance requirements, and maintains the consistency of the system state. By adopting advanced concurrency control algorithms, dynamic resource allocation strategies, and distributed coordination services, the shared resource management and allocation module improves the overall performance, scalability, and reliability of the system, and provides powerful resource sharing and management support for multi-mode redundant systems based on the RISC-V architecture.

[0079] In this embodiment, the system configuration and status monitoring module includes:

[0080] Initialization configuration unit: responsible for the configuration settings when the system starts; the initialization configuration unit is responsible for a series of configuration settings when the system starts to ensure the normal operation of the system. These configurations include hardware initialization, operating system loading, network configuration, etc. For example, when starting a multi-mode redundant system based on the RISC-V architecture, the initialization configuration unit will check the status of all processor modules to ensure that each module is correctly connected and ready. Then, it will load the operating system kernel, configure network parameters, and start necessary system services.

[0081] Real-time monitoring unit: used to monitor the system operation status and record log information; it evaluates the health of the system by collecting various system indicators (such as CPU usage, memory usage, network traffic, I / O activity, etc.). These indicators are regularly recorded in log files for subsequent analysis and troubleshooting.

[0082] Remote Management Unit: It allows users to remotely configure, monitor and manage the system. It provides a network-based graphical user interface or command line interface, allowing users to connect to the system through the network and perform various management operations.

[0083] This embodiment describes in detail a multi-mode redundant system based on the RISC-V architecture, which integrates at least four RISC-V processor modules, and is supplemented by an efficient data communication and synchronization module, an accurate fault monitoring and automatic recovery module, a flexible shared resource management and allocation module, and a comprehensive system configuration and status monitoring module, to jointly build a high-performance, high-availability and high-reliability computing platform. These modules work together to not only ensure efficient communication and data consistency within the system, but also significantly enhance the system's fault recovery and resource management capabilities, thereby meeting the strict requirements of modern embedded systems for real-time response and high availability.

[0084] Embodiment 2;

[0085] like Figure 2As shown, this embodiment provides a control method, which is applied to the multi-mode redundant system based on the RISC-V architecture in the above embodiment, and includes the following steps:

[0086] System initialization and configuration: Complete system initialization settings through the system configuration and status monitoring module to ensure that all modules in the system are correctly configured;

[0087] Task allocation and execution: Based on the current load and performance requirements, computing tasks are allocated to different RISC-V processor modules for data processing and instruction execution;

[0088] Synchronization and communication management: Use data communication and synchronization modules to ensure data flow consistency and access synchronization of different RISC-V processor modules;

[0089] Fault monitoring and automatic recovery: Continuously monitor the health status of the system. If a fault is detected, the automatic recovery mechanism is triggered, including task migration and restarting or repairing the faulty module.

[0090] Dynamic resource management: Dynamically manage and allocate shared resources according to real-time performance requirements to ensure optimal resource use;

[0091] Status monitoring and remote management: Real-time recording of system operation status and provision of log information, allowing users to remotely configure and monitor, and respond promptly to changing requirements and potential problems.

[0092] This embodiment provides a control method, which is applied to a multi-mode redundant system based on the RISC-V architecture. Through the steps of system initialization, task allocation and execution, synchronization and communication management, fault monitoring and automatic recovery, dynamic resource management, status monitoring and remote management, etc., efficient operation of the system, rapid fault recovery and optimized resource management are achieved.

[0093] Embodiment 3;

[0094] This embodiment provides a multi-mode redundant system based on RISC-V architecture designed for the aerospace field, aiming to ensure high reliability, high performance and real-time response capability of aircraft control systems in extreme environments. The system integrates at least 4 RISC-V processor modules and significantly improves the stability and fault tolerance of the system through efficient data communication and synchronization, fault monitoring and automatic recovery, and dynamic resource management mechanisms.

[0095] The following are specific implementation and technical details for aerospace application scenarios;

[0096] 1) At least 4 RISC-V processor modules;

[0097] Each RISC-V processor module is responsible for performing complex computing tasks and data processing, especially in critical tasks such as flight control, navigation and communication. These modules use a 64-bit instruction set and support integer operations, multiplication and division, floating-point operations and atomic operations, ensuring high-precision and efficient instruction processing. In the flight control system, the processor module can process data from sensors in real time, perform attitude control and path planning, and ensure the safe and stable operation of the aircraft.

[0098] 2) Data communication and synchronization module;

[0099] Message passing unit: enables efficient data exchange between different subsystems of the aircraft (such as navigation, communication, and power systems).

[0100] Lock-free data structure unit: Avoid access conflicts between multiple processor modules, especially when processing a large amount of sensor data concurrently, ensuring data consistency and integrity.

[0101] Synchronous control unit: Maintains the synchronization state of different processor modules to achieve more precise synchronization effects and ensure that all modules work at the same logical time point, which is crucial for precise time-sensitive tasks.

[0102] 3) Fault monitoring and automatic recovery module;

[0103] Health Monitoring Unit: The safety and reliability of aerospace systems are of vital importance. During flight, the health monitoring unit can receive thousands of status reports per second to capture any potential signs of failure in a timely manner.

[0104] Fault location unit: Once an abnormality or fault sign is detected, a detailed fault diagnosis procedure is immediately initiated to quickly and accurately locate the faulty module.

[0105] Mission migration unit: When a module is confirmed to be faulty, the mission migration unit will seamlessly migrate the task to other healthy processor modules to ensure the continuity of flight control, communication, navigation and other tasks, thereby ensuring the safety and reliability of the system.

[0106] Fault recovery unit: Restart the faulty module, update the firmware or perform hardware self-test operations to ensure that the faulty module resumes normal operation as soon as possible, coordinate the working processes of each processor to restore it to the efficient parallel operation state before the fault occurs, so as to meet the high availability requirements of aerospace systems.

[0107] 4) Shared resource management and allocation module;

[0108] Resource Sharing Unit: During flight, multiple processor modules may access the same set of sensor data simultaneously, and the resource sharing unit ensures that such access does not conflict.

[0109] Dynamic Allocation Unit: When the aircraft enters complex flight modes, the Dynamic Allocation Unit can reallocate additional computing resources to cope with higher processing demands.

[0110] Consistency maintenance unit: Ensures the consistency of system status among different processor modules through distributed coordination services.

[0111] 5) System configuration and status monitoring module;

[0112] Initializing the Configuration Unit: Before every takeoff, the Initializing Configuration Unit checks the status of all processor modules to ensure that they are properly connected and ready to go.

[0113] Real-time monitoring unit: After the flight, engineers can analyze various parameters during the flight through log information to identify potential problems.

[0114] Remote Management Unit: The ground control center can monitor the aircraft status in real time through the remote management unit and conduct remote intervention when necessary.

[0115] Furthermore, the control method applied to the above system includes the following steps:

[0116] System initialization and configuration: Ensure that all modules are correctly configured and ready when the system starts.

[0117] Task allocation and execution: Rationally allocate computing tasks based on current load and performance requirements to ensure that all parts of the aircraft work together.

[0118] Synchronization and communication management: ensure data flow consistency and access synchronization between different processor modules to ensure the smooth progress of flight missions.

[0119] Fault monitoring and automatic recovery: Continuously monitor system health status, automatically detect and handle faults to ensure flight safety.

[0120] Dynamic resource management: Dynamically adjust resource allocation according to real-time performance requirements to optimize resource usage.

[0121] Status monitoring and remote management: Real-time recording of system operation status, providing log information, supporting remote configuration and monitoring, and timely response to changing requirements and potential problems.

[0122] In summary, the application of multi-mode redundant systems based on the RISC-V architecture in the aerospace field has demonstrated its excellent reliability and performance advantages. By integrating advanced processor modules, data communication and synchronization mechanisms, fault monitoring and automatic recovery functions, shared resource management and allocation strategies, and comprehensive system configuration and status monitoring, the system can not only meet the strict requirements of aerospace missions for high availability and real-time response, but also provide strong flexibility and adaptability to ensure that aircraft can operate safely and stably in various complex environments.

[0123] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0124] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A multi-mode redundant system based on RISC-V architecture, characterized in that: include: At least 4 RISC-V processor modules: used to perform computing tasks and data processing; Data communication and synchronization module: used for data communication and synchronization management within the RISC-V multi-core processing module; Fault monitoring and automatic recovery module: used to monitor the operating status of the RISC-V multi-core processing module and trigger the recovery mechanism when a fault occurs; Shared resource management and allocation module: used to manage and dynamically allocate memory, storage, and I / O devices; System configuration and status monitoring module: used for system initialization configuration, status monitoring and remote management.

2. A multi-mode redundant system based on RISC-V architecture according to claim 1, characterized in that: Each RISC-V processor module includes: Instruction execution unit: used to execute instruction sets, integer operations, multiplication and division, floating-point operations, and atomic operations; Cache management unit: includes L1 instruction cache, L1 data cache and L2 cache, and uses MESI protocol to manage cache status; High-speed interface circuit unit: Efficient communication and data exchange through PCIe or AXI high-speed serial interface.

3. A multi-mode redundant system based on RISC-V architecture according to claim 1, characterized in that: The data communication and synchronization module comprises: Message passing unit, used for communication and data exchange between different RISC-V processor modules; Lock-free data structure unit, used to store and access shared data to avoid access conflicts between different RISC-V processor modules; Synchronization control unit: used to maintain the synchronization state of different RISC-V processor modules to ensure the consistency of data flow.

4. The multi-mode redundant system based on RISC-V architecture according to claim 1, characterized in that: The fault monitoring and automatic recovery module comprises: Health monitoring unit: used to receive health status reports of different RISC-V processor modules within a preset time period; Fault location unit: used to determine the corresponding faulty module through health status report; Task migration unit: used to migrate tasks on the faulty module to other RISC-V processor modules; Fault recovery unit: used to restart the faulty module, update the firmware or perform hardware self-test operations.

5. The multi-mode redundant system based on RISC-V architecture according to claim 1, characterized in that: The shared resource management and allocation module includes: Resource sharing unit: used to manage and coordinate concurrent access to shared resources by different RISC-V processor modules; Dynamic allocation unit: used to adjust resource allocation strategies based on load and performance requirements; Consistency maintenance unit: used to ensure the consistency of system status in different RISC-V processor modules through distributed coordination services.

6. The multi-mode redundant system based on RISC-V architecture according to claim 1, characterized in that: The system configuration and status monitoring module includes: Initialization configuration unit: responsible for configuration settings when the system starts; Real-time monitoring unit: used to monitor the system operation status and record log information; Remote Management Unit: Used to allow users to remotely configure, monitor and manage the system.

7. A control method, characterized in that: A multi-mode redundant system based on a RISC-V architecture as described in any one of claims 1 to 6, comprising the following steps: System initialization and configuration: Complete system initialization settings through the system configuration and status monitoring module to ensure that all modules in the system are correctly configured; Task allocation and execution: Based on the current load and performance requirements, computing tasks are allocated to different RISC-V processor modules for data processing and instruction execution; Synchronization and communication management: Use data communication and synchronization modules to ensure data flow consistency and access synchronization of different RISC-V processor modules; Fault monitoring and automatic recovery: Continuously monitor the health status of the system. If a fault is detected, the automatic recovery mechanism is triggered, including task migration and restarting or repairing the faulty module. Dynamic resource management: Dynamically manage and allocate shared resources according to real-time performance requirements to ensure optimal resource use; Status monitoring and remote management: Real-time recording of system operation status and provision of log information, allowing users to remotely configure and monitor, and respond promptly to changing requirements and potential problems.

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