Semiconductor structure and method, measurement method and system, device and storage medium

Abstract

A semiconductor structure and method, a measurement method and system, a device and a storage medium, the measurement method is used for measuring a semiconductor structure formed by a forming method of the semiconductor structure, and an overlay mark formed later exposes an opposite side of an overlay mark formed first along a first direction. Therefore, a plurality of overlay marks are arranged in the measurement image and extend along the image of the opposite sides of the first direction, and the overlay offset of any overlay mark in the second direction can be obtained by measuring the overlay marks stacked in the associated laminated layer once, so that the overlay alignment deviation of any two film layers in the associated laminated layer in the second direction is obtained, and the alignment accuracy of the film layers in the second direction is improved. The measurement efficiency and the capacity utilization of a machine are improved, the overlay correction period is shortened, and the overlay cost is reduced on the premise that the overlay precision is not sacrificed.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a semiconductor structure and method, a measurement method and system, a device and a storage medium. Background Art

[0002] Semiconductor structures usually contain multiple layers of patterned materials, where each current layer must be aligned with the previous layer within a strict tolerance. The superposition registration error between the current layer and the previous layer of the semiconductor structure is called overlay error, also known as stacking error. The overlay error describes the deviation of the current layer's pattern relative to the previous layer's pattern along the wafer surface and the distribution of this deviation on the wafer surface. Overlay error is a key indicator for testing the quality of the lithography process.

[0003] However, with the continuous improvement of IC chip manufacturing technology, the requirements for Overlay (overlay accuracy) are getting higher and higher for advanced process technology, especially below the 28nm node. The detection of overlay errors is generally divided into post-development detection (ADI, After Development Inspection) and post-etching detection (AEI, After Etching Inspection). Post-development detection refers to the measurement of CD (critical dimension) after development. It is generally used to detect the performance indicators of the exposure machine and the developer. After the exposure and development are completed, the ADI machine is used to qualitatively check the generated graphics to see if they are normal. Since it cannot be measured by transmitted light, ADI is generally measured by electron beam or scanning electron microscope. In the process of graphic transfer after photolithography development, etching and other processes will further introduce overlay deviation on the basis of ADI, and post-etching detection is required.

[0004] Overlay error can generally be measured through image recognition-based measurement technology (IBO, Image Based Overlay), scanning electron microscope (SEM, scanning electron microscope) and new diffraction measurement technology (IDM, In Device Metrology, also known as In Die Measurement). Summary of the invention

[0005] The problem solved by the embodiments of the present invention is to provide a semiconductor structure and method, a measurement method and system, a device and a storage medium to optimize the electrical performance of the semiconductor structure.

[0006] To solve the above problems, an embodiment of the present invention provides a semiconductor structure, comprising: a substrate; an associated stack, comprising: a plurality of film layers sequentially located on the substrate, each of the film layers having an overlay mark; in a direction perpendicular to the substrate, the overlay marks of the respective film layers are stacked, and the overlay marks in adjacent film layers away from the substrate expose the overlay marks close to the substrate, and the exposed overlay marks include at least a group of relative edges extending along a first direction, and the relative edges are used to judge the overlay error along a second direction, and the second direction is perpendicular to the first direction.

[0007] Correspondingly, an embodiment of the present invention also provides a method for forming a semiconductor structure, comprising: providing a substrate; forming an associated stack on the substrate, the step of forming the associated stack comprising: sequentially forming a plurality of film layers on the substrate, each of the film layers having an overlay mark; in a direction perpendicular to the substrate, the overlay marks of the respective film layers are stacked, the overlay marks formed later in adjacent film layers expose the overlay marks formed earlier, and the exposed overlay marks include at least a group of relative edges extending along a first direction, the relative edges being used to judge the overlay error along a second direction, the second direction being perpendicular to the first direction.

[0008] Correspondingly, an embodiment of the present invention also provides a method for measuring overlay errors, which is used to measure the formed semiconductor structure after the semiconductor structure forming method, including: obtaining a measurement image of the overlay marks of the stacked arrangement, the measurement image including at least two adjacent film layers, the overlay marks formed later in the adjacent film layers expose the overlay marks formed earlier, and the exposed overlay marks include at least a group of relative edges extending along a first direction; according to the measurement image, obtaining the overlay errors of the overlay marks of different film layers along a second direction, the second direction being perpendicular to the first direction, and the overlay errors are used to characterize the overlay offsets of different film layers in the second direction during the process of forming the associated stack.

[0009] Correspondingly, an embodiment of the present invention further provides an overlay error measurement system for measuring a formed semiconductor structure after the formation of the semiconductor structure, comprising: a measurement image acquisition module, for acquiring a measurement image of the overlay marks of a stacked arrangement, the measurement image comprising at least two adjacent film layers, the overlay marks formed later in the adjacent film layers expose the overlay marks formed earlier, and the exposed overlay marks include at least a group of relative edges extending along a first direction; an overlay error acquisition module, for acquiring the overlay errors of the overlay marks of different film layers along a second direction according to the measurement image, the second direction being perpendicular to the first direction, the overlay error being used to characterize the overlay offset of different film layers in the second direction during the process of forming the associated stack.

[0010] Correspondingly, an embodiment of the present invention also provides a device, comprising: at least one memory and at least one processor, wherein the memory stores one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement a method for measuring overlay errors.

[0011] Correspondingly, an embodiment of the present invention further provides a storage medium, wherein the storage medium stores one or more computer instructions, and the one or more computer instructions are used to implement a method for measuring overlay errors.

[0012] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0013] In the method for forming a semiconductor structure provided by an embodiment of the present invention, an associated stack is formed on the substrate, wherein the number of film layers in the associated stack is multiple, each film layer in the associated stack has an overlay mark, and the overlay marks of the respective film layers are stacked, and the overlay marks formed later expose the overlay marks formed earlier, and the exposed overlay marks include at least one group of relative edges extending along a first direction, so that when a measurement image of the stacked overlay marks is subsequently obtained, it is beneficial for the measurement image to simultaneously display the relative edges of multiple overlay marks extending along the first direction.

[0014] The overlay error measurement method provided by the embodiment of the present invention is used to measure the semiconductor structure formed by the aforementioned semiconductor structure formation method. Because the overlay mark formed later exposes the relative edge of the overlay mark formed earlier extending along the first direction, there are multiple images of the relative edges of the overlay marks extending along the first direction in the measurement image. The position information of each overlay mark in the second direction can be obtained based on the images of the relative edges of the multiple overlay marks extending along the first direction. The overlay alignment deviation of any two overlay marks in the second direction can be obtained according to the measurement image. That is to say, the overlay marks stacked in the associated stack are measured once, and the overlay offset of any overlay mark in the second direction can be obtained, thereby obtaining the overlay alignment deviation of any two film layers in the associated stack in the second direction, which is beneficial to improving measurement efficiency and machine capacity utilization, shortening the overlay correction cycle, and reducing the overlay cost without sacrificing overlay accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figures 1 to 3 It is a schematic diagram of the structure corresponding to each step in a method for measuring overlay error;

[0016] Figures 4 to 9 It is a structural schematic diagram corresponding to each step in an embodiment of a method for measuring overlay error according to an embodiment of the present invention;

[0017] Fig.10 is a flow chart of an embodiment of a method for measuring overlay error according to an embodiment of the present invention;

[0018] Fig.11 It is a flow chart of the overlay alignment deviation in the second direction in the overlay error measurement method according to an embodiment of the present invention;

[0019] Fig.12 It is a flow chart of the overlay alignment deviation in the first direction in the method for measuring overlay error in an embodiment of the present invention;

[0020] Fig.13 is a functional block diagram of an embodiment of a system for measuring overlay error of the present invention;

[0021] Fig.14 It is a hardware structure diagram of an embodiment of the device provided by the present invention. DETAILED DESCRIPTION

[0022] As can be seen from the background technology, the semiconductor structures currently formed still have the problem of poor performance. Now, a method for measuring overlay error is combined to analyze the reasons for the poor performance of the device.

[0023] refer to Figures 1 to 3 , shows a schematic diagram of the structure corresponding to each step in a method for measuring overlay error. Figure 1 It is a schematic diagram of the structure of the wafer. Figure 2 This is a schematic diagram of a chip area in a wafer. Figure 3 It is a schematic diagram of the structure of the front layer overlay mark 3 and the back layer overlay mark 4.

[0024] The method for measuring the overlay error includes: providing a wafer 1 (such as Figure 1 As shown in the figure, the wafer 1 includes a plurality of chip regions 2, each of which has a front film layer (not shown in the figure) formed thereon, and a front layer overlay mark 3 (as shown in the figure) formed thereon Figure 3 forming a rear film layer (not shown) on the front film layer, and a rear layer overlay mark 4 (such as Figure 3 After the rear film layer is formed, a measurement image of the wafer is obtained, the measurement image including images of the front layer overlay mark 3 and the rear layer overlay mark 4; based on the images of the front layer overlay mark 3 and the rear layer overlay mark 4, the overlay offset generated between the front film layer and the rear film layer during the etching process is obtained.

[0025] As semiconductor processes continue to advance to advanced nodes, advanced process technologies have increasingly stringent requirements for overlay control accuracy. Accordingly, at advanced nodes, more and more process film layers require overlay compensation and calibration to improve product yield. However, conventional measurements of the front layer overlay mark 3 of the front film layer and the rear layer overlay mark 4 of the rear film layer (i.e., the double-layer stacked mark) can only characterize the overlay offset between the two associated film layers. If this overlay mark design continues to be used at advanced nodes, the number and time of overlay measurements will increase significantly, which will significantly increase the measurement burden of the machine, reduce the production line capacity, and increase process costs.

[0026] In order to solve the technical problem, the overlay error measurement method provided in the embodiment of the present invention is used to measure the semiconductor structure formed by the above-mentioned semiconductor structure formation method. Because the overlay mark formed later exposes the relative edge of the overlay mark formed earlier extending along the first direction, there are multiple images of the relative edges of the overlay marks extending along the first direction in the measurement image. The position information of each overlay mark in the second direction can be obtained based on the images of the relative edges of the multiple overlay marks extending along the first direction. According to the measurement image, the overlay alignment deviation of any two overlay marks in the second direction can be obtained. That is to say, the overlay marks stacked in the associated stack are measured once, and the overlay offset of any overlay mark in the second direction can be obtained, thereby obtaining the overlay alignment deviation of any two film layers in the associated stack in the second direction, which is beneficial to improving measurement efficiency and machine capacity utilization, shortening the overlay correction cycle, and reducing the overlay cost without sacrificing overlay accuracy.

[0027] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and easy to understand, specific embodiments of the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0028] Figures 4 to 9 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure according to an embodiment of the invention.

[0029] Step S1: Reference Figure 4 , providing a substrate 100.

[0030] The substrate 100 is prepared for the subsequent formation of associated stacked layers.

[0031] In this embodiment, the substrate 100 is a wafer, and the wafer includes a plurality of chip regions 101. Each chip region 101 includes a core region (not shown in the figure) for forming a device and a peripheral region (not shown in the figure) for forming overlay marks in each film layer.

[0032] Step S2: Reference Figure 5, showing a schematic diagram of a single chip area 101. An associated stack is formed on the substrate 100, and the steps of forming the associated stack include: sequentially forming a plurality of film layers on the substrate 100, each of the film layers having an overlay mark; in a direction perpendicular to the substrate 100, the overlay marks of the respective film layers are stacked, the overlay marks formed later in the adjacent film layers expose the overlay marks formed earlier, and the exposed overlay marks include at least one group of overlay marks along a first direction X (such as Figure 5 The relative edge extending in the second direction Y (as shown in X) is used to determine the relative edge extending in the second direction Y (as shown in Figure 5 The overlay error is as shown in Y in the figure, and the second direction Y is perpendicular to the first direction X.

[0033] In the method for forming a semiconductor structure provided by an embodiment of the present invention, the overlay mark formed later exposes the overlay mark formed earlier, and the exposed overlay mark includes at least one group of relative edges extending along the first direction X, so that when a measurement image of the stacked overlay marks is subsequently obtained, it is beneficial for the measurement image to simultaneously display the relative edges of multiple overlay marks extending along the first direction X.

[0034] It should be noted that the overlay marks in each film layer are mainly used for post-etching detection.

[0035] The associated stack includes a plurality of film layers sequentially located on the substrate 100 , and a certain alignment accuracy needs to be satisfied between the plurality of film layers in the associated stack.

[0036] like Figure 6 As shown, Figure 6 2 is a schematic diagram of the structure of the overlay mark. In the step of forming the associated stack, the overlay mark of each film layer includes two opposite first edges 200a and two opposite second edges 200b.

[0037] In this embodiment, the relative sides of the overlay mark include two relative first sides 200a and two relative second sides 200b, and the first sides 200a and the second sides 200b of the overlay mark are respectively used to determine the overlay errors in different directions. Specifically, one of the first side 200a and the second side 200b extends along the first direction, and the other extends along the second direction.

[0038] In this embodiment, the first side 200a and the second side 200b are perpendicular to each other. Accordingly, the directions of determining the overlay error of the first side 200a and the second side 200b are perpendicular to each other.

[0039] As an example, the first side 200a extends along the first direction X, and the second side 200b extends along the second direction Y. In this case, the first side 200a is used to determine the overlay error in the second direction Y, and the second side 200b is used to determine the overlay error in the first direction X. As another example, the first side 200a extends along the second direction Y, and the second side 200b extends along the first direction X. In this case, the first side 200a is used to determine the overlay error in the first direction X, and the second side 200b is used to determine the overlay error in the second direction Y.

[0040] In other embodiments, the overlay marks in the associated stack are only measured for overlay error in a single direction (eg, a first direction or a second direction).

[0041] This embodiment takes the measurement of the overlay error in the first direction X as an example. In the stacked overlay marks, the later formed overlay mark exposes a group of relative edges extending along the second direction Y in the earlier formed overlay mark. The relative edges extending along the second direction Y are used to determine the overlay error between film layers in the first direction X.

[0042] In the subsequent measurement process, the position information of a group of relative edges extending along the second direction Y in the first formed overlay mark is obtained; based on the position information of a group of relative edges extending along the second direction Y in the first formed overlay mark, the center line position information of the first formed overlay mark in the first direction X is obtained; the position information of a group of relative edges extending along the second direction Y in the later formed overlay mark is obtained; based on the position information of a group of relative edges extending along the second direction Y in the later formed overlay mark, the center line position information of the later formed overlay mark in the first direction X is obtained; based on the center line position information of the first formed overlay mark and the later formed overlay mark in the first direction X, the overlay alignment deviation of the two film layers formed successively in the associated stack in the first direction X is obtained.

[0043] It should also be noted that in the step of forming the associated stack on the substrate 100, both ends of the first direction X of the overlay mark in the later formed film layer extend to the outside of the edge of the overlay mark in the earlier formed film layer. Such a setting is conducive to distinguishing the earlier formed overlay mark from the later formed overlay mark.

[0044] As an example, Figure 7 As shown, Figure 71 is a schematic diagram of the structure of the overlay marks stacked in the associated stack. In the step of forming the associated stack on the substrate 100, the number of film layers in the associated stack is at least three, and the overlay mark group includes a bottom layer overlay mark group 201, a middle layer overlay mark 202, and a top layer overlay mark 203 in the order of formation. In other embodiments, the number of film layers in the associated stack can be more than three, for example, four, five, six, or seven.

[0045] Correspondingly, in the step of forming the middle layer overlay mark 202, the middle layer overlay mark 202 extends along the first direction X, and both ends of the middle layer overlay mark 202 in the first direction X extend to the outside of the edge of the bottom layer overlay mark group 201, and the relative edges of the middle layer overlay mark 202 extending along the first direction X are located on the inner side of the relative edges of the bottom layer overlay mark group 201 extending along the first direction X.

[0046] Correspondingly, in the step of forming the top-layer overlay mark 203, the top-layer overlay mark 203 extends along the first direction X, and both ends of the first direction X extend to the outside of the edge of the middle-layer overlay mark 202, and the relative edges of the top-layer overlay mark 203 extending along the first direction X are located on the inner side of the relative edges of the middle-layer overlay mark 202 extending along the first direction X.

[0047] It should be noted that, in the step of forming the associated stack on the substrate 100, the relative edges of the bottom overlay mark group 201, the middle overlay mark 202 and the top overlay mark 203 at both ends of the first direction X all extend along the second direction Y. Accordingly, the extension direction of the middle overlay mark 202 is perpendicular to the relative edges of the bottom overlay mark group 201 at both ends of the first direction X, and the extension direction of the top overlay mark 203 is perpendicular to the relative edges of the middle overlay mark 202 at both ends of the first direction X. Such an arrangement is conducive to distinguishing the bottom overlay mark group 201, the middle overlay mark 202 and the top overlay mark 203 in the subsequent measurement process.

[0048] As an example, the shape of the overlay mark includes a rectangle and a square.

[0049] It should be noted that, in the step of forming the bottom layer overlay mark group 201, the bottom layer overlay mark group 201 occupies a rectangular area, including one or more mark patterns, the mark patterns extend along the second direction Y, the two ends of the mark patterns in the second direction Y are aligned, and the mark patterns are spaced apart in the first direction X.

[0050] There are multiple overlay marks in the associated stack. The bottom overlay mark group 201 occupies a rectangular area and includes one or more mark graphics, which is helpful to distinguish the bottom overlay mark group 201 from the middle overlay mark 202 and the top overlay mark 203.

[0051] It should also be noted that, in the step of forming the associated stack, the area of ​​the overlay mark close to the substrate 100 is larger than the area of ​​the overlay mark far from the substrate 100. This is helpful to distinguish the overlay mark close to the substrate 100 from the overlay mark far from the substrate 100. In this example, it is helpful to distinguish the bottom layer overlay mark group 201, the middle layer overlay mark 202 and the top layer overlay mark 203.

[0052] It should be noted that in the step of forming the front-layer overlay mark, a first interconnection structure is also formed; in the step of forming the middle-layer overlay mark 202, a contact hole plug is also formed; and in the step of forming the top-layer overlay mark 203, a second interconnection structure is also formed. Subsequently, by measuring the errors of the front-layer overlay mark, the middle-layer overlay mark 202, and the top-layer overlay mark 203, the overlay errors between the first interconnection structure, the contact hole plug, and the second interconnection structure are obtained.

[0053] like Figure 8 and Fig. 9 As shown, as another example, the stacked overlay marks can also be used to measure the overlay errors between film layers in the first direction X and the second direction Y.

[0054] Specifically, in the step of forming the associated stack, each film layer includes a first set mark (such as Figure 8 ) and a second set of engraved marks for measuring in the second direction Y (as shown Fig. 9 As shown), the first overlay marks of multiple film layers constitute a first overlay mark group 20a, and the second overlay marks of multiple film layers constitute a second overlay mark group 20b. The first overlay mark group 20a and the second overlay mark group 20b are components of the stacked overlay marks.

[0055] The associated stack measures the overlay error of each overlay mark in the first direction X through the first overlay mark group 20a, and then obtains the overlay error of each film layer of the associated stack in the first direction X. The associated stack measures the overlay error of each overlay mark in the second direction Y through the second overlay mark group 20b, and then obtains the overlay error of each film layer of the associated stack in the second direction Y, and finally obtains the overlay error of each film layer on the plane of the substrate 100.

[0056] In this embodiment, in the step of forming the associated stack on the substrate 100, the structural form of the first overlay mark group 20a after rotating 90 degrees around the axis perpendicular to the substrate 100 is the same as the structural form of the second overlay mark group 20b. That is to say, the morphological structures of the first overlay mark group 20a and the second overlay mark group 20b used for measuring the first direction X and the second direction Y in the associated stack are the same, and only the angles are different. The associated stack performs overlay measurement in the first direction X and the second direction Y through the first overlay mark group 20a and the second overlay mark group 20b with the same structure, which is conducive to simplifying the formation process of the associated stack, and is also convenient for obtaining the overlay error in the first direction X based on the first overlay mark group 20a, and obtaining the overlay error in the second direction Y based on the second overlay mark group 20b.

[0057] In this embodiment, the first set of engraved marking group 20a (such as Figure 8 ), the first overlay mark formed later reveals a group of relative edges extending along the second direction Y in the first overlay mark formed earlier, and the relative edges extending along the second direction Y are used to determine the overlay error between film layers in the first direction X, for example, the overlay error (201a-202a shift_X, as shown in FIG. 1 ) between the first bottom layer overlay mark group 201a and the first middle layer overlay mark 202a. Figure 8 As shown), the overlay error between the first middle layer overlay mark 202a and the first top layer overlay mark 203a (202a-203a shift_X, as shown Figure 8 As shown), the overlay error between the first bottom overlay mark group 201a and the first top overlay mark 203a (201a-203a shift_X, as shown Figure 8 shown).

[0058] The second set of engraved marks 20b (such as Fig. 9 ), the second overlay mark formed later reveals a group of relative edges extending along the first direction X in the second overlay mark formed earlier, and the relative edges extending along the first direction X are used to determine the overlay error between film layers in the second direction Y. For example, the overlay error (201b-202b shift_Y, as shown in FIG. 1 ) between the second bottom overlay mark group 201b and the second middle overlay mark 202b Fig. 9 As shown), the overlay error between the second middle layer overlay mark 202b and the second top layer overlay mark 203b (202b-203b shift_Y, as shown Fig. 9 As shown), the overlay error between the second bottom overlay mark group 201b and the second top overlay mark 203b (201b-203b shift_Y, as shown Fig. 9 shown).

[0059] refer to Figures 4 to 9, an embodiment of the present invention also provides a semiconductor structure.

[0060] The semiconductor structure includes: a substrate 100; an associated stack, including: a plurality of film layers sequentially located on the substrate 100, each of the film layers having an overlay mark; in a direction perpendicular to the substrate 100, the overlay marks of the respective film layers are stacked, the overlay marks of the adjacent film layers away from the substrate 100 are exposed from the overlay marks close to the substrate 100, and the exposed overlay marks include at least one group of relative edges extending along a first direction X, the relative edges being used to determine an overlay error along a second direction Y, the second direction Y being perpendicular to the first direction X.

[0061] In the semiconductor structure provided by the embodiment of the present invention, the associated stack is located on the substrate 100, and there are multiple film layers in the associated stack. Each film layer in the associated stack has an overlay mark, and the overlay marks of each film layer are stacked. The overlay marks away from the substrate 100 expose the overlay marks close to the substrate 100, and the exposed overlay marks include at least one group of relative edges extending along the first direction X. Therefore, when obtaining a measurement image of the stacked overlay marks, it is beneficial to make the measurement image simultaneously display the relative edges of multiple overlay marks extending along the first direction X.

[0062] It should be noted that the overlay marks in each film layer are mainly used for post-etching detection.

[0063] The associated stack includes a plurality of film layers sequentially located on the substrate 100 , and a certain alignment accuracy needs to be satisfied between the plurality of film layers in the associated stack.

[0064] In this embodiment, the overlay mark of each film layer includes two opposite first edges 200a and two opposite second edges 200b.

[0065] The first side 200a and the second side 200b of the overlay mark are respectively used to determine overlay errors in different directions.

[0066] In this embodiment, the first side 200a and the second side 200b are perpendicular to each other. Accordingly, the directions of determining the overlay error of the first side 200a and the second side 200b are perpendicular to each other.

[0067] As an example, the first side 200a extends along the first direction X, and the second side 200b extends along the second direction Y. In this case, the first side 200a is used to determine the overlay error in the second direction Y, and the second side 200b is used to determine the overlay error in the first direction X. As another example, the first side 200a extends along the second direction Y, and the second side 200b extends along the first direction X. In this case, the first side 200a is used to determine the overlay error in the first direction X, and the second side 200b is used to determine the overlay error in the second direction Y.

[0068] In other embodiments, the overlay marks in the associated stack are only measured for overlay error in a single direction (eg, a first direction or a second direction).

[0069] This embodiment takes the measurement of the overlay error in the first direction X as an example. In the stacked overlay marks, the overlay marks away from the substrate 100 expose a group of relative edges extending along the second direction Y in the overlay marks close to the substrate 100. The relative edges extending along the second direction Y are used to determine the overlay error between film layers in the first direction X.

[0070] In the subsequent measurement process, the position information of a group of relative edges extending along the second direction Y in the overlay mark close to the substrate 100 is obtained; based on the position information of a group of relative edges extending along the second direction Y in the overlay mark close to the substrate 100, the centerline position information of the overlay mark close to the substrate 100 in the first direction X is obtained; the position information of a group of relative edges extending along the second direction Y in the overlay mark away from the substrate 100 is obtained; based on the position information of a group of relative edges extending along the second direction Y in the overlay mark away from the substrate 100, the centerline position information of the overlay mark away from the substrate 100 in the first direction X is obtained; based on the centerline position information of the overlay mark close to the substrate 100 and the overlay mark away from the substrate 100 in the first direction X, the overlay alignment deviation of the two film layers in the associated stack that first move away from the substrate 100 is obtained.

[0071] It should also be noted that in the associated stack, both ends of the first direction X of the overlay mark in the film layer far from the substrate 100 extend to the outside of the edge of the overlay mark in the film layer first close to the substrate 100. Such a setting is conducive to distinguishing the overlay mark close to the substrate 100 from the overlay mark far from the substrate 100.

[0072] As an example, Figure 7As shown, the number of film layers in the associated stack is at least three, and the stacked overlay marks include a bottom overlay mark group 201, a middle overlay mark 202, and a top overlay mark 203 sequentially located on the substrate 100. In other embodiments, the number of film layers in the associated stack can be more than three, such as four, five, six, or seven.

[0073] Correspondingly, the middle layer overlay mark 202 extends along the first direction X, and both ends of the middle layer overlay mark 202 in the first direction X extend to the outside of the edge of the bottom layer overlay mark group 201, and the relative edges of the middle layer overlay mark 202 extending along the first direction X are located on the inner side of the relative edges of the bottom layer overlay mark group 201 extending along the first direction X.

[0074] Correspondingly, the top layer overlay mark 203 extends along the first direction X, and both ends of the first direction X extend to the outside of the edge of the middle layer overlay mark 202, and the relative edges of the top layer overlay mark 203 extending along the first direction X are located on the inner side of the relative edges of the middle layer overlay mark 202 extending along the first direction X.

[0075] It should be noted that the relative edges at both ends of the first direction X of the bottom layer overlay mark group 201, the middle layer overlay mark 202 and the top layer overlay mark 203 all extend along the second direction Y. Accordingly, the extension direction of the middle layer overlay mark 202 is perpendicular to the relative edges at both ends of the first direction X of the bottom layer overlay mark group 201, and the extension direction of the top layer overlay mark 203 is perpendicular to the relative edges at both ends of the first direction X of the middle layer overlay mark 202. Such an arrangement is conducive to distinguishing the bottom layer overlay mark group 201, the middle layer overlay mark 202 and the top layer overlay mark 203 in the subsequent measurement process.

[0076] As an example, the shape of the overlay mark includes a rectangle and a square.

[0077] It should be noted that the bottom layer overlay mark group 201 occupies a rectangular area, and includes one or more mark patterns, which extend along the second direction Y, with both ends of the mark patterns in the second direction Y aligned, and the mark patterns are spaced apart in the first direction X.

[0078] There are multiple overlay marks in the associated stack. The bottom overlay mark group 201 occupies a rectangular area and includes one or more mark graphics, which is helpful to distinguish the bottom overlay mark group 201 from the middle overlay mark 202 and the top overlay mark 203.

[0079] It should be noted that the film layer where the bottom overlay mark group 201 is located also includes a first interconnection structure, the film layer where the middle overlay mark 202 is located also includes a contact hole plug, and the film layer where the top overlay mark is located also includes a second interconnection structure. Subsequently, by measuring the errors of the front overlay mark, the middle overlay mark 202, and the top overlay mark 203, the overlay errors between the first interconnection structure, the contact hole plug, and the second interconnection structure are obtained.

[0080] like Figure 8 and Fig. 9 As shown, as another example, the stacked overlay marks can also be used to measure the overlay errors between film layers in the first direction X and the second direction Y.

[0081] Specifically, each film layer includes a first set of engraved marks (such as Figure 8 ) and a second set of engraved marks for measuring in the second direction Y (as shown Fig. 9 As shown), the first overlay marks of the plurality of film layers constitute a first overlay mark group 20a, the second overlay marks of the plurality of film layers constitute a second overlay mark group 20b, and the stacked overlay marks include the first overlay mark group 20a and the second overlay mark group 20b.

[0082] The associated stack measures the overlay error of each overlay mark in the first direction X through the first overlay mark group 20a, and then obtains the overlay error of each film layer of the associated stack in the first direction X. The associated stack measures the overlay error of each overlay mark in the second direction Y through the second overlay mark group 20b, and then obtains the overlay error of each film layer of the associated stack in the second direction Y, and finally obtains the overlay error of each film layer on the plane of the substrate 100.

[0083] In this embodiment, in the step of forming the associated stack on the substrate 100, the structural form of the first overlay mark group 20a after rotating 90 degrees around the axis perpendicular to the substrate 100 is the same as the structural form of the second overlay mark group 20b. That is to say, the overlay mark group for measuring the first direction X and the second overlay mark group 20b in the associated stack for measuring the second direction Y are the same in morphological structure, and only the angles are different. The associated stack performs overlay measurement in the first direction X and the second direction Y through the first overlay mark group 20a and the second overlay mark group 20b with the same structure, which is conducive to simplifying the formation process of the associated stack, and is also convenient for obtaining the overlay error in the first direction X based on the first overlay mark group 20a, and obtaining the overlay error in the second direction Y based on the second overlay mark group 20b.

[0084] In this embodiment, in the first overlay mark group 20a, the overlay marks far from the substrate 100 expose a group of relative edges extending along the second direction Y in the overlay marks close to the substrate 100. The relative edges extending along the second direction Y are used to determine the overlay error between film layers in the first direction X, for example, the overlay error (201a-202a shift_X, such as Figure 8 As shown), the overlay error between the first middle layer overlay mark 202a and the first top layer overlay mark 203a (202a-203a shift_X, as shown Figure 8 As shown), the overlay error between the first bottom overlay mark group 201a and the first top overlay mark 203a (201a-203a shift_X, as shown Figure 8 shown).

[0085] In the second overlay mark group 20b, the overlay marks far from the substrate 100 expose a group of relative edges extending along the first direction X in the overlay marks close to the substrate 100. The relative edges extending along the first direction X are used to determine the overlay error between film layers in the second direction Y. For example, the overlay error (201b-202b shift_Y, such as Fig. 9 As shown), the overlay error between the second middle layer overlay mark 202b and the second top layer overlay mark 203b (202b-203b shift_Y, as shown Fig. 9 As shown), the overlay error between the second bottom overlay mark group 201b and the second top overlay mark 203b (201b-203b shift_Y, as shown Fig. 9 shown).

[0086] refer to Fig.10 , an embodiment of the present invention also provides a method for measuring overlay error.

[0087] The invention discloses a method for measuring overlay error, which is used to measure the formed semiconductor structure after the aforementioned method for forming the semiconductor structure, and comprises: obtaining a measurement image of the overlay marks of the stacked arrangement, wherein the measurement image comprises at least two adjacent film layers, wherein the overlay marks formed later in the adjacent film layers expose the overlay marks formed earlier, and the exposed overlay marks comprise at least a group of relative edges extending along a first direction X; and obtaining the overlay errors of the overlay marks of different film layers along a second direction Y according to the measurement image, wherein the second direction Y is perpendicular to the first direction X, and the overlay errors are used to characterize the overlay offsets of different film layers in the second direction Y during the process of forming the associated stack.

[0088] The overlay error measurement method provided by the embodiment of the present invention is used to measure the semiconductor structure formed by the above-mentioned semiconductor structure formation method. Because the overlay mark formed later exposes the relative edge of the overlay mark formed earlier extending along the first direction X, there are multiple images of the relative edges of the overlay marks extending along the first direction X in the measurement image. Based on the images of the relative edges of the multiple overlay marks extending along the first direction X, the position information of each overlay mark in the second direction Y can be obtained. According to the measurement image, the overlay alignment deviation of any two overlay marks in the second direction Y can be obtained. That is to say, the overlay marks stacked in the associated stack are measured once, and the overlay offset of any overlay mark in the second direction Y can be obtained, so as to obtain the overlay alignment deviation of any two film layers in the associated stack in the second direction Y, which is beneficial to improving the measurement efficiency and machine capacity utilization, shortening the overlay correction cycle, and reducing the overlay cost without sacrificing the overlay accuracy.

[0089] It should be noted that, in the step of forming the associated stack, the overlay marks of each film layer include two opposite first edges 200a and two opposite second edges 200b, the length of the first edge 200a is greater than the length of the second edge 200b, the first edge 200a extends along the first direction X, and the second edge 200b extends along the second direction Y; or, the first edge 200a extends along the second direction Y, and the second edge 200b extends along the first direction X.

[0090] In this embodiment, in the step of obtaining the measurement image of the stacked overlay mark, measurement can generally be performed through image recognition-based measurement technology (IBO, Image Based Overlay), scanning electron microscope (SEM, scanning electron microscope) and new diffraction measurement technology (IDM, In Device Metrology, also known as In Die Measurement).

[0091] The error measurement steps in the second direction Y are introduced below.

[0092] In this embodiment, in the step of forming the associated stack, in the second set of engraved marks, the second set of engraved marks formed later exposes a group of opposite edges extending along the first direction X in the second set of engraved marks formed earlier.

[0093] It should be noted that the first side 200a of each second set of engraved marks extends along the first direction X, and the second side 200b extends along the second direction Y.

[0094] refer to Fig.11, the steps of obtaining the overlay alignment deviation between the second overlay marks of different film layers in the second direction Y are described in detail.

[0095] Step S21, obtaining position information of a group of relative edges extending along the first direction X in the second set of engraved marks.

[0096] In the step of forming an associated stack, the second set of engraved marks formed later exposes a group of relative edges extending along the first direction X in the second set of engraved marks formed earlier. Based on this feature, it can be judged that the longer one in the first direction X is the second set of engraved marks formed earlier, and the shorter one in the first direction X is the second set of engraved marks formed later.

[0097] It should be noted that in the step of forming the associated stack, both ends of the second set of engraved marks formed later in the first direction X extend to the outside of the edge of the second set of engraved marks formed earlier. Based on this feature, it can be judged that the longer one in the first direction X is the second set of engraved marks formed later, and the shorter one in the first direction X is the second set of engraved marks formed later.

[0098] Based on the above two points, the second set of engraved marks formed first and the second set of engraved marks formed later can be accurately distinguished.

[0099] In this embodiment, after differentiating the second set of engraved marks formed successively in the second set of engraved marks group 20b, the position information of the relative sides of the second set of engraved marks formed successively along the first direction X can be obtained accordingly.

[0100] Step S22: acquiring the center line position information of the second overlay mark in the second direction Y according to the position information of a group of relative edges extending along the first direction X in the second overlay mark.

[0101] Specifically, the coordinate values ​​of points on two relative sides extending along the first direction X in the second set of engraved marks are selected, and the coordinate values ​​of the two relative sides are calculated to obtain the coordinate values ​​of the center line of the second set of engraved marks in the second direction Y, that is, to obtain the position information of the center line of the second set of engraved marks in the second direction Y.

[0102] Step S23, obtaining the overlay alignment deviations of different film layers in the associated stack in the second direction Y according to the center line position information of each of the second overlay marks in the second direction Y.

[0103] Specifically, by comparing the coordinate values ​​of the center lines of the second overlay marks in the second direction Y, the overlay errors of the second overlay marks of each film layer in the second direction Y can be obtained, and then the overlay errors of each film layer in the second direction Y can be obtained.

[0104] In this embodiment, the method for measuring the overlay error also measures the overlay error in the first direction X.

[0105] In step S1, in the step of obtaining the measurement image of the stacked overlay marks, the overlay marks formed later in the measurement image also reveal a group of relative edges of the overlay marks formed earlier extending along the second direction Y. Correspondingly, in step S2, the overlay error measurement method further includes: obtaining the overlay errors of the overlay marks of different film layers along the first direction X according to the measurement image, and the overlay errors are also used to characterize the overlay offsets of different film layers in the first direction X during the process of forming the associated stack.

[0106] The overlay error measurement method provided by the embodiment of the present invention is used to measure the semiconductor structure formed by the above-mentioned semiconductor structure formation method. Because the overlay mark formed later exposes the relative edge of the overlay mark formed earlier extending along the second direction Y, there are multiple images of the relative edges of the overlay marks extending along the second direction Y in the measurement image. Based on the images of the relative edges of the multiple overlay marks extending along the second direction Y, the position information of each overlay mark in the first direction X can be obtained. According to the measurement image, the overlay alignment deviation of any two overlay marks in the first direction X can be obtained. That is to say, the overlay marks stacked in the associated stack are measured once, and the overlay offset of any overlay mark in the first direction X can be obtained, so as to obtain the overlay alignment deviation of any two film layers in the associated stack in the first direction X, which is beneficial to improving the measurement efficiency and machine capacity utilization, shortening the overlay correction cycle, and reducing the overlay cost without sacrificing the overlay accuracy.

[0107] The error measurement steps in the first direction X are introduced below.

[0108] In this embodiment, in the step of forming the associated stack, each film layer also includes a second set of engraving marks for measuring in the second direction Y, and multiple second set of engraving marks constitute a second set of engraving marks group 20b, which is a component of the stacked set of engraving marks; in the second set of engraving marks group 20b, the later formed second set of engraving marks exposes a group of relative edges extending along the first direction X in the first formed second set of engraving marks.

[0109] In this embodiment, the first side 200a of the first engraved mark extends along the second direction Y, and the second side 200b extends along the first direction X.

[0110] refer to Fig.12 The step of obtaining the overlay alignment deviation between the overlay marks of different film layers in the first direction X comprises:

[0111] Step S24, obtaining position information of a group of relative edges extending along the second direction Y in the first set of engraved marks.

[0112] In the step of forming an associated stack, the first set of engraved marks formed later exposes a group of relative edges extending along the second direction Y in the first set of engraved marks formed earlier. Based on this feature, it can be judged that the longer one in the second direction Y is the first set of engraved marks formed earlier, and the shorter one in the second direction Y is the first set of engraved marks formed later.

[0113] It should be noted that in the step of forming the associated stack, both ends of the first set engraved mark formed later in the second direction Y extend to the outside of the edge of the first set engraved mark formed earlier. Based on this feature, it can be judged that the mark with a longer second direction Y is the first set engraved mark formed later, and the mark with a shorter second direction Y is the first set engraved mark formed later.

[0114] Based on the above two points, the first set of engraved marks formed earlier and the first set of engraved marks formed later can be accurately distinguished.

[0115] In this embodiment, after distinguishing the first set of engraved marks formed successively in the first set of engraved marks group 20a, the position information of the relative sides of the first set of engraved marks formed successively extending along the second direction Y can be obtained accordingly.

[0116] It should be noted that, in this embodiment, step S24 and step S21 are performed in the same step. In other embodiments, step S24 and step S21 may be performed in different steps.

[0117] Step S25: acquiring the centerline position information of the first engraved mark in the first direction X according to the position information of a group of relative edges extending along the second direction Y in the first engraved mark.

[0118] Specifically, the coordinate values ​​of points on two relative sides extending along the second direction Y in the first set of engraved marks are selected, and the coordinate values ​​of the two relative sides are calculated to obtain the coordinate value of the center line of the first set of engraved marks in the first direction X, that is, to obtain the position information of the center line of the first set of engraved marks in the first direction X.

[0119] It should be noted that, in this embodiment, step S25 and step S22 are performed in the same step. In other embodiments, step S25 and step S22 may be performed in different steps.

[0120] Step S26, obtaining the overlay alignment deviations of different film layers in the associated stack in the first direction X according to the center line position information of each of the first overlay marks in the first direction X.

[0121] Specifically, by comparing the coordinate values ​​of the center lines of the first overlay marks in the first direction X, the overlay errors of the first overlay marks of each film layer in the first direction X can be obtained, and then the overlay errors of each film layer in the first direction X can be obtained.

[0122] It should be noted that, in this embodiment, step S26 and step S23 are performed in the same step. In other embodiments, step S26 and step S23 may be performed in different steps.

[0123] In this embodiment, in the step of forming an associated stack on the substrate 100, the stacked overlay marks include a bottom overlay mark group 201, a middle overlay mark 202, and a top overlay mark 203 formed successively, the bottom overlay mark group 201 includes a bottom first overlay mark and a bottom second overlay mark, the middle overlay mark 202 includes a middle first overlay mark and a middle second overlay mark, and the top overlay mark 203 includes a top first overlay mark and a top second overlay mark. The first overlay mark group 20a includes a bottom first overlay mark, a middle first overlay mark, and a top first overlay mark. The second overlay mark group 20b includes a bottom second overlay mark, a middle second overlay mark, and a top second overlay mark.

[0124] The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the middle overlay mark 202 is located in the first direction X is obtained through the center line position information of the bottom first overlay mark and the middle first overlay mark in the first direction X. The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the middle overlay mark 202 is located in the second direction Y is obtained through the center line position information of the bottom second overlay mark and the middle second overlay mark in the second direction Y.

[0125] The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the top overlay mark 203 is located in the first direction X is obtained through the center line position information of the bottom first overlay mark and the top first overlay mark in the first direction X. The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the top overlay mark 203 is located in the second direction Y is obtained through the center line position information of the bottom second overlay mark and the top second overlay mark in the second direction Y.

[0126] The overlay alignment deviation of the film layer where the middle layer overlay mark 202 is located and the film layer where the top layer overlay mark 203 is located in the first direction X is obtained through the center line position information of the middle layer first overlay mark and the top layer first overlay mark in the first direction X. The overlay alignment deviation of the film layer where the middle layer overlay mark 202 is located and the film layer where the top layer overlay mark 203 is located in the second direction Y is obtained through the center line position information of the middle layer second overlay mark and the top layer second overlay mark in the second direction.

[0127] refer to Fig.13 , an embodiment of the present invention also provides a system for measuring overlay error.

[0128] The overlay error measurement system is used to measure the formed semiconductor structure after the aforementioned semiconductor structure formation method, including: a measurement image acquisition module 30, used to obtain a measurement image of the overlay mark of the stacked arrangement, the measurement image includes at least two adjacent film layers, the overlay mark formed later in the adjacent film layer exposes the overlay mark formed earlier, and the exposed overlay mark includes at least a group of relative edges extending along the first direction X; an overlay error acquisition module 40, used to obtain the overlay error of the overlay mark of different film layers along the second direction Y according to the measurement image, the second direction Y is perpendicular to the first direction X, and the overlay error is used to characterize the overlay offset of different film layers in the second direction Y during the process of forming the associated stack.

[0129] The overlay error measurement system provided by the embodiment of the present invention is used to measure the semiconductor structure formed by the above-mentioned semiconductor structure formation method. Because the overlay mark formed later exposes the relative edge of the overlay mark formed earlier extending along the first direction X, the measurement image acquired by the measurement image acquisition module 30 includes multiple images of the relative edges of the overlay marks extending along the first direction X. The overlay error acquisition module 40 can obtain the position information of each overlay mark in the second direction Y based on the images of the relative edges of the multiple overlay marks extending along the first direction X. The overlay alignment deviation of any two overlay marks in the second direction Y can be obtained according to the measurement image. That is to say, the overlay marks stacked in the associated stack are measured once, and the overlay offset of any overlay mark in the second direction Y can be obtained, thereby obtaining the overlay alignment deviation of any two film layers in the associated stack in the second direction Y, which is beneficial to improving the measurement efficiency and machine capacity utilization, shortening the overlay correction cycle, and reducing the overlay cost without sacrificing the overlay accuracy.

[0130] It should be noted that, in the step of forming the associated stack, the overlay marks of each film layer include two opposite first edges 200a and two opposite second edges 200b, the length of the first edge 200a is greater than the length of the second edge 200b, the first edge 200a extends along the first direction X, and the second edge 200b extends along the second direction Y; or, the first edge 200a extends along the second direction Y, and the second edge 200b extends along the first direction X.

[0131] In this embodiment, the measurement image acquisition module 30 can generally perform measurement through a measurement technology based on image recognition, a scanning electron microscope, and a new diffraction measurement technology.

[0132] The error measurement in the second direction Y is introduced below.

[0133] In this embodiment, in the step of forming the associated stack, in the second set of engraved marks 20b, the second set of engraved marks formed later exposes a group of opposite edges extending along the first direction X in the second set of engraved marks formed earlier.

[0134] It should be noted that the first side 200a of each second set of engraved marks extends along the first direction X, and the second side 200b extends along the second direction Y.

[0135] The overlay error acquisition module 40 is used to acquire position information of a group of relative edges extending along the first direction X in the second overlay mark.

[0136] In the step of forming an associated stack, the second set of engraved marks formed later exposes a group of relative edges extending along the first direction X in the second set of engraved marks formed earlier. Based on this feature, it can be judged that the longer one in the first direction X is the second set of engraved marks formed earlier, and the shorter one in the first direction X is the second set of engraved marks formed later.

[0137] It should be noted that in the step of forming the associated stack, both ends of the second set of engraved marks formed later in the first direction X extend to the outside of the edge of the second set of engraved marks formed earlier. Based on this feature, it can be judged that the longer one in the first direction X is the second set of engraved marks formed later, and the shorter one in the first direction X is the second set of engraved marks formed later.

[0138] Based on the above two points, the second set of engraved marks formed first and the second set of engraved marks formed later can be accurately distinguished.

[0139] In this embodiment, after differentiating the second set of engraved marks formed successively in the second set of engraved marks group 20b, the position information of the relative sides of the second set of engraved marks formed successively along the first direction X can be obtained accordingly.

[0140] An overlay error acquisition module 40, configured to acquire centerline position information of the second overlay mark in the second direction Y according to position information of a group of relative edges extending along the first direction X in the second overlay mark;

[0141] Specifically, the coordinate values ​​of points on two relative sides extending along the first direction X in the second set of engraved marks are selected, and the coordinate values ​​of the two relative sides are calculated to obtain the coordinate values ​​of the center line of the second set of engraved marks in the second direction Y, that is, to obtain the position information of the center line of the second set of engraved marks in the second direction Y.

[0142] The overlay error acquisition module 40 is used to acquire the overlay alignment deviation of different film layers in the associated stack in the second direction Y according to the center line position information of each of the second overlay marks in the second direction Y.

[0143] Specifically, by comparing the coordinate values ​​of the center lines of the second overlay marks in the second direction Y, the overlay errors of the second overlay marks of each film layer in the second direction Y can be obtained, and then the overlay errors of each film layer in the second direction Y can be obtained.

[0144] In this embodiment, the overlay error measurement system also measures the overlay error in the first direction X.

[0145] The measurement image acquired by the measurement image acquisition module 30 also includes a group of relative edges of the first formed overlay mark extending along the second direction Y that are exposed by the later formed overlay mark; the overlay error acquisition module 40 is also used to acquire the overlay errors of the overlay marks of different film layers along the first direction X based on the measurement image, and the overlay error is also used to characterize the overlay offset of different film layers in the first direction X during the process of forming the associated stack.

[0146] The overlay error measurement system provided by the embodiment of the present invention is used to measure the semiconductor structure formed by the above-mentioned semiconductor structure formation method. Because the overlay mark formed later exposes the relative edge of the overlay mark formed earlier extending along the second direction Y, the measurement image acquired by the measurement image acquisition module 30 includes multiple images of the relative edges of the overlay marks extending along the second direction Y. The overlay error acquisition module 40 can obtain the position information of each overlay mark in the first direction X based on the images of the relative edges of the multiple overlay marks extending along the second direction Y. The overlay alignment deviation of any two overlay marks in the first direction X can be obtained according to the measurement image. That is to say, the overlay marks stacked in the associated stack are measured once, and the overlay offset of any overlay mark in the first direction X can be obtained, so as to obtain the overlay alignment deviation of any two film layers in the associated stack in the first direction X, which is beneficial to improving the measurement efficiency and machine capacity utilization, shortening the overlay correction cycle, and reducing the overlay cost without sacrificing the overlay accuracy.

[0147] The error measurement in the first direction X is introduced below.

[0148] In this embodiment, in the step of forming the associated stack, each film layer also includes a second set of engraving marks for measuring in the second direction Y, and multiple second set of engraving marks constitute a second set of engraving marks group 20b, which is a component of the stacked set of engraving marks; in the second set of engraving marks group 20b, the later formed second set of engraving marks exposes a group of relative edges extending along the first direction X in the first formed second set of engraving marks.

[0149] In this embodiment, the first side 200a of the first engraved mark extends along the second direction Y, and the second side 200b extends along the first direction X.

[0150] The overlay error acquisition module 40 is used to acquire position information of a group of relative edges extending along the second direction Y in the first overlay mark.

[0151] In the step of forming an associated stack, the first set of engraved marks formed later exposes a group of relative edges extending along the second direction Y in the first set of engraved marks formed earlier. Based on this feature, it can be judged that the longer one in the second direction Y is the first set of engraved marks formed earlier, and the shorter one in the second direction Y is the first set of engraved marks formed later.

[0152] It should be noted that in the step of forming the associated stack, both ends of the first set engraved mark formed later in the second direction Y extend to the outside of the edge of the first set engraved mark formed earlier. Based on this feature, it can be judged that the mark with a longer second direction Y is the first set engraved mark formed later, and the mark with a shorter second direction Y is the first set engraved mark formed later.

[0153] Based on the above two points, the first set of engraved marks formed earlier and the first set of engraved marks formed later can be accurately distinguished.

[0154] In this embodiment, after distinguishing the first set of engraved marks formed successively in the first set of engraved marks group 20a, the position information of the relative sides of the first set of engraved marks formed successively extending along the second direction Y can be obtained accordingly.

[0155] The overlay error acquisition module 40 is used to acquire the center line position information of the first overlay mark in the first direction X according to the position information of a group of relative edges extending along the second direction Y in the first overlay mark.

[0156] Specifically, the coordinate values ​​of points on two relative sides extending along the second direction Y in the first set of engraved marks are selected, and the coordinate values ​​of the two relative sides are calculated to obtain the coordinate value of the center line of the first set of engraved marks in the first direction X, that is, to obtain the position information of the center line of the first set of engraved marks in the first direction X.

[0157] The overlay error acquisition module 40 is used to acquire the overlay alignment deviations of different film layers in the associated stack in the first direction X according to the center line position information of each of the first overlay marks in the first direction X.

[0158] Specifically, by comparing the coordinate values ​​of the center lines of the first overlay marks in the first direction X, the overlay errors of the first overlay marks of each film layer in the first direction X can be obtained, and then the overlay errors of each film layer in the first direction X can be obtained.

[0159] In this embodiment, in the step of forming an associated stack on the substrate 100, the stacked overlay marks include a bottom overlay mark group 201, a middle overlay mark 202, and a top overlay mark 203 formed successively, the bottom overlay mark group 201 includes a bottom first overlay mark and a bottom second overlay mark, the middle overlay mark 202 includes a middle first overlay mark and a middle second overlay mark, and the top overlay mark 203 includes a top first overlay mark and a top second overlay mark. The first overlay mark group 20a includes a bottom first overlay mark, a middle first overlay mark, and a top first overlay mark. The second overlay mark group 20b includes a bottom second overlay mark, a middle second overlay mark, and a top second overlay mark.

[0160] The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the middle overlay mark 202 is located in the first direction X is obtained through the center line position information of the bottom first overlay mark and the middle first overlay mark in the first direction X. The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the middle overlay mark 202 is located in the second direction Y is obtained through the center line position information of the bottom second overlay mark and the middle second overlay mark in the second direction Y.

[0161] The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the top overlay mark 203 is located in the first direction X is obtained through the center line position information of the bottom first overlay mark and the top first overlay mark in the first direction X. The overlay alignment deviation of the film layer where the bottom overlay mark group 201 is located and the film layer where the top overlay mark 203 is located in the second direction Y is obtained through the center line position information of the bottom second overlay mark and the top second overlay mark in the second direction Y.

[0162] The overlay alignment deviation of the film layer where the middle layer overlay mark 202 is located and the film layer where the top layer overlay mark 203 is located in the first direction X is obtained through the center line position information of the middle layer first overlay mark and the top layer first overlay mark in the first direction X. The overlay alignment deviation of the film layer where the middle layer overlay mark 202 is located and the film layer where the top layer overlay mark 203 is located in the second direction Y is obtained through the center line position information of the middle layer second overlay mark and the top layer second overlay mark in the second direction.

[0163] Accordingly, an embodiment of the present invention further provides a device, which can implement the overlay error measurement method provided by the embodiment of the present invention by loading the above-mentioned overlay error measurement method in the form of a program. An optional hardware structure of the terminal device provided by the embodiment of the present invention can be as follows Fig.14 As shown, it includes: at least one processor 01, at least one communication interface 02, at least one memory 03 and at least one communication bus 04.

[0164] In this embodiment, the number of processor 01, communication interface 02, memory 03, and communication bus 04 is at least one, and the processor 01, communication interface 02, and memory 03 communicate with each other through the communication bus 04. The communication interface 02 can be an interface of a communication module for network communication, such as an interface of a GSM module. The processor 01 may be a central processing unit CPU, or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement an embodiment of the present invention. The memory 03 may include a high-speed RAM memory, and may also include a non-volatile memory (NVM), such as at least one disk storage. Among them, the memory 03 stores one or more computer instructions, and the one or more computer instructions are executed by the processor 01 to implement the overlay error measurement method provided in an embodiment of the present invention.

[0165] It should be noted that the above-mentioned terminal device may also include other devices (not shown) that may not be necessary for understanding the contents disclosed in the embodiments of the present invention; given that these other devices may not be necessary for understanding the contents disclosed in the embodiments of the present invention, the embodiments of the present invention will not introduce them one by one.

[0166] An embodiment of the present invention further provides a storage medium, wherein the storage medium stores one or more computer instructions, and the one or more computer instructions are used to implement the overlay error measurement method provided by the embodiment of the present invention.

[0167] In the overlay error measurement method provided in an embodiment of the present invention, a measurement interval is set to detect the first alignment signal at each measurement position, detect the change of the first alignment signal, and obtain the overlay error according to the sudden change of the first alignment signal. That is, a nonlinear method is used to obtain the overlay error, which is beneficial to improving the accuracy of overlay error measurement and has low measurement cost.

[0168] The above-mentioned embodiments of the present invention are combinations of elements and features of the present invention. Unless otherwise mentioned, the elements or features may be considered as optional. Each element or feature may be put into practice without being combined with other elements or features. In addition, the embodiments of the present invention may be constructed by combining some elements and / or features. The order of operations described in the embodiments of the present invention may be rearranged. Some constructions of any one embodiment may be included in another embodiment, and may be replaced by the corresponding construction of another embodiment. It is obvious to those skilled in the art that claims that do not have a clear reference relationship to each other in the attached claims may be combined into embodiments of the present invention, or may be included as new claims in the amendment after submitting this application.

[0169] Embodiments of the present invention may be implemented by various means such as hardware, firmware, software or a combination thereof. In a hardware configuration, the method according to an exemplary embodiment of the present invention may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, etc. In a firmware or software configuration, embodiments of the present invention may be implemented in the form of modules, processes, functions, etc. The software code may be stored in a memory unit and executed by a processor. The memory unit is located inside or outside the processor and may send data to the processor and receive data from the processor via various known means.

[0170] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0171] The semiconductor structure can be formed by the formation method described in the above embodiment, or by other formation methods. For the specific description of the semiconductor structure described in this embodiment, reference can be made to the corresponding description in the above embodiment, and this embodiment will not be repeated here.

[0172] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that: include: substrate; An associated stack, comprising: a plurality of film layers sequentially disposed on the substrate, each of the film layers having an overlay mark; In a direction perpendicular to the substrate, the overlay marks of each film layer are stacked, and the overlay marks in adjacent film layers far away from the substrate expose the overlay marks close to the substrate, and the exposed overlay marks include at least one group of relative edges extending along a first direction, and the relative edges are used to judge the overlay error along a second direction, and the second direction is perpendicular to the first direction.

2. The semiconductor structure according to claim 1, wherein: The overlay mark in each film layer includes two opposite first edges and two opposite second edges, the first edges extend along the first direction, and the second edges extend along the second direction; Alternatively, the first edge extends along the second direction, and the second edge extends along the first direction.

3. The semiconductor structure according to claim 1, wherein: Each film layer includes a first set mark for measuring in a first direction and a second set mark for measuring in a second direction, the first set marks of multiple film layers constitute a first set mark group, the second set marks of multiple film layers constitute a second set mark group, and the stacked set set marks include the first set mark group and the second set mark group; In the first overlay mark group, the overlay marks far from the substrate expose a group of relative edges extending along the second direction in the overlay marks close to the substrate, and the relative edges extending along the second direction are used to determine the overlay error between film layers in the first direction; In the second overlay mark group, the overlay marks away from the substrate expose a group of relative edges extending along the first direction in the overlay marks close to the substrate, and the relative edges extending along the first direction are used to determine the overlay error between film layers in the second direction.

4. The semiconductor structure according to claim 3, characterized in that The structural form of the first set of engraved mark groups after rotating 90 degrees around an axis perpendicular to the substrate is the same as the structural form of the second set of engraved mark groups.

5. The semiconductor structure according to claim 1, wherein: The shapes of the overlay marks include rectangle and square.

6. The semiconductor structure according to claim 1, wherein: The stacked overlay marks include a bottom overlay mark, a middle overlay mark and a top overlay mark which are sequentially located on the substrate; The middle layer overlay mark extends along a first direction, and both ends of the middle layer overlay mark in the first direction extend to the outside of the edge of the bottom layer overlay mark, and the relative edges of the middle layer overlay mark extending along the first direction are located on the inner side of the relative edges of the bottom layer overlay mark extending along the first direction; the top layer overlay mark extends along the first direction, and both ends of the first direction extend to the outside of the edge of the middle layer overlay mark, and the relative edges of the top layer overlay mark extending along the first direction are located on the inner side of the relative edges of the middle layer overlay mark extending along the first direction.

7. The semiconductor structure according to claim 6, wherein: The relative edges of the bottom layer overlay mark, the middle layer overlay mark and the top layer overlay mark at both ends of the first direction all extend along the second direction, the extension direction of the middle layer overlay mark is perpendicular to the relative edges of the bottom layer overlay mark at both ends of the first direction, and the extension direction of the top layer overlay mark is perpendicular to the relative edges of the middle layer overlay mark at both ends of the first direction.

8. The semiconductor structure according to claim 6, wherein: The bottom layer overlay mark occupies a rectangular area and includes one or more mark patterns, the mark patterns extend along the second direction, the two ends of the mark patterns in the second direction are aligned, and the mark patterns are spaced apart in the first direction.

9. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; Forming an associated stack on the substrate, the steps of forming the associated stack comprising: sequentially forming a plurality of film layers on the substrate, each of the film layers having an overlay mark; In a direction perpendicular to the substrate, the overlay marks of each film layer are stacked, and the overlay marks formed later in the adjacent film layer expose the overlay marks formed earlier, and the exposed overlay marks include at least one group of relative edges extending along the first direction, and the relative edges are used to judge the overlay error along the second direction, and the second direction is perpendicular to the first direction.

10. The method for forming a semiconductor structure according to claim 9, wherein: In the step of forming an associated stack, the overlay mark in each film layer includes two opposite first edges and two opposite second edges, the first edges extend along the first direction, and the second edges extend along the second direction; or, the first edges extend along the second direction, and the second edges extend along the first direction.

11. The method for forming a semiconductor structure according to claim 9, wherein: In the step of forming the associated stack, each film layer includes a first overlay mark for measuring in the first direction and a second overlay mark for measuring in the second direction, the first overlay marks of the plurality of film layers constitute a first overlay mark group, the second overlay marks of the plurality of film layers constitute a second overlay mark group, the first overlay mark group and the second overlay mark group are components of the stacked overlay mark arrangement; in the first overlay mark group, the later formed first overlay mark exposes a group of relative edges extending along the second direction in the earlier formed first overlay mark, the relative edges extending along the second direction are used to determine the overlay error between the film layers in the first direction; In the second overlay mark group, the second overlay marks formed later expose a group of relative edges extending along the first direction in the second overlay marks formed earlier, and the relative edges extending along the first direction are used to determine the overlay error between film layers in the second direction.

12. The method for forming a semiconductor structure according to claim 9, wherein: In the step of forming an associated stack on the substrate, the stacked overlay marks include a bottom overlay mark, a middle overlay mark and a top overlay mark formed successively; In the step of forming the middle layer overlay mark, the middle layer overlay mark extends along a first direction, both ends of the middle layer overlay mark in the first direction extend to the outside of the edge of the bottom layer overlay mark, and the relative edges of the middle layer overlay mark extending along the first direction are located inside the relative edges of the bottom layer overlay mark extending along the first direction; In the step of forming the top-layer overlay mark, the top-layer overlay mark extends along a first direction, and both ends of the first direction extend to the outside of the edge of the middle-layer overlay mark, and the relative edges of the top-layer overlay mark extending along the first direction are located on the inner side of the relative edges of the middle-layer overlay mark extending along the first direction.

13. A method for measuring overlay error, characterized in that: After the method for forming the semiconductor structure of claims 9 to 12, the method for measuring the formed semiconductor structure comprises: Acquire a measurement image of the stacked overlay marks, the measurement image comprising at least two adjacent film layers, the overlay mark formed later in the adjacent film layers exposes the overlay mark formed earlier, and the exposed overlay mark comprises at least a set of relative edges extending along a first direction; According to the measured image, the overlay error of the overlay marks of different film layers along the second direction is obtained, where the second direction is perpendicular to the first direction, and the overlay error is used to characterize the overlay offset of different film layers in the second direction during the process of forming the associated stack.

14. The method for measuring overlay error as claimed in claim 13, wherein: In the step of acquiring a measurement image of the stacked overlay marks, the overlay marks formed later in the measurement image also reveal a group of relative edges extending along the second direction in the overlay marks formed earlier; The method for measuring the overlay error also includes: obtaining the overlay error of the overlay marks of different film layers along the first direction according to the measurement image, and the overlay error is also used to characterize the overlay offset of different film layers in the first direction during the process of forming the associated stack.

15. The method for measuring overlay error according to claim 14, wherein: In the step of forming the associated stack, each film layer includes a first set mark for measuring in a first direction, a plurality of the first set marks constitute a first set mark group, and the first set mark group is a component of the stacked set set mark; In the first set of engraved marks, the later formed first set of engraved marks exposes a group of opposite edges extending along the second direction in the earlier formed first set of engraved marks; The step of obtaining the overlay alignment deviation between the overlay marks of different film layers comprises: obtaining position information of a group of relative edges extending along the second direction in the first overlay marks; obtaining centerline position information of the first overlay marks in the first direction based on the position information of a group of relative edges extending along the second direction in the first overlay marks; According to the center line position information of each of the first overlay marks in the first direction, the overlay alignment deviations of different film layers in the associated stack in the first direction are obtained.

16. The method for measuring overlay error as claimed in claim 13, wherein: In the step of forming the associated stack, each film layer includes a second set mark for measuring in a second direction, a plurality of the second set marks constitute a second set mark group, and the second set mark group is a component of the stacked set set mark; In the second set of engraved marks, the second set of engraved marks formed later exposes a group of opposite edges extending along the first direction in the second set of engraved marks formed earlier; The step of obtaining the overlay alignment deviation between the overlay marks of different film layers comprises: obtaining the position information of a group of relative edges extending along the first direction in the second overlay marks; obtaining the centerline position information of the second overlay marks in the second direction according to the position information of a group of relative edges extending along the first direction in the second overlay marks; According to the center line position information of each of the second overlay marks in the second direction, the overlay alignment deviations of different film layers in the associated stack in the second direction are obtained.

17. A system for measuring overlay error, used for measuring the formed semiconductor structure after the semiconductor structure of claims 9 to 12 is formed, characterized in that: include: A measurement image acquisition module, used for acquiring a measurement image of the stacked overlay marks, wherein the measurement image includes at least two adjacent film layers, the overlay marks formed later in the adjacent film layers expose the overlay marks formed earlier, and the exposed overlay marks include at least a set of relative edges extending along a first direction; The overlay error acquisition module is used to obtain the overlay error of the overlay marks of different film layers along the second direction according to the measurement image, wherein the second direction is perpendicular to the first direction, and the overlay error is used to characterize the overlay offset of different film layers in the second direction during the process of forming the associated stack.

18. The overlay error measurement system according to claim 17, wherein: The measurement image acquired by the measurement image acquisition module also includes a group of relative edges extending along the second direction in the first-formed overlay mark exposed by the later-formed overlay mark; The overlay error acquisition module is also used to obtain the overlay errors of the overlay marks of different film layers along the first direction according to the measurement image. The overlay error is also used to characterize the overlay offsets of different film layers in the first direction during the process of forming the associated stack.

19. A device, characterized in that It comprises at least one memory and at least one processor, wherein the memory stores one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the method for measuring overlay error as claimed in any one of claims 13 to 16.

20. A storage medium, characterized in that: The storage medium stores one or more computer instructions, and the one or more computer instructions are used to implement the method for measuring overlay error as described in any one of claims 13 to 16.

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