Topological Circuit, Control System and Control Method of Single-Phase Dual-Active Half-Bridge Inverter

Abstract

The present invention discloses a topology circuit, a control system and a control method for a single-phase dual-active half-bridge inverter. The topology circuit includes a primary half-bridge circuit, a transformer and a secondary half-bridge circuit; the primary half-bridge circuit includes a first capacitor, a second capacitor, a first switching tube and a second switching tube; the secondary half-bridge circuit includes a third capacitor, a fourth capacitor, a third switching tube, a fourth switching tube, a fifth switching tube and a sixth switching tube. The above topology circuit adopts a single-pole structure, reducing the loss of power transmission during the use of the inverter; reducing the number of switching tubes used and lowering the switching loss brought about by the operation of the devices, thereby improving the operation efficiency and power density of the inverter; and linearizing the non-linear function of the closed-loop control to optimize the control method for regulating the inverter and reducing the control difficulty of the inverter.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly to a topology circuit, a control system and a control method of a single-phase dual-active half-bridge inverter. Background Art

[0002] With the increasing attention to environmental issues and the rising global energy prices, various countries have begun to attach importance to the development of renewable energy; in renewable energy technologies, photovoltaic power generation occupies an important position. Photovoltaic power generation needs to be connected to the grid or output energy storage through an inverter; most of the existing inverters are two-stage structures, the front stage is a DC-DC (direct current-direct current) stage, which is used to track the maximum power point of the photovoltaic module, and the rear stage is a DC-AC (direct current-alternating current) stage, which is used to inject alternating current into the grid. However, such inverters use more switching tubes due to the two-stage structure, resulting in larger power losses; at the same time, the volume of such inverters is larger and the cost is higher. Therefore, the inverters in the prior art have the problem of large power consumption losses. Summary of the Invention

[0003] Embodiments of the present invention provide a topology circuit, a control system and a control method of a single-phase dual-active half-bridge inverter, aiming to solve the problem of large power consumption losses existing in the inverters in the prior art.

[0004] In a first aspect, embodiments of the present invention disclose a topology circuit of a single-phase dual-active half-bridge inverter, wherein the topology circuit includes a primary half-bridge circuit, a transformer and a secondary half-bridge circuit;

[0005] The primary half-bridge circuit includes a first capacitor, a second capacitor, a first switching tube and a second switching tube; the secondary half-bridge circuit includes a third capacitor, a fourth capacitor, a third switching tube, a fourth switching tube, a fifth switching tube and a sixth switching tube;

[0006] One end of the first capacitor is connected to the drain of the first switching tube, and the connection point is used as the positive pole of the DC power supply; one end of the second capacitor is connected to the source of the second switching tube, and the connection point is used as the negative pole of the DC power supply; the other end of the first capacitor is connected to the other end of the second capacitor and the opposite-named terminal of the primary side of the transformer, and the source of the first switching tube is connected to the drain of the second switching tube and the same-named terminal of the primary side of the transformer;

[0007] One end of the third capacitor is connected to the drain of the third switching transistor, and the connection point serves as an AC input terminal; one end of the fourth capacitor is connected to the drain of the sixth switching transistor, and the connection point serves as another AC input terminal; the source of the third switching transistor is connected to the source of the fourth switching transistor, the drain of the fourth switching transistor is connected to the drain of the fifth switching transistor and the same-named terminal of the secondary side of the transformer; the source of the sixth switching transistor is connected to the source of the fifth switching transistor; the other end of the third capacitor is connected to the other end of the fourth capacitor and the different-named terminal of the secondary side of the transformer, and the equivalent leakage inductance of the transformer is connected in series between the same-named terminal of the secondary side and the drain of the fourth switching transistor;

[0008] The load is connected in parallel between the two AC input terminals.

[0009] In a second aspect, an embodiment of the present invention further discloses a control system for a topology circuit of a single-phase dual-active half-bridge inverter, wherein the control system includes a controller, a voltage sensor, a current sensor, a pulse modulation unit, and a topology circuit of a single-phase dual-active half-bridge inverter as described in the first aspect above;

[0010] The two voltage detection terminals of the voltage sensor are respectively electrically connected to the two AC input terminals to measure the grid-side input voltage;

[0011] The controller is respectively connected to the detection output terminal of the voltage sensor, the detection output terminal of the current sensor, and the control receiving terminal of the pulse modulation unit, and the pulse signal output terminal of the pulse modulation unit is respectively connected to the control terminals of the switching transistors in the topology circuit of the single-phase dual-active half-bridge inverter;

[0012] The detection terminal of the current sensor is connected in series to one of the AC input terminals.

[0013] In a third aspect, an embodiment of the present invention further discloses a control method for a topology circuit of a single-phase dual-active half-bridge inverter, wherein the control method is applied to the controller of the control system of the topology circuit of the single-phase dual-active half-bridge inverter as described in the second aspect above, and the control method includes:

[0014] Real-time collect the amplitude and angular frequency of the grid-side input voltage connected to the two AC input terminals through the voltage sensor;

[0015] Analyze the angular frequency according to the preset phase shift angle expression to calculate the phase angle corresponding to the angular frequency at the current moment;

[0016] Add the phase angle to the compensation value of the angular frequency at the current moment to obtain a phase compensation angle;

[0017] Calculate the phase compensation angle according to the preset switching frequency expression to obtain the switching frequency corresponding to the switching tube at the current moment;

[0018] Input the phase compensation angle and the switching frequency into the pulse modulation unit, so that the pulse modulation unit inputs corresponding drive signals to each switching tube;

[0019] Collect the output current value in real time through a current sensor;

[0020] Subtract the output current value from the corresponding calculated value to obtain a current error value;

[0021] Update the compensation value according to the current error value.

[0022] The embodiment of the present application discloses a topology circuit, a control system and a control method of a single-phase dual-active half-bridge inverter. The topology circuit includes a primary half-bridge circuit, a transformer and a secondary half-bridge circuit; the primary half-bridge circuit includes a first capacitor, a second capacitor, a first switching tube and a second switching tube; the secondary half-bridge circuit includes a third capacitor, a fourth capacitor, a third switching tube, a fourth switching tube, a fifth switching tube and a sixth switching tube. The above topology circuit adopts a single-pole structure, reducing the loss of power transmission during the use of the inverter; reducing the number of switching tubes used, reducing the switching loss brought by the operation of the devices, thereby improving the operation efficiency and power density of the inverter; and linearizing the non-linear function of the closed-loop control, optimizing the control method for regulating the inverter, and reducing the control difficulty of the inverter. Description of the Drawings

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.

[0024] Figure 1 It is the circuit structure diagram of the topology circuit provided by the embodiment of the present invention;

[0025] Figure 2 It is the application effect diagram of the topology circuit provided by the embodiment of the present invention;

[0026] Figure 3 It is another application effect diagram of the topology circuit provided by the embodiment of the present invention;

[0027] Figure 4 It is another application effect diagram of the topology circuit provided by the embodiment of the present invention;

[0028] Figure 5Schematic diagram of the control system of the topology circuit provided by the embodiment of the present invention;

[0029] Figure 6 Method flowchart of the control method of the topology circuit provided by the embodiment of the present invention;

[0030] Reference numerals: C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; Q1, first switching tube; Q2, second switching tube; Q3, third switching tube; Q4, fourth switching tube; Q5, fifth switching tube; Q6, sixth switching tube; T r1 , transformer; L lk , equivalent leakage inductance; 11, controller; 12, voltage sensor; 13, current sensor; 14, pulse modulation unit; R1, load; L1, first inductor; L2, second inductor; C5, fifth capacitor. Detailed implementation manners

[0031] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0032] It should be understood that when used in this specification and the appended claims, the terms "comprises" and "comprising" indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.

[0033] It should also be understood that the terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms.

[0034] It should be further understood that the term " / and" as used in the specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0035] The embodiment of the present invention discloses a topology circuit of a single-phase dual-active half-bridge inverter, as Figure 1 shown, the topology circuit includes a primary half-bridge circuit, a transformer T r1and a secondary half-bridge circuit; the primary half-bridge circuit includes a first capacitor C1, a second capacitor C2, a first switching transistor Q1 and a second switching transistor Q2; the secondary half-bridge circuit includes a third capacitor C3, a fourth capacitor C4, a third switching transistor Q3, a fourth switching transistor Q4, a fifth switching transistor Q5 and a sixth switching transistor Q6; one end of the first capacitor C1 is connected to the drain of the first switching transistor Q1, and the connection point serves as the positive pole of the DC power supply; one end of the second capacitor C2 is connected to the source of the second switching transistor Q2, and the connection point serves as the negative pole of the DC power supply; the other end of the first capacitor C1 is connected to the other end of the second capacitor C2 and the primary different-named terminal of the transformer T r1 ; the source of the first switching transistor Q1 is connected to the drain of the second switching transistor Q2 and the primary same-named terminal of the transformer T r1 ; one end of the third capacitor C3 is connected to the drain of the third switching transistor Q3, and the connection point serves as an AC input terminal; one end of the fourth capacitor C4 is connected to the drain of the sixth switching transistor Q6, and the connection point serves as another AC input terminal; the source of the third switching transistor Q3 is connected to the source of the fourth switching transistor Q4, and the drain of the fourth switching transistor Q4 is connected to the drain of the fifth switching transistor Q5 and the secondary same-named terminal of the transformer T r1 ; the source of the sixth switching transistor Q6 is connected to the source of the fifth switching transistor Q5; the other end of the third capacitor C3 is connected to the other end of the fourth capacitor C4 and the secondary different-named terminal of the transformer T r1 ; the equivalent leakage inductance L r1 of the transformer T lk is connected in series between the secondary same-named terminal and the drain of the fourth switching transistor Q4; the load R1 is connected in parallel between the two AC input terminals.

[0036] The positive and negative poles of the DC power supply in the primary half-bridge circuit are used as DC source inputs, and the voltage value of the DC source input is V dc ; then the positive and negative poles of the DC source input are respectively connected to the first capacitor C1 and the second capacitor C2, where the positive pole of the DC power supply is connected to one end of the first capacitor C1 and the drain of the first switching transistor Q1, and the negative pole of the DC power supply is connected to one end of the second capacitor C2 and the source of the second switching transistor Q2. The other end of the first capacitor C1 and the other end of the second capacitor C2 are connected, and the node is connected to the primary different-named terminal of the transformer T r1 ; the source of the first switching transistor Q1 and the drain of the second switching transistor Q2 are connected, and the node is connected to the primary same-named terminal of the transformer T r1 .

[0037] In the embodiment of the present invention, for the transformer T r1 all the leakage inductance of the transformer is equivalently incorporated into the transformer T r1On the secondary side, the leakage inductance of the transformer can be expressed as the equivalent leakage inductance L lk , the equivalent leakage inductance L lk is not an actually existing inductance. The same-name terminal of the secondary side of the transformer T r1 is connected to one end of the equivalent leakage inductance L lk .

[0038] In the embodiment of the present invention, the two AC input terminals in the secondary half-bridge circuit are used to connect to the power grid, so as to output the converted alternating current to the power grid. Then, the two AC input terminals are respectively connected to the third capacitor C3 and the fourth capacitor C4. One AC input terminal is connected to one end of the third capacitor C3 and the drain of the third switching transistor Q3, and the other AC input terminal is connected to the negative electrode of the fourth capacitor C4 and the source of the sixth switching transistor Q6. The source of the third switching transistor Q3 is connected to the drain of the fourth switching transistor Q4, and the source of the fifth switching transistor Q5 is connected to the drain of the sixth switching transistor Q6. The other ends of the third capacitor C3 and the fourth capacitor C4 are connected, and the node is connected to the secondary side of the transformer T r1 at the different-name terminal. The source of the fourth switching transistor Q4 and the drain of the fifth switching transistor Q5 are connected, and the node is connected to the other end of the equivalent leakage inductance L lk .

[0039] In a more specific embodiment, the capacitance values of the first capacitor C1 and the second capacitor C2 are equal. Among them, the capacitance values of the third capacitor C3 and the fourth capacitor C4 are equal.

[0040] In a more specific embodiment, the first switching transistor Q1, the second switching transistor Q2, the third switching transistor Q3, the fourth switching transistor Q4, the fifth switching transistor Q5 and the sixth switching transistor Q6 are all Insulated-Gate Bipolar Transistors (IGBTs) or Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs).

[0041] In a more specific embodiment, the topology circuit further includes a filter circuit, and the filter circuit is connected in parallel between two AC input terminals of the secondary half-bridge circuit. Wherein, the filter circuit includes a first inductor L1, a second inductor L2, and a fifth capacitor C5; one end of the first inductor L1 is connected to one end of the third capacitor C3, the other end of the first inductor L1 is connected to one end of the fifth capacitor C5 and one end of the second inductor L2, and the other end of the second inductor L2 is connected to one end of the load R1; the other end of the fifth capacitor C5 is connected to the other end of the load R1. The first inductor, the second inductor, and the fifth capacitor form an LCL filter, so as to filter the alternating current output by the AC input terminal of the secondary half-bridge circuit, thereby improving the stability of the waveform of the output alternating current.

[0042] The embodiment of the present application also discloses a control system for a topology circuit of a single-phase dual-active half-bridge inverter, as Figure 5 shown. The control system includes a controller 11, a voltage sensor 12, a current sensor 13, a pulse modulation unit 14, and the topology circuit of the single-phase dual-active half-bridge inverter described in the above embodiment. Wherein, two voltage detection terminals of the voltage sensor 12 are respectively electrically connected to the two AC input terminals to measure the grid-side input voltage; the controller 11 is respectively connected to the detection output terminal of the voltage sensor 12, the detection output terminal of the current sensor 13, and the control receiving terminal of the pulse modulation unit 14, and the pulse signal output terminal of the pulse modulation unit 14 is respectively connected to the control terminals of each switch tube in the topology circuit of the single-phase dual-active half-bridge inverter; the detection terminal of the current sensor 13 is connected in series to one of the AC input terminals.

[0043] The embodiment of the present application also discloses a control method for a topology circuit of a single-phase dual-active half-bridge inverter. Wherein, the control method is applied to a controller, and the controller can be an SoC control chip, a PLC (Programmable Logic Controller) circuit board, or a terminal device such as a laptop computer, a desktop computer, a tablet computer, or a mobile phone. As Figure 6 shown, the control method includes steps S110 to S180.

[0044] S110. Real-time collect the amplitude and angular frequency of the grid-side input voltage connected to the two AC input terminals through the voltage sensor.

[0045] That is, obtain the amplitude and angular frequency of the grid-side voltage at the current moment, and the angular frequency can be expressed as .

[0046] Figure 2Figure (a) shows the operating state of the inverter during the first period ( ) when the grid-side input voltage is greater than or equal to zero. Figure 2 Figure (b) shows the operating state of the inverter during the second period ( ) when the grid-side input voltage is greater than or equal to zero. Figure 2 Figure (c) shows the operating state of the inverter during the first period ( ) when the grid-side input voltage is less than zero. Figure 2 Figure (d) shows the operating state of the inverter during the second period ( ) when the grid-side input voltage is less than zero.

[0047] When the grid-side input voltage is greater than or equal to zero, as shown in Figure 2 Figure (a), during the first period, the first switch Q1, the fourth switch Q4, the fifth switch Q5, and the sixth switch Q6 are turned on, and the second switch Q2 and the third switch Q3 are turned off; as shown in Figure 2 Figure (b), during the second period, the first switch Q1, the third switch Q3, the fourth switch Q4, and the sixth switch Q6 are turned on, and the second switch Q2 and the fifth switch Q5 are turned off. The conduction control of the latter half of the switching period is symmetric with that of the former half.

[0048] When the grid-side input voltage is less than zero, as shown in Figure 2 Figure (c), during the first period, the first switch Q1, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are turned on, and the second switch Q2 and the sixth switch Q6 are turned off; as shown in Figure 2 Figure (d), during the second period, the first switch Q1, the third switch Q3, the fifth switch Q5, and the sixth switch Q6 are turned on, and the second switch Q2 and the fourth switch Q4 are turned off. The conduction control of the latter half of the switching period is symmetric with that of the former half.

[0049] Referring to Figure 3 , Figure 3 is the waveform diagram of the single-phase dual-active half-bridge inverter provided by the embodiment of the present invention when it operates with the grid-side input voltage V ac greater than or equal to zero. Among them, the upper light-colored line is the curve of the product of the DC input voltage and the number of turns of the coil N, the middle lighter line is the curve of the grid-side input voltage V ac curve, and the lower darker line is the curve of the leakage inductance current curve. When the grid-side input V acWhen it is greater than or equal to zero, the first switching tube Q1 and the second switching tube Q2 conduct alternately in the first half of the switching period and the second half of the switching period, and the third switching tube Q3 and the fifth switching tube Q5 conduct alternately with a phase shift angle φ relative to the first switching tube Q1 and the second switching tube Q2. Therefore, by determining the phase shift angle, precise control of the conduction of the third switching tube Q3, the fourth switching tube Q4, the fifth switching tube Q5, and the sixth switching tube Q6 can be achieved.

[0050] Specifically, in the first time period when the grid-side input voltage is greater than or equal to zero, the first switching tube Q1, the fourth switching tube Q4, the fifth switching tube Q5, and the sixth switching tube Q6 are controlled to conduct, and the second switching tube Q2 and the third switching tube Q3 are controlled to turn off. The voltage lk across both ends of the equivalent leakage inductance L is: ; where is the ratio of the number of turns of the primary winding to the number of turns of the secondary winding in the transformer T r1 , is the DC input voltage, is the grid-side input voltage; the instantaneous expression of the leakage inductance current lk of the equivalent leakage inductance L is: ; where is the current value of the leakage inductance current at moment, is the inductance value of the equivalent leakage inductance L lk .

[0051] Furthermore, in the second time period when the grid-side input voltage is greater than or equal to zero, the first switching tube Q1, the third switching tube Q3, the fourth switching tube Q4, and the sixth switching tube Q6 are controlled to conduct, and the second switching tube Q2 and the fifth switching tube Q5 are controlled to turn off. The voltage lk across both ends of the equivalent leakage inductance L is: ; The instantaneous expression of the leakage inductance current lk of the equivalent leakage inductance L is: ; where is the current value of the leakage inductance current at moment.

[0052] According to the volt-second balance principle of the inductor and the symmetry between the first half of the switching period and the second half of the switching period, it can be obtained that the current value of the leakage inductance current at moment is equal to the negative of the current value of the leakage inductance current at moment, that is: ; Substituting it into the above formula correspondingly, the leakage inductance current can be solved At 、 and moments, the current values are respectively:

[0053] ;

[0054] ;

[0055] .

[0056] Therefore, the expression of the inverter output current can be calculated as: .

[0057] In the embodiment of the present invention, in order to linearize the relationship between the output current and the phase shift angle , thus simplifying the control, the relationship formula of the switching frequency is set as:

[0058] (1).

[0059] Therefore, the expression of the inverter output current can be simplified as: ; It can be understood that the inverter output current needs to be in phase with the grid-side voltage , f s,max is the upper limit of the maximum switching frequency of the switching tube. Therefore, in the embodiment of the present invention, it is assumed that the required current output by the inverter has the expression: ; where is the amplitude of the required current output by the inverter, is the grid-side voltage angular frequency.

[0060] Let the inverter output current be equal to the required current output by the inverter, then the expression of the phase shift angle can be obtained as:

[0061] (2).

[0062] S120. Analyze the angular frequency according to the preset phase shift angle expression to calculate the phase angle corresponding to the angular frequency at the current moment.

[0063] Then the known angular frequency is , and according to the above formula (2), the calculated value of the phase angle at the current moment can be correspondingly calculated, then the calculated value That is, the phase angle corresponding to the angular frequency at the current moment.

[0064] S130. Add the phase angle to the compensation value of the angular frequency at the current moment to obtain a phase compensation angle.

[0065] The compensation value of the angular frequency at the current moment is , add and to obtain the actual value of the phase angle , then the actual value of the phase angle That is, the phase compensation angle.

[0066] S140. Calculate the phase compensation angle according to the preset switching frequency expression to obtain the switching frequency corresponding to the switching tube at the current moment.

[0067] According to formula (1), the switching frequency corresponding to the phase compensation angle can be calculated .

[0068] S150. Input the phase compensation angle and the switching frequency into the pulse modulation unit, so that the pulse modulation unit inputs corresponding drive signals to each switching tube.

[0069] Input the actual value of the phase angle and the switching frequency into the pulse modulation unit (PWM modulation unit), and the pulse modulation unit can input corresponding drive signals to each switching tube, so as to output drive signals to the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, the fourth switching tube Q4, the fifth switching tube Q5 and the sixth switching tube Q6 as required.

[0070] In a more specific embodiment, inputting the phase compensation angle and the switching frequency into the pulse modulation unit 14 so that the pulse modulation unit 14 inputs corresponding drive signals to each switching tube includes: when the grid-side input voltage is greater than or equal to zero, controlling the fourth switching tube Q4 and the sixth switching tube Q6 to remain in the conducting state through the drive signal; when the grid-side input voltage is less than zero, controlling the third switching tube Q3 and the fifth switching tube Q5 to remain in the conducting state through the drive signal; a complete switching period includes the first half switching period and the second half switching period, the first half switching period includes a first time period and a second time period, and the second half switching period includes a third time period and a fourth time period; when the grid-side input voltage is greater than or equal to zero, in the first half switching period and the second half switching period, controlling the first switching tube Q1 and the second switching tube Q2 to conduct alternately through the drive signal, and controlling the third switching tube Q3 and the fifth switching tube Q5 to conduct alternately with a phase shift angle relative to the first switching tube Q1 and the second switching tube Q2, and the conduction control is symmetric in the first half switching period and the second half switching period; when the grid-side input voltage is less than zero, in the first half switching period and the second half switching period, controlling the first switching tube Q1 and the second switching tube Q2 to conduct alternately through the drive signal, and controlling the fourth switching tube Q4 and the sixth switching tube Q6 to conduct alternately with a phase shift angle relative to the first switching tube Q1 and the second switching tube Q2, and the conduction control is symmetric in the first half switching period and the second half switching period.

[0071] Wherein, within the first time period when the grid-side input voltage is less than zero, controlling the first switching tube Q1, the third switching tube Q3, the fourth switching tube Q4, and the fifth switching tube Q5 to conduct, and controlling the second switching tube Q2 and the sixth switching tube Q6 to turn off, the voltage lk borne by both ends of the equivalent leakage inductance L and the leakage inductance current are the same as those in the second time period when the grid-side input voltage is greater than or equal to zero; within the second time period when the grid-side input voltage is less than zero, controlling the first switching tube Q1, the third switching tube Q3, the fifth switching tube Q5, and the sixth switching tube Q6 to conduct, and controlling the second switching tube Q2 and the fourth switching tube Q4 to turn off, the voltage lk borne by both ends of the equivalent leakage inductance L and the leakage inductance current are the same as those in the first time period when the grid-side input voltage is greater than or equal to zero.

[0072] S160. Real-time collect the output current value through the current sensor.

[0073] Collect the actual value of the output current at the current moment as the output current value .

[0074] S170. Subtract the output current value from the corresponding calculated value to obtain the current error value.

[0075] To obtain the current amplitude required for the inverter output, that is, the calculated value corresponding to the output current at the current moment, subtract the output current value from the calculated value , and the current error value can be obtained .

[0076] S180. Update the compensation value according to the current error value.

[0077] Obtain this current error value and combine it with the amplitude of the grid-side voltage at the current moment, then a new compensation value corresponding to the phase angle can be obtained accordingly , thereby realizing the update of the compensation value . In the next calculation process, the updated compensation value can be used .

[0078] See Figure 4 , Figure 4 which is the output current waveform diagram of the single-phase dual-active half-bridge inverter provided by the embodiment of the present invention. The present invention applies the above control method to the topology circuit of the single-phase dual-active half-bridge inverter and conducts simulation tests. The waveform of the output current is collected through an oscilloscope. The waveform diagram shows that the amplitude of the output current meets the requirements, the phase is in phase with the grid voltage, and there is almost no distortion, and stable AC output can be achieved.

[0079] The present invention discloses a topology circuit, a control system and a control method of a single-phase dual-active half-bridge inverter. The topology circuit includes a primary half-bridge circuit, a transformer and a secondary half-bridge circuit; the primary half-bridge circuit includes a first capacitor, a second capacitor, a first switch tube and a second switch tube; the secondary half-bridge circuit includes a third capacitor, a fourth capacitor, a third switch tube, a fourth switch tube, a fifth switch tube and a sixth switch tube. The above topology circuit adopts a single-pole structure, reduces the loss of power transmission during the use of the inverter; reduces the number of switch tubes used, reduces the switching loss brought by the operation of the devices, thereby improving the operation efficiency and power density of the inverter; and linearizes the non-linear function of the closed-loop control, optimizes the control method for regulating the inverter, and reduces the control difficulty of the inverter.

[0080] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A control method for the topology circuit of a single-phase dual-active half-bridge inverter, characterized in that The control method is applied to a controller of a control system of a topology circuit of a single-phase dual-active half-bridge inverter. The controller controls each switching tube in the topology circuit of the single-phase dual-active half-bridge inverter. The topology circuit includes a primary half-bridge circuit, a transformer, and a secondary half-bridge circuit; The primary half-bridge circuit includes a first capacitor, a second capacitor, a first switching tube, and a second switching tube; the secondary half-bridge circuit includes a third capacitor, a fourth capacitor, a third switching tube, a fourth switching tube, a fifth switching tube, and a sixth switching tube; One end of the first capacitor is connected to the drain of the first switching tube, and the connection point is used as the positive pole of the DC power supply; one end of the second capacitor is connected to the source of the second switching tube, and the connection point is used as the negative pole of the DC power supply; the other end of the first capacitor is connected to the other end of the second capacitor and the opposite-named terminal of the primary side of the transformer, and the source of the first switching tube is connected to the drain of the second switching tube and the same-named terminal of the primary side of the transformer; One end of the third capacitor is connected to the drain of the third switching tube, and the connection point is used as an AC input terminal; one end of the fourth capacitor is connected to the drain of the sixth switching tube, and the connection point is used as another AC input terminal; the source of the third switching tube is connected to the source of the fourth switching tube, the drain of the fourth switching tube is connected to the drain of the fifth switching tube and the same-named terminal of the secondary side of the transformer; the source of the sixth switching tube is connected to the source of the fifth switching tube; the other end of the third capacitor is connected to the other end of the fourth capacitor and the opposite-named terminal of the secondary side of the transformer, and the equivalent leakage inductance of the transformer is connected in series between the same-named terminal of the secondary side and the drain of the fourth switching tube; The load is connected in parallel between the two AC input terminals; The control method includes: Real-time collecting the amplitude and angular frequency of the grid-side input voltage connected to the two AC input terminals through a voltage sensor; Analyzing the angular frequency according to a preset phase-shift angle expression to calculate the phase angle corresponding to the angular frequency at the current moment; Adding the phase angle to the compensation value of the angular frequency at the current moment to obtain a phase compensation angle; Calculating the phase compensation angle according to a preset switching frequency expression to obtain the switching frequency corresponding to the switching tube at the current moment; Inputting the phase compensation angle and the switching frequency into a pulse modulation unit, so that the pulse modulation unit inputs corresponding driving signals to each switching tube; Real-time collecting the output current value through a current sensor; Subtracting the output current value from the corresponding calculated value to obtain a current error value; Updating the compensation value according to the current error value; The inputting the phase compensation angle and the switching frequency into the pulse modulation unit, so that the pulse modulation unit inputs corresponding driving signals to each switching tube, includes: When the grid-side input voltage is greater than or equal to zero, controlling the fourth switching tube and the sixth switching tube to remain in the conducting state through driving signals; when the grid-side input voltage is less than zero, controlling the third switching tube and the fifth switching tube to remain in the conducting state through driving signals; A complete switching cycle includes the first half switching cycle and the second half switching cycle. The first half switching cycle includes a first time period and a second time period, and the second half switching cycle includes a third time period and a fourth time period; When the grid-side input voltage is greater than or equal to zero, in the first half switching cycle and the second half switching cycle, the first switch tube and the second switch tube are alternately turned on by a drive signal, and the third switch tube and the fifth switch tube are alternately turned on with a phase shift angle relative to the first switch tube and the second switch tube, and the turn-on control is symmetric in the first half switching cycle and the second half switching cycle; When the grid-side input voltage is less than zero, in the first half switching cycle and the second half switching cycle, the first switch tube and the second switch tube are alternately turned on by a drive signal, and the fourth switch tube and the sixth switch tube are alternately turned on with a phase shift angle relative to the first switch tube and the second switch tube, and the turn-on control is symmetric in the first half switching cycle and the second half switching cycle.

2. The control method of the topology circuit of the single-phase dual-active half-bridge inverter according to claim 1, characterized in that During a first time period when the grid-side input voltage is greater than or equal to zero, control the first switch tube, the fourth switch tube, the fifth switch tube, and the sixth switch tube to conduct, and control the second switch tube and the third switch tube to turn off. The voltage across the equivalent leakage inductance is: ; where N is the ratio of the number of turns of the primary winding to the number of turns of the secondary winding in the transformer, is the DC input voltage, is the grid-side input voltage; Leakage inductance current of equivalent leakage inductance The instantaneous expression is as follows: ; where is the leakage inductance current at the current value at the moment, is the inductance magnitude of the equivalent leakage inductance.

3. The control method of the topology circuit of the single-phase dual-active half-bridge inverter according to claim 2, characterized in that, During the second period when the grid-side input voltage is greater than or equal to zero, control the first switch tube, the third switch tube, the fourth switch tube, and the sixth switch tube to conduct, and control the second switch tube and the fifth switch tube to turn off. The voltage across the equivalent leakage inductance is: ; Leakage inductance current of equivalent leakage inductance The instantaneous expression is as follows: ; where is the leakage inductance current at the current value at the moment; During the first period when the grid-side input voltage is less than zero, control the first switch tube, the third switch tube, the fourth switch tube and the fifth switch tube to conduct, and control the second switch tube and the sixth switch tube to turn off. The voltage across the equivalent leakage inductance and the leakage inductance current are the same as those in the second period when the grid-side input voltage is greater than or equal to zero; During the second period when the grid-side input voltage is less than zero, control the first switch tube, the third switch tube, the fifth switch tube, and the sixth switch tube to conduct, and control the second switch tube and the fourth switch tube to turn off. The voltage across the equivalent leakage inductance and the leakage inductance current are the same as those in the first period when the grid-side input voltage is greater than or equal to zero.

4. A control system for the topology circuit of a single-phase dual-active half-bridge inverter, characterized in that, The control system includes a controller, a voltage sensor, a current sensor, a pulse modulation unit, and a topology circuit of a single-phase dual-active half-bridge inverter; the controller is used to execute the control method of the topology circuit of the single-phase dual-active half-bridge inverter according to any one of claims 1-3; Two voltage detection terminals of the voltage sensor are respectively electrically connected to two AC input terminals in the topology circuit to measure the grid-side input voltage; The controller is respectively connected to the detection output terminal of the voltage sensor, the detection output terminal of the current sensor, and the control receiving terminal of the pulse modulation unit, and the pulse signal output terminal of the pulse modulation unit is respectively connected to the control terminals of each switch tube in the topology circuit of the single-phase dual-active half-bridge inverter; The detection terminal of the current sensor is connected in series to one of the AC input terminals.

5. A topology circuit of a single-phase dual-active half-bridge inverter, the topology circuit being configured in the control system as described in claim 4, characterized in that The topology circuit includes a primary half-bridge circuit, a transformer, and a secondary half-bridge circuit; The primary half-bridge circuit includes a first capacitor, a second capacitor, a first switch tube, and a second switch tube; the secondary half-bridge circuit includes a third capacitor, a fourth capacitor, a third switch tube, a fourth switch tube, a fifth switch tube, and a sixth switch tube; One end of the first capacitor is connected to the drain of the first switch tube, and the connection point is used as the positive pole of the DC power supply; one end of the second capacitor is connected to the source of the second switch tube, and the connection point is used as the negative pole of the DC power supply; the other end of the first capacitor is connected to the other end of the second capacitor and the opposite-named terminal of the primary side of the transformer, and the source of the first switch tube is connected to the drain of the second switch tube and the same-named terminal of the primary side of the transformer; One end of the third capacitor is connected to the drain of the third switching transistor, and the connection point serves as an AC input terminal; one end of the fourth capacitor is connected to the drain of the sixth switching transistor, and the connection point serves as another AC input terminal; the source of the third switching transistor is connected to the source of the fourth switching transistor, the drain of the fourth switching transistor is connected to the drain of the fifth switching transistor and the same-named terminal of the secondary side of the transformer; the source of the sixth switching transistor is connected to the source of the fifth switching transistor; the other end of the third capacitor is connected to the other end of the fourth capacitor and the different-named terminal of the secondary side of the transformer, and the equivalent leakage inductance of the transformer is connected in series between the same-named terminal of the secondary side and the drain of the fourth switching transistor; The load is connected in parallel between the two AC input terminals.

6. The topology circuit of the single-phase dual-active half-bridge inverter according to claim 5, characterized in that, The capacitance values of the first capacitor and the second capacitor are equal, and the capacitance values of the third capacitor and the fourth capacitor are equal.

7. The topology circuit of the single-phase dual-active half-bridge inverter according to claim 6, characterized in that, The topology circuit further includes a filter circuit, and the filter circuit is connected in parallel between the two AC input terminals of the secondary side half-bridge circuit.

8. The topology circuit of the single-phase dual-active half-bridge inverter according to claim 7, characterized in that, The filter circuit includes a first inductor, a second inductor and a fifth capacitor; One end of the first inductor is connected to one end of the third capacitor, the other end of the first inductor is connected to one end of the fifth capacitor and one end of the second inductor, and the other end of the second inductor is connected to one end of the load; the other end of the fifth capacitor is connected to the other end of the load.

9. The topological circuit of the single-phase dual-active half-bridge inverter according to claim 7 or 8, characterized in that, The first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching transistor and the sixth switching transistor are all insulated gate bipolar transistors or metal-oxide semiconductor field effect transistors.

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