Digital-to-analog conversion device, current compensation method for digital-to-analog conversion device, and storage medium

Abstract

The invention relates to the technical field of electronic circuits, and discloses a digital-to-analog conversion device, a current compensation method of the digital-to-analog conversion device and a storage medium. A first current of a core DAC is predicted according to an input code word, then a first compensation DAC is controlled to generate a compensation current with an opposite change trend, and a current flowing through an internal resistor is constant on a reference bus of a reference voltage source shared by the core DAC and the first compensation DAC, so that a voltage drop generated by the internal resistor is constant, and the voltage drop generated by the internal resistor is constant. The problem that the first current of the core DAC changes along with the input and influences the output linearity can be avoided, and nonlinear errors are eliminated. Besides, the branch reference current is determined by determining the node voltage corresponding to each resistance branch bridged by the first resistor, so that the control unit can determine the branch reference current based on the same method for different resistance branch design structures, the first current of the core DAC is obtained, and the universality of the method for determining the compensation current can be improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic circuits, and in particular to a digital-to-analog conversion device, a current compensation method for the digital-to-analog conversion device, and a storage medium. Background Art

[0002] The digital to analog converter (DAC) is used to convert digital input into analog output. The DAC is the core component in the digital to analog conversion process. The input end of the DAC is connected to the reference voltage source and the input source respectively. The input source is used to input digital signals, and the reference voltage source is used to provide a stable reference current for the DAC. The output end of the DAC is used to output analog voltage or current.

[0003] The stability of the reference voltage source is crucial to ensure the conversion accuracy and linearity of the DAC. However, in actual digital-to-analog conversion circuits, there is wiring resistance between the reference voltage source and the DAC core, such as PCB wiring, bonding wires, and internal interconnection wires of the chip. The reference current passing through the wiring resistance is related to the input digital signal, that is, the reference current is a nonlinear current. At this time, the reference voltage connected to the DAC core has a nonlinear voltage error, which leads to the problem of DAC nonlinearity. Summary of the invention

[0004] In view of this, the present disclosure proposes a digital-to-analog conversion device, a current compensation method for the digital-to-analog conversion device and a storage medium, which can avoid the problem that the first current of the core DAC changes with the input and affects the output linearity, eliminate nonlinear errors, and ensure the linearity of the core DAC.

[0005] According to one aspect of the present disclosure, a digital-to-analog conversion device is provided, the device comprising:

[0006] A core DAC, used to realize a digital-to-analog conversion function; the core DAC comprises an input end and an output end, the input end is respectively connected to an input source and a reference voltage source, and the output end is used to output an analog signal; the core DAC is an R-2R type DAC, the R-2R type DAC comprises a resistor main circuit and a plurality of resistor branches connected to the resistor main circuit; the resistor main circuit comprises a plurality of first resistors connected in series, two adjacent resistor branches are bridged by a first resistor, and the plurality of resistor branches correspond to the bits of the core DAC one by one; one end of the resistor main circuit is connected to the output end, and the other end is grounded through a grounding resistor; one end of the resistor branch that is not bridged with the first resistor is grounded or connected to the reference voltage source through switch control;

[0007] as well as,

[0008] A compensation circuit, comprising a first compensation DAC and a control unit; wherein the first compensation DAC is connected to the reference voltage source and is used to compensate the reference current of the reference voltage source to a constant current value; one end of the control unit is connected to the input source and the other end is connected to the first compensation DAC, and the control unit is used to:

[0009] Determine the node voltage corresponding to each resistance branch based on the resistance voltage division of the resistance network in each resistance branch;

[0010] Determining a branch reference current of the resistance branch based on a node voltage corresponding to the resistance branch and the ground resistance;

[0011] Determine a first compensation current value based on a difference between a first current and the constant current value; the first current is the sum of branch reference currents of each resistance branch;

[0012] The first compensation DAC is controlled to output a compensation current according to the first compensation current value, so as to compensate the reference current of the reference voltage source to the constant current value.

[0013] In a possible implementation, determining the node voltage corresponding to each resistance branch based on the resistance voltage division condition of the resistance network in each resistance branch includes:

[0014] For a bit corresponding to any one of the resistance branches connected by the first resistance bridge, based on the resistance voltage division of the resistance branch, determine the influence of the bit corresponding to the resistance branch on the node voltage corresponding to the resistance branch, and obtain the weight of the bit on the node voltage;

[0015] Based on the node voltage and the resistance voltage division between other resistance branches, determine the influence of the bit corresponding to the resistance branch on other node voltages corresponding to other resistance branches, and obtain the weight of the bit on other node voltages;

[0016] For each node voltage, the weight of each bit on the node voltage is superimposed on the product of the corresponding bit to obtain the node voltage.

[0017] In a possible implementation, a shunt device is connected to the output end of the core DAC; the shunt device is also connected to the positive electrode of the reference voltage source but not to the negative electrode of the reference voltage source, and the current shunted from the positive electrode of the reference voltage source by the shunt device is related to the input codeword of the input source; accordingly,

[0018] The compensation circuit further includes a second compensation DAC, one end of the second compensation DAC is connected to the control unit, and the other end is connected to the negative electrode of the reference voltage source, so as to compensate the reference current of the negative electrode of the reference voltage source;

[0019] Accordingly, the control unit is also used for:

[0020] determining a second current of the shunt device;

[0021] determining the first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of the positive electrode of the reference voltage source;

[0022] determining a second compensation current value based on a difference between a sum of the first current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source;

[0023] The second compensation DAC is controlled to output a compensation current according to the second compensation current value, so as to compensate the negative current of the reference voltage source to a second constant current value.

[0024] In a possible implementation, the current shunting device includes an amplifier that scales the analog signal to a bipolar signal.

[0025] In a possible implementation, the non-inverting input terminal of the amplifier is connected to the output terminal of the core DAC, the inverting input terminal of the amplifier is connected to the positive electrode of the reference voltage source through a second resistor, and is connected to the output terminal of the amplifier through a third resistor; accordingly,

[0026] The determining the second current of the shunt device comprises:

[0027] The second current is determined based on a difference between a reference voltage value of a positive electrode of the reference voltage source and an output voltage value of an output terminal of the core DAC, and a resistance value of the second resistor.

[0028] In a possible implementation manner, the second compensation DAC is a current-type DAC.

[0029] In a possible implementation, the second compensation DAC includes a first amplifier, and a first MOS transistor whose control end is connected to the output end of the first amplifier, the input end of the first MOS transistor is connected to a current source unit, and the output end of the first MOS transistor is connected to a resistor unit;

[0030] The non-inverting input terminal of the first amplifier is connected to the positive electrode of the reference voltage source, and the inverting input terminal of the first amplifier is connected to the output terminal of the first MOS tube;

[0031] The current source unit includes: a first MOS tube branch and a plurality of second MOS tube branches, each second MOS tube branch is connected to a current branch; the first MOS tube branch is connected to the input end of the first MOS tube through a fourth resistor; the first MOS tube branch and the second MOS tube branch each include a group of second MOS tubes and a third MOS tube, the input end of the second MOS tube is connected to the output end of the third MOS tube, each first MOS tube branch and the output end of the second MOS tube in the second MOS tube branch are respectively connected, and connected to a compensation power supply; the input end of the third MOS tube in each second MOS tube branch is respectively connected to the corresponding current branch, the control end of the second MOS tube in each first MOS tube branch and the second MOS tube branch are respectively connected to obtain a first voltage control point, the control end of the third MOS tube in each first MOS tube branch and the second MOS tube branch are respectively connected to obtain a second voltage control point, and the first voltage control point and the second voltage control point are connected across the fourth resistor;

[0032] Each current branch includes a control switch, one end of which is connected to the current source unit, and the other end of which is connected to the resistance unit and connected to the negative electrode of the reference voltage source.

[0033] In a possible implementation manner, the second compensation DAC is a resistance-type DAC.

[0034] In a possible implementation, the second compensation DAC includes: a second amplifier, and a plurality of first compensation resistance branches having one end connected to an output end of the second amplifier;

[0035] The non-inverting input terminal of the second amplifier is connected to the positive electrode of the reference voltage source, and the inverting input terminal of the second amplifier is connected to the plurality of first compensation resistor branches; the second amplifier is also connected to a compensation power supply;

[0036] Among them, the other end of each first compensation resistor branch is connected to the negative electrode of the reference voltage source; each first compensation resistor branch includes a resistor and a control switch connected to the resistor, and the resistance value of the resistor in the m+1th first compensation resistor branch is twice the resistance value of the resistor in the mth first compensation resistor branch; m is a positive integer.

[0037] In a possible implementation manner, the first compensation DAC is a resistance-type DAC.

[0038] In a possible implementation, the first compensation DAC includes a plurality of second compensation resistance branches, one end of each second compensation resistance branch is connected to the positive electrode of the reference voltage source, and the other end of each second compensation resistance branch is connected to the negative electrode of the reference voltage source;

[0039] Each second compensation resistor branch includes a resistor and a control switch connected to the resistor, and the resistance of the resistor in the (n+1)th second compensation resistor branch is twice the resistance of the resistor in the (n)th second compensation resistor branch; and n is a positive integer.

[0040] According to another aspect of the present disclosure, a digital-to-analog conversion device is provided, the device comprising:

[0041] A core DAC, used to realize a digital-to-analog conversion function; the core DAC comprises an input end and an output end, the input end is respectively connected to an input source and a reference voltage source, and the output end is used to output an analog signal;

[0042] a shunt device connected to the output end of the core DAC, the shunt device also connected to the positive electrode of the reference voltage source but not connected to the negative electrode of the reference voltage source, and the current shunted from the positive electrode of the reference voltage source by the shunt device is related to the input codeword of the input source;

[0043] as well as,

[0044] A compensation circuit, comprising a first compensation DAC, a second compensation DAC and a control unit; wherein one end of the first compensation DAC is connected to the control unit, and the other end is connected to the positive electrode and the negative electrode of the reference voltage source respectively, so as to compensate the reference current of the positive electrode and the negative electrode of the reference voltage source to a first constant current value; one end of the second compensation DAC is connected to the control unit, and the other end is connected to the negative electrode of the reference voltage source, so as to compensate the reference current of the negative electrode of the reference voltage source to a second constant current value; the control unit is used to:

[0045] determining a first current of the core DAC;

[0046] determining a second current of the shunt device;

[0047] determining the first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of the positive electrode of the reference voltage source;

[0048] determining a second compensation current value based on a difference between a sum of the second current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source;

[0049] Controlling the first compensation DAC to output a compensation current according to the first compensation current value, so as to compensate the positive current of the reference voltage source to the first constant current value;

[0050] The second compensation DAC is controlled to output a compensation current according to the second compensation current value, so as to compensate the negative current of the reference voltage source to the second constant current value.

[0051] In a possible implementation, the type of devices in the first compensation DAC is the same as the type of devices in the core DAC; and / or the type of devices in the second compensation DAC is the same as the type of devices in the core DAC.

[0052] According to another aspect of the present disclosure, a current compensation method for a digital-to-analog conversion device is provided, which is used in the above-mentioned digital-to-analog conversion device, and the method includes:

[0053] Determine the node voltage corresponding to each resistance branch based on the resistance voltage division of the resistance network in each resistance branch;

[0054] Determining a branch reference current of the resistance branch based on a node voltage corresponding to the resistance branch and the ground resistance;

[0055] Determine a first compensation current value based on a difference between a first current and the constant current value; the first current is the sum of branch reference currents of each resistance branch;

[0056] The first compensation DAC is controlled to output a compensation current according to the first compensation current value, so as to compensate the reference current of the reference voltage source to a constant current value.

[0057] According to another aspect of the present disclosure, a current compensation method for a digital-to-analog conversion device is provided, which is used in the above-mentioned digital-to-analog conversion device, and the method includes:

[0058] determining a first current of the core DAC;

[0059] determining a second current of the shunt device;

[0060] determining the first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of the positive electrode of the reference voltage source;

[0061] determining a second compensation current value based on a difference between a sum of the second current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source;

[0062] Controlling the first compensation DAC to output a compensation current according to the first compensation current value, so as to compensate the positive current of the reference voltage source to the first constant current value;

[0063] The second compensation DAC is controlled to output a compensation current according to the second compensation current value, so as to compensate the negative current of the reference voltage source to the second constant current value.

[0064] According to another aspect of the present disclosure, a digital-to-analog conversion device is provided, comprising: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0065] According to another aspect of the present disclosure, a non-volatile computer-readable storage medium is provided, on which computer program instructions are stored, wherein the computer program instructions implement the above method when executed by a processor.

[0066] According to another aspect of the present disclosure, a computer program product is provided, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0067] By predicting the first current of the core DAC according to the input codeword, and then controlling the first compensation DAC to generate a compensation current with an opposite change trend, the reference bus of the reference voltage source shared by the core DAC and the first compensation DAC is made to flow through the internal resistor R com The current is constant, so that the voltage drop caused by the internal resistance is constant, which can avoid the problem that the first current of the core DAC changes with the input and affects the output linearity, eliminate nonlinear errors, and ensure the linearity of the core DAC.

[0068] In addition, the branch reference current is determined by determining the node voltage corresponding to each resistance branch of the first resistance bridge, so that the control unit can determine the branch reference current based on the same method for different resistance branch design structures, thereby obtaining the first current of the core DAC, which can improve the versatility of the method for determining the compensation current.

[0069] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0071] Figure 1 A circuit structure schematic diagram of a conventional DAC circuit according to an embodiment of the present disclosure is shown;

[0072] Figure 2A circuit structure diagram of a digital-to-analog conversion device according to an embodiment of the present disclosure is shown;

[0073] Figure 3 A schematic diagram showing the circuit structure of a core DAC according to an embodiment of the present disclosure is shown;

[0074] Figure 4 A schematic diagram showing the circuit structure of a resistive second compensation DAC according to an embodiment of the present disclosure is shown;

[0075] Figure 5 A schematic diagram showing a compensated reference current according to an embodiment of the present disclosure;

[0076] Figure 6 A schematic diagram showing the change of the core DAC output linearity curve before and after compensation according to an embodiment of the present disclosure;

[0077] Figure 7 A schematic diagram showing the circuit structure of a digital-to-analog conversion device according to another embodiment of the present disclosure is shown;

[0078] Figure 8 A schematic diagram showing the circuit structure of a current-type second compensation DAC according to an embodiment of the present disclosure is shown;

[0079] Fig. 9 A schematic diagram showing the circuit structure of a resistive second compensation DAC according to an embodiment of the present disclosure is shown;

[0080] Fig.10 A flow chart showing a current compensation method of a digital-to-analog conversion device according to an embodiment of the present disclosure;

[0081] Fig.11 A flow chart showing a current compensation method for a digital-to-analog conversion device according to another embodiment of the present disclosure;

[0082] Fig.12 A block diagram showing a current compensation device of a digital-to-analog conversion device provided according to an embodiment of the present application;

[0083] Fig.13 A block diagram of a current compensation device of a digital-to-analog conversion device provided according to another embodiment of the present application is shown. DETAILED DESCRIPTION

[0084] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0085] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0086] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0087] Since the reference voltage of the DAC may produce nonlinear errors due to the influence of the wiring resistance, in order to reduce the impact of the nonlinear error on the linearity of the DAC, the traditional technical solution is to reduce the impedance from the DAC core to the reference voltage source as much as possible. However, as the accuracy of the DAC increases, the difficulty of implementing this technical solution will also increase. For example, in a high-precision (such as 16-bit) DAC, the impedance between the DAC core and the reference voltage source is required to be reduced to a few tenths of an ohm. At this time, the design and manufacturing of the chip are both difficult.

[0088] In addition, refer to Figure 1 The highest bit shown uses the R2R DAC structure of the thermometer code unit. Figure 1 It can be seen that the traditional DAC circuit can also use an op amp as the input buffer of the reference voltage. refp / V refn ) is connected to the input of the buffer, and the reference voltage is buffered by the buffer to provide reference for the DAC. At this time, the reference current that changes with the DAC input is provided by the buffer, which is equivalent to greatly improving the reference input impedance between the DAC and the reference voltage source, so that the DAC output is less affected by the changing reference current and the output linearity is improved.

[0089] Further, in Figure 1 In the provided R2R DAC structure, by disassembling the same reference input terminal of different weight reference nodes into a pair of matching switches 101, which are respectively used to be connected to the output terminal and the feedback terminal of the buffer, the nonlinear effects generated by the reference current flowing through the buffer output bus and the switch impedance can be first-order canceled, leaving only high-order nonlinear terms, so that the integral nonlinearity (INL) / differential nonlinearity (DNL) performance of the DAC is still good at higher precision.

[0090] However, the buffer needs to have lower noise and offset. If it is used in a resistor-structured voltage-type DAC, it is also necessary to select appropriate gain and bandwidth based on the fast settling characteristics of the DAC, which will increase the overall chip area and power consumption.

[0091] Based on the above technical problems, the present application provides a digital-to-analog conversion device and a current compensation method for the digital-to-analog conversion device, which can analyze the relationship between the first current of the core DAC and the input codeword, compensate the first current of the core DAC, and finally maintain a constant current on the reference bus of the reference voltage source. At this time, even if the reference input impedance of the core DAC is large, a good INL / DNL can still be maintained, and there is no need to use complex amplifiers and loops, and the linearity of the DAC is guaranteed without increasing the overall chip area and power consumption.

[0092] The digital-to-analog conversion device provided by the present application is introduced below. Figure 2 FIG. 2 is a schematic diagram showing a circuit structure of a digital-to-analog conversion device according to an embodiment of the present disclosure. Figure 2 As shown, the digital-to-analog conversion device includes: a core DAC 210 , a first compensation DAC 220 and a control unit 230 .

[0093] The core DAC 210 is used to realize the digital-to-analog conversion function. The input end of the core DAC 210 is connected to the input source and the reference voltage source respectively (see Figure 2 , V refp Represents the positive pole of the reference voltage source, V refn Indicates the negative pole of the reference voltage source), the output terminal is used to output the analog signal V out The input source is used to input a digital signal (or a codeword), and the reference voltage source is used to provide a reference voltage.

[0094] The first compensation DAC 220 is connected to the reference voltage source and is used to compensate the current of the reference voltage source to a constant value. In other words, the output end of the first compensation DAC 220 is respectively connected to the positive electrode and the negative electrode of the reference voltage source to compensate the current of the positive electrode of the reference voltage source to a first constant value and to compensate the current of the negative electrode of the reference voltage source to a first constant value.

[0095] One end of the control unit 230 is connected to the input source and the other end is connected to the first compensation DAC 220, so as to predict the first current of the core DAC 210 according to the input code word, and then control the first compensation DAC 220 to generate a compensation current with an opposite change trend. On the reference bus of the reference voltage source shared by the core DAC 210 and the first compensation DAC 220, the compensation current makes the total reference current unchanged, thereby avoiding the problem that the reference current of the core DAC 210 changes with the input code word, thereby affecting the output linearity.

[0096] The control unit 230 may be an arithmetic logic unit (ALU), or may be other components with computing and control capabilities. This embodiment does not limit the implementation of the control unit 230.

[0097] like Figure 2 As shown, the first current of the core DAC210 is I ref , I ref The nonlinear change occurs with the change of the input codeword. In this embodiment, the first compensation DAC 220 generates a signal which is different from I ref The compensation current I with opposite trend comp , so that the reference current I of the reference bus at the positive and negative poles of the reference voltage source const for:

[0098] I const =I ref+ I comp , where I const is the constant current value.

[0099] At this time, on the reference bus shared by the core DAC 210 and the first compensation DAC 220, the current flowing through the internal resistor R com The current of the internal resistance is constant, so that the voltage drop caused by the internal resistance is constant, which can avoid the problem that the first current of the core DAC210 changes with the input and affects the output linearity, eliminate nonlinear errors, and ensure the linearity of the core DAC210. com is the internal resistance of the digital-to-analog conversion device, including the internal resistance of the wiring between the core DAC and the first compensation DAC and the reference voltage source. ref After that, you can use the preset I const Determine the compensation current I comp .

[0100] Optionally, the core DAC 210 may be implemented by a capacitor, a resistor or a current DAC, and may be classified into a current type and a voltage type according to the output type. This embodiment does not limit the type of the core DAC 210 .

[0101] In one implementation, the core DAC 210 is described as an R-2R type DAC. Figure 3 The R-2R type DAC includes a main resistor circuit 310 and a plurality of resistor branches 320 connected to the main resistor circuit.

[0102] The main resistance circuit 310 includes a plurality of first resistors connected in series, Figure 3 The 2R resistor in the left column. One end of the resistor main circuit 310 is connected to the output terminal V out , and the other end is grounded through a grounding resistor 330.

[0103] Two adjacent resistance branches 320 are bridged by a first resistor, wherein the ratio of the resistance value in each resistance branch 320 to the resistance value in the resistance main circuit 310 is 2:1. For example: Figure 3 The resistance value of the resistor in the middle resistor main circuit 310 is 2R, and the resistance value of the resistor in the resistor branch circuit 320 is 4R.

[0104] Each resistance branch 320 includes one resistor or multiple resistors connected in parallel. In the case of multiple resistors connected in parallel, the resistance of the parallel resistor is the resistance of the resistance branch 320. For example: Figure 3 The resistor branch 320 in the middle dotted box area includes two parallel resistors with resistance values ​​of 12R and 6R respectively. The resistance value of these two resistors is 4R, which is twice the resistance value of the resistor in the main circuit.

[0105] The plurality of resistor branches 320 correspond one-to-one to the bits of the core DAC 210. For example, if the core DAC 210 has 16 bits, then the resistor branches 320 include 16, and the 16 resistor branches 320 correspond one-to-one to the 16 bits, so as to output a corresponding analog signal (such as a voltage value) according to the bit value of each bit.

[0106] One end of each resistance branch 320 that is not connected to the first resistance bridge is grounded or connected to a reference voltage source through switch control.

[0107] In one example, the control unit 230 is used to: determine the node voltage corresponding to each resistance branch based on the resistance voltage division of the resistance network in each resistance branch; determine the branch reference current of the resistance branch based on the node voltage corresponding to the resistance branch and the ground resistance; determine the first compensation current value based on the difference between the first current and the constant current value; control the first compensation DAC220 to output the compensation current according to the first compensation current value, so as to compensate the reference current of the reference voltage source to the constant current value. Wherein, the first current is the sum of the branch reference currents of each resistance branch.

[0108] In actual implementation, the resistance branch may be implemented in different ways to achieve redundant design, such as: composed of 12R and 6R, or composed of a single 4R resistor, etc., but adjacent resistance branches are all bridged by the first resistor. Based on this, in this embodiment, the branch reference current is determined by determining the node voltage corresponding to each resistance branch bridged by the first resistor, so that the control unit 230 can determine the branch reference current based on the same method for different resistance branch design structures, thereby obtaining the first current of the core DAC210, which can improve the versatility of the method for determining the compensation current.

[0109] Schematically, based on the resistance voltage division of the resistance network in each resistance branch, the node voltage corresponding to each resistance branch is determined, including: for the bit corresponding to any resistance branch bridged by the first resistance, based on the resistance voltage division of the resistance branch, the influence of the bit corresponding to the resistance branch on the node voltage corresponding to the resistance branch is determined, and the weight of the bit to the node voltage is obtained; based on the resistance voltage division between the node voltage and other resistance branches, the influence of the bit corresponding to the resistance branch on other node voltages corresponding to other resistance branches is determined, and the weight of the bit to the other node voltages is obtained; for each node voltage, the weight of each bit to the node voltage is superimposed with the product of the corresponding bit, and the node voltage is obtained.

[0110] Specifically, refer to Figure 1 The binary coded R-2R resistor network shown, for V i The node voltage at V i The resistance below is equivalent to 2R, and the node voltage V i The equivalent value of the resistor in the dashed box above is R i , R i The value can be determined based on the specific network structure of the specific R-2R resistor network; at this time, the node voltage V i The connected resistance branch 2R is connected in series with the resistance equivalent value 2R and R below the node voltage. i Resistors in parallel; according to the voltage division principle, we can get bit B i The node voltage V i impact.

[0111] At the same time, B i It will also affect other node voltages, specifically the node voltage V i-1 For example, similarly, the node voltage V i The resistance below is equivalent to 2R, and the node voltage V i-1 The equivalent value of the resistor in the dashed box above is R i-1 , R i-1 The value can be determined based on the specific network structure of the specific R-2R resistor network; at this time, the node voltage V i-1 is the node voltage V i The series resistors R and R i-1 After voltage division, R i-1 The voltage on B i The node voltage V i-1 The influence of B i Impact on the voltage of each node.

[0112] In this embodiment, any bit B j For a node voltage Vi The influence of is represented by weight w(i, j). Accordingly, for any node voltage V i , by each bit B j The node voltage V i The node voltage is obtained by superimposing the weights of

[0113] Optionally, the most significant bit (MSB) of the R-2R type DAC can also be implemented by thermometer code to reduce the area of ​​the core DAC 210. The thermometer code part includes a plurality of directly parallel resistor branches, that is, the resistor branches are not bridged by the first resistor. Figure 3 It can be seen that the resistance branch includes a single 2R resistance branch and a resistance branch composed of 3R and 6R resistors in parallel. The resistance value of the resistance branch composed of 3R and 6R resistors in parallel is also 2R, that is, the resistance values ​​of each resistance branch are the same.

[0114] Each resistance branch in the thermometer code has the same weight.

[0115] Next, take the core DAC as Figure 3 Take the R-2R DAC shown in the figure as an example. In this case, the first 4 bits of the core DAC are designed with thermometer code, and a 16-bit R-2R DAC with redundant bits is also included. In this case, the reference current source of the core DAC is divided into a thermometer code part composed of a single 2R branch close to the output, i.e., the MSB, and a network part bridged by 2R, i.e., the least significant bit. According to the actual control word, based on the above principle, the algebraic expression of the reference current of the DAC that changes with the input code word can be derived as follows:

[0116]

[0117] Among them, I LSB (i) represents the reference current of the resistance branch corresponding to the i-th bit, V(i) represents the node voltage of the resistance branch corresponding to the i-th bit, and B(i) represents the bit value of the i-th bit.

[0118] The reference current of each resistance branch is summed up to get:

[0119]

[0120] against Figure 3 From the design of the redundant circuit, we can know that:

[0121]

[0122] in,

[0123] B(2)=B(2_1) / 3+2×B(2_2) / 3;

[0124] B(4)=B(4_1) / 3+2×B(4_2) / 3;

[0125]

[0126] Wherein, B(j) represents the bit value of the j-th bit in the network portion bridged by 2R. B(i_1) represents the input codeword of the resistor with a resistance value of 12R in the i-th redundantly designed bit in the network portion bridged by 2R, and B(i_2) represents the input codeword of the resistor with a resistance value of 6R in the i-th redundantly designed bit in the network portion bridged by 2R. T(i) represents the input codeword of the i-th bit in the thermometer code; I MSB Indicates the reference current of the most significant bit MSB.

[0127] In getting I LSB and I MSB After that, the sum of the two can be calculated to get the first current I of the core DAC ref , then calculate the preset constant current value I const with I ref The difference between the first compensation current value and the input code word of the first compensation DAC can be obtained. The input control word of the first compensation DAC is controlled according to the first compensation current value to obtain a reference current that is relatively stable relative to the input code word.

[0128] Optionally, the type of device in the first compensation DAC is the same as the type of device in the core DAC. In this way, the current of the first compensation DAC can be better matched with the core DAC. For example, if the core DAC is a resistor DAC, the first compensation DAC is also a resistor DAC; if the core DAC is a current thallium DAC, the first compensation DAC is also a current thallium DAC.

[0129] by Figure 3 Taking the core DAC shown as an example, to adapt to the circuit structure of the core DAC, the first compensation DAC is also a resistance type DAC. Optionally, the resistance type of the first compensation DAC can be a binary weighted resistance DAC, or it can also be an R-2R type DAC. This embodiment does not limit the type of the first compensation DAC.

[0130] In one example, the first compensation DAC is implemented as a simple binary weighted resistor DAC. Since in high-precision (16-bit) applications, it is not necessary to compensate the current very accurately to make the core DAC insensitive to the internal impedance of the reference voltage source side, this relatively space-consuming first compensation DAC design method can be adopted. Since the design of this first compensation DAC is simple and it is easier to match with the original core DAC on the layout, the design difficulty of the first compensation DAC can be reduced while ensuring the compensation accuracy.

[0131] refer to Figure 4 In this embodiment, a 5-bit first compensation DAC is used to compensate the reference current. The first compensation DAC includes a plurality of second compensation resistor branches, one end of each second compensation resistor branch is connected to the positive electrode of the reference voltage source, and the other end of each second compensation resistor branch is connected to the negative electrode of the reference voltage source.

[0132] Each second compensation resistor branch includes a resistor (R comp ~2 n R comp ) and the control switch (Q1~Q n ), the resistance of the resistor in the n+1th second compensation resistor branch is twice the resistance of the resistor in the nth second compensation resistor branch; n is a positive integer.

[0133] Combination Figure 3 The core DAC and Figure 4 For the first compensation DAC shown in FIG. 1 , under 16-bit accuracy and when the external reference total impedance is 0.5 ohms, the reference current after compensation is as follows: Figure 5 As shown, the core DAC output linearity before and after compensation is as follows Figure 6 As shown. Figure 6 It can be seen that for the original core DAC, before the current compensation technology was added, its DNL / INL performance was obviously affected by the reference current changing with the input, and there was fluctuation (see Figure 6 left half). After compensation, Figure 6 From the right part, we can see that DNL / INL tends to be stable. Figure 5 From the total current curve ITOT in the figure, it can be seen that at this time, the current flowing through the reference bus is approximately constant. Therefore, the output nonlinearity caused by the voltage drop caused by the non-ideal impedance outside the core DAC due to the reference current is greatly reduced. The voltage drop of the compensated constant current value on the reference source impedance will only introduce a gain error that is easy to calibrate.

[0134] Optionally, in some embodiments, the output end of the core DAC is also connected to a shunt device; the shunt device is also connected to the positive electrode of the reference voltage source, but not to the negative electrode of the reference voltage source, and the current shunted away from the positive electrode of the reference voltage source by the shunt device is related to the input codeword of the input source. At this time, part of the current at the positive electrode of the reference voltage source is extracted by the shunt device, and this part of the current does not flow back to the negative electrode of the reference voltage source. Therefore, it is necessary to additionally compensate for the current extracted by the shunt device at the negative electrode of the reference voltage source. Based on this, the reference Figure 7 The compensation circuit further includes a second compensation DAC 710, one end of which is connected to the control unit 230 and the other end of which is connected to the negative electrode of the reference voltage source to compensate for the reference current of the negative electrode of the reference voltage source.

[0135] Accordingly, the control unit 230 is also used to: determine the second current of the shunt device 720; determine the first compensation current value based on the difference between the sum of the first current and the second current and the first constant current value of the positive electrode of the reference voltage source; determine the second compensation current value based on the difference between the sum of the first current and the first compensation current value and the second constant current value of the negative electrode of the reference voltage source; control the second compensation DAC710 to output the compensation current according to the second compensation current value to compensate the negative electrode current of the reference voltage source to the second constant current value.

[0136] The calculation method of the first current refers to the above embodiment, which will not be described in detail in this embodiment.

[0137] When the accuracy requirement is not high, the additional fixed voltage drop from the positive electrode of the reference voltage source is ignored, and the second current I fb It can be expressed as:

[0138] I fb =(V refp -I const1 R com -V DAC) / R1≈(V refp -V DAC ) / R1;

[0139] Among them, V refp Indicates the voltage value of the positive electrode of the reference voltage source, I const1 Represents the preset first constant current value, R com represents the resistance between the core DAC 210 and the reference voltage source (i.e., the internal resistance or wiring resistance mentioned above), and R1 represents the resistance between the shunt device 720 and R com The resistance between V DAC Indicates the voltage value output by the core DAC 210.

[0140] according to Figure 7It can be seen that the first constant current value of the positive electrode of the reference voltage source is expressed by the following formula:

[0141] I const1 =I ref +I fb +I comp1 ;

[0142] The second constant current value of the negative electrode of the reference voltage source is expressed by the following formula:

[0143] I const2 =I ref +I comp1 +I comp2 .

[0144] Among them, I ref I is the first current of the core DAC 210 determined by the control unit 230; comp1 is the first compensation current value of the first compensation DAC 220, I comp2 is the second compensation current value of the second compensation DAC710.

[0145] Optionally, the first constant current value is the same as or different from the second constant current value.

[0146] Schematically, the current divider 720 includes an amplifier that scales the analog signal (eg, voltage value) output by the core DAC 210 to a bipolar value. Figure 7 As shown, the non-inverting input terminal of the amplifier is connected to the output terminal of the core DAC 210, the inverting input terminal of the amplifier is connected to the positive electrode of the reference voltage source through the second resistor R1, and is connected to the output terminal of the amplifier through the third resistor R2; accordingly, determining the second current of the shunt device 720 includes: based on the reference voltage value V of the positive electrode of the reference voltage source refp The output voltage value V of the output terminal of the core DAC 210 DAC The difference between and the resistance value of the second resistor determines the second current. That is,

[0147] I fb =(V refp -V DAC ) / R1.

[0148] In one example, since the compensation accuracy requirement for the second current of the shunt device 720 is not high, it is possible to consider using a simple current-type DAC (ie, IDAC) to implement the second compensation DAC 710 to compensate for the second current.

[0149] Schematically, refer to Figure 8The second compensation DAC shown includes a first amplifier 810, and a first MOS tube 820 whose control end is connected to the output end of the first amplifier, the input end of the first MOS tube is connected to the current source unit 830, and the output end of the first MOS tube 820 is connected to the first end of the resistance unit 850; the non-inverting input end of the first amplifier 810 is connected to the positive electrode of the reference voltage source, and the inverting input end of the first amplifier 810 is connected to the output end of the first MOS tube 820.

[0150] The current source unit 830 includes: a first MOS tube branch and multiple second MOS tube branches, each of which is connected to a current branch 840; the first MOS tube branch is connected to the input end of the first MOS tube through a fourth resistor R4; the first MOS tube branch and the second MOS tube branch each include a group of second MOS tubes M2 and third MOS tubes M3, the input end of the second MOS tube M2 is connected to the output end of the third MOS tube M3, the output ends of the second MOS tube M2 in each of the first MOS tube branches and the second MOS tube branches are respectively connected, and connected to the compensation power supply AVDD; the input end of the third MOS tube M3 in each of the second MOS tube branches is respectively connected to the corresponding current branch, the control end of the second MOS tube M2 in each of the first MOS tube branches and the second MOS tube branches is respectively connected to obtain a first voltage control point VP1, the control end of the third MOS tube M3 in each of the first MOS tube branches and the second MOS tube branches is respectively connected to obtain a second voltage control point VP2, and the first voltage control point VP1 and the second voltage control point VP2 are bridged across the fourth resistor R4.

[0151] Each current branch includes a control switch (B C1 ~B Cn ), one end of the control switch is connected to the current source unit, and the other end is connected to the second end of the resistance unit 850 and connected to the negative electrode of the reference voltage source.

[0152] In which, taking the first MOS tube as an N-channel MOS tube, and the second MOS tube and the third MOS tube as P-channel MOS tubes as an example, the control end is the gate of the MOS tube, the output end is the source of the MOS tube, and the input end is the drain of the MOS tube.

[0153] The resistor unit in the second compensation DAC is a unit resistor that matches the core DAC. refp Generates a unit compensation reference current, and the second compensation current flows from the compensation power supply (or analog power supply AVDD) to the negative electrode V of the reference voltage source refn , the current through V is better compensated by matching the current mirror to achieve acceptable accuracy refn The current eventually causes a constant reference current to flow through the reference bus of the reference voltage source.

[0154] In another example, the type of device in the second compensation DAC is the same as the type of device in the core DAC, in which case the circuit structure of the core DAC can be better matched. For example, if the core DAC is a resistor-type DAC, then the second compensation DAC is also a resistor-type DAC.

[0155] Schematically, refer to Fig. 9 The second compensation DAC shown in the figure comprises: a second amplifier 910, and a plurality of first compensation resistor branches 920 having one end connected to the output end of the second amplifier 910; the non-inverting input end of the second amplifier is connected to the positive electrode of the reference voltage source, and the inverting input end of the second amplifier is connected to the plurality of first compensation resistor branches 920; the second amplifier 910 is also connected to the compensation power supply AVDD. The other end of each first compensation resistor branch is connected to the negative electrode of the reference voltage source; each first compensation resistor branch comprises a resistor (R comp ~2 n R comp ) and the control switch (Q1~Q n ), the resistance of the resistor in the m+1th first compensation resistor branch is twice the resistance of the resistor in the mth first compensation resistor branch; m is a positive integer.

[0156] At this time, the same V is introduced to all resistor units in the second compensation DAC through the unity gain feedback loop. refp -V refn The amplifier is powered by the compensation power supply AVDD to achieve a separate refn The second compensation DAC is mainly composed of resistors. To achieve resistance matching with the core DAC, the second compensation DAC will occupy a large area. Therefore, this implementation method can be applied to digital-to-analog conversion devices with larger areas.

[0157] In summary, in this embodiment, the second current shunted away by the shunt device is further compensated by the second compensation DAC, which can ensure that the core DAC is still not affected by the external resistor when applied in a bipolar scenario, thereby ensuring the linearity of the core DAC.

[0158] In addition, the circuit complexity of the first compensation DAC and the second compensation DAC is relatively low, and they are suitable for the design of high-precision DACs in most industrial control and testing fields that are not sensitive to power consumption, and they have strong versatility.

[0159] In addition, the current on the reference bus is compensated by the first compensation DAC and the second compensation DAC. Compared with the method of directly correcting the nonlinear points on the output curve, the technical solution provided in this embodiment consumes relatively fewer digital resources and is more adaptable to application environments with different internal resistances.

[0160] Optionally, the present application also provides a current compensation method for a digital-to-analog conversion device.

[0161] Fig.10 A flow chart of a current compensation method for a digital-to-analog conversion device according to an embodiment of the present disclosure is shown. The method is used in a digital-to-analog conversion device, specifically in a control unit of the digital-to-analog conversion device in each of the above embodiments. The core DAC in the digital-to-analog conversion device is an R-2R type DAC. Fig.10 As shown, the method includes:

[0162] Step 1001, determining a node voltage corresponding to each resistance branch based on the resistance voltage division of the resistance network in each resistance branch;

[0163] Step 1002, determining a branch reference current of the resistance branch based on a node voltage and a ground resistance corresponding to the resistance branch;

[0164] Step 1003, determining a first compensation current value based on a difference between the first current and the constant current value; the first current is the sum of the branch reference currents of each resistance branch;

[0165] Step 1004 , controlling the first compensation DAC to output a compensation current according to a first compensation current value, so as to compensate the reference current of the reference voltage source to a constant current value.

[0166] For the relevant description of this embodiment, please refer to the above-mentioned device embodiment, and this embodiment will not be described in detail here.

[0167] In this embodiment, the first current of the core DAC is predicted according to the input codeword, and then the first compensation DAC is controlled to generate a compensation current with an opposite change trend, so that the reference bus of the reference voltage source shared by the core DAC and the first compensation DAC is made to flow through the internal resistor R com The current is constant, so that the voltage drop caused by the internal resistance is constant, which can avoid the problem that the first current of the core DAC changes with the input and affects the output linearity, eliminate nonlinear errors, and ensure the linearity of the core DAC.

[0168] In addition, the branch reference current is determined by determining the node voltage corresponding to each resistance branch of the first resistance bridge, so that the control unit can determine the branch reference current based on the same method for different resistance branch design structures, thereby obtaining the first current of the core DAC, which can improve the versatility of the method for determining the compensation current.

[0169] Fig.11A flow chart of a current compensation method for a digital-to-analog conversion device according to another embodiment of the present disclosure is shown. The method is used in a digital-to-analog conversion device, specifically in a control unit of the digital-to-analog conversion device in each of the above embodiments. The output end of the core DAC in the digital-to-analog conversion device is connected to a shunt device, and the compensation circuit includes a first compensation DAC and a second compensation DAC. At this time, the type of the core DAC can be a capacitor type, a resistor type, or a current type. This embodiment does not limit the type of the core DAC. Fig.11 As shown, the method includes:

[0170] Step 1101, determining a first current of a core DAC;

[0171] Step 1102, determining a second current of the shunt device;

[0172] Optionally, step 1102 may be executed before step 1101, or may be executed after step 1101, or may be executed synchronously with step 1101. This embodiment does not limit the execution order between steps 1101 and 1102.

[0173] Step 1103, determining a first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of a positive electrode of a reference voltage source;

[0174] Step 1104, determining a second compensation current value based on a difference between a sum of the second current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source;

[0175] Step 1105, controlling the first compensation DAC to output a compensation current according to a first compensation current value, so as to compensate the positive current of the reference voltage source to a first constant current value;

[0176] Step 1105 can be executed after step 1103 , and this embodiment does not limit the execution timing of step 1105 .

[0177] Step 1106 , controlling the second compensation DAC to output a compensation current according to a second compensation current value, so as to compensate the negative current of the reference voltage source to a second constant current value.

[0178] Optionally, step 1106 may be executed before step 1105, or after step 1105, or synchronously with step 1105. This embodiment does not limit the order between steps 1105 and 1106.

[0179] For the relevant description of this embodiment, please refer to the above-mentioned device embodiment, and this embodiment will not be described in detail here.

[0180] In this embodiment, the second current shunted away by the shunt device is further compensated by the second compensation DAC, which can ensure that the core DAC is not affected by the external resistor when applied in a bipolar scenario, thereby ensuring the linearity of the core DAC.

[0181] Fig.12 This is a block diagram of a current compensation device of a digital-to-analog conversion device provided by an embodiment of the present application. The device is used in a control unit of the digital-to-analog conversion device, and the core DAC in the digital-to-analog conversion device is an R-2R type DAC. The device includes at least the following modules: a voltage determination module 1210, a current determination module 1220, a compensation determination module 1230, and a compensation control module 1240.

[0182] A voltage determination module 1210, configured to determine a node voltage corresponding to each resistance branch based on a resistance voltage division condition of a resistance network in each resistance branch;

[0183] A current determination module 1220, configured to determine a branch reference current of the resistance branch based on a node voltage corresponding to the resistance branch and the ground resistance;

[0184] A compensation determination module 1230, configured to determine a first compensation current value based on a difference between a first current and the constant current value; the first current being the sum of branch reference currents of each resistance branch;

[0185] The compensation control module 1240 is used to control the first compensation DAC to output a compensation current according to the first compensation current value, so as to compensate the reference current of the reference voltage source to a constant current value.

[0186] For relevant details, please refer to the above embodiments.

[0187] Fig.13 This is a block diagram of a current compensation device for a digital-to-analog conversion device provided by another embodiment of the present application. The device is used in a control unit of the digital-to-analog conversion device. The output end of the core DAC in the digital-to-analog conversion device is connected to a shunt device. The compensation circuit includes a first compensation DAC and a second compensation DAC. The device includes at least the following modules:

[0188] A first current determination module 1310, configured to determine a first current of the core DAC;

[0189] A second current determination module 1320, configured to determine a second current of the shunt device;

[0190] A first compensation determination module 1330, configured to determine the first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of the positive electrode of the reference voltage source;

[0191] A second compensation determination module 1340, configured to determine a second compensation current value based on a difference between a sum of the second current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source;

[0192] A first compensation control module 1350, configured to control the first compensation DAC to output a compensation current according to the first compensation current value, so as to compensate the positive current of the reference voltage source to the first constant current value;

[0193] The second compensation control module 1360 is used to control the second compensation DAC to output a compensation current according to the second compensation current value, so as to compensate the negative current of the reference voltage source to the second constant current value.

[0194] For relevant details, please refer to the above embodiments.

[0195] In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to execute the method described in the above method embodiments. The specific implementation can refer to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0196] The embodiment of the present disclosure also provides a computer-readable storage medium on which computer program instructions are stored, and the computer program instructions implement the above method when executed by a processor. The computer-readable storage medium can be a volatile or non-volatile computer-readable storage medium.

[0197] An embodiment of the present disclosure further proposes an electronic device, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0198] The embodiments of the present disclosure also provide a computer program product, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0199] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A digital-to-analog conversion device, characterized in that: The device comprises: A core DAC, used to realize a digital-to-analog conversion function; the core DAC comprises an input end and an output end, the input end is respectively connected to an input source and a reference voltage source, and the output end is used to output an analog signal; the core DAC is an R-2R type DAC, the R-2R type DAC comprises a resistance main circuit and a plurality of resistance branches connected to the resistance main circuit; the resistance main circuit comprises a plurality of first resistors connected in series, two adjacent resistance branches are bridged by a first resistor, and the plurality of resistance branches correspond to the bits of the core DAC one by one; one end of the resistance main circuit is connected to the output end, and the other end is grounded through a grounding resistor; one end of the resistance branch that is not bridged with the first resistor is grounded or connected to the reference voltage source through switch control; as well as, A compensation circuit, comprising a first compensation DAC and a control unit; wherein the first compensation DAC is connected to the reference voltage source and is used to compensate the reference current of the reference voltage source to a constant current value; one end of the control unit is connected to the input source and the other end is connected to the first compensation DAC, and the control unit is used to: Determine the node voltage corresponding to each resistance branch based on the resistance voltage division of the resistance network in each resistance branch; Determining a branch reference current of the resistance branch based on a node voltage corresponding to the resistance branch and the ground resistance; Determine a first compensation current value based on a difference between a first current and the constant current value; the first current is the sum of branch reference currents of each resistance branch; The first compensation DAC is controlled to output a compensation current according to the first compensation current value, so as to compensate the reference current of the reference voltage source to the constant current value.

2. The device according to claim 1, characterized in that The step of determining the node voltage corresponding to each resistance branch based on the resistance voltage division condition of the resistance network in each resistance branch includes: For a bit corresponding to any one of the resistance branches connected by the first resistance bridge, based on the resistance voltage division of the resistance branch, determine the influence of the bit corresponding to the resistance branch on the node voltage corresponding to the resistance branch, and obtain the weight of the bit on the node voltage; Based on the node voltage and the resistance voltage division between other resistance branches, determine the influence of the bit corresponding to the resistance branch on other node voltages corresponding to other resistance branches, and obtain the weight of the bit on other node voltages; For each node voltage, the weight of each bit on the node voltage is superimposed on the product of the corresponding bit to obtain the node voltage.

3. The device according to claim 1, characterized in that The output end of the core DAC is connected to a shunt device; the shunt device is also connected to the positive electrode of the reference voltage source, but not to the negative electrode of the reference voltage source, and the current shunted from the positive electrode of the reference voltage source by the shunt device is related to the input code word of the input source; accordingly, The compensation circuit further includes a second compensation DAC, one end of the second compensation DAC is connected to the control unit, and the other end is connected to the negative electrode of the reference voltage source, so as to compensate the reference current of the negative electrode of the reference voltage source; Accordingly, the control unit is also used for: determining a second current of the shunt device; determining the first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of the positive electrode of the reference voltage source; determining a second compensation current value based on a difference between a sum of the first current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source; The second compensation DAC is controlled to output a compensation current according to the second compensation current value, so as to compensate the negative current of the reference voltage source to a second constant current value.

4. The device according to claim 3, characterized in that The current shunt device includes an amplifier that scales the analog signal to bipolar.

5. The device according to claim 4, characterized in that The non-inverting input terminal of the amplifier is connected to the output terminal of the core DAC, the inverting input terminal of the amplifier is connected to the positive electrode of the reference voltage source through a second resistor, and is connected to the output terminal of the amplifier through a third resistor; Accordingly, The determining the second current of the shunt device comprises: The second current is determined based on a difference between a reference voltage value of a positive electrode of the reference voltage source and an output voltage value of an output terminal of the core DAC, and a resistance value of the second resistor.

6. The device according to claim 3, characterized in that The second compensation DAC is a current-type DAC.

7. The device according to claim 6, characterized in that The second compensation DAC includes a first amplifier, and a first MOS tube whose control end is connected to the output end of the first amplifier, the input end of the first MOS tube is connected to a current source unit, and the output end of the first MOS tube is connected to a resistor unit; The non-inverting input terminal of the first amplifier is connected to the positive electrode of the reference voltage source, and the inverting input terminal of the first amplifier is connected to the output terminal of the first MOS tube; The current source unit includes: a first MOS tube branch and a plurality of second MOS tube branches, each second MOS tube branch is connected to a current branch; the first MOS tube branch is connected to the input end of the first MOS tube through a fourth resistor; the first MOS tube branch and the second MOS tube branch each include a group of second MOS tubes and a third MOS tube, the input end of the second MOS tube is connected to the output end of the third MOS tube, each first MOS tube branch and the output end of the second MOS tube in the second MOS tube branch are respectively connected, and connected to a compensation power supply; the input end of the third MOS tube in each second MOS tube branch is respectively connected to the corresponding current branch, the control end of the second MOS tube in each first MOS tube branch and the second MOS tube branch are respectively connected to obtain a first voltage control point, the control end of the third MOS tube in each first MOS tube branch and the second MOS tube branch are respectively connected to obtain a second voltage control point, and the first voltage control point and the second voltage control point are bridged across the fourth resistor; Each current branch includes a control switch, one end of which is connected to the current source unit, and the other end of which is connected to the resistance unit and connected to the negative electrode of the reference voltage source.

8. The device according to claim 3, characterized in that The second compensation DAC is a resistance type DAC.

9. The device according to claim 8, characterized in that The second compensation DAC comprises: a second amplifier, and a plurality of first compensation resistance branches having one end connected to an output end of the second amplifier; The non-inverting input terminal of the second amplifier is connected to the positive electrode of the reference voltage source, and the inverting input terminal of the second amplifier is connected to the plurality of first compensation resistor branches; the second amplifier is also connected to a compensation power supply; Among them, the other end of each first compensation resistor branch is connected to the negative electrode of the reference voltage source; each first compensation resistor branch includes a resistor and a control switch connected to the resistor, and the resistance value of the resistor in the m+1th first compensation resistor branch is twice the resistance value of the resistor in the mth first compensation resistor branch; m is a positive integer.

10. The device according to any one of claims 1 to 9, characterized in that: The first compensation DAC is a resistance type DAC.

11. The device according to claim 10, characterized in that The first compensation DAC comprises a plurality of second compensation resistance branches, one end of each second compensation resistance branch is connected to the positive electrode of the reference voltage source, and the other end of each second compensation resistance branch is connected to the negative electrode of the reference voltage source; Each second compensation resistor branch includes a resistor and a control switch connected to the resistor, and the resistance of the resistor in the (n+1)th second compensation resistor branch is twice the resistance of the resistor in the (n)th second compensation resistor branch; and n is a positive integer.

12. A digital-to-analog conversion device, characterized in that: The device comprises: A core DAC, used to realize a digital-to-analog conversion function; the core DAC comprises an input end and an output end, the input end is respectively connected to an input source and a reference voltage source, and the output end is used to output an analog signal; a shunt device connected to the output end of the core DAC, the shunt device also connected to the positive electrode of the reference voltage source but not connected to the negative electrode of the reference voltage source, and the current shunted from the positive electrode of the reference voltage source by the shunt device is related to the input codeword of the input source; as well as, A compensation circuit, comprising a first compensation DAC, a second compensation DAC and a control unit; wherein one end of the first compensation DAC is connected to the control unit, and the other end is connected to the positive electrode and the negative electrode of the reference voltage source respectively, so as to compensate the reference current of the positive electrode and the negative electrode of the reference voltage source to a first constant current value; one end of the second compensation DAC is connected to the control unit, and the other end is connected to the negative electrode of the reference voltage source, so as to compensate the reference current of the negative electrode of the reference voltage source to a second constant current value; the control unit is used to: determining a first current of the core DAC; determining a second current of the shunt device; determining the first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of the positive electrode of the reference voltage source; determining a second compensation current value based on a difference between a sum of the second current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source; Controlling the first compensation DAC to output a compensation current according to the first compensation current value, so as to compensate the positive current of the reference voltage source to the first constant current value; The second compensation DAC is controlled to output a compensation current according to the second compensation current value, so as to compensate the negative current of the reference voltage source to the second constant current value.

13. The device according to claim 12, characterized in that The type of device in the first compensation DAC is the same as the type of device in the core DAC; and / or the type of device in the second compensation DAC is the same as the type of device in the core DAC.

14. A current compensation method for a digital-to-analog conversion device, characterized in that: Used in the digital-to-analog conversion device according to any one of claims 1 to 11, the method comprises: Determine the node voltage corresponding to each resistance branch based on the resistance voltage division of the resistance network in each resistance branch; Determining a branch reference current of the resistance branch based on a node voltage corresponding to the resistance branch and the ground resistance; Determine a first compensation current value based on a difference between a first current and the constant current value; the first current is the sum of branch reference currents of each resistance branch; The first compensation DAC is controlled to output a compensation current according to the first compensation current value, so as to compensate the reference current of the reference voltage source to a constant current value.

15. A current compensation method for a digital-to-analog conversion device, characterized in that: Used in the digital-to-analog conversion device according to claim 12 or 13, the method comprises: determining a first current of the core DAC; determining a second current of the shunt device; determining the first compensation current value based on a difference between a sum of the first current and the second current and a first constant current value of the positive electrode of the reference voltage source; determining a second compensation current value based on a difference between a sum of the second current and the first compensation current value and a second constant current value of the negative electrode of the reference voltage source; Controlling the first compensation DAC to output a compensation current according to the first compensation current value, so as to compensate the positive current of the reference voltage source to the first constant current value; The second compensation DAC is controlled to output a compensation current according to the second compensation current value, so as to compensate the negative current of the reference voltage source to the second constant current value.

16. A digital-to-analog conversion device, characterized in that: include: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to implement the method of claim 14 or 15 when executing the instructions stored in the memory.

17. A non-volatile computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method according to claim 14 or 15 is implemented.

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