PCB anti-interference current limiting circuit structure

Abstract

The invention discloses an anti-interference current-limiting circuit structure of a PCB (Printed Circuit Board). The anti-interference current-limiting circuit structure comprises components arranged on a grid plate, three pins of the P-type triode Q8 are positioned on one side of a tube body of the P-type triode Q8; the first voltage stabilizing module is adjacent to a tube body of the P-type triode Q8 and is positioned on one side of an emitter pin of the P-type triode Q8; the resistor R61, the resistor R60, the resistor R59 and the resistor R71 are arranged between the three pins and the first edge in parallel; the P-type triode Q10 is arranged adjacent to the pins of the base electrodes of the resistor R71 and the P-type triode Q8 respectively; the resistor R58, the triode Q9, the resistor R55, the resistor R56, the triode Q6, the triode Q7 and the second voltage stabilizing module are located on the other side of the P-type triode Q8 and are opposite to the first voltage stabilizing module. According to the current limiting circuit, the positions of part of components in the current limiting circuit are adjusted, so that the loop perimeters of the resistor R59, the resistor R60, the resistor R61 and the B and E ends of the P-type triode Q10 are reduced, and normal output and use of the PCB circuit are guaranteed.

Description

Technical Field

[0001] The invention relates to the technical field of printed circuit boards, and in particular to an anti-interference current-limiting circuit structure of a PCB board. Background Art

[0002] The circuit on the PCB board usually involves a current limiting circuit, for example, the current is limited to about 130mA. When the load at the output end becomes smaller and the current increases to 130mA, the P-type transistor Q10 in the current limiting circuit is turned on, so that the base voltage of the P-type transistor Q8 increases, and the voltage difference between the base voltage and the emitter voltage of Q8 decreases, thereby limiting the output current. In the existing current limiting circuit, such as Figure 1 As shown, R59, R60, R61 and the B and E terminals of the P-type transistor Q10 form a loop, which produces an antenna effect and can sense the changing electromagnetic field in the air interface, forming a periodically changing weak current in the antenna loop. When the periodically changing current is large enough, the voltage at the B and E terminals reaches the turn-on voltage of the P-type transistor Q10, 0.7V, and the P-type transistor Q10 turns on, so that the difference between the E-pole voltage and the B-pole voltage of the P-type transistor Q8 is less than 0.7V, and the P-type transistor Q8 is turned off, resulting in no output current of the product. The antenna effect generated by the loop affects the normal use of the product. Summary of the invention

[0003] In order to solve the above problems existing in the prior art, the present invention provides a PCB board anti-interference current limiting circuit structure. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0004] A first aspect of an embodiment of the present invention provides a PCB board anti-interference current limiting circuit structure, comprising:

[0005] A first voltage stabilizing module, a P-type transistor Q8, a resistor R59, a resistor R60, a resistor R61, a resistor R71, a resistor R58, a transistor Q9, a resistor R55, a resistor R56, a P-type transistor Q10, a transistor Q6, a transistor Q7, and a second voltage stabilizing module are arranged on the grid plate; wherein the material of the grid plate is copper;

[0006] The three pins of the P-type transistor Q8 are located on one side of the tube body of the P-type transistor Q8, and the three pins are all located between the tube body of the P-type transistor Q8 and the first edge of the PCB board;

[0007] The first voltage stabilizing module is adjacent to the body of the P-type transistor Q8 and is located on one side of the emitter pin of the P-type transistor Q8;

[0008] The resistor R61, the resistor R60, the resistor R59, and the resistor R71 are respectively arranged between the three pins and the first edge, the resistor R61, the resistor R60, the resistor R59, and the resistor R71 are parallel and aligned with each other, and the short sides of the resistor R61, the resistor R60, the resistor R59, and the resistor R71 are oriented toward the three pins;

[0009] The P-type transistor Q10 is disposed adjacent to the pins of the resistor R71 and the base of the P-type transistor Q8 respectively;

[0010] The resistor R58, the transistor Q9, the resistor R55, the resistor R56, the transistor Q6, the transistor Q7 and the second voltage stabilizing module are located on the other side of the P-type transistor Q8 and are arranged opposite to the first voltage stabilizing module.

[0011] In one embodiment of the present invention, the resistor R59, the resistor R60, and the resistor R61 are connected in series in sequence, and both ends of the resistor R71 are connected to one end of the resistor R59 and one end of the resistor R61;

[0012] The emitter of the P-type transistor Q8 is connected to the circuit between the resistor R61 and the resistor R71, the base of the P-type transistor Q8 is connected to the collector of the P-type transistor Q10, the base of the P-type transistor Q10 is connected to the emitter of the P-type transistor Q8, and the emitter of the P-type transistor Q10 is connected to the circuit between the resistor R59 and the resistor R71;

[0013] The resistor R55 is connected to the resistor 71 and the transistor Q6. The transistor Q6 is also connected to the collector of the P-type transistor Q10 and the second voltage stabilizing module. The second voltage stabilizing module is connected to the resistor R56. The transistor Q9 is connected to both ends of the resistor R58. One end of the resistor R58 is connected to the transistor Q7.

[0014] In one embodiment of the present invention, the collector pin of the P-type transistor Q10 faces the inner side of the PCB board; the collector pin of the transistor Q6 faces the inner side of the PCB board;

[0015] The resistor R55 and the transistor Q6 are located on one side of the P-type transistor Q10 and are opposite to the resistor R71 .

[0016] In one embodiment of the present invention, the second voltage stabilizing module includes: a voltage stabilizing tube Z13 and a voltage stabilizing tube Z14;

[0017] The resistor R56, the voltage regulator tube Z13 and the voltage regulator tube Z14 are all located on one side of the transistor Q6 and the P-type transistor Q10 and are opposite to the resistor R55; the resistor R56, the voltage regulator tube Z13 and the voltage regulator tube Z14 are sequentially arranged in a direction away from the P-type transistor Q8 and are parallel to each other, and the short sides of the resistor R56, the voltage regulator tube Z13 and the voltage regulator tube Z14 face the transistor Q6;

[0018] The collector of the transistor Q6 is also connected to the collector of the P-type transistor Q10, and the transistor Q6 is also connected to one end of the voltage regulator Z13, the other end of the voltage regulator Z13 is connected to one end of the voltage regulator Z14, and the other end of the voltage regulator Z14 is connected to the resistor R56.

[0019] In one embodiment of the present invention, the resistor R58 is located between the transistor Q9 and the transistor Q7, and the short side of the resistor R58 faces the P-type transistor Q8;

[0020] The collector pin of the transistor Q9 is directed toward the resistor R56.

[0021] Beneficial effects of the present invention:

[0022] The present invention adjusts the positions of some components in the current limiting circuit so that the distance between the resistor R59, the resistor R60, the resistor R61 and the P-type transistor Q10 is reduced, thereby reducing the loop circumference of the resistor R59, the resistor R60, the resistor R61 and the B and E end pins of the P-type transistor Q10, reducing the amplitude of the electromagnetic field induced in the air, weakening the current that forms a periodic change in the antenna loop, thereby avoiding the P-type transistor Q8 from being turned off, and ensuring the normal output and use of the PCB board circuit. Further, the current limiting circuit is arranged on a copper grid plate, which can shield and absorb part of the external electromagnetic interference, reduce the interference to the current limiting circuit and the PCB circuit, and further ensure the normal use of the PCB board.

[0023] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings.

[0024] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0026] Figure 1 A schematic diagram of the arrangement of components on a PCB board provided by the prior art;

[0027] Figure 2 A schematic diagram of the arrangement of components of a PCB board anti-interference current limiting circuit structure provided by an embodiment of the present invention;

[0028] Figure 3 This is a diagram of output voltage measurement by an oscilloscope with and without interference added in the prior art;

[0029] Figure 4 This is a diagram of measuring output voltage with an oscilloscope with and without interference provided in an embodiment of the present invention.

[0030] Figure 5 A circuit connection schematic diagram of a PCB board anti-interference current limiting circuit structure provided by an embodiment of the present invention;

[0031] Figure 6 for Figure 1 Schematic diagram of loop interception;

[0032] Figure 7 A loop interception schematic diagram of a PCB board anti-interference current limiting circuit structure provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0033] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0034] like Figure 1 As shown, an embodiment of the present invention provides a PCB board anti-interference current limiting circuit structure, including: a first voltage stabilizing module, a P-type transistor Q8, a resistor R59, a resistor R60, a resistor R61, a resistor R71, a resistor R58, a transistor Q9, a resistor R55, a resistor R56, a P-type transistor Q10, a transistor Q6, a transistor Q7, and a second voltage stabilizing module arranged on a grid board. The material of the grid board is copper;

[0035] The three pins of the P-type transistor Q8 are located on one side of the tube body of the P-type transistor Q8, and the three pins are all located between the tube body of the P-type transistor Q8 and the first edge of the PCB board.

[0036] The first voltage stabilizing module is adjacent to the body of the P-type transistor Q8 and is located at one side of the emitter pin 3 of the P-type transistor Q8 .

[0037] The resistors R61, R60, R59 and R71 are respectively arranged between the three pins and the first edge of the P-type transistor Q8. The resistors R61, R60, R59 and R71 are parallel and aligned with each other, and the short sides of the resistors R61, R60, R59 and R71 face the direction of the three pins. Figure 2 As shown in FIG. 1 , four resistors are placed horizontally. The edge of the PCB board close to the three pins is the first edge.

[0038] The P-type transistor Q10 is respectively arranged adjacent to the resistor R71 and the base pin 1 of the P-type transistor Q8. The resistor R58, transistor Q9, resistor R55, resistor R56, transistor Q6, transistor Q7 and the second voltage stabilizing module are located on the other side of the P-type transistor Q8 and are arranged opposite to the first voltage stabilizing module.

[0039] It should be noted that the prior art Figure 1 As shown, resistors R59, R60, and R61 are close to the upper end, and the P-type transistor Q10 is close to the lower end. There are six voltage regulator tubes between the three resistors and Q10. Therefore, the distance between the three resistors and Q10 is long, and a loop needs to be connected to each other. Therefore, the connection line is long and the circumference of the loop is long, as shown in FIG. Figure 6 As shown, the loop circumference measured by the software-Altium Designer is 63.7mm.

[0040] In this embodiment, the principle of the current limiting circuit and the electrical connection relationship between the various components are the same as those in the prior art. Only the relative position relationship between some components in the current limiting circuit is changed, so that the loop circumference of the resistor R59, the resistor R60, the resistor R61 and the B and E terminal pins of the P-type transistor Q10 is greatly reduced. Figure 7 As shown, the loop circumference measured by the software-AltiumDesigner is 40mm.

[0041] like Figure 2 As shown, in this embodiment, the circuit structure further includes a voltage regulator tube Z16, a voltage regulator tube Z20, a resistor R62, a resistor R63, a resistor R57, a voltage regulator tube Z15 and a resistor R64, and the positions of the transistor Q7, the resistor R62, the resistor R63, the resistor R57, the voltage regulator tube Z15 and the resistor R64 on the PCB are the same as Figure 1 Similarly, transistor Q7, resistor R62, resistor R63, resistor R57, voltage regulator Z15 and resistor R64 are located near resistor R58. Resistors R62, resistor R63, resistor R57, voltage regulator Z15 and resistor R64 are also arranged on the grid plate.

[0042] In this embodiment, compared with the prior art Figure 1In comparison, the positions of the first voltage stabilizing module (including voltage stabilizing tube Z17, voltage stabilizing tube Z18, voltage stabilizing tube Z19, voltage stabilizing tube Z21, voltage stabilizing tube Z22, and voltage stabilizing tube Z23) and the P-type transistor Q8 are interchanged, and the resistors R59, R60, R61, and R71 are concentrated on one side of the P-type transistor Q8, closer to the position of the P-type transistor Q10, so that the connection lines of the resistors R59, R60, and R61 with the B and E end pins of the P-type transistor Q10 are shortened, and the circumference of the loop formed is reduced. Among them, the positions of the voltage stabilizing tubes Z17, Z18, and Z19 are interchanged with the voltage stabilizing tubes Z21, Z22, and Z23.

[0043] Furthermore, the collector pin of the P-type transistor Q10 faces the inner side of the PCB board; the collector pin of the transistor Q6 faces the inner side of the PCB board. The resistor R55 and the transistor Q6 are located on one side of the P-type transistor Q10 and opposite to the resistor R71.

[0044] Here, with Figure 1 By comparison, the position of resistor R55 is swapped with that of P-type transistor Q10 and transistor Q6. Figure 1 The collectors of the two transistors face the first edge of the PCB board. In this embodiment, the collectors of the two transistors face the inner side of the PCB board.

[0045] Furthermore, the second voltage stabilizing module includes: a voltage stabilizing tube Z13 and a voltage stabilizing tube Z14.

[0046] The resistor R56, the voltage regulator Z13 and the voltage regulator Z14 are all located on one side of the transistor Q6 and the P-type transistor Q10 and are opposite to the resistor R55; the resistor R64, the resistor R56, the voltage regulator Z13 and the voltage regulator Z14 are arranged in sequence and parallel to each other in a direction away from the P-type transistor Q8, and the short sides of the resistor R64, the resistor R56, the voltage regulator Z13 and the voltage regulator Z14 face the transistor Q6.

[0047] Here, with Figure 1 In comparison, the resistor R56, the Zener diode Z13 and the Zener diode Z14 are arranged horizontally, and after the pin orientation of the transistor Q6 is changed, the connection with the resistor R55 and the Zener diode Z13 is more convenient and direct, which is convenient for making connections and saving materials.

[0048] Furthermore, the resistor R58 is located between the transistor Q9 and the transistor Q7, and the short side of the resistor R58 faces the P-type transistor Q8; the collector pin of the transistor Q9 faces the resistor R56.

[0049] In this embodiment, the resistor R58 is between the transistor Q9 and the transistor Q7 so that the resistor can be directly connected to the two transistors, which reduces the bending of the line connection, facilitates the connection and saves materials.

[0050] The electrical connection mode between the components of the embodiment of the present invention is not adjusted. Specifically, the resistor R59, the resistor R60, and the resistor R61 are connected in series in sequence, and the two ends of the resistor R71 are connected to one end of the resistor R59 and one end of the resistor R61. The emitter of the P-type transistor Q8 is connected to the circuit between the resistor R61 and the resistor R71, the base of the P-type transistor Q8 is connected to the collector of the P-type transistor Q10, the base of the P-type transistor Q10 is connected to the emitter of the P-type transistor Q8, and the emitter of the P-type transistor Q10 is connected to the circuit between the resistor R59 and the resistor R71. The resistor R55 is connected to the resistor R71 and the transistor Q6, and the transistor Q6 is also connected to the collector of the P-type transistor Q10 and the second voltage stabilizing module, the second voltage stabilizing module is connected to the resistor R56, the transistor Q9 is connected to the two ends of the resistor R58, and one end of the resistor R58 is connected to the transistor Q7. The transistor Q6 is also connected to one end of the voltage regulator tube Z13, the other end of the voltage regulator tube Z13 is connected to one end of the voltage regulator tube Z14, and the other end of the voltage regulator tube Z14 is connected to the resistor R56.

[0051] Specifically, Figure 5As shown, the emitter of transistor Q6 is connected to one end of resistor R55, the base of transistor Q6 is connected to the other end of resistor R55 and the negative electrode of voltage regulator Z13, and the collector of transistor Q6 is connected to the collector of P-type transistor Q10. The positive electrode of the voltage regulator tube Z13 is connected to the negative electrode of the voltage regulator tube Z14, the positive electrode of the voltage regulator tube Z14 is connected in series with one end of the resistor R56, the other end of the resistor R56 is connected to the positive electrode of the voltage regulator tube Z15, the negative electrode of the voltage regulator tube Z15 is connected to the emitter of the transistor Q7, the emitter of the transistor Q7 is connected to one end of the resistor R57, the other end of the resistor R57 is connected to the emitter of the P-type transistor Q10, one end of the resistor R59 and one end of the resistor R71, the other end of the resistor R59 is connected in series with the resistor R60 and the resistor R61 in sequence, the resistor R61 is connected to the other end of the resistor R71, the other end of the resistor R71 is connected to the base of the P-type transistor Q10, the collector of the P-type transistor Q10 is connected to the base of the P-type transistor Q8, the emitter of the P-type transistor Q8 is connected to the other end of the resistor R71, and the P-type transistor The collector of transistor Q8 is connected to one end of resistor R62, the other end of resistor R62 is connected to the base of transistor Q7, the collector of transistor Q7 is connected to the base of transistor Q9 and one end of resistor R58, the collector of transistor Q9 is connected to one end of resistor R64, the other end of resistor R64 is connected to the collector of P-type transistor Q10, the other end of resistor R58 is connected to one end of resistor R63, the other end of resistor R63 is connected to the base of transistor Q7, Zener diodes Z16, Z17, Z18 and Z19 are connected in series in sequence and are connected in parallel as a whole between one end of resistor R62 and one end of resistor R63, and Zener diodes Z20, Z21, Z22 and Z23 are connected in series in sequence and are connected in parallel as a whole between one end of resistor R62 and one end of resistor R63.

[0052] The present invention adjusts the positions of some components in the current limiting circuit so that the distance between the resistor R59, the resistor R60, the resistor R61 and the P-type transistor Q10 is reduced, thereby reducing the loop circumference of the resistor R59, the resistor R60, the resistor R61 and the B and E end pins of the P-type transistor Q10, reducing the amplitude of the electromagnetic field induced in the air, weakening the current that forms a periodic change in the antenna loop, thereby avoiding the P-type transistor Q8 from being turned off, and ensuring the normal output and use of the PCB board circuit. Further, the current limiting circuit is arranged on a copper grid plate, which can absorb and shield part of the external electromagnetic interference, reduce the interference to the current limiting circuit and the PCB circuit, and further ensure the normal use of the PCB board.

[0053] The following is a description of the beneficial effects of the present invention:

[0054] Use a walkie-talkie frequency of 480MHz to simulate the interference during on-site use, 10CM away from the circuit part, and use an oscilloscope to measure the output voltage.

[0055] Prior art Figure 1 When no interference signal is added to the PCB board, such as Figure 3 As shown in the figure, the oscilloscope outputs 12V when no interference is added. Figure 3 As shown in the figure, when the interference segment is added to the waveform of the oscilloscope, the voltage output by the product drops from 12V to about 5V, and it has messy interference waves.

[0056] The PCB board of the present invention has no interference signal and has an oscilloscope with an interference signal added. Figure 4 As shown, there is no obvious change in the voltage at the output end, indicating that the interference can be effectively reduced after the circuit is optimized.

[0057] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0058] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0059] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0060] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0061] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

[0062] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A PCB board anti-interference current limiting circuit structure, characterized in that: include: A first voltage stabilizing module, a P-type transistor Q8, a resistor R59, a resistor R60, a resistor R61, a resistor R71, a resistor R58, a transistor Q9, a resistor R55, a resistor R56, a P-type transistor Q10, a transistor Q6, a transistor Q7, and a second voltage stabilizing module are arranged on the grid plate; wherein the material of the grid plate is copper; The three pins of the P-type transistor Q8 are located on one side of the tube body of the P-type transistor Q8, and the three pins are all located between the tube body of the P-type transistor Q8 and the first edge of the PCB board; The first voltage stabilizing module is adjacent to the body of the P-type transistor Q8 and is located on one side of the emitter pin of the P-type transistor Q8; The resistor R61, the resistor R60, the resistor R59, and the resistor R71 are respectively arranged between the three pins and the first edge, the resistor R61, the resistor R60, the resistor R59, and the resistor R71 are parallel and aligned with each other, and the short sides of the resistor R61, the resistor R60, the resistor R59, and the resistor R71 are oriented toward the three pins; The P-type transistor Q10 is disposed adjacent to the pins of the resistor R71 and the base of the P-type transistor Q8 respectively; The resistor R58, the transistor Q9, the resistor R55, the resistor R56, the transistor Q6, the transistor Q7 and the second voltage stabilizing module are located on the other side of the P-type transistor Q8 and are arranged opposite to the first voltage stabilizing module.

2. A PCB board anti-interference current limiting circuit structure as claimed in claim 1, characterized in that: The resistor R59, the resistor R60, and the resistor R61 are connected in series in sequence, and both ends of the resistor R71 are connected to one end of the resistor R59 and one end of the resistor R61; The emitter of the P-type transistor Q8 is connected to the circuit between the resistor R61 and the resistor R71, the base of the P-type transistor Q8 is connected to the collector of the P-type transistor Q10, the base of the P-type transistor Q10 is connected to the emitter of the P-type transistor Q8, and the emitter of the P-type transistor Q10 is connected to the circuit between the resistor R59 and the resistor R71; The resistor R55 is connected to the resistor 71 and the transistor Q6. The transistor Q6 is also connected to the collector of the P-type transistor Q10 and the second voltage stabilizing module. The second voltage stabilizing module is connected to the resistor R56. The transistor Q9 is connected to both ends of the resistor R58. One end of the resistor R58 is connected to the transistor Q7.

3. A PCB board anti-interference current limiting circuit structure as claimed in claim 1, characterized in that: The collector pin of the P-type transistor Q10 faces the inner side of the PCB board; the collector pin of the transistor Q6 faces the inner side of the PCB board; The resistor R55 and the transistor Q6 are located on one side of the P-type transistor Q10 and are opposite to the resistor R71 .

4. A PCB board anti-interference current limiting circuit structure as claimed in claim 1, characterized in that: The second voltage stabilizing module includes: a voltage stabilizing tube Z13 and a voltage stabilizing tube Z14; The resistor R56, the voltage regulator tube Z13 and the voltage regulator tube Z14 are all located on one side of the transistor Q6 and the P-type transistor Q10 and are opposite to the resistor R55; the resistor R56, the voltage regulator tube Z13 and the voltage regulator tube Z14 are sequentially arranged in a direction away from the P-type transistor Q8 and are parallel to each other, and the short sides of the resistor R56, the voltage regulator tube Z13 and the voltage regulator tube Z14 face the transistor Q6; The collector of the transistor Q6 is also connected to the collector of the P-type transistor Q10, and the transistor Q6 is also connected to one end of the voltage regulator Z13, the other end of the voltage regulator Z13 is connected to one end of the voltage regulator Z14, and the other end of the voltage regulator Z14 is connected to the resistor R56.

5. A PCB board anti-interference current limiting circuit structure as claimed in claim 1, characterized in that: The resistor R58 is located between the transistor Q9 and the transistor Q7, and the short side of the resistor R58 faces the P-type transistor Q8; The collector pin of the transistor Q9 faces the resistor R56.

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