A two-dimensional material multi-port reconfigurable device structure and its preparation method

Abstract

This application relates to the technical field of nanoelectronic devices, and particularly to a two-dimensional material multi-port reconfigurable device structure and a preparation method thereof. The device includes: a plurality of electrostatic gates for regulating the conduction type of the nano two-dimensional material channel and nanoelectrodes directly connected to the active region, wherein several nanoelectrodes are directly connected to the central two-dimensional material, and at the same time, the side gate electrodes are not connected to the central two-dimensional material. By applying different gate voltages, the carrier type, density, and transport mechanism of the central two-dimensional material can be regulated, realizing free switching among n-type, p-type, or undoped states. The device structure proposed by the present invention has a plurality of nano-sized side gate electrodes and electrodes connected to the channel, utilizes the electro-tunability of two-dimensional materials, and can obtain advantages such as strong gate control ability, high device integration, and reconfigurable functions.

Description

Technical Field

[0001] This application relates to the technical field of nanoelectronic devices, and particularly to a two-dimensional material multi-port reconfigurable device structure and a preparation method thereof. Background Art

[0002] In the past few decades, in order to meet the growing demand for chip computing power, integrated circuit technology has been continuously developed following Moore's law. However, it is becoming increasingly challenging to improve the chip integration by shrinking the feature size of transistors to enhance the chip computing power. Because the feature size of transistors has approached the physical limit, effects such as short-channel and quantum tunneling lead to an increase in tunneling and leakage current, affecting the performance of transistors. Therefore, in the post-Moore era, it is necessary to introduce new materials, new device structures, and new computing architectures to break through the limitations of traditional technologies.

[0003] Recently, a technology that can achieve dynamic reconfiguration during device operation has been proposed. Its characteristic is that it can realize multiple functions on a single device, overcoming to a certain extent the problem of the single function of traditional metal-oxide-semiconductor field-effect transistors (MOSFETs). It is expected to achieve a more complex system with a smaller number of devices. By changing the electrical input of the reconfigurable device, the type of channel carriers can be flexibly switched between p-type and n-type in the same device, realizing the behavior of unipolar p-type or unipolar n-type transistors. In contrast, the type of channel carriers of transistors fabricated by traditional CMOS technology is fixed as unipolar p-type or n-type during the ion implantation process. And the reconfigurable device can also realize specific circuit functions composed of multiple CMOS transistors. For example, traditional logic gate circuits usually need to be composed of several CMOS transistors in combination, while the reconfigurable device can flexibly realize various logic functions such as AND gates, OR gates, and NOT gates on a single device. In addition, more complex circuit functions, such as adders and subtractors, can also be completed by a single reconfigurable device. The integration of such functions reduces the number of transistors, while improving the flexibility and overall performance of the circuit.

[0004] The realization of reconfigurable devices has been explored in materials such as silicon nanowires, memristors, and carbon nanotubes. For reconfigurable silicon nanowire devices, their nanowire manufacturing process is complex and the functions are limited. Reconfigurable memristors are non-volatile two-terminal devices, which can only be reconfigured through the input and output terminals and do not have separate control terminals for reconfiguration, which limits the flexibility of function switching. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a two-dimensional material multi-port reconfigurable device structure and a preparation method with stronger gate control ability for the current problems of insufficient channel electric field regulation ability and limited functions of reconfigurable devices.

[0006] To solve the above technical problems, the present invention provides a two-dimensional material multi-port reconfigurable device. The device structure has multiple electrostatic gates for regulating the conduction type of the two-dimensional material channel and electrodes directly connected to the active region. Among them, the top view of the device is as shown in Figure 2 shown. The channel electrode layer 3 is directly connected to the two-dimensional material layer 5. At the same time, the side gate electrode layer 4, as the side gate electrode, is not connected to the two-dimensional material layer 5 and is used to regulate the carrier type, density and transport mechanism of the two-dimensional material layer 5, realizing free switching among n-type, p-type or undoped states.

[0007] In one embodiment, as shown in the cross-sectional view of the device in Figure 1 shown, the device includes at least a substrate layer 1, an insulating layer 2, a channel electrode layer 3, a side gate electrode layer 4, and a two-dimensional material layer 5 from bottom to top. The channel electrode layer 3 and the side gate electrode layer 4 are used to connect to the probe station or achieve electrical connection through wire bonding.

[0008] Preferably, the material of the substrate layer 1 includes doped silicon, indium tin oxide, and silicon carbide, which are used as the back gate electrode to conduct overall regulation on the channel. The material of the insulating layer 2 includes silicon oxide, aluminum oxide, boron nitride, silicon nitride, and mica.

[0009] In one embodiment, the channel electrode layer 3 and the side gate electrode layer 4 use electron beam lithography to fabricate several nanoelectrodes. The nanoelectrodes of the channel electrode layer 3 are directly connected to the channel of the two-dimensional material layer 5, and the nanoelectrodes of the side gate electrode layer 4, as the side gate electrode, regulate the channel of the two-dimensional material layer 5. The materials of the channel electrode layer 3 and the side gate electrode layer 4 include Ti, Cr, Au, and Pd.

[0010] Preferably, the shape of the two-dimensional material layer 5 includes a nano-ring and a nano-circle. The material of the two-dimensional material layer 5 includes graphene, transition metal sulfides, and transition metal selenides.

[0011] In one embodiment, any two electrodes connected to the active region in the device are selected as input electrodes, another different electrode is used as the output electrode, and other electrodes are used as control electrodes to affect the output characteristics. By measuring the voltage-current data between the input-output electrodes and the control-output electrodes, and then setting a loss function according to the target function, the voltage parameters of the appropriate control electrodes are found through gradient descent or evolutionary algorithms, and the found parameters are verified in the device to implement logic operation functions or arithmetic operation functions. For example, various logic operation functions such as AND gate, OR gate, and NOT gate can be implemented on a single device. In addition, more complex arithmetic operation functions, such as adders and subtractors, can also be completed by a single device.

[0012] To further solve the technical problems to be solved by the present invention, the present invention provides a method for preparing a two-dimensional material multi-port reconfigurable device. The two-dimensional material multi-port reconfigurable device has the structure as described above. The preparation method includes:

[0013] Step 1, fabricating metal alignment marks and nanoelectrodes on a substrate / insulating layer material;

[0014] Step 2, on the basis of fabricating the nanoelectrodes, fabricating microscale electrodes connected to the nanoelectrodes;

[0015] Step 3, transferring or growing the two-dimensional material on the substrate on which the electrode fabrication has been completed;

[0016] Step 4, performing microscale patterning on the two-dimensional material on the surface of the sample;

[0017] Step 5, performing nanoscale patterning on the two-dimensional material on the surface of the sample;

[0018] Step 6, annealing the sample to remove surface contamination of the two-dimensional material, and completing the fabrication of the two-dimensional material multi-port reconfigurable device.

[0019] Preferably, the two-dimensional material transfer method in Step 3 includes: PMMA wet-assisted transfer method, PDMS-assisted transfer method, electrochemical bubbling transfer method, or thermal release tape transfer method. The growth methods of two-dimensional materials include: molecular beam epitaxy deposition method, atomic layer deposition method, chemical vapor deposition method, and metal organic chemical vapor deposition method.

[0020] To further solve the technical problems to be solved by the present invention, the present invention provides another method for preparing a two-dimensional material multi-port reconfigurable device. The two-dimensional material multi-port reconfigurable device has the structure as described above. The preparation method includes:

[0021] Step 1, fabricating metal alignment marks on a substrate with a two-dimensional material.

[0022] Step 2, using the metal alignment marks for lithographic alignment to fabricate microscale electrodes.

[0023] Step 3, performing microscale patterning on the two-dimensional material on the surface of the sample.

[0024] Step 4, performing nanoscale patterning on the two-dimensional material on the surface of the sample.

[0025] Step 5, fabricating nanoelectrodes to connect the two-dimensional material channel and the microscale electrodes.

[0026] Step 6, annealing the sample to remove surface contamination of the two-dimensional material, and completing the fabrication of the two-dimensional material multi-port reconfigurable device.

[0027] The two-dimensional material channel is located below or above the metal electrode.

[0028] With the two-dimensional material multi-port reconfigurable device structure and preparation method described above, the device structure proposed by the present invention has multiple nano-sized side gate electrodes and electrodes connected to the channel, utilizes the electro-tunability of two-dimensional materials, and can obtain advantages such as strong gate control ability, high device integration, and reconfigurable functions. The device structure proposed by the present invention has a relatively wide range of application scenarios, is compatible with the manufacturing processes of most two-dimensional materials, and can be used to construct two-dimensional material heterojunction devices. According to the characteristics of the channel material, the device can also be used as a reconfigurable sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other features of the present invention will be further described below in conjunction with the accompanying drawings and their detailed descriptions. It should be understood that these drawings only show several exemplary embodiments according to the present invention, and therefore should not be regarded as limiting the protection scope of the present invention. Unless otherwise specified, the drawings do not have to be to scale, and like reference numerals represent like components.

[0030] Figure 1 It is a cross-sectional view of the two-dimensional material multi-port reconfigurable device of the present invention;

[0031] Figure 2 It is a top view of the two-dimensional material multi-port reconfigurable device of the present invention;

[0032] Figure 3 It is a layout of the graphene multi-port reconfigurable device with multiple side gate electrodes and electrodes connected to the channel in the present invention;

[0033] Figure 4 It shows a process flow chart for preparing the two-dimensional material multi-port reconfigurable device by Method 1;

[0034] Figure 5 It shows a process flow chart for preparing the two-dimensional material multi-port reconfigurable device by Method 2;

[0035] Figure 6 It is a schematic diagram of using the side gate electrode to regulate the two-dimensional material p-n junction in the device of the present invention;

[0036] In the drawings: 1 - substrate layer; 2 - insulating layer; 3 - channel electrode layer; 4 - side gate electrode layer; 5 - two-dimensional material layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0037] The following detailed description refers to the accompanying drawings that form a part of this specification. The illustrative embodiments mentioned in the specification and drawings are for illustrative purposes only and are not intended to limit the scope of protection of the present invention. Those skilled in the art can understand that many other embodiments can also be adopted, and various changes can be made to the described embodiments without departing from the gist and scope of protection of the present invention. It should be understood that the various aspects of the present invention described and illustrated herein can be arranged, replaced, combined, separated, and designed in many different configurations, and these different configurations are all included in the present invention.

[0038] Example 1:

[0039] The technical solutions and objectives of the present invention will be further described below in conjunction with the accompanying drawings.

[0040] The reconfigurability of the device of the present invention is achieved by electrostatic doping regulation of the gate on the bipolar two-dimensional material active region channel, and different functions can be realized by applying different gate voltage combinations. Taking the realization of the most basic p-type or n-type transistor as an example, by applying a negative or positive voltage on the side gate, according to the working principle of the parallel plate capacitor, corresponding p-type carriers or n-type carriers will be induced in the bipolar two-dimensional material channel, realizing p-type doping or n-type doping of the channel, and forming a p-type transistor or an n-type transistor. Different from the traditional PMOS transistor or NMOS transistor: this doping is reversible and can be freely switched between n-type, p-type or undoped states; while the doping situation of the channel of the traditional PMOS transistor (NMOS transistor) cannot be changed once determined by the ion implantation process.

[0041] Furthermore, to achieve the p-n junction function in a two-dimensional material multi-port device, we can select separate side gates to apply opposite biases (negative voltage and positive voltage), and utilize the local control of the side gate on the channel, resulting in p-type and n-type doping in adjacent channel regions, forming a p-n junction, as Figure 6 shown. When applying source-drain voltages of different polarities, the conductance of the p-n type (or n-p type) channel will exhibit opposite behaviors. In particular, the positions of the p-type region and the n-type region of the traditional p-n junction diode are fixed, while the device of the present invention can be switched between p-n type or n-p type diodes by changing the polarity of the side gate voltage.

[0042] Furthermore, the device of the present invention can also be combined with a neural network to implement basic Boolean logic gate functions and more complex classification tasks. To implement basic Boolean logic gate functions, such as AND, NOT, OR and other Boolean logic functions, any two electrodes connected to the active region in the device can be selected as input electrodes, and another different electrode as the output electrode, and other electrodes as control electrodes to affect the output characteristics. By measuring the voltage-current data between the input-output electrodes and the control-output electrodes, a neural network is used to model it, and then a loss function is set according to the target function. The voltage parameters of the appropriate control electrodes are found through gradient descent or evolutionary algorithms, and finally the found parameters are verified in the device to implement the logic operation function. Therefore, according to the functions required by the device, based on the definition of input, output, and control electrodes, sufficient data is collected and modeled using DNN to implement more complex arithmetic operation functions, such as adders, subtractors, etc.

[0043] Example 2:

[0044] This example illustrates a multi-port reconfigurable device made of graphene material and its process manufacturing flow.

[0045] The device layout of this example is as Figure 3 shown. Among them, the central circular ring part represents the circular graphene channel. 8 nanoelectrodes are used as side gate electrodes and do not contact the graphene channel, which are used to control the channel doping situation; 8 nanoelectrodes are connected to the graphene channel, which are used to realize multi-port input and output. Further, the front line width of the nanoelectrode is 20 nm, the distance between the nano side gate electrode and the edge of the graphene channel is 50 nm, and the overlapping length between the nanoelectrode connected to the channel and the graphene channel is 50 nm. The graphene layer is patterned by electron beam lithography into a nano-ring with a diameter of 580 nm and a ring width of 70 nm.

[0046] The device is composed of a highly doped substrate silicon (p-type or n-type), a silicon dioxide layer (with a thickness of 300 nm), a metal electrode layer, and a graphene layer from bottom to top.

[0047] Figure 4 FIG. is a schematic process flow diagram of the device of this example fabricated by Method 1, showing the process flow of fabricating a graphene multi-port reconfigurable device.

[0048] In this example, the preparation process of the graphene multi-port reconfigurable device includes the following steps:

[0049] (1) First, pattern the nanoelectrodes and alignment mark layer on the silicon / silicon oxide substrate by electron beam lithography. To obtain a smaller line width and good electrode morphology, we need to use PMMA electron beam photoresist with a thickness of less than 100 nm and a high-voltage, high-resolution electron beam exposure device. Then, use an electron beam evaporation or thermal evaporation device to deposit and lift off metal Ti (10 nm) / Au (40 nm) to fabricate the nanoelectrodes and alignment marks.

[0050] (2) On the basis of completing the fabrication of the nanoelectrodes, use a laser direct writing device to align and fabricate the microelectrode layer connected to the nanoelectrodes for electrical connection. In this step, use a magnetron sputtering device to deposit metal Ti (10 nm) / Au (60 nm), and then lift off to complete the fabrication of the microelectrodes.

[0051] (3) On the basis of completing the electrode fabrication, use the method of wet-assisted transfer of graphene with PMMA to transfer graphene to the silicon / silicon oxide substrate on which the electrode fabrication has been completed. The following further explains the specific transfer steps:

[0052] a) Cut the copper substrate with monolayer graphene grown on it into squares of 1 cm * 1 cm. Then, spin-coat the electron beam photoresist PMMA A4 on the sample surface to support graphene during the transfer process.

[0053] b) After the electron beam photoresist on the sample surface dries naturally, turn the side without spin-coated electron beam photoresist upwards, and use reactive ion etching (RIE) to remove the graphene on this side to avoid affecting the transfer quality.

[0054] c) Transfer the sandwich structure of copper foil / graphene / electron beam photoresist obtained in the previous step with the side spin-coated with photoresist upwards to the copper etching solution, and make the sample float on the surface of the solution. Preferentially use ammonium persulfate (APS) copper etching solution with a mass fraction of 10%.

[0055] d) After the copper foil under the graphene is completely etched, use a glass slide to transfer the graphene / electron beam photoresist film to clean water and wash it three times to remove the copper etching solution.

[0056] e) Finally, transfer the graphene / electron beam photoresist to the surface of the substrate with metal electrodes, let it stand for drying and baking, and then put the sample into an acetone solution to remove the electron beam photoresist PMMA to complete the transfer of graphene.

[0057] (4) After completing the transfer of graphene, use laser direct writing to pattern the graphene region at the microscale, and then use a reactive ion etching (RIE) device to remove the exposed graphene.

[0058] (5) Finally, use an electron beam lithography equipment to pattern the graphene nanoscale channels. After etching, resist stripping, and annealing, the fabrication of the graphene multi-port reconfigurable device is completed.

[0059] Example 3:

[0060] The difference between this example and Example 2 is that the channel material is changed to molybdenum disulfide to fabricate the multi-port reconfigurable device, and the device is fabricated by the process of Method 2.

[0061] The device layout is the same as that in Example 2. The following mainly elaborates on the fabrication process.

[0062] The device consists of a highly doped substrate silicon (p-type or n-type), a silicon dioxide layer (with a thickness of 300 nm), a molybdenum disulfide layer, and a metal electrode layer from bottom to top.

[0063] The fabrication process flow of the device in this example is as Figure 5 shown, which shows a schematic diagram of the fabrication process flow of the molybdenum disulfide multi-port reconfigurable device fabricated by Method 2.

[0064] The fabrication process of the molybdenum disulfide multi-port reconfigurable device in this example includes the following steps:

[0065] (1) First, pattern the alignment mark layer on the silicon / silicon dioxide / molybdenum disulfide substrate through electron beam lithography. Using electron beam lithography to fabricate alignment marks is beneficial for achieving a smaller overlay error. Then, use an electron beam evaporation or thermal evaporation equipment to deposit and strip metal Ti (10 nm) / Au (60 nm) to fabricate the alignment marks. The thickness requirement of the alignment marks is above 70 nm.

[0066] (2) Use a laser direct writing equipment to overlay and fabricate the microelectrode layer connected to the nanoelectrodes for realizing the electrical connection of the device. In this step, use an electron beam evaporation, thermal evaporation, or magnetron sputtering equipment to deposit metal Ti (10 nm) / Au (60 nm), and then strip.

[0067] (3) Use a laser direct writing equipment to pattern molybdenum disulfide at the microscale. After photolithography and development, use a reactive ion etching equipment (RIE) to etch the excess molybdenum disulfide.

[0068] (4) Use an electron beam lithography equipment to pattern molybdenum disulfide at the nanoscale. After photolithography and development, use a reactive ion etching equipment to remove the exposed molybdenum disulfide.

[0069] (5) Finally, electron beam lithography equipment is used to make nanoelectrodes connecting the MoS2 channel and the micro-electrode. In order to reduce the defects of MoS2 during the coating process, electron beam evaporation or thermal evaporation coating equipment is used in this step to evaporate Ti (10 nm) / Au (60 nm) at a low rate of about 0.2 Å / s. After peeling and annealing, the preparation of the MoS2 multi-port reconfigurable device is completed.

[0070] Embodiment 4:

[0071] The present embodiment is different from the above embodiment in that the channel material can be replaced with other bipolar two-dimensional materials, such as black phosphorus (BP), molybdenum ditelluride (MOTe2), WS2, etc., and the material transfer or growth method includes: PMMA wet assisted transfer method, PDMS assisted transfer method, thermal release tape transfer method, roll-to-roll transfer method and electrochemical bubbling transfer method; the growth method includes: molecular beam epitaxy (MBE), atomic layer deposition (PLD), liquid phase epitaxy (LPE), physical vapor substrate method (PVD), chemical vapor deposition (CVD) and metal organic chemical vapor deposition (MOCVD) and other methods. In addition, the present invention can also be integrated with CMOS circuits in a complementary manner, using the multifunctionality and reconfigurability of the device to serve as a multifunctional module in future CMOS integrated circuits, thereby improving the area efficiency, response speed and computing performance of integrated circuits.

[0072] In the description of the present invention, it is necessary to understand that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0073] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0074] In the present invention, unless otherwise clearly specified or limited, terms such as "installed", "connected", "coupled", "fixed", etc. shall be construed broadly. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two components or the interaction relationship between two components, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0075] Any process or method description shown in a flowchart or described in other ways herein may be understood to represent a module, segment, or portion of code including one or more executable instructions for implementing a specific logical function or process. The scope of the preferred embodiments of the present invention includes additional implementations, where the functions may be executed in a substantially simultaneous manner or in a reverse order according to the involved functions, rather than in the order shown or discussed, which should be understood by those skilled in the art to which the embodiments of the present invention pertain.

[0076] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0077] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A two-dimensional material multi-port reconfigurable device, characterized in that The device has several nanoelectrodes, some of which are directly connected to the two-dimensional material channel, and the other part of the nanoelectrodes are not connected to the two-dimensional material and act as side gate electrodes to regulate the two-dimensional material channel. By applying different gate voltages, the carrier type and density of the central two-dimensional material can be regulated, realizing free switching among n-type, p-type or undoped states; The device includes a substrate layer, an insulating layer, a metal electrode layer, and a two-dimensional material layer from bottom to top. The metal electrode layer is used to connect to the probe station or achieve electrical connection through wire bonding; The substrate layer material includes doped silicon, indium tin oxide, and silicon carbide, which act as a back gate electrode to globally regulate the channel. The insulating layer material includes silicon oxide, aluminum oxide, boron nitride, silicon nitride, and mica; The metal electrode layer fabricates several nanoelectrodes using electron beam lithography. Some of the nanoelectrodes are directly connected to the two-dimensional material channel, and the other part of the nanoelectrodes act as side gate electrodes to regulate the two-dimensional material channel; The metal electrode layer material includes Ti, Cr, Au, and Pd.

2. The device according to claim 1, characterized in that, The shape of the two-dimensional material layer includes nano-rings and nano-circles. The two-dimensional materials include graphene, transition metal sulfides, and transition metal selenides.

3. A method for regulating a two-dimensional material multi-port reconfigurable device, characterized in that, The two-dimensional material multi-port reconfigurable device is the device described in claim 1. The regulation method includes: Select any two electrodes connected to the active region in the device as input electrodes, and another different electrode as the output electrode. The other electrodes act as control electrodes to affect the output characteristics. By measuring the voltage-current data between the input-output electrodes and the control-output electrodes, and then setting a loss function according to the target function, use gradient descent or evolutionary algorithm to find the voltage parameters of the appropriate control electrodes, and verify the found parameters in the device to achieve logical operation functions or arithmetic operation functions.

4. A method for fabricating a two-dimensional material multi-port reconfigurable device, characterized in that, The two-dimensional material multi-port reconfigurable device is the device described in claim 1. The fabrication method includes: Step 1, fabricate metal alignment marks and nanoelectrodes on the substrate / insulating layer material; Step 2, on the basis of fabricating the nanoelectrodes, fabricate micron-scale electrodes connected to the nanoelectrodes; Step 3, transfer or grow the two-dimensional material on the substrate on which the electrode fabrication has been completed; Step 4, perform micron-scale patterning on the two-dimensional material on the sample surface; Step 5, perform nano-scale patterning on the two-dimensional material on the sample surface; Step 6, perform annealing treatment on the sample to remove surface contamination of the two-dimensional material, and complete the fabrication of the two-dimensional material multi-port reconfigurable device.

5. The preparation method of the two-dimensional material multi-port reconfigurable device according to claim 4, characterized in that, The two-dimensional material transfer includes: PMMA wet-assisted transfer method, PDMS-assisted transfer method, electrochemical bubbling transfer method, or thermal release tape transfer method; The two-dimensional material growth includes: molecular beam epitaxy deposition method, atomic layer deposition method, chemical vapor deposition method, and metal organic chemical vapor deposition method.

6. A method for fabricating a two-dimensional material multi-port reconfigurable device, characterized in that, The two-dimensional material multi-port reconfigurable device is the device described in claim 1. The fabrication method includes: Step 1, fabricate metal alignment marks on a substrate with two-dimensional materials; Step 2, use the metal alignment marks for lithographic alignment to fabricate microscale electrodes; Step 3, perform microscale patterning on the two-dimensional materials on the sample surface; Step 4, perform nanoscale patterning on the two-dimensional materials on the sample surface; Step 5, fabricate nanoelectrodes to connect the two-dimensional material channels and the microscale electrodes; Step 6, anneal the sample to remove surface contamination of the two-dimensional materials, completing the fabrication of the two-dimensional material multi-port reconfigurable device; wherein the two-dimensional material channels are located below or above the metal electrodes.

Images