Preparation method of broadband multispectral indium gallium arsenic detector

By growing specific layer structures and integrating multispectral filter arrays in Indium Gallium Arsenic detectors, the problem of detectors in wideband response is solved, and wideband multispectral imaging from 1.7 μm to 2.5 μm is achieved, enhancing application capabilities and reducing dark currents.

CN119894127AActive Publication Date: 2025-04-25KUNMING INST OF PHYSICS
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Patent Information

Application Number
CN202411743616.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-30
Publication Date
2025-04-25
Estimated Expiration
2044-11-30

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Abstract

The invention relates to a preparation method of a broadband multispectral indium gallium arsenic detector, and belongs to the technical field of indium gallium arsenic detectors. According to the method, through the design of an InP buffer layer, an InAsyP1-y transition layer, an In < x > Ga < 1-x > As absorption layer and an N-type InAsyP1-y cap layer, a broadband capable of working at room temperature, namely a multispectral indium gallium arsenic detector of 0.9-2.5 [mu] m, is prepared; the multispectral optical filter array is integrated to the back surface of the indium gallium arsenic detector, so that multispectral imaging of multiple channels is realized; a passive film is deposited by adopting an inductively coupled plasma chemical vapor deposition atomic layer, and the deposition condition is controlled, so that the dark current of the device is effectively reduced; by thinning the InP substrate, the band crosstalk between pixels is effectively inhibited; the back antireflection film is deposited on the surface of the thinned InP substrate, so that the back reflection is reduced, and the transmittance is increased; by utilizing the alignment mark and the alignment structure, the read-out circuit and the optical filter are aligned in an inverted manner by adopting an inverted welding machine, so that high-precision alignment integration of the optical filter and a device is realized, the alignment precision is superior to 2 microns, the alignment precision is greatly improved, the operation is convenient, and the method has a good application prospect in the field of multispectral detectors.
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Description

Technical Field

[0001] The invention relates to a method for preparing a wide-band multi-spectral InGaAs detector, and belongs to the technical field of InGaAs detectors. Background Art

[0002] In addition to the visible light band of 380nm to 760nm that can be seen by human eyes, the radiation energy in nature also includes gamma rays, ultraviolet rays, near infrared, short-medium-long wave infrared, very long wave infrared, microwave and other bands that are invisible to human eyes. Among them, short-wave infrared mainly refers to the radiation energy covering the band of 900nm to 3000nm. There is a lot of radiation energy in nature, and there is a lot of spectral information in this band. The use of multi-spectral, hyperspectral and other detection and analysis methods can be applied to the detection, identification and analysis of various substances.

[0003] The mainstream optoelectronic materials that respond in the 900nm to 3000nm band include indium gallium arsenide (InGaAs), mercury cadmium telluride (HgCdTe), indium arsenide (InAs), lead sulfide (PbS), etc. InGaAs is the most representative short-wave infrared detector material, combining the advantages of performance, cost, power consumption and volume. 0.53 Ga 0.47 As, the response band is 900nm~1700nm, which can be expanded to 400nm~1700nm through the InP substrate thinning process. The process of this type of product is relatively mature and has been widely used.

[0004] However, since detector products with a response wavelength extended to 2500nm require re-optimization and adjustment of material component structure, reduction of lattice mismatch conduction during epitaxial growth, and reduction of device dark current, there are no mature products in China to meet the application of wide-spectrum detectors with extended cut-off wavelengths.

[0005] With the miniaturization of the platform and the demand for field applications, the demand for multispectral imagers in agriculture, forestry, military, medicine, scientific research and other fields is also increasing. Therefore, the development of wide-band multispectral InGaAs detector products has strong practical value and can effectively meet a variety of analytical needs. Summary of the invention

[0006] In order to realize multi-spectral detection and imaging of InGaAs short-wave detectors, the present invention provides a method for preparing a wide-band multi-spectral InGaAs detector. The method realizes multi-spectral imaging of multiple channels by integrating a multi-spectral filter array into the back of the InGaAs detector. In order to minimize the optical crosstalk between different spectral bands while ensuring the feasibility of the process, the InP substrate is thinned to 10μm to 60μm, thereby suppressing the band crosstalk between pixels.

[0007] The objectives of the present invention are achieved through the following technical solutions.

[0008] A method for preparing a wide-band multi-spectral InGaAs detector, the method steps are as follows:

[0009] (1) InP buffer layer, InAs layer and y P 1-y Transition layer, In x Ga 1-x As absorption layer and N-type InAs y P 1-y Cap layer;

[0010] Furthermore, preferably, the thickness of the InP substrate is 300 μm to 500 μm, the thickness of the InP buffer layer is 100 nm to 500 nm, and the thickness of the InAs y P 1-y The thickness of the transition layer is 2μm to 5μm. x Ga 1-x The thickness of the As absorption layer is 2μm to 4μm, and the N-type InAs y P 1-y The thickness of the cap layer is 800nm ​​to 1500nm;

[0011] Preferably, the In x Ga 1-x The x in As is 0.82, which is In 0.82 Ga 0.18 As; preferably InAs y P 1-y The y in the equation is 0.6, which is InAs 0.6 P 0.4 .

[0012] (2) Using plasma enhanced chemical vapor deposition (PECVD) on N-type InAs y P 1-y depositing a mask layer on the surface of the cap layer;

[0013] Furthermore, the thickness of the mask layer is preferably 100 nm to 500 nm; the material of the mask layer is preferably Si3N4 or SiO2.

[0014] (3) Perform diffusion area photolithography on the mask layer, remove the mask layer corresponding to the pixel area by etching, and then diffuse Zn in the area where the mask layer is removed until Zn diffuses to In x Ga 1-x As absorption layer and In x Ga 1-xThe diffusion depth of the As absorption layer reaches 50nm~1000nm, and the concentration reaches 1×10 18 ~5×10 18 , the region containing Zn doping forms a P-type doped region;

[0015] Furthermore, it is preferred that the diffusion depth reaches 100 nm to 200 nm.

[0016] (4) Photolithography of the N-type contact region is performed on the mask layer around the entire periphery of the P-type doped region. After the corresponding mask layer is removed by etching, the N-type InAs corresponding to the N-type contact region is completely removed by wet etching. y P 1-y Cap layer, In x Ga 1-x As absorber layer and InAs y P 1-y The transition layer forms an N-type contact area around the P-type doped area, and then all other mask layers are completely removed by wet etching.

[0017] (5) depositing a passivation film on the exposed surface after removing the mask layer by using inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technology; then performing ohmic contact region photolithography on the passivation film, and removing a portion of the passivation film on the surface of the P-type doped region by etching to form a P-type and N-type ohmic contact region;

[0018] When the inductively coupled plasma chemical vapor deposition atomic layer deposition passivation film is deposited, the temperature is controlled to be 250℃~300℃, the power is 200W~300W, and the pressure is 5Pa~10Pa, so as to effectively reduce the dark current of the device;

[0019] Furthermore, the material of the passivation film is preferably Si3N4 or SiO2; the thickness of the passivation film is preferably 20nm to 100nm.

[0020] (6) performing electrode patterning photolithography in the P-type and N-type ohmic contact regions, and then sequentially sputtering a titanium (Ti) metal layer, a platinum (Pt) metal layer, and a gold (Au) metal layer as metal electrodes, peeling off to form a P-region metal electrode region, i.e., a P electrode, and forming an N-region metal electrode region, i.e., an N electrode, to prepare a plurality of single focal plane detector arrays;

[0021] Furthermore, it is preferred that the thickness of the Ti metal layer is 30 nm to 100 nm, the thickness of the Pt metal layer is 30 nm to 100 nm, and the thickness of the Au metal layer is 100 nm to 300 nm.

[0022] (7) Multiple single focal plane detector arrays are divided to obtain single focal plane arrays, and the single focal plane arrays are connected to a readout circuit. An alignment mark is provided on the readout circuit, and the connection position of the single focal plane array is located at a position on the readout circuit excluding the alignment mark.

[0023] (8) The InP substrate is partially removed by grinding and etching to be thinned to 10 μm to 60 μm, which can effectively suppress the band crosstalk between pixels; a back anti-reflection film is deposited on the surface of the thinned InP substrate by using inductively coupled plasma chemical vapor deposition atomic layer deposition technology. The material of the back anti-reflection film is Si3N4 or SiO2, and the thickness is 200nm to 300nm, so as to reduce the back reflection and increase the transmittance, and prepare an InGaAs focal plane detector chip;

[0024] The InP substrate is preferably thinned to 13 μm to 17 μm.

[0025] (9) bonding four ceramic blocks with indium-plated surfaces to the readout circuit with the indium-plated surface facing upward, with the bonding position being at a position on the readout circuit excluding the InGaAs focal plane detector chip and the alignment mark;

[0026] Furthermore, the thickness of the ceramic block is preferably 22 μm to 28 μm.

[0027] (10) An alignment mark is provided on the readout circuit, and an alignment structure is provided on the filter. Through the alignment mark and the alignment structure, a reverse welding machine is used to align and integrate the readout circuit and the filter, thereby preparing a wide-band multi-spectral InGaAs detector.

[0028] Beneficial Effects

[0029] (1) The present invention provides a method for preparing a broadband multi-spectral InGaAs detector, wherein the method comprises: an InP buffer layer, an InAs y P 1-y Transition layer, In x Ga 1-x As absorption layer and N-type InAs y P 1-y The cap layer is designed to prepare a wide-band multi-spectral InGaAs detector that can work at room temperature, i.e., 0.9μm to 2.5μm. The band is extended from the lattice-matched 1.7μm to 2.5μm. The wide band expands the application in other fields such as spectroscopy and gas detection. The filter spectral channel and spectral range can be freely designed and selected according to actual needs, with good flexibility, simple integration, and conducive to production.

[0030] (2) The present invention provides a method for preparing a wide-band multi-spectral InGaAs detector, which realizes multi-spectral imaging of multiple channels by integrating a multi-spectral filter array onto the back of the InGaAs detector;

[0031] (3) The present invention provides a method for preparing a wide-band multi-spectral InGaAs detector. In the method, when an atomic layer deposition passivation film is deposited by inductively coupled plasma chemical vapor deposition, the temperature is controlled to be 250°C to 300°C, the power is 200W to 300W, and the pressure is 5Pa to 10Pa, so as to effectively reduce the dark current of the device;

[0032] (4) The present invention provides a method for preparing a wide-band multi-spectral InGaAs detector, wherein the InP substrate is removed partially by grinding and etching to be thinned to 10 μm to 60 μm, thereby effectively suppressing the band crosstalk between pixels;

[0033] (5) The present invention provides a method for preparing a wide-band multi-spectral InGaAs detector, which uses inductively coupled plasma chemical vapor deposition atomic layer deposition technology to deposit a back anti-reflection film on the surface of a thinned InP substrate, thereby reducing back reflection and increasing transmittance;

[0034] (6) The present invention provides a method for preparing a wide-band multi-spectral InGaAs detector. The method utilizes alignment marks and alignment structures, and adopts a flip-chip soldering machine to align the readout circuit with the filter, thereby achieving high-precision alignment and integration of the filter and the device. The alignment accuracy is better than 2 μm, which greatly increases the alignment accuracy and is easy to operate. The method has good application prospects in the field of multi-spectral detectors. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is a schematic diagram of the structure of the material prepared in step (1) of Example 1.

[0036] Figure 2 This is a schematic diagram of the cross-sectional structure of the P-type doped region prepared in step (3) of Example 1.

[0037] Figure 3 This is a schematic plan view of the N-type contact region prepared in step (4) of Example 1.

[0038] Figure 4 Schematic diagram of the structure of the P electrode and N electrode prepared in step (6) of Example 1.

[0039] Figure 5 This is a test result diagram of the wide-band multi-spectral InGaAs detector prepared in Example 1.

[0040] Among them, 1—InP substrate, 2—InP buffer layer, 3—InAs y P 1-y Transition layer, 4—In x Ga 1-x As absorption layer, 5—N-type InAs y P1-y Cap layer, 6—mask layer, 7—P-type doping region, 8—N-type contact region, 9—passivation film, 10—P electrode, 11—N electrode DETAILED DESCRIPTION

[0041] The present invention is further described below in conjunction with specific embodiments, wherein the methods are conventional methods unless otherwise specified, and the raw materials can be obtained from public commercial channels unless otherwise specified.

[0042] Example 1

[0043] A method for preparing a wide-band multi-spectral InGaAs detector, the method steps are as follows:

[0044] (1) Using metal organic chemical vapor deposition (MOCVD) technology, InP buffer layer 2, InAs y P 1-y Transition layer 3, In x Ga 1-x As absorption layer 4 and N-type InAs y P 1-y Cap layer 5, such as Figure 1 As shown;

[0045] The thickness of the InP substrate 1 is 350 μm, the thickness of the InP buffer layer 2 is 350 nm, and the thickness of the InAs y P 1-y The thickness of the transition layer 3 is 2.5 μm. x Ga 1-x The thickness of the As absorption layer 4 is 3 μm, and the N-type InAs y P 1-y The thickness of the cap layer 5 is 1000nm; x Ga 1-x The x in As is 0.82, which is In 0.82 Ga 0.18 As, InAs y P 1-y The y in the equation is 0.6, which is InAs 0.6 P 0.4 .

[0046] (2) Using plasma enhanced chemical vapor deposition (PECVD) technology on N-type InAs y P 1-y A Si3N4 mask layer 6 with a thickness of 300 nm is deposited on the surface of the cap layer 5.

[0047] (3) Performing diffusion region photolithography on the Si3N4 mask layer 6, removing the Si3N4 mask layer 6 corresponding to the pixel area by inductively coupled plasma (ICP) dry etching, and then performing Zn diffusion on the area where the Si3N4 mask layer 6 is removed, and using MOCVD technology to diffuse Zn into the In 0.82 Ga 0.18 As absorption layer 4 and In 0.82 Ga 0.18 The diffusion depth of As absorption layer 4 is 100 nm and the concentration is 1×10 18 , the Zn-doped region forms a P-type doped region 7, such as Figure 2 shown.

[0048] (4) Photolithography is performed on the Si3N4 mask layer 6 around the entire periphery of the P-type doped region 7 to form an N-type contact region 8. After the corresponding mask layer 6 is removed by etching, the N-type InAs corresponding to the N-type contact region 8 is completely removed by wet etching. 0.6 P 0.4 Cap layer 5, In 0.82 Ga 0.18 As absorption layer 4 and InAs 0.6 P 0.4 The transition layer 3 forms an N-type contact region 8 around the P-type doped region 7, and all other mask layers 6 are completely removed by wet etching, such as Figure 3 shown.

[0049] (5) After removing the mask layer 6, a Si3N4 passivation film 9 with a thickness of 40 nm is deposited on the exposed surface by using an inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technique; then, an ohmic contact region is photolithographically performed on the Si3N4 passivation film 9, and a portion of the passivation film 9 on the surface of the P-type doped region 7 is removed by reactive ion etching (RIE) to form a P-type and N-type ohmic contact region;

[0050] When the Si3N4 passivation film 9 is deposited by inductively coupled plasma chemical vapor deposition atomic layer deposition, the temperature is controlled to be 250°C, the power is 200W, and the pressure is 5Pa, so as to effectively reduce the dark current of the device.

[0051] (6) Electrode patterning is performed in the P-type and N-type ohmic contact regions, and then a Ti metal layer, a Pt metal layer, and an Au metal layer are sequentially sputtered as metal electrodes using a magnetron sputtering technique, and then a P-region metal electrode region, i.e., a P electrode 10, is formed, and an N-region metal electrode region, i.e., an N electrode 11, is formed to obtain a plurality of single focal plane detector arrays, such as Figure 4 As shown;

[0052] The thickness of the Ti metal layer is 50 nm, the thickness of the Pt metal layer is 50 nm, and the thickness of the Au metal layer is 250 nm.

[0053] (7) Multiple single focal plane detector arrays are divided to obtain single focal plane arrays, and the single focal plane arrays are connected to a readout circuit. An alignment mark is provided on the readout circuit, and the connection position of the single focal plane array is located at a position on the readout circuit excluding the alignment mark.

[0054] (8) The InP substrate 1 is partially removed by grinding and etching to be thinned to 13 μm, which can effectively suppress the band crosstalk between pixels; a Si3N4 back anti-reflection film with a thickness of 200 nm is deposited on the surface of the thinned InP substrate 1 using inductively coupled plasma chemical vapor deposition atomic layer deposition technology to reduce back reflection and increase transmittance, thereby preparing an InGaAs focal plane detector chip.

[0055] (9) Four ceramic blocks with indium plating on the surface, the thickness of the ceramic blocks is 22 μm, and the indium plating surface is bonded to the readout circuit. The bonding position is at a position on the readout circuit excluding the InGaAs focal plane detector chip and the alignment mark.

[0056] (10) An alignment mark is provided on the readout circuit, and an alignment structure is provided on the filter. Through the alignment mark and the alignment structure, a reverse welding machine is used to align and integrate the readout circuit and the filter, thereby preparing a wide-band multi-spectral InGaAs detector.

[0057] The wide-band multi-spectral InGaAs detector prepared in this embodiment was tested:

[0058] (1) Test effect diagram Figure 5 As shown, the detector realizes multi-spectral detection of 4 channels.

[0059] (2) The test results show that the detector has a wide band of 0.9 μm to 2.5 μm operating at room temperature.

[0060] Example 2

[0061] A method for preparing a wide-band multi-spectral InGaAs detector, the method steps are as follows:

[0062] (1) InP buffer layer 2, InAs layer 3 and InP layer 4 are sequentially deposited on InP substrate 1 using metal organic chemical vapor deposition technology. y P 1-y Transition layer 3, In x Ga 1-x As absorption layer 4 and N-type InAs y P 1-y Cap layer 5;

[0063] The thickness of the InP substrate 1 is 300 μm, the thickness of the InP buffer layer 2 is 100 nm, and the thickness of the InAsy P 1-y The thickness of the transition layer 3 is 2 μm. x Ga 1-x The thickness of the As absorption layer 4 is 2 μm, and the N-type InAs y P 1-y The thickness of the cap layer 5 is 800nm; x Ga 1-x The x in As is 0.82, which is In 0.82 Ga 0.18 As, InAs y P 1-y The y in the equation is 0.6, which is InAs 0.6 P 0.4 .

[0064] (2) Using plasma enhanced chemical vapor deposition technology on N-type InAs y P 1-y A Si3N4 mask layer 6 with a thickness of 100 nm is deposited on the surface of the cap layer 5.

[0065] (3) Perform diffusion region photolithography on the Si3N4 mask layer 6, use ICP dry etching to remove the Si3N4 mask layer 6 corresponding to the pixel area, and then diffuse Zn in the area where the Si3N4 mask layer 6 is removed, and use MOCVD technology to diffuse Zn into In 0.82 Ga 0.18 As absorption layer 4 and In 0.82 Ga 0.18 The diffusion depth of As absorption layer 4 is 200 nm and the concentration is 5×10 18 , the Zn-doped region forms a P-type doped region 7.

[0066] (4) Photolithography is performed on the Si3N4 mask layer 6 around the entire periphery of the P-type doped region 7 to form an N-type contact region 8. After the corresponding mask layer 6 is removed by etching, the N-type InAs corresponding to the N-type contact region 8 is completely removed by wet etching. 0.6 P 0.4 Cap layer 5, In 0.82 Ga 0.18 As absorption layer 4 and InAs 0.6 P 0.4 The transition layer 3 forms an N-type contact region 8 around the P-type doped region 7, and all other mask layers 6 are completely removed by wet etching.

[0067] (5) On the exposed surface after removing the mask layer 6, a Si3N4 passivation film 9 with a thickness of 100 nm is deposited by inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technology; then, ohmic contact region photolithography is performed on the Si3N4 passivation film 9, and a portion of the passivation film 9 on the surface of the P-type doped region 7 is removed by reactive ion etching (RIE) to form a P-type and N-type ohmic contact region;

[0068] When the Si3N4 passivation film 9 is deposited by inductively coupled plasma chemical vapor deposition atomic layer deposition, the temperature is controlled to be 300°C, the power is 300W, and the pressure is 10Pa, so as to effectively reduce the dark current of the device.

[0069] (6) performing electrode patterning photolithography in the P-type and N-type ohmic contact regions, and then using magnetron sputtering technology to sequentially sputter a Ti metal layer, a Pt metal layer, and an Au metal layer as metal electrodes, peeling off to form a P-region metal electrode region, i.e., a P electrode 10, and forming an N-region metal electrode region, i.e., an N electrode 11, to prepare a plurality of single focal plane detector arrays;

[0070] The thickness of the Ti metal layer is 30 nm, the thickness of the Pt metal layer is 30 nm, and the thickness of the Au metal layer is 100 nm.

[0071] (7) Multiple single focal plane detector arrays are divided to obtain single focal plane arrays, and the single focal plane arrays are connected to a readout circuit. The readout circuit is provided with an alignment mark, and the connection position of the single focal plane array is located at a position on the readout circuit excluding the alignment mark.

[0072] (8) The InP substrate 1 is partially removed by grinding and etching to be thinned to 15 μm, which can effectively suppress the band crosstalk between pixels; a Si3N4 back anti-reflection film with a thickness of 250 nm is deposited on the surface of the thinned InP substrate 1 using inductively coupled plasma chemical vapor deposition atomic layer deposition technology to reduce back reflection and increase transmittance, thereby preparing an InGaAs focal plane detector chip.

[0073] (9) Four ceramic blocks with indium plating on the surface, the thickness of the ceramic blocks is 25 μm, and the indium plating surface is bonded to the readout circuit. The bonding position is on the readout circuit except for the InGaAs focal plane detector chip and the alignment mark.

[0074] (10) An alignment mark is provided on the readout circuit, and an alignment structure is provided on the filter. Through the alignment mark and the alignment structure, a reverse welding machine is used to align and integrate the readout circuit and the filter, thereby preparing a wide-band multi-spectral InGaAs detector.

[0075] The wide-band multi-spectral InGaAs detector prepared in this embodiment was tested:

[0076] (1) The test results show that the detector can achieve 4-channel multi-spectral detection. Figure 5 similar.

[0077] (2) The test results show that the detector has a wide band of 0.9 μm to 2.5 μm operating at room temperature.

[0078] Example 3

[0079] A method for preparing a wide-band multi-spectral InGaAs detector, the method steps are as follows:

[0080] (1) InP buffer layer 2, InAs layer 3 and InP layer 4 are sequentially deposited on InP substrate 1 using metal organic chemical vapor deposition technology. y P 1-y Transition layer 3, In x Ga 1-x As absorption layer 4 and N-type InAs y P 1-y Cap layer 5;

[0081] The thickness of the InP substrate 1 is 500 μm, the thickness of the InP buffer layer 2 is 500 nm, and the thickness of the InAs y P 1-y The thickness of the transition layer 3 is 5 μm. x Ga 1-x The thickness of the As absorption layer 4 is 4 μm, and the N-type InAs y P 1-y The thickness of the cap layer 5 is 1500nm; x Ga 1-x The x in As is 0.82, which is In 0.82 Ga 0.18 As, InAs y P 1-y The y in the equation is 0.6, which is InAs 0.6 P 0.4 .

[0082] (2) Using plasma enhanced chemical vapor deposition technology on N-type InAs y P 1-y A SiO2 mask layer 6 with a thickness of 500 nm is deposited on the surface of the cap layer 5 .

[0083] (3) Perform diffusion region photolithography on the SiO2 mask layer 6, use ICP dry etching to remove the SiO2 mask layer 6 corresponding to the pixel area, and then diffuse Zn in the area where the SiO2 mask layer 6 is removed. Use MOCVD technology to diffuse Zn into In 0.82 Ga 0.18 As absorption layer 4 and In0.82 Ga 0.18 The diffusion depth of As absorption layer 4 is 150nm and the concentration is 3×10 18 , the Zn-doped region forms a P-type doped region 7.

[0084] (4) Photolithography is performed on the SiO2 mask layer 6 around the entire periphery of the P-type doped region 7 to form an N-type contact region 8. After the corresponding mask layer 6 is removed by etching, the N-type InAs corresponding to the N-type contact region 8 is completely removed by wet etching. 0.6 P 0.4 Cap layer 5, In 0.82 Ga 0.18 As absorption layer 4 and InAs 0.6 P 0.4 The transition layer 3 forms an N-type contact region 8 around the P-type doped region 7, and all other mask layers 6 are completely removed by wet etching.

[0085] (5) After removing the mask layer 6, a SiO2 passivation film 9 with a thickness of 20 nm is deposited on the exposed surface by using an inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technique; then, the ohmic contact region is photolithographically processed on the SiO2 passivation film 9, and a portion of the passivation film 9 on the surface of the P-type doped region 7 is removed by reactive ion etching (RIE) to form a P-type and N-type ohmic contact region;

[0086] When the Si3N4 passivation film 9 is deposited by inductively coupled plasma chemical vapor deposition atomic layer deposition, the temperature is controlled to be 275°C, the power is 250W, and the pressure is 7Pa, so as to effectively reduce the dark current of the device.

[0087] (6) performing electrode patterning photolithography in the P-type and N-type ohmic contact regions, and then using magnetron sputtering technology to sequentially sputter a Ti metal layer, a Pt metal layer, and an Au metal layer as metal electrodes, peeling off to form a P-region metal electrode region, i.e., a P electrode 10, and forming an N-region metal electrode region, i.e., an N electrode 11, to prepare a plurality of single focal plane detector arrays;

[0088] The thickness of the Ti metal layer is 100 nm, the thickness of the Pt metal layer is 100 nm, and the thickness of the Au metal layer is 300 nm.

[0089] (7) Multiple single focal plane detector arrays are divided to obtain single focal plane arrays, and the single focal plane arrays are connected to a readout circuit. An alignment mark is provided on the readout circuit, and the connection position of the single focal plane array is located at a position on the readout circuit excluding the alignment mark.

[0090] (8) The InP substrate 1 is partially removed by grinding and etching to be thinned to 17 μm, which can effectively suppress the band crosstalk between pixels; a SiO2 back anti-reflection film with a thickness of 300 nm is deposited on the surface of the thinned InP substrate 1 using inductively coupled plasma chemical vapor deposition atomic layer deposition technology to reduce back reflection and increase transmittance, thereby preparing an InGaAs focal plane detector chip.

[0091] (9) Four ceramic blocks with indium plating on the surface, the thickness of the ceramic blocks is 28 μm, and the indium plating surface is bonded to the readout circuit. The bonding position is on the readout circuit except for the InGaAs focal plane detector chip and the alignment mark.

[0092] (10) An alignment mark is provided on the readout circuit, and an alignment structure is provided on the filter. Through the alignment mark and the alignment structure, a reverse welding machine is used to align and integrate the readout circuit and the filter, thereby preparing a wide-band multi-spectral InGaAs detector.

[0093] The wide-band multi-spectral InGaAs detector prepared in this embodiment was tested:

[0094] (1) The test results show that the detector can achieve 4-channel multi-spectral detection. Figure 5 similar.

[0095] (2) The test results show that the detector has a wide band of 0.9 μm to 2.5 μm operating at room temperature.

[0096] In summary, the above are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing a wide-band multi-spectral InGaAs detector, characterized in that: (1) InP buffer layer, InAs layer and y P 1-y Transition layer, In x Ga 1-x As absorption layer and N-type InAs y P 1-y Cap layer; (2) Using PECVD on N-type InAs y P 1-y A mask layer is deposited on the surface of the cap layer; (3) Perform diffusion area photolithography on the mask layer, etch away the mask layer corresponding to the pixel area, and diffuse Zn to In in the area where the mask layer is removed x Ga 1-x As absorption layer, containing Zn doped region to form P-type doped region; (4) Perform photolithography on the N-type contact area on the mask layer, remove the corresponding mask layer by etching, and then remove the N-type InAs corresponding to the N-type contact area by wet etching. y P 1-y Cap layer, In x Ga 1-x As absorber layer and InAs y P 1-y The transition layer is used to form an N-type contact area around the P-type doped area and then remove the remaining mask layer by wet etching; (5) depositing a passivation film on the exposed surface after removing the mask layer by ICPCVD, performing photolithography of the ohmic contact region on the passivation film, and etching away a portion of the passivation film on the surface of the P-type doped region to form a P-type and N-type ohmic contact region; (6) performing electrode patterning photolithography in the P-type and N-type ohmic contact regions, and then sequentially sputtering Ti, Pt, and Au metal layers as metal electrodes, which are peeled off to form P electrodes and N electrodes, thereby preparing a plurality of single focal plane detector arrays; (7) dividing the plurality of single focal plane detector arrays to obtain single focal plane arrays, connecting the single focal plane arrays to a readout circuit, the readout circuit being provided with an alignment mark, and the connection position of the single focal plane array being located at a position on the readout circuit excluding the alignment mark; (8) removing a portion of the InP substrate by grinding and etching to thin it to 10 μm to 60 μm; depositing a back anti-reflection film on the surface of the thinned InP substrate by ICPCVD to prepare an InGaAs focal plane detector chip; (9) bonding four ceramic blocks with indium-plated surfaces to the readout circuit with the indium-plated surface facing upward, with the bonding position being at a position on the readout circuit excluding the InGaAs focal plane detector chip and the alignment mark; (10) An alignment mark is provided on the readout circuit, and an alignment structure is provided on the filter. Through the alignment mark and the alignment structure, a reverse welding machine is used to align and integrate the readout circuit and the filter, thereby preparing a wide-band multi-spectral InGaAs detector.

2. A method for preparing a wide-band multi-spectral InGaAs detector, characterized in that: In step (3), Zn diffuses into In x Ga 1-x As absorption layer and the diffusion depth in the absorption layer reaches 50nm~1000nm, and the concentration reaches 1×10 18 ~5×10 18 ; In step (5), the temperature of the ICPCVD passivation film deposition is 250°C to 300°C, the power is 200W to 300W, and the pressure is 5Pa to 10Pa; In step (8), the material of the back anti-reflection film is Si3N4 or SiO2, and the thickness is 200nm to 300nm.

3. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (1), the thickness of the InP substrate is 300 μm to 500 μm, the thickness of the InP buffer layer is 100 nm to 500 nm, and the thickness of the InAs y P 1-y The thickness of the transition layer is 2μm to 5μm. x Ga 1-x The thickness of the As absorption layer is 2μm to 4μm, and the N-type InAs y P 1-y The thickness of the cap layer is 800nm ​​to 1500nm; In x Ga 1-x As for In 0.82 Ga 0.18 As; InAs y P 1-y InAs 0.6 P 0.4 .

4. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (2), the thickness of the mask layer is 100nm to 500nm, and the material of the mask layer is Si3N4 or SiO2.

5. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (3), the diffusion depth reaches 100nm to 200nm.

6. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (5), the material of the passivation film is Si3N4 or SiO2, and the thickness of the passivation film is 20nm to 100nm.

7. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (6), the thickness of the Ti metal layer is 30nm to 100nm, the thickness of the Pt metal layer is 30nm to 100nm, and the thickness of the Au metal layer is 100nm to 300nm.

8. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (8), the InP substrate is thinned to 13 μm to 17 μm.

9. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (9), the thickness of the ceramic block is 22 μm to 28 μm.

10. The method for preparing a wide-band multi-spectral InGaAs detector according to claim 1 or 2, characterized in that: In step (1), the thickness of the InP substrate is 300 μm to 500 μm, the thickness of the InP buffer layer is 100 nm to 500 nm, and the thickness of the InAs y P 1-y The thickness of the transition layer is 2μm to 5μm. x Ga 1-x The thickness of the As absorption layer is 2μm to 4μm, and the N-type InAs y P 1-y The thickness of the cap layer is 800nm ​​to 1500nm; In x Ga 1-x As for In 0.82 Ga 0.18 As; InAs y P 1-y InAs 0.6 P 0.4 ; In step (2), the thickness of the mask layer is 100 nm to 500 nm, and the material of the mask layer is Si3N4 or SiO2; In step (3), the diffusion depth reaches 100nm to 200nm; In step (5), the material of the passivation film is Si3N4 or SiO2, and the thickness of the passivation film is 20nm to 100nm; In step (6), the thickness of the Ti metal layer is 30nm to 100nm, the thickness of the Pt metal layer is 30nm to 100nm, and the thickness of the Au metal layer is 100nm to 300nm; In step (8), the InP substrate is thinned to 13 μm to 17 μm; In step (9), the thickness of the ceramic block is 22 μm to 28 μm.