Method for manufacturing semiconductor device

Abstract

The present invention relates to a method for manufacturing a semiconductor device, the method comprising: a step for forming an SiC layer on a single crystal SiC layer of a substrate having a polycrystalline SiC substrate including a first surface and a second surface and a single crystal SiC layer provided on the second surface; a step for forming a first insulating film and a second insulating film on the SiC layer, the first insulating film and the second insulating film being separated from each other by only a third width in a first direction parallel to the second surface; and forming a second trench having a second width narrower than a third width in the first direction by removing a first portion of the single crystal SiC layer parallel to the second surface and extending in a second direction intersecting the first direction, and a second portion of the SiC layer provided on the first portion and extending in the second direction below a space between the first insulating film and the second insulating film, the second trench having a second width narrower than the third width in the first direction. A second groove extending in the second direction, cutting the single crystal SiC layer and the SiC layer, and exposing the polycrystalline SiC substrate at the bottom of the second groove; and a step for forming, by dicing, a first groove which is provided below the second groove, has a first width narrower than the second width in the first direction, extends in the second direction, and cuts the polycrystalline SiC substrate.

Description

Technical Field

[0001] An embodiment of the present invention relates to a method for manufacturing a semiconductor device. Background Art

[0002] As a material for the next generation of semiconductor devices, SiC (silicon carbide) is expected. Compared with Si (silicon), silicon carbide has a band gap of about 3 times, a breakdown electric field strength of about 10 times, and a thermal conductivity of about 3 times. Therefore, by using SiC, semiconductor devices with low loss and high temperature operation can be realized.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2017-034255 Summary of the invention

[0006] Problems to be solved by the invention

[0007] The problem to be solved by the present invention is to provide a method for manufacturing a semiconductor device with improved yield.

[0008] Means used to solve problems

[0009] The method for manufacturing a semiconductor device of an embodiment comprises the following steps: a step of forming a SiC layer on a single crystal SiC layer of a substrate, the substrate comprising a polycrystalline SiC substrate including a first surface and a second surface and a single crystal SiC layer provided on the second surface; a step of forming a first insulating film and a second insulating film on the SiC layer, the first insulating film and the second insulating film being separated from each other by only a third width in a first direction parallel to the second surface; and a step of removing the single crystal SiC extending in a second direction parallel to the second surface and intersecting the first direction from below the first insulating film and the second insulating film. The invention relates to a process for forming a second groove by cutting a first portion of the SiC layer and a second portion of the SiC layer provided on the first portion and extending in a second direction, wherein the second groove has a second width narrower than the third width in the first direction and extends in the second direction, the single crystal SiC layer and the SiC layer are cut off, and the polycrystalline SiC substrate is exposed at the bottom of the second groove; and a process for forming the first groove by cutting, wherein the first groove is provided below the second groove, has a first width narrower than the second width in the first direction, and extends in the second direction, and the polycrystalline SiC substrate is cut off.

[0010] Effects of the Invention

[0011] According to the present invention, a method for manufacturing a semiconductor device with improved yield can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a schematic cross-sectional view of the substrate according to the first embodiment.

[0013] Figure 2 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment.

[0014] Figure 3 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment.

[0015] Figure 4 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment.

[0016] Figure 5 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment.

[0017] Figure 6 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment.

[0018] Figure 7 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment.

[0019] Figure 8 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment.

[0020] Fig. 9 This is a flowchart showing the manufacturing process of the semiconductor device according to the first embodiment.

[0021] Fig.10 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the second embodiment.

[0022] Fig.11 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the second embodiment.

[0023] Fig.12 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the second embodiment.

[0024] Fig.13 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the second embodiment.

[0025] Fig.14 This is a flowchart showing the manufacturing process of the semiconductor device according to the second embodiment.

[0026] Fig.15 This is a schematic diagram of a predetermined layer in the third embodiment.

[0027] Fig.16 This is a schematic diagram of a predetermined layer in the third embodiment.

[0028] Fig.17 This is a schematic diagram of a predetermined layer in a comparative embodiment of the third embodiment.

[0029] Fig.18 This is a schematic diagram of a predetermined layer in a comparative embodiment of the third embodiment. DETAILED DESCRIPTION

[0030] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following description, the same reference numerals are given to the same components and the like, and the description of the components and the like that have been described once will be appropriately omitted.

[0031] In the following instructions, when using n + 、n、n - and p + ,p,p - In the case of symbols, these symbols indicate the relative high and low impurity concentrations in each conductivity type. + Compared with n, the impurity concentration of n-type is relatively high. - Indicates that the impurity concentration of n-type is relatively lower than that of n-type. + Compared with p type, the impurity concentration of p type is relatively high. - Indicates that the p-type impurity concentration is relatively lower than that of the p-type. + Type, n - The type is abbreviated as n type, and p + Type, p - The type is abbreviated as p-type.

[0032] The impurity concentration can be measured, for example, by SIMS (Secondary Ion Mass Spectrometry). In addition, the relative level of the impurity concentration can also be determined, for example, based on the level of the carrier concentration obtained by SCM (Scanning Capacitance Microscopy). In addition, the depth and other distances of the impurity region can be obtained, for example, by SIMS. In addition, the width and depth of the impurity region can be obtained, for example, based on the SCM image.

[0033] Hereinafter, the first conductivity type is referred to as n-type, and the second conductivity type is referred to as p-type.

[0034] In this specification, in order to indicate the positional relationship of components, the upper direction of the drawings is described as "up", and the lower direction of the drawings is described as "down". In this specification, the concepts of "up" and "down" are not necessarily terms indicating the relationship with the direction of gravity.

[0035] (First embodiment)

[0036] The method for manufacturing a semiconductor device of the present embodiment comprises the following steps: a step of forming a SiC layer on a single crystal SiC layer of a substrate, the substrate comprising a polycrystalline SiC substrate including a first surface and a second surface and a single crystal SiC layer provided on the second surface; a step of forming a first insulating film and a second insulating film on the SiC layer, the first insulating film and the second insulating film being separated from each other by only a third width in a first direction parallel to the second surface; a step of removing the single crystal SiC layer extending in a second direction parallel to the second surface and intersecting the first direction from the bottom between the first insulating film and the second insulating film; The invention relates to a process for forming a second groove by cutting a first part of the SiC layer and a second part of the SiC layer arranged on the first part and extending along the second direction, wherein the second groove has a second width narrower than the third width in the first direction and extends along the second direction, the single crystal SiC layer and the SiC layer are cut off, and the polycrystalline SiC substrate is exposed at the bottom of the second groove; and a process for forming the first groove by cutting, wherein the first groove is arranged below the second groove, has a first width narrower than the second width in the first direction, and extends along the second direction, and the polycrystalline SiC substrate is cut off.

[0037] Figures 1 to 8 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. Fig. 9 1 is a flowchart showing the manufacturing process of the semiconductor device according to the present embodiment.

[0038] The semiconductor device 100 of this embodiment is a semiconductor chip. The semiconductor device 100 of this embodiment is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). However, the semiconductor device 100 is not limited thereto, and may be, for example, a PIN diode or the like.

[0039] First, prepare Figure 1 A substrate 4 as shown.

[0040] The substrate 4 includes a polycrystalline SiC substrate 2 and a single crystal SiC layer 6 .

[0041] The polycrystalline SiC substrate 2 has a first surface 1 and a second surface 3 . The second surface 3 is provided on the opposite side to the first surface 1 .

[0042] Here, the X direction, the Y direction perpendicular to the X direction, and the Z direction perpendicular to the X direction and the Y direction are defined. The first surface 1 and the second surface 3 are provided parallel to the XY plane. The X direction is an example of the first direction. The Y direction is an example of the second direction. The -X direction is an example of the third direction.

[0043] The thickness of the polycrystalline SiC substrate 2 in the Z direction is, for example, approximately 350 μm.

[0044] The single crystal SiC layer 6 is provided on the second surface 3 of the polycrystalline SiC substrate 2. The thickness of the single crystal SiC layer 6 in the Z direction is, for example, not less than 0.4 μm and not more than 0.7 μm.

[0045] The substrate 4 is, for example, a substrate in which a single crystal SiC layer 6 is bonded to a polycrystalline SiC substrate 2 .

[0046] Sometimes, a void (hole) V is formed between the polycrystalline SiC substrate 2 and the single crystal SiC layer 6. It is considered that the void (hole) V is formed, for example, when the polycrystalline SiC substrate 2 and the single crystal SiC layer 6 are not well bonded. Figure 2 Hereinafter, illustration of the voids (voids) V between the polycrystalline SiC substrate 2 and the single crystal SiC layer 6 will be omitted.

[0047] Next, a SiC layer 10 ( Figure 2 , Fig. 9 S102). The SiC layer 10 is an epitaxial SiC layer. Figure 2 As shown, a portion of the SiC layer 10 may be formed directly on the polycrystalline SiC substrate 2 .

[0048] Next, a device structure of the semiconductor device 100 is formed on the SiC layer 10. For example, a conductive film 20, a conductive film 22, a conductive film 24, and a conductive film 26 are formed. For example, when the semiconductor device 100 is a MOSFET, the conductive film 20, the conductive film 22, the conductive film 24, and the conductive film 26 are source electrodes of the MOSFET. The conductive film 20, the conductive film 22, the conductive film 24, and the conductive film 26 contain, for example, a conductive material such as Al (aluminum), Au (gold), Ag (silver), and Cu (copper).

[0049] Next, on the SiC layer 10, the insulating film 30 and the insulating film 40 are formed in such a manner that the conductive film 20 is disposed between the insulating film 30 and the insulating film 40. Furthermore, on the SiC layer 10, the insulating film 32 and the insulating film 42 are formed in such a manner that the conductive film 22 is disposed between the insulating film 32 and the insulating film 42. Furthermore, on the SiC layer 10, the insulating film 34 and the insulating film 44 are formed in such a manner that the conductive film 24 is disposed between the insulating film 34 and the insulating film 44. Furthermore, on the SiC layer 10, the insulating film 36 and the insulating film 46 are formed in such a manner that the conductive film 26 is disposed between the insulating film 36 and the insulating film 46. The insulating film 30, the insulating film 32, the insulating film 34, the insulating film 36, the insulating film 40, the insulating film 42, the insulating film 44, and the insulating film 46 are, for example, interlayer insulating films of the semiconductor device 100. The insulating films 30, 32, 34, 36, 40, 42, 44, and 46 contain insulating materials such as polyimide ( Figure 3 , Fig. 9 S104).

[0050] As described later Figure 7 As shown, for example, one semiconductor device 100 includes a conductive film 20, an insulating film 30, and an insulating film 40. Furthermore, for example, one semiconductor device 100 includes a conductive film 22, an insulating film 32, and an insulating film 42. Furthermore, for example, one semiconductor device 100 includes a conductive film 24, an insulating film 34, and an insulating film 44. Furthermore, for example, one semiconductor device 100 includes a conductive film 26, an insulating film 36, and an insulating film 46.

[0051] The insulating film 40 (an example of the first insulating film) and the insulating film 32 (an example of the second insulating film) are separated from each other by only the third width in the X direction. The separated portion between the insulating film 40 and the insulating film 32 is a dicing line 52. The insulating film 42 (an example of the first insulating film) and the insulating film 34 (an example of the second insulating film) are separated from each other by only the third width in the X direction. The separated portion between the insulating film 42 and the insulating film 34 is a dicing line 54. The insulating film 44 (an example of the first insulating film) and the insulating film 36 (an example of the second insulating film) are separated from each other by only the third width in the X direction. The separated portion between the insulating film 44 and the insulating film 36 is a dicing line 56. In addition, a dicing line 50 is provided on one side of the insulating film 30 in the -X direction. In addition, a dicing line 58 is provided on one side of the insulating film 46 in the +X direction. Regarding the third width, in the later-described Figure 8 The symbol “W3” is shown in the figure.

[0052] Cutting lines 50, 52, 54, 56, and 58 are portions to be cut in a later step, for example, with a blade, etc. Cutting lines 50, 52, 54, 56, and 58 extend in the Y direction, respectively.

[0053] Likewise, a cutting line (not shown) extending in the X direction may be provided.

[0054] Next, a photomask (mask) 60 (for example, a photoresist) is formed on the polycrystalline SiC substrate 2, the SiC layer 10, the conductive films 20, 22, 24, 26, the insulating films 30, 32, 34, 36, the insulating films 40, 42, 44, 46. Figure 4 ). In addition, the photomask 60 has openings parallel to the Y direction in the portions of the scribe lines 52, scribe lines 54, scribe lines 56, and scribe lines 58.

[0055] Next, using a photomask (mask) 60, the portion of the single crystal SiC layer 6 extending in the Y direction and the portion of the SiC layer 10 extending in the Y direction below the insulating film 40 and the insulating film 32 are removed along the cutting line 52. Here, the portion of the single crystal SiC layer 6 extending in the Y direction to be removed is Figure 8 The first portion 5 of the single crystal SiC layer 6 is shown in FIG. In addition, the portion of the SiC layer 10 extending in the Y direction to be removed is Figure 8 Thus, the second groove 72 ( Figure 5 , Fig. 9 The width of the second groove 72 is the second width. The second width is narrower than the third width. Figure 8 It is shown as “W2” in the figure.

[0056] Similarly, a second groove 74 is formed along the cut line 54 below the insulating film 42 and the insulating film 34. Also, a second groove 76 is formed along the cut line 56 below the insulating film 44 and the insulating film 36. Also, a second groove 78 is formed along the cut line 58. Also, a second groove 70 is formed.

[0057] Here, the second grooves 70, 72, 74, 76, and 78 are formed by, for example, reactive ion etching (RIE) using fluorine-based gas such as SF6 (sulfur hexafluoride). Here, fluorine-based gas such as SF6 may be diluted with Ar (argon) or the like.

[0058] Among them, it is preferable that the polycrystalline SiC substrate 2 is exposed at the bottom of the second groove 70 , the second groove 72 , the second groove 74 , the second groove 76 , and the second groove 78 .

[0059] Furthermore, the second grooves 70 , 72 , 74 , 76 , and 78 may be formed by plasma dicing, wet etching, or chemical dry etching (CDE).

[0060] Next, the photomask 60 ( Figure 6 ).

[0061] Next, for example, by cutting with a blade B, a first groove 82 is formed below the second groove 72. The first groove 82 has a first width narrower than the second width in the X direction and extends in the Y direction, thereby cutting the polycrystalline SiC substrate 2. Similarly, the first groove 80 is formed below the second groove 70. Similarly, the first groove 84 is formed below the second groove 74. Furthermore, a first groove (not shown) is formed below the second groove 76 and the second groove 78. Figure 7 , Fig. 9 S108). Furthermore, the first groove 82 may also be formed by laser cutting or plasma cutting. Regarding the first width, Figure 8 The symbol “W1” is shown in the figure.

[0062] Here, the first surface 1 of the polycrystalline SiC substrate 2 is attached to a dicing tape S, for example.

[0063] By peeling off the respective portions separated by the first groove from the dicing tape S, the semiconductor device 100 of the present embodiment is obtained.

[0064] Figure 8 It is a schematic cross-sectional view of the first groove 82 and the second groove 72 in an enlarged manner.

[0065] The width of the first groove 82 in the X direction is the first width W1. The width of the second groove 72 in the X direction is the second width W2. In the X direction, the insulating film 40 and the insulating film 32 are provided to be separated by only the third width W3.

[0066] It is preferred that the second width W2 is larger than the first width W1 by only the width W1b in the X direction and by only the width W1a in the -X direction. Here, the width W1b and the width W1a are preferably 10 μm or more and 25 μm or less, respectively. Therefore, it is preferred that the second width W2 is larger than the first width W1 by 10 μm or more and 25 μm or less in the X direction and the -X direction, respectively.

[0067] It is preferred that the third width W3 is larger than the second width W2 by only the width W2b in the X direction and by only the width W2a in the -X direction. Here, the width W2a and the width W2b are preferably 5 μm or more and 10 μm or less, respectively. Therefore, it is preferred that the third width W3 is larger than the second width W2 by 5 μm or more and 10 μm or less in the X direction and the -X direction, respectively.

[0068] Next, the effects of this embodiment will be described.

[0069] It is difficult to manufacture a high-quality single-crystal SiC substrate. Therefore, it is considered to thermally peel off the SiC single-crystal base material in a state of being attached to the polycrystalline SiC substrate 2 to make it thinner, and attach a single-crystal SiC layer to the polycrystalline SiC substrate 2 to manufacture a bonded substrate.

[0070] However, there is a problem that gaps (voids) are formed between the polycrystalline SiC substrate 2 and the single crystal SiC layer 6 .

[0071] When such a bonded substrate is cut, there is a problem that the single crystal SiC layer may be chipped or peeled off.

[0072] In the portion where a gap (hole) is formed between the polycrystalline SiC substrate 2 and the single crystal SiC layer, for example, a state is formed in which the single crystal SiC layer floats from the polycrystalline SiC substrate 2. In addition, in the portion where a gap (hole) is formed between the polycrystalline SiC substrate 2 and the single crystal SiC layer, a state is formed in which the single crystal SiC layer and the polycrystalline SiC substrate 2 are partially joined with a very small area. If such a portion with a gap is cut, the single crystal SiC layer, which is relatively thinner than the polycrystalline SiC substrate 2, is peeled off due to contact with the blade and friction, resulting in fragments and peeling. Such fragments and peeling can cause a decrease in the electrical characteristics and reliability of the semiconductor device. Similar fragments and peeling can also be generated during laser cutting and plasma cutting.

[0073] In addition, since such a bonded substrate sometimes has a stacked substrate structure with different crystal structures, there is a problem of substrate warping due to the stress difference between the polycrystalline SiC substrate 2 and the single crystal SiC layer and the strain at the bonding interface between the polycrystalline SiC substrate 2 and the single crystal SiC layer.

[0074] Therefore, the manufacturing method of the semiconductor device of the present embodiment comprises the following steps: a step of forming a SiC layer on a single crystal SiC layer of a substrate, wherein the substrate comprises a polycrystalline SiC substrate including a first surface and a second surface, and a single crystal SiC layer provided on the second surface; a step of forming a first insulating film and a second insulating film on the SiC layer, the first insulating film and the second insulating film being separated from each other by only a third width in a first direction parallel to the second surface; a step of removing a single crystal SiC layer extending in a second direction parallel to the second surface and intersecting the first direction from the bottom between the first insulating film and the second insulating film; The invention relates to a process for forming a second groove by cutting a first part of a SiC layer and a second part of the SiC layer provided on the first part and extending in a second direction, wherein the second groove has a second width narrower than a third width in the first direction and extends in the second direction, the single crystal SiC layer and the SiC layer are cut off, and the polycrystalline SiC substrate is exposed at the bottom of the second groove; and a process for forming a first groove by cutting, wherein the first groove is provided below the second groove, has a first width narrower than the second width in the first direction, and extends in the second direction, and the polycrystalline SiC substrate is cut off.

[0075] According to the method for manufacturing a semiconductor device of the present embodiment, the second groove for cutting the single crystal SiC layer 6 and the SiC layer 10 is formed before dicing. Therefore, it is possible to suppress the fragmentation and peeling of the single crystal SiC layer 6 and the SiC layer 10 generated when the first groove is formed by dicing. Therefore, according to the method for manufacturing a semiconductor device of the present embodiment, a method for manufacturing a semiconductor device with improved yield can be provided.

[0076] Furthermore, since the single crystal SiC layer and the SiC layer are divided into small areas at the manufacturing stage, the above-mentioned substrate warping can be suppressed.

[0077] The second width W2 is preferably greater than the first width W1 by 10 μm or more and 25 μm or less in the X direction and the −X direction. Figure 8 ) is greater than the cut mark deviation amplitude such as substrate tangent bending caused by the mechanical accuracy of the cutting device, the specifications of the blade B (blade thickness, strength), the cutting speed of the cutting device, etc. The cut mark deviation amplitude is about 10μm in the X direction and the -X direction. Therefore, it is preferred that the second width W2 is greater than the first width W1 by more than 10μm in the X direction and the -X direction. On the other hand, when the difference between the second width W2 in the X direction and the -X direction and the first width W1 is greater than 25μm, the number of semiconductor chips that can be obtained is reduced, so it is not preferred.

[0078] The third width W3 is preferably greater than the second width W2 by 5 μm or more and less than 10 μm in the X direction and the -X direction. During dry etching, the SiC layer under the insulating film retreats due to etching, and sometimes the insulating film protrudes in an eaves shape. In order to suppress this phenomenon, the third width W3 is preferably greater than the second width W2 by 5 μm or more in the X direction and the -X direction. On the other hand, it is sufficient that the third width W3 is greater than the second width W2 by 10 μm.

[0079] The polycrystalline SiC substrate 2 is preferably exposed at the bottoms of the second grooves 70, 72, 74, 76, and 78. In other words, a portion of the second grooves is preferably formed by etching to the polycrystalline SiC substrate 2.

[0080] For example, the case where the first groove is formed by cutting with a blade is used as an example for explanation. When the polycrystalline SiC substrate 2 is further cut by contacting the blade through the gap V, the polycrystalline SiC substrate 2 may not be cut smoothly. For example, it is speculated that this is because the gas in the gap V applies unintentional pressure to the surrounding polycrystalline SiC substrate 2, the single crystal SiC layer 6, and the SiC layer 10. If a part of the second groove is formed in advance by etching into the polycrystalline SiC substrate 2, the contact between the SiC layer 10, the single crystal SiC layer 6, and the gap V and the blade can be avoided in the cutting for forming the first groove.

[0081] According to the method for manufacturing a semiconductor device of the present embodiment, it is possible to provide a method for manufacturing a semiconductor device with improved yield.

[0082] (Second embodiment)

[0083] The method for manufacturing a semiconductor device of the present embodiment comprises the following steps: a step of forming a SiC layer on a single crystal SiC layer of a substrate, the substrate comprising a polycrystalline SiC substrate including a second surface and a single crystal SiC layer provided on the second surface; a step of forming, on the SiC layer, a third insulating film and a fourth insulating film separated from each other by a second width in a first direction parallel to the second surface and containing an oxide; and a step of removing, below between the third insulating film and the fourth insulating film, a first portion of the single crystal SiC layer extending in a second direction parallel to the second surface and intersecting the first direction and a portion of the SiC layer provided on the first portion and extending in the second direction. The invention relates to a process for forming a second groove on a second part of the single crystal SiC layer, wherein the second groove has a second width in the first direction and extends along the second direction, thereby cutting off the single crystal SiC layer and the SiC layer; a process for removing the third insulating film and the fourth insulating film; a process for forming a first insulating film and a second insulating film on the SiC layer, wherein the first insulating film and the second insulating film are separated by only a third width larger than the second width in the first direction and are arranged in a manner of sandwiching the second groove; and a process for forming a first groove by cutting, wherein the first groove is arranged below the second groove, has a first width narrower than the second width in the first direction, and extends along the second direction, thereby cutting off the polycrystalline SiC substrate.

[0084] Here, description of contents overlapping with those in the first embodiment will be omitted.

[0085] Fig.10 and even Fig.13 It is a schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the present embodiment. Fig.14 1 is a flowchart showing the manufacturing process of the semiconductor device according to the present embodiment.

[0086] Regarding the formation of the SiC layer 10 ( Fig.14 S202) is the same as the first embodiment.

[0087] Next, an insulating film 62 containing oxide, an insulating film 63 containing oxide (an example of a third insulating film), an insulating film 64 containing oxide (an example of a fourth insulating film), an insulating film 65 containing oxide, an insulating film 66 containing oxide, and an insulating film 67 containing oxide are formed on the SiC layer 10. The insulating film 62 and the insulating film 63 are separated from each other by only the second width in the X direction. The insulating film 63 and the insulating film 64 are separated from each other by only the second width in the X direction. The insulating film 64 and the insulating film 65 are separated from each other by only the second width in the X direction. The insulating film 65 and the insulating film 66 are separated from each other by only the second width in the X direction. The insulating film 66 and the insulating film 67 are separated from each other by only the second width in the X direction ( Fig.10 , Fig.14 S204).

[0088] The separated portion between the insulating film 62 and the insulating film 63 is the cut line 50. The separated portion between the insulating film 63 and the insulating film 64 is the cut line 52. The separated portion between the insulating film 64 and the insulating film 65 is the cut line 54. The separated portion between the insulating film 65 and the insulating film 66 is the cut line 56. The separated portion between the insulating film 66 and the insulating film 67 is the cut line 58.

[0089] Next, using the insulating films 62, 63, 64, 65, 66, and 67 as masks, a second groove 70 is formed at the cutting line 50, a second groove 72 is formed at the cutting line 52, a second groove 74 is formed at the cutting line 54, a second groove 76 is formed at the cutting line 56, and a second groove 78 is formed at the cutting line 58 ( Fig.11 , Fig.14 S206).

[0090] Here, the insulating films 62, 63, 64, 65, 66, and 67 contain, for example, oxide. The insulating films 62, 63, 64, 65, 66, and 67 contain, for example, silicon oxide.

[0091] Next, the insulating film 62 , the insulating film 63 , the insulating film 64 , the insulating film 65 , the insulating film 66 , and the insulating film 67 are removed ( S208 of S14 ).

[0092] Next, the device structure of the semiconductor device 100 is formed on the SiC layer 10. For example, the conductive film 20, the conductive film 22, the conductive film 24, and the conductive film 26 are formed. Next, the insulating film 30 and the insulating film 40 are formed on the SiC layer 10 in such a manner that the conductive film 20 is disposed between the insulating film 30 and the insulating film 40. In addition, the insulating film 32 and the insulating film 42 are formed on the SiC layer 10 in such a manner that the conductive film 22 is disposed between the insulating film 32 and the insulating film 42. In addition, the insulating film 34 and the insulating film 44 are formed on the SiC layer 10 in such a manner that the conductive film 24 is disposed between the insulating film 34 and the insulating film 44. In addition, the insulating film 36 and the insulating film 46 are formed on the SiC layer 10 in such a manner that the conductive film 26 is disposed between the insulating film 36 and the insulating film 46.

[0093] Here, the insulating film 40 (an example of the first insulating film) and the insulating film 32 (an example of the second insulating film) are separated from each other by only the third width in the X direction. The insulating film 42 (an example of the first insulating film) and the insulating film 34 (an example of the second insulating film) are separated from each other by only the third width in the X direction. The insulating film 44 (an example of the first insulating film) and the insulating film 36 (an example of the second insulating film) are separated from each other by only the third width in the X direction. Fig.12 , Fig.14 S210).

[0094] Next, for example, by cutting with a blade B, a first groove 82 is formed below the second groove 72. The first groove 82 has a first width narrower than the second width in the X direction and extends in the Y direction, thereby cutting the polycrystalline SiC substrate 2. Similarly, the first groove 80 is formed below the second groove 70. Similarly, the first groove 84 is formed below the second groove 74. Furthermore, a first groove (not shown) is also formed below the second groove 76 and the second groove 78. Fig.13 , Fig.14 S212).

[0095] Here, the first surface 1 of the polycrystalline SiC substrate 2 is attached to a dicing tape S, for example.

[0096] By peeling the respective portions separated by the first groove from the dicing tape S, the semiconductor device 100 of the present embodiment is obtained.

[0097] For example, since the film thickness of the SiC layer 10 is relatively thick, it is necessary to consider that the photomask must have sufficient resistance during dry etching. In this case, a manufacturing method using the insulating film 62, the insulating film 63, the insulating film 64, the insulating film 65, the insulating film 66, and the insulating film 67 as a mask is suitable, as in the manufacturing method of the semiconductor device of the present embodiment.

[0098] According to the method for manufacturing a semiconductor device of the present embodiment, it is possible to provide a method for manufacturing a semiconductor device with improved yield.

[0099] (Third embodiment)

[0100] The method for manufacturing a semiconductor device of this embodiment differs from the method for manufacturing a semiconductor device of the first embodiment and the second embodiment in that, in the step of forming the second groove, a predetermined layer is formed in the second groove, the predetermined layer having a third portion which is a part of the first portion, and a fourth portion which is provided on the third portion and is a part of the second portion. Here, the description of the contents overlapping with the first embodiment and the second embodiment is omitted.

[0101] Fig.15It is a schematic plan view showing the manufacturing process of the semiconductor device according to the present embodiment. Figure 6 The schematic cross-sectional view shown corresponds, for example, to Fig.15 A-A' section.

[0102] Fig.16 AB is a schematic diagram of the predetermined layer 102 in this embodiment. Fig.16 A is a schematic plan view of the predetermined layer 102 of this embodiment. Fig.16 B is Fig.16 This is a schematic cross-sectional view of the predetermined layer 102 of the present embodiment in the BB′ cross section of A.

[0103] In the steps of forming the second grooves 70, 72, 74, 76, and 78, a predetermined layer 102 is formed in each of the second grooves. Here, the portion of the single crystal SiC layer 6 extending in the Y direction and removed in the step of forming the second grooves is the first portion 5 ( Figure 8 ). In addition, the portion of the SiC layer 10 extending in the Y direction and removed in the step of forming the second groove is the second portion 7 of the SiC layer 10 ( Figure 8 The predetermined layer 102 includes a third portion 9 which is a part of the first portion 5 that has not been removed and remains in the second groove, and a fourth portion 11 which is a part of the second portion that has not been removed and remains in the second groove. The fourth portion 11 is provided on the third portion 9.

[0104] Furthermore, when a portion of each of the second grooves 70 , 72 , 74 , 76 , and 78 is formed in the polycrystalline SiC substrate 2 , a portion of the polycrystalline SiC substrate 2 around the predetermined layer 102 is also scraped away.

[0105] Fig.16 In A, the shape of the predetermined layer 102 is a cross shape when viewed from above. However, the shape of the predetermined layer 102 when viewed from above is not limited to the cross shape. For example, the shape of the predetermined layer 102 when viewed from above may be a quadrilateral.

[0106] In the cutting device, the pattern arranged on the cutting line is photographed by a camera to perform the positioning work (alignment) of the substrate 4. The predetermined layer 102 can be used as a reference (alignment mark) for the positioning of the substrate 4.

[0107] Fig.17 It is a schematic cross-sectional view showing a manufacturing process of a semiconductor device according to a comparative embodiment of the present embodiment. Fig.18 AB is a schematic diagram of a predetermined layer 1002 in a comparative embodiment of the present embodiment. Fig.18 A is a schematic top view of a predetermined layer 1002 of a comparative embodiment. Fig.18 B is Fig.18 A schematic cross-sectional view of a comparative predetermined layer 1002 in the AA′ cross section of A.

[0108] The predetermined layer 1002 has a metal layer 1004 provided on the single crystal SiC layer 6 and the SiC layer 10. Here, the metal layer 1004 contains a metal material such as Al (aluminum). The metal layer 1004 corresponds to the conductive film 20 shown in the first embodiment and the second embodiment. The single crystal SiC layer 6 and the SiC layer 10 around the metal layer 1004 are not removed by dry etching or the like.

[0109] The metal layer 1004 of the comparative method contains a conductive material such as Al, similarly to the conductive film 20. In this case, due to the influence of the manufacturing process after formation such as sintering heat treatment, the developer used in the photolithography method, or the chemical solution used in the stripping of the photoresist, the surface roughness and shape change may occur. In addition, if the light is diffusely reflected due to the rough surface, or the shape is different from the prescribed shape, there is a problem of reduced alignment accuracy.

[0110] In the method for manufacturing a semiconductor device of the present embodiment, a predetermined layer 102 including a single crystal SiC layer 6 and a portion of the SiC layer 10 is formed. Therefore, as described in the comparative example, the manufacturing process can be reduced compared to the case where the predetermined layer 1002 including a metal layer is formed. In addition, since the predetermined layer 102 is formed of SiC, it is less likely to be affected by the process than the predetermined layer 1002 including a metal material. Therefore, the substrate 4 can be better aligned.

[0111] According to the method for manufacturing a semiconductor device of the present embodiment, it is possible to provide a method for manufacturing a semiconductor device with improved yield.

[0112] Several embodiments and examples of the present invention have been described, but these embodiments and examples are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the subject matter of the invention. These embodiments and their variations are included in the scope and subject matter of the invention, and are also included in the invention described in the claims and their equivalents.

[0113] Furthermore, the above-mentioned implementation modes can be summarized as the following technical solutions.

[0114] (Technical Solution 1)

[0115] A method for manufacturing a semiconductor device comprises the following steps:

[0116] A step of forming a SiC layer on a single crystal SiC layer of a substrate, the substrate comprising a polycrystalline SiC substrate including a first surface and a second surface, and the single crystal SiC layer provided on the second surface;

[0117] forming, on the SiC layer, a first insulating film and a second insulating film separated from each other by a third width in a first direction parallel to the second surface;

[0118] A step of forming a second groove below between the first insulating film and the second insulating film by removing a first portion of the single crystal SiC layer parallel to the second surface and extending in a second direction intersecting the first direction and a second portion of the SiC layer provided on the first portion and extending in the second direction, wherein the second groove has a second width narrower than the third width in the first direction and extends in the second direction, the single crystal SiC layer and the SiC layer are cut off, and the polycrystalline SiC substrate is exposed at the bottom of the second groove; and

[0119] The polycrystalline SiC substrate is cut by the step of forming a first groove, the first groove being provided below the second groove, having a first width in the first direction that is narrower than the second width, and extending in the second direction.

[0120] (Technical Solution 2)

[0121] A method for manufacturing a semiconductor device comprises the following steps:

[0122] A step of forming a SiC layer on a single crystal SiC layer of a substrate, the substrate comprising a polycrystalline SiC substrate including a first surface and a second surface, and the single crystal SiC layer provided on the second surface;

[0123] A step of forming, on the SiC layer, a third insulating film and a fourth insulating film separated from each other by a second width in a first direction parallel to the second surface and containing oxide;

[0124] A step of forming a second groove below between the third insulating film and the fourth insulating film by removing a first portion of the single crystal SiC layer parallel to the second surface and extending in a second direction intersecting the first direction and a second portion of the SiC layer provided on the first portion and extending in the second direction, wherein the second groove has the second width in the first direction and extends in the second direction, thereby cutting the single crystal SiC layer and the SiC layer;

[0125] A step of removing the third insulating film and the fourth insulating film;

[0126] forming a first insulating film and a second insulating film on the SiC layer, wherein the first insulating film and the second insulating film are separated in the first direction by a third width greater than the second width and are arranged so as to sandwich the second groove; and

[0127] The polycrystalline SiC substrate is cut by the step of forming a first groove, the first groove being provided below the second groove, having a first width in the first direction that is narrower than the second width, and extending in the second direction.

[0128] (Technical Solution 3)

[0129] The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the second width is greater than the first width by 10 μm or more and 25 μm or less in the first direction and in a third direction opposite to the first direction.

[0130] (Technical Solution 4)

[0131] The method for manufacturing a semiconductor device according to any one of technical solutions 1 to 3, wherein in the first direction and a third direction opposite to the first direction, the third width is larger than the second width by 5 μm or more and 10 μm or less.

[0132] (Technical Solution 5)

[0133] The method for manufacturing a semiconductor device according to any one of Technical Solution 1, Technical Solution 3 or Technical Solution 4, wherein the second groove is formed by dry etching using a photoresist provided on the first insulating film and the second insulating film as a mask.

[0134] (Technical Solution 6)

[0135] The method for manufacturing a semiconductor device according to any one of claims 1 to 5, wherein in the step of forming the second groove, a predetermined layer is formed in the second groove, and the predetermined layer has:

[0136] Part 3 being part of said Part 1; and

[0137] A fourth portion is provided on the third portion and is a part of the second portion.

[0138] Explanation of symbols

[0139] 1 - Page 1

[0140] 2-Polycrystalline SiC substrate

[0141] 3 - Side 2

[0142] 4-Substrate

[0143] 6-Single crystal SiC layer

[0144] 7 - Part 3

[0145] 10-SiC layer

[0146] 11 - Part 4

[0147] 20-Conductive film

[0148] 22-Conductive film

[0149] 24-Conductive film

[0150] 26-Conductive film

[0151] 30 - Insulation film

[0152] 32 - Insulating film

[0153] 34 - Insulating film

[0154] 36 - Insulating film

[0155] 40-Insulating film

[0156] 42 - Insulating film

[0157] 44 - Insulating film

[0158] 46 - Insulating film

[0159] 50 - Cutting line

[0160] 52 - Cutting line

[0161] 54 - Cutting line

[0162] 56 - Cutting line

[0163] 58 - Cutting line

[0164] 60 - Photomask

[0165] 62 - Insulating film

[0166] 63 - Insulating film

[0167] 64 - Insulating film

[0168] 65 - Insulating film

[0169] 66 - Insulating film

[0170] 67 - Insulating film

[0171] 70 - Slot 2

[0172] 72 - Slot 2

[0173] 74 - Slot 2

[0174] 76 - Slot 2

[0175] 78 - Slot 2

[0176] 80 - Slot 1

[0177] 82 - Slot 1

[0178] 84 - Slot 1

[0179] 100 - Semiconductor devices

[0180] 102 - Specified Layer

[0181] 1002 - Specified Layer

[0182] B - Blade

[0183] S - Cutting tape

[0184] V - Gap

[0185] W1 - 1st Width

[0186] W2 - 2nd Width

[0187] W3 - 3rd Width

Claims

1. A method for manufacturing a semiconductor device, comprising the following steps: A step of forming a SiC layer on a single crystal SiC layer of a substrate, the substrate comprising a polycrystalline SiC substrate including a first surface and a second surface, and the single crystal SiC layer provided on the second surface; forming, on the SiC layer, a first insulating film and a second insulating film separated from each other by a third width in a first direction parallel to the second surface; A step of forming a second groove below between the first insulating film and the second insulating film by removing a first portion of the single crystal SiC layer parallel to the second surface and extending in a second direction intersecting the first direction and a second portion of the SiC layer provided on the first portion and extending in the second direction, wherein the second groove has a second width narrower than the third width in the first direction and extends in the second direction, the single crystal SiC layer and the SiC layer are cut off, and the polycrystalline SiC substrate is exposed at the bottom of the second groove; and The polycrystalline SiC substrate is cut by the step of forming a first groove, the first groove being provided below the second groove, having a first width in the first direction that is narrower than the second width, and extending in the second direction.

2. A method for manufacturing a semiconductor device, comprising the following steps: A step of forming a SiC layer on a single crystal SiC layer of a substrate, the substrate comprising a polycrystalline SiC substrate including a first surface and a second surface, and the single crystal SiC layer provided on the second surface; A step of forming, on the SiC layer, a third insulating film and a fourth insulating film separated from each other by a second width in a first direction parallel to the second surface and containing oxide; A step of forming a second groove below between the third insulating film and the fourth insulating film by removing a first portion of the single crystal SiC layer parallel to the second surface and extending in a second direction intersecting the first direction and a second portion of the SiC layer provided on the first portion and extending in the second direction, wherein the second groove has the second width in the first direction and extends in the second direction, thereby cutting the single crystal SiC layer and the SiC layer; A step of removing the third insulating film and the fourth insulating film; forming a first insulating film and a second insulating film on the SiC layer, wherein the first insulating film and the second insulating film are separated in the first direction by a third width greater than the second width and are arranged so as to sandwich the second groove; and The polycrystalline SiC substrate is cut by the step of forming a first groove, the first groove being provided below the second groove, having a first width in the first direction that is narrower than the second width, and extending in the second direction.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: In the first direction and in a third direction opposite to the first direction, the second width is greater than the first width by 10 μm or more and 25 μm or less.

4. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: In the first direction and a third direction opposite to the first direction, the third width is larger than the second width by 5 μm or more and 10 μm or less.

5. The method for manufacturing a semiconductor device according to claim 1, wherein: The second groove is formed by dry etching using a photoresist provided on the first insulating film and the second insulating film as a mask.

6. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: In the step of forming the second groove, a predetermined layer is formed in the second groove, wherein the predetermined layer has: Part 3 being part of said Part 1; and A fourth portion is provided on the third portion and is a part of the second portion.

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