Method for forming bore for cavity arranged in semiconductor layer stack

Abstract

The invention relates to a method for forming a bore (38) for a cavity (22) arranged in a semiconductor layer stack (10) by forming a first partial bore (24) by means of a first laser ablation step starting on an outer surface (26) of the semiconductor layer stack (10), the first sub-bore (24) extends from the outer surface (26) with a first mean extent (d1) oriented parallel to the outer surface (26) and is configured with a bottom surface (24a) of the first sub-bore (24) located between the outer surface (26) and the cavity (22), and forming a second partial bore (36) by means of a second laser ablation step starting from a bottom surface (24a) of the first partial bore (24), the second sub-bore (36) extends through the bottom surface (24a) with a second average extent (d2), which is oriented parallel to the outer surface (26) and is smaller than the first average extent (d1), into the cavity (22) or into an access channel (44), which opens into the cavity (22) or is connected to the cavity (22) via a connecting channel.

Description

Technical Field

[0001] The invention relates to a method for forming a borehole for a cavity arranged in a semiconductor layer stack. Likewise, the invention relates to a method for encapsulating pressure and / or a medium in a cavity arranged in a semiconductor layer stack. In addition, the invention relates to a semiconductor layer stack. Background Art

[0002] DE 10 2011 103 516 A1 describes a method for filling a hollow space with an atmosphere. A hollow space arranged in a semiconductor layer stack is subsequently filled by removing material by laser ablation using a pulsed laser beam. In this way, an opening with a (substantially) constant opening diameter is produced, which extends into the interior of the hollow space. After the hollow space is filled with the desired atmosphere, the opening is closed by melting and subsequent solidification using a further laser beam, which causes slow heating in the region of the opening. Summary of the invention

[0003] The invention provides a method for forming a borehole for a cavity arranged in a semiconductor layer stack, a method for encapsulating pressure and / or a medium in a cavity arranged in a semiconductor layer stack, a semiconductor layer stack and a further semiconductor layer stack.

[0004] Advantages of the present invention

[0005] The present invention enables the cost-effective and easily implementable production of a plurality of semiconductor devices, which have cavities within the semiconductor layer stack of the respective semiconductor device, the cavities having a desired internal pressure and / or a defined medium within the respective cavity. In particular, by using the present invention, problems can be avoided that usually occur frequently due to the implementation of at least one etching process for forming a borehole to the respective cavity. In addition, the present invention enables an improved laser drilling technology compared to the prior art for forming a borehole to the cavity or to an access channel connected to the cavity, whereby the respective borehole can be constructed more quickly and the frequency of particles or fumes that appear in the cavity due to laser drilling can be significantly reduced. Therefore, by using the present invention, damage to semiconductor devices due to particles or fumes generated during laser drilling can be reduced compared to conventional technologies.

[0006] In an advantageous embodiment of the method, a first sub-drilling hole and a second sub-drilling hole are drilled through a semiconductor substrate delimiting a cavity of a semiconductor layer stack, the semiconductor substrate being equipped with a circuit layer having at least one application-specific integrated circuit on its substrate surface pointing away from the outer surface of the semiconductor layer stack. The semiconductor substrate equipped with at least one application-specific integrated circuit can also be referred to as an ASIC substrate. In particular, the outer surface of the semiconductor layer stack can be the back side of the ASIC substrate, which is pointed away from the substrate surface having the at least one application-specific integrated circuit. Drilling the first sub-drilling hole and the second sub-drilling hole through the ASIC substrate is significantly easier and more cost-effective than alternatively drilling a through hole through the MEMS substrate, since the substrate thickness of the ASIC substrate oriented perpendicular to the outer surface is generally smaller than the corresponding substrate thickness of the MEMS substrate. Therefore, in the embodiment described here, a drill hole through the ASIC substrate, which includes the first sub-drilling hole and the second sub-drilling hole, can be formed in a shorter process time.

[0007] Alternatively, a first sub-drilling hole and a second sub-drilling hole can also be drilled through the cover substrate of the semiconductor layer stack, which delimits the cavity. The substrate thickness of the cover substrate, which is oriented perpendicular to the outer surface, is usually also relatively thin, so that in this case, the advantage of a relatively short process time for forming the drill hole comprising the first sub-drilling hole and the second sub-drilling hole is also ensured.

[0008] Preferably, the second sub-drilling hole is drilled into an access channel which extends through a portion of the semiconductor layer stack parallel to the outer surface of the semiconductor layer stack. As will become clear from the following description, in this case the access channel prevents particles or smoke from penetrating into the cavity.

[0009] In another advantageous embodiment of the method, the first sub-drilling hole and the second sub-drilling hole are aligned with one another in such a way that a common central longitudinal axis can be defined for the first sub-drilling hole and the second sub-drilling hole. Preferably, in this case, a first length of the first sub-drilling hole along the common central longitudinal axis is greater than a second length of the second sub-drilling hole along the common central longitudinal axis by at least a factor of 2. Thus, as will become clear from the following description, a borehole comprising the first sub-drilling hole and the second sub-drilling hole can be constructed relatively quickly even in the case of a relatively large sum of the first length and the second length.

[0010] Advantageously, the first sub-drilling hole is formed with a first average extent oriented parallel to the outer surface, which is greater than a second average extent with which the second sub-drilling hole is formed parallel to the outer surface by at least a factor of 2. Thus, the first laser ablation step can be carried out at a high ablation rate, while the second laser ablation step can be carried out at a significantly reduced ablation rate.

[0011] The advantages described above are also ensured when implementing a method for encapsulating pressure and / or a medium in a cavity arranged in a semiconductor layer stack, which method has the following steps: according to one embodiment of the method explained above, a borehole for a cavity arranged in the semiconductor layer stack is formed, and when pressure and / or a medium is present in the cavity, the borehole is closed by melting a wall area of ​​a first sub-drilling hole and / or a second sub-drilling hole of the borehole adjacent to the bottom surface of the first sub-drilling hole of the borehole by means of a laser beam. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In the following, further features and advantages of the present invention are described with reference to the accompanying drawings. The accompanying drawings show:

[0013] Figures 1A to 1C A schematic diagram showing an intermediate or end product for explaining a first specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack;

[0014] Figure 2A and 2B A schematic diagram showing an intermediate or end product for explaining a second specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack;

[0015] Figure 3A and 3B a schematic diagram showing an intermediate or end product for explaining a third specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack; and

[0016] Figure 4 A schematic representation of an intermediate or end product is shown for explaining a fourth specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack. DETAILED DESCRIPTION

[0017] Figures 1A to 1C A schematic diagram of an intermediate or end product is shown for explaining a first specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack.

[0018] In the embodiment described here, the semiconductor layer stack 10 exemplarily includes a so-called ASIC substrate 12, the substrate surface 12a of which is equipped with a circuit layer 14, which has at least one application-specific integrated circuit, and a so-called MEMS substrate 16, which has at least one MEMS structural element 18a and 18b, which is fastened / connected to the substrate surface 16a of the MEMS substrate 16. For example, the circuit layer 14 can be configured as a CMOS layer 14. At least one MEMS structural element 18a and 18b can be understood as at least one MEMS sensor 18a and 18b and / or at least one MEMS actuator. The at least one MEMS sensor 18a and 18b can be, for example, a rotation rate sensor 18a, an acceleration sensor 18b and / or a pressure sensor. However, the sensor types listed here should only be interpreted as examples. By way of example, in the embodiment described here, the ASIC substrate 12 and the MEMS substrate 16 are connected to one another via at least one bonding connection 20 such that the substrate surfaces 12a and 16a are aligned with one another and a cavity 22 is enclosed between the circuit layer 14 and the substrate surface 16a of the MEMS substrate 16. However, it should be pointed out that this semiconductor layer stack 10 is to be interpreted only as an example. The method described below can be implemented with a plurality of further semiconductor layer stacks, each of which has a cavity 22 arranged in the respective semiconductor layer stack.

[0019] As in Figure 1A , when carrying out the method described here, firstly a first partial bore hole 24 is formed by means of a first laser ablation step starting at an outer surface 26 of the semiconductor layer stack 10. The first laser ablation step can also be understood as a laser ablation step or a laser vaporization step. For better understanding, the outer surface 26 of the semiconductor layer stack 10 on which the formation of the first partial bore hole 24 by means of the first laser ablation step begins is referred to below as the drilling initiation surface 26. By means of the first laser ablation step, the first partial bore hole 24 is formed in such a way that the first partial bore hole 24 extends partially through the semiconductor layer stack 10 starting from the drilling initiation surface 26 with a first average extension d1 oriented parallel to the drilling initiation surface 26. Furthermore, the first partial bore hole 24 is formed by means of the first laser ablation step on the side pointing away from the drilling initiation surface 26 with a bottom surface 24a of the first partial bore hole 24 located between the drilling initiation surface 26 and the cavity 22.

[0020] The first laser ablation step can be performed with the aid of a first laser optimized for high ablation, so that the first laser ablation step can be performed relatively quickly compared to the first length l1 of the first sub-drilling hole 24 extending along the central longitudinal axis 28 of the first sub-drilling hole 24. In particular, the first laser ablation step can be performed significantly faster and significantly simpler than an etching step that needs to be performed in order to achieve the same first length l1 of the first sub-drilling hole 24. Since the first laser ablation step is stopped before the bottom surface 24a of the first sub-drilling hole 24 reaches the cavity 22, even when the first laser ablation step is performed using a first laser with high ablation, there is no need to worry about particles penetrating into the cavity 22 during the first laser ablation step.

[0021] like Figure 1A As shown, the first sub-drilling hole 24 can be formed in the form of a blind hole or a cup-shaped groove, and in particular, can be formed so that the opening diameter of the first sub-drilling hole 24 on the drilling initial surface 26 is relatively large. However, the opening diameter of the first sub-drilling hole 24 on the drilling initial surface 26 is usually still smaller than the first length l1 of the first sub-drilling hole 24 extending along the central longitudinal axis 28 of the first sub-drilling hole 24. In particular, the central longitudinal axis 28 of the first sub-drilling hole 24 can be oriented perpendicular to the drilling initial surface 26.

[0022] In particular, the drilling initial surface 26 can also be understood as the outer surface 26 of the passivation layer 30. It should be explicitly pointed out here that the formation of the first partial drilling 24 can only begin when at least one through-hole 32 (TSV) adjacent to the subsequent first partial drilling 24 has already partially extended through the semiconductor layer stack 10 starting from the drilling initial surface 26 in the direction of the cavity 22 and / or when at least one solder ball 34 is fastened to the semiconductor layer stack 10 adjacent to the drilling initial surface 26 and / or on the drilling initial surface 24. Figure 1A It can also be seen that the first sub-drilling hole 24 can only be formed after the advanced packaging process.

[0023] like Figure 1BAs shown, after the first sub-drilling hole 24 is formed, the second sub-drilling hole 36 is formed by means of a second laser ablation step starting from the bottom surface 24a of the first sub-drilling hole 24. The second laser ablation step can also be a laser ablation step or a laser vaporization step. The second sub-drilling hole 36 is formed in such a way that the second sub-drilling hole 36 extends through the bottom surface 24a of the first sub-drilling hole 24 with a second average extension d2 oriented parallel to the initial surface 26 of the drilling hole and smaller than the first average extension d1 until it reaches the cavity 22 or until it reaches the entry channel, which enters the cavity 22 or is connected to the cavity 22 via a connecting channel (not shown). Therefore, the first sub-drilling hole 24 and the second sub-drilling hole 36 together form a drilling hole 38, which extends from the initial surface 26 of the drilling hole (at least) until it reaches the cavity 22 or until it reaches the entry channel, which enters the cavity 22 or is connected to the cavity 22 via a connecting channel.

[0024] Preferably, the two laser ablation steps are carried out with the aid of two different laser configurations. Preferably, for the second laser ablation step, a second laser is used which has a smaller ablation rate than the first laser, for example because the second laser emits a shorter wavelength than the first laser. In this way, the first sub-drilling hole 24 can be easily constructed with a first average extension d1 oriented parallel to the initial drilling surface 26, which first average extension is greater than the second average extension d2 by at least a factor of 2, with which the second sub-drilling hole 36 is constructed parallel to the initial drilling surface 26. Preferably, the second average extension d1 is less than or equal to 20 μm (micrometers), in particular less than or equal to 15 μm (micrometers), in particular less than or equal to 10 μm (micrometers).

[0025] Since the second sub-drilling hole 36 is formed with a smaller second average extension d2 (compared to the first average extension d1 of the first sub-drilling hole 24), during the formation of the second sub-drilling hole 36, even if the wall of the cavity 22 or the inlet channel (which flows into the cavity 22 or is connected to the cavity 22 via the connecting channel) is broken, there is no need or almost no need to worry about particles or dense smoke penetrating into the cavity 22. This is an important advantage of the method described here compared to the prior art described above.

[0026] The first sub-drilling hole 24 and the second sub-drilling hole 36 can be aligned with each other in such a way that the central longitudinal axis 28 of the first sub-drilling hole 24 can be defined as the common central longitudinal axis 28 of the first sub-drilling hole 24 and the second sub-drilling hole 36. It is also advantageous that the first length l1 of the first sub-drilling hole 24 along the common central longitudinal axis 28 is greater than the second length l2 of the second sub-drilling hole 36 along the common central longitudinal axis 28 by at least a factor of 2, because even if the second laser has a relatively low ablation rate, the total time for performing the two laser ablation steps can be relatively short. In particular, the two laser ablation steps can be performed in a shorter total time than an etching step for forming a control borehole having a length equal to the sum of the lengths l1 and l2. In addition, performing the first laser ablation step and the second laser ablation step can be extremely cost-effective compared to performing a conventional etching process.

[0027] In an advantageous embodiment of the method described here, a first sub-drilling hole 24 and a second sub-drilling hole 36 of the ASIC substrate 12 are drilled through the delimiting cavity 22 of the semiconductor layer stack 10, wherein the substrate surface 12a with the circuit layer 14 is directed away from the drilling initial surface 26. The ASIC substrate 12 can have a substrate thickness oriented perpendicularly to the drilling initial surface 26, which is less than 150 μm (micrometers), in particular less than 80 μm (micrometers), in particular less than 50 μm (micrometers). Figure 1B As can also be seen, the borehole 38 extends through the circuit layer 14 within the sealing ring 40, thereby limiting the crack formation in the circuit layer 14. In an alternative embodiment, the first sub-drilling hole 24 and the second sub-drilling hole 36 can also extend through a (not shown) covering substrate of the semiconductor layer stack 10, which limits the cavity 22. If necessary, the substrate thickness of the covering substrate is preferably less than 150 μm (micrometer), in particular less than 80 μm (micrometer), especially less than 50 μm (micrometer). In both cases, the total time for carrying out the first laser ablation step and the second laser ablation step is relatively short. Optionally, the borehole 38 can also be constructed through the MEMS substrate 16, wherein, if necessary, the total volume of the circuit layer 14 can be used for application-specific integrated circuit components.

[0028] If the drill hole 38 includes a first sub-drill hole 24 having laser ablation marks and a second sub-drill hole 36 having laser ablation marks, the semiconductor layer stack 10 manufactured with the aid of the above-mentioned method steps can be identified on the cavity 22 arranged in the semiconductor layer stack 10 and the drill hole 38, wherein the first sub-drill hole 24 extends partially through the semiconductor layer stack 10 starting from the outer surface 26 with a first average extension d1 oriented parallel to the outer surface 26 and has at least a remaining part of the bottom surface 24a of the first sub-drill hole 24 located between the outer surface 26 and the cavity 22 on the side pointing away from the outer surface 26, wherein the second sub-drill hole 36 extends through the bottom surface 24a of the first sub-drill hole 24 with a second average extension d2 oriented parallel to the outer surface 26 and smaller than the first average extension d1 until into the cavity 22 or until into an entry channel, which merges into the cavity 22 or is connected to the cavity 22 via a connecting channel (see Figure 1B ).

[0029] The method described here can be part of a method for encapsulating pressure and / or a medium in a cavity 22 arranged in the semiconductor layer stack 10 as an (optional) embodiment. Figure 1C As shown, after the borehole 38 is formed, the borehole 38 is closed when a preferred pressure and / or a desired medium is present in the cavity 22. The borehole 38 is closed by melting the wall region of the first sub-drilling hole 24 and / or the second sub-drilling hole 36 adjacent to the bottom surface 24a of the first sub-drilling hole 24 by means of a laser beam. In general, the remaining portions of the sub-drilling holes 24 and 36 are not particularly important for the Figure 1C The possible further processing of the final product reproduced in the form of an image is not critical.

[0030] The method described here can therefore be used to cost-effectively produce a plurality of semiconductor devices having a cavity 22 arranged within their respective semiconductor layer stack 10 and having a preferred pressure and / or a desired medium. On the semiconductor layer stack 10 of the semiconductor device, it can be seen that the corresponding semiconductor device is manufactured by implementing the method described herein, and the semiconductor layer stack has a cavity 22 arranged in the semiconductor layer stack 10 and a drilling closure 42, which is composed of a melted and solidified part of the material of the semiconductor layer stack 22, and the drilling closure is located between a first sub-drilling hole 24 having a laser ablation mark and a second sub-drilling hole 36 having a laser ablation mark, wherein the first sub-drilling hole 24 extends partially through the semiconductor layer stack 10 from the outer surface 26 with a first average extension d1 oriented parallel to the outer surface 26, and the second sub-drilling hole 36 extends with a second average extension d2 oriented parallel to the outer surface 26 and smaller than the first average extension d1 until into the cavity 22 or until into an entry channel, which merges into the cavity 22 or is connected to the cavity 22 via a connecting channel (see Figure 1C ).

[0031] Figure 2A and 2B A schematic representation of an intermediate or end product is shown for explaining a second specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack.

[0032] In the method described here, a second sub-drilling hole 36 is drilled into an entry channel 44, which extends through a portion of the semiconductor layer stack 10 parallel to the drilling initial surface 26 and merges into the cavity 22 or is connected to the cavity 22 via a connecting channel 44a. The entry channel 44 can also be described as a lateral entry channel 44 due to its orientation. Therefore, the orientation of the entry channel 44 ensures that particles or dense smoke released when drilling the second sub-drilling hole 36 can hardly enter the cavity 22. In this way, damage to at least one MEMS structural element 18a and 18b in the cavity 22 due to particles and dense smoke can be effectively avoided in particular. Therefore, the preferred pressure and / or the desired medium in the cavity 22 can be ensured via the entry channel 44, while (substantially) preventing particles and dense smoke from intruding into the cavity 22 undesirably.

[0033] like Figure 2A As shown, an access channel 44 extending through a portion of the semiconductor layer stack 10 parallel to the drilling initial surface 26 can be formed in the substrate 16 which is located on the side of the cavity 22 aligned with the drilling initial surface 26, in particular adjacent to the cavity 22. Figure 2A In the example, the corresponding substrate 16 is a MEMS substrate 16 by way of example only.

[0034] like Figure 2B As shown, in the method described here, after the drilling 38 including the first sub-drilling hole 24 and the second sub-drilling hole 36 is completed, the desired pressure and / or the preferred medium can be enclosed in the cavity 22 by subsequently melting the wall area of ​​the first sub-drilling hole 24 and / or the second sub-drilling hole 36 adjacent to the bottom surface 24a of the first sub-drilling hole 24 by means of a laser beam, so that the melted material solidifies into a drilling closure 42 that seals the drilling 38. Figure 2B It can also be seen that in the method described here, the drilling 38 stops at such a distance from the cavity 22 that there is no need to worry about damaging the at least one MEMS structure element 18a and 18b arranged in the cavity 22 and / or the application-specific integrated circuit constructed adjacent to the cavity 22.

[0035] about Figure 2A and 2B For further features and advantages of the method, refer to FIGS. 1a to Figure 1C 's explanation.

[0036] Figure 3A and 3B A schematic representation of an intermediate or end product is shown for explaining a third specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack.

[0037] Unlike the previously described embodiments, Figure 3A and 3B In the method, a borehole 38 is drilled into an access channel 44, which extends through a part of the semiconductor layer stack 10 parallel to the drilling start surface 26 and is formed in the substrate 16, which is located on the side of the cavity 22 pointing away from the drilling start surface 26 (see Figure 3A ).like Figure 3B As shown, the borehole 38 therefore also extends through the hollow space, which is surrounded by the semiconductor layer stack 10 (already before the formation of the first partial borehole 24). Preferably, the hollow space 46 is located together with the cavity 22 in a common plane 48 of the semiconductor layer stack 10, but is sealed by the cavity 22 in a particle-tight or air-tight manner within this common plane by means of at least one partition wall element 50. Therefore, there is no need / hardly any need to worry about particles or fumes generated by laser drilling penetrating into the cavity 22 via the hollow space 46. In particular, the plane 38 formed by means of the hollow space 46 and the cavity 22 can be understood as the plane 48 of the semiconductor layer stack 10 located between the two substrates 12 and 16, for example, in particular between the ASIC substrate 12 and the MEMS substrate 16.

[0038] about Figure 3A and3B For further features of the method and its advantages, reference is made to the description of FIGS. 1 and 2 .

[0039] Figure 4 A schematic representation of an intermediate or end product is shown for explaining a fourth specific embodiment of a method for forming a borehole for a cavity arranged in a semiconductor layer stack.

[0040] In the embodiment described here, the borehole 38 is drilled until the entry channel 44, which extends parallel to the initial surface 26 of the borehole and is framed by the cavity 22. In particular, the entry channel 44 can be constructed between the first material layer 52 and the second material layer 53, wherein at least one MEMS structural element 18a and 18b is at least partially formed by the first material layer 52 and / or the second material layer 53. Similarly, the entry channel 44 can be constructed in a material layer (not shown), and at least one MEMS structural element 18a and 18b is at least partially formed by the material layer. In these cases, the entry channel 44 also prevents particles and dense smoke from intruding into the cavity 22 undesirably.

[0041] about Figure 4 For further features of the method and its advantages, reference is made to the description of FIGS. 1 and 2 .

[0042] Although in the figures explained above the intermediate products and the end product are shown only as individual structural elements, the method steps explained can also be carried out on the wafer level.

[0043] Semiconductor devices that can be implemented with the help of the present invention can be used in the context of smartphones and tablets, wearable devices, hearables, AR and VR, drones, e-sports and toys, robots, smart homes and in industrial contexts. Possible applications for semiconductor devices of this type can be: wake-up functions for selected device modules, recognition of device orientation, screen orientation and display orientation, recognition of significant movement, impact recognition and free fall recognition, HMI (human machine interface) functions such as multi-tap recognition, activity recognition, gesture recognition, context recognition and user recognition, motion control, gimbal systems, altitude stabilization and azimuth stabilization, aircraft control, image stabilization, internal and external navigation, floor recognition, position tracking and segment recording, PDR (pedestrian coupled navigation), dynamic segment planning, recognition of boundaries and obstacles, indoor SLAM (simultaneous localization and mapping), intrusion monitoring, real-time motion recognition, real-time motion tracking, activity tracking, pedometer, calorie counter, sleep monitoring. Detection of the wearing state of a wearable device (in-ear detection / out-of-ear detection), determination of head orientation and / or head movement, audio applications, speech recognition, keyword recognition, user recognition, active noise reduction, logistics, component tracking, energy management, energy saving measurement, proactive maintenance, monitoring of air quality and climate, mold detection, water level recognition and / or sensor data fusion. In addition, the semiconductor device can be used in the context of automotive applications. Examples are: collision detection, for example in airbag systems, electronic stability program (ESP), vehicle dynamics control (VDC), hill start assist, hill hold control (preventing the vehicle from sliding backwards when starting on a slope), adaptive running gear regulation, smart tires, for example road state monitoring, road noise cancellation, navigation applications, autonomous driving, anti-theft detection, alarm functions, control of tailgate inclination (Heckklappenneigung), optimization of motor control and / or optimization of the combustion process of gasoline-operated or diesel-operated motors.

Claims

1. A method for forming a borehole (38) for a cavity (22) arranged in a semiconductor layer stack (10), the method comprising the following steps: forming a first sub-drilling hole (24) by means of a first laser ablation step starting on an outer surface (26) of the semiconductor layer stack (10), so that the first sub-drilling hole (24) extends partially through the semiconductor layer stack (10) starting from the outer surface (26) with a first average extension (d1) oriented parallel to the outer surface (26) and is configured on a side pointing away from the outer surface (26) to have a bottom surface (24a) of the first sub-drilling hole (24) located between the outer surface (26) and the cavity (22); and A second sub-drilling hole (36) is formed by means of a second laser ablation step starting from the bottom surface (24a) of the first sub-drilling hole (24), so that the second sub-drilling hole (36) extends through the bottom surface (24a) of the first sub-drilling hole (24) with a second average extension (d2) oriented parallel to the outer surface (26) and smaller than the first average extension (d1) until it reaches the cavity (22) or until it reaches an entry channel (44), and the entry channel merges into the cavity (22) or is connected to the cavity (22) via a connecting channel (44a).

2. The method according to claim 1, wherein: The first sub-drill hole (24) and the second sub-drill hole (36) are drilled through a semiconductor substrate (12) of the semiconductor layer stack (10) that bounds the cavity (22), the semiconductor substrate being equipped with at least one circuit layer (14) of an application-specific integrated circuit on its substrate surface (12a) that points away from the outer surface (26) of the semiconductor layer stack (10).

3. The method according to claim 1, wherein: The first sub-drilling hole (24) and the second sub-drilling hole (36) are drilled through a covering substrate of the semiconductor layer stack (10) that bounds the cavity (22).

4. A method according to any one of the preceding claims, wherein: The second sub-drilling hole (36) is drilled into the access channel (44), which extends through a portion of the semiconductor layer stack (10) parallel to the outer surface (26) of the semiconductor layer stack (10).

5. A method according to any one of the preceding claims, wherein: The first partial borehole (24) and the second partial borehole (36) are aligned with one another in such a way that a common central longitudinal axis (28) can be defined for the first partial borehole (24) and the second partial borehole (36).

6. The method according to claim 5, wherein: A first length (l1) of the first sub-drilling hole (24) along the common central longitudinal axis (28) is greater than a second length (l1) of the second sub-drilling hole (36) along the common central longitudinal axis (28) by at least a factor of 2.

7. A method according to any one of the preceding claims, wherein: The first sub-drilling hole (24) is constructed with a first average extension (d1) oriented parallel to the outer surface (26), the first average extension being greater than a second average extension (d2) by at least a factor of 2, and the second sub-drilling hole (36) is constructed parallel to the outer surface (26) with the second average extension.

8. A method for encapsulating pressure and / or a medium in a cavity (22) arranged in a semiconductor layer stack (10), the method comprising the following steps: According to the method according to any of the preceding claims, a borehole (38) is formed for a cavity (22) arranged in the semiconductor layer stack (10); and When the pressure and / or the medium is present in the cavity (22), the borehole (38) is closed by melting a wall region of the first sub-drilled hole (24) and / or the second sub-drilled hole (36) of the borehole (38) adjacent to a bottom surface (24a) of the first sub-drilled hole (24) of the borehole (38) by means of a laser beam.

9. A semiconductor layer stack (10), comprising: a cavity (22) arranged in the semiconductor layer stack (10); and A borehole (38), the borehole comprising: a first sub-drilling hole (24) having a laser ablation mark, which extends partially through the semiconductor layer stack (10) starting from an outer surface (26) of the semiconductor layer stack (10) with a first average extension (d1) oriented parallel to the outer surface (26) and has at least a remaining part of a bottom surface (24a) of the first sub-drilling hole (24) located between the outer surface (26) and the cavity (22) on a side pointing away from the outer surface (26); and - A second sub-drilling hole (36) having a laser ablation mark, so that the second sub-drilling hole (36) extends through the bottom surface (24a) of the first sub-drilling hole (24) with a second average extension (d2) oriented parallel to the outer surface (26) and smaller than the first average extension (d1) until it reaches the cavity (22) or until it reaches an entry channel (44), and the entry channel merges into the cavity (22) or is connected to the cavity (22) via a connecting channel (44a).

10. A semiconductor layer stack (10), comprising: a cavity (22) arranged in the semiconductor layer stack (10); and a drilling closure (42), which is formed by a melted and solidified part of the semiconductor layer stack (10), and is located between a first sub-drilling hole (24) having a laser ablation mark and a second sub-drilling hole (36) having a laser ablation mark; in, The first sub-drilling hole (24) extends partially through the semiconductor layer stack (10) from the outer surface (26) with a first average extension (d1) oriented parallel to the outer surface (26), and the second sub-drilling hole (36) extends with a second average extension (d2) oriented parallel to the outer surface (26) and smaller than the first average extension (d1) into the cavity (22) or into an entry channel (44), which merges into the cavity (22) or is connected to the cavity (22) via a connecting channel (44a).

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