A repair method for an integrated circuit

Abstract

The application discloses a repair method of an integrated circuit, and relates to the technical field of integrated circuits, which aims to improve the real-time performance, repair accuracy and repair effect of the aging repair of the integrated circuit, thereby improving the performance of the integrated circuit in a long-time working process. The repair method of the integrated circuit comprises the following steps: firstly, providing an integrated circuit to be repaired. Next, a first performance correlation parameter and a performance degradation correlation parameter of the integrated circuit to be repaired are obtained; and a circuit aging model is established. Next, the integrated circuit to be repaired is simulated to determine a transistor to be repaired in the integrated circuit to be repaired and a first fault time. Next, a second performance correlation parameter of the transistor to be repaired is obtained. Next, a repair parameter corresponding to the transistor to be repaired is determined. Next, a gate-induced drain leakage current repair mode is adopted, and the transistor to be repaired is repaired according to the first fault time and the repair parameter.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a method for repairing integrated circuits. Background Technology

[0002] Integrated circuits (ICs) experience performance degradation after prolonged operation, potentially preventing them from functioning properly within their designed lifespan. Therefore, in the overall design of ICs, optimization based on post-production testing is necessary to extend their lifespan.

[0003] In existing technologies, repairing aging integrated circuits typically involves performing lifetime testing on the integrated circuit after manufacturing, and then statistically analyzing the aging process during actual applications to identify the causes of failure. The device and structural parameters are then optimized to extend the lifespan. This repair method requires actual lifetime testing and parameter adjustments based on post-production aging conditions, essentially amounting to a redesign of the integrated circuit. The testing and parameter modification process consumes significant time and produces a large number of short-lived integrated circuits, resulting in low efficiency and a lack of real-time capability. Furthermore, the limitations of parameter adjustment methods make it difficult to accurately and effectively extend the lifespan of integrated circuits, thus impacting their performance during long-term operation. Summary of the Invention

[0004] The purpose of this invention is to provide a method for repairing integrated circuits, which improves the real-time performance, repair accuracy, and repair effect of aging repair of integrated circuits, thereby improving the performance of integrated circuits during long-term operation.

[0005] To achieve the above objectives, the present invention provides the following technical solution: First, an integrated circuit to be repaired is provided. Next, a first performance correlation parameter and a performance degradation correlation parameter of the integrated circuit to be repaired are obtained; and a circuit aging model is established based on the first performance correlation parameter. Next, the integrated circuit to be repaired is simulated to obtain simulated performance correlation parameters; and based on the circuit aging model, the simulated performance correlation parameters, and the performance degradation correlation parameters, the transistor to be repaired and the first fault time in the integrated circuit to be repaired are determined. Next, a second performance correlation parameter of the transistor to be repaired is obtained. Next, the repair parameters of the transistor to be repaired are determined based on the second performance correlation parameter, the simulated performance correlation parameters, and the performance degradation correlation parameters. Next, a gate-induced drain leakage current repair method is used, and the transistor to be repaired is repaired based on the first fault time and the repair parameters.

[0006] Using the above technical solution, before repairing the integrated circuit to be repaired, a first performance correlation parameter and a performance degradation correlation parameter are obtained in advance. The first performance correlation parameter characterizes the operating state of the integrated circuit and the corresponding operating parameters under that state. Based on this, a circuit aging model of the individual transistors in the integrated circuit to be repaired is established according to the first performance correlation parameter. This facilitates targeted aging assessment of the integrated circuit to be repaired, accurately determining the performance degradation of each transistor and improving simulation accuracy. Furthermore, the performance degradation correlation parameter serves as a threshold standard for judging the integrated circuit to be repaired. Then, based on the obtained simulation performance correlation parameter (i.e., the simulation result), a comparison is made with the performance degradation correlation parameter to determine the aging condition and first fault time of each transistor in the integrated circuit to be repaired. If the simulation performance correlation parameter of a certain transistor meets the degradation standard in the performance degradation correlation parameter, that part is identified as a transistor to be repaired, and the transistor to be repaired is repaired in the subsequent repair process. Secondly, the ratio of simulation performance correlation parameters to performance degradation correlation parameters is used as a parameter to measure the degradation status of the transistor to be repaired, facilitating subsequent repair. The first fault time is considered to be the time after which the simulation performance correlation parameters of the transistor to be repaired meet the degradation criteria in the performance degradation correlation parameters. Next, the second performance correlation parameters of the transistor to be repaired are obtained. These second performance correlation parameters serve as the basic device parameters of the transistor to be repaired and will be used as the basis for determining the specific means of subsequent repair methods. Following this, based on the second performance correlation parameters, simulation performance correlation parameters, and performance degradation correlation parameters, the degradation status of the transistor to be repaired is obtained. Combined with the degradation status of the transistor to be repaired and its basic device parameters, the repair parameters for repairing the transistor to be repaired are determined. Finally, based on the first fault time and the repair parameters, the gate-induced drain leakage current repair method is used to repair the transistor to be repaired. Compared to the existing technology that uses thermal annealing to repair aged transistors, this method requires thermal annealing of the entire integrated circuit to be repaired, inevitably interrupting the normal operation of the system using the integrated circuit to be repaired, resulting in a longer repair time. The present invention uses a gate-induced drain leakage current repair method to repair the transistor to be repaired. Compared with the prior art, it can repair the integrated circuit to be repaired without interrupting the normal operation of the system using the integrated circuit to be repaired, which greatly reduces the repair time.Furthermore, the repair method provided by this invention does not involve remanufacturing the integrated circuit after adjusting its device parameters. This solves the problems of low efficiency and low real-time performance of the indirect repair method in the prior art, which requires testing after the integrated circuit is manufactured to adjust the parameters and extend the life of the integrated circuit. Moreover, since the repair is performed directly on the transistor to be repaired, the problem of low repair accuracy and poor repair caused by low simulation results can be solved by using more conservative repair parameters, thereby improving the performance of the integrated circuit to be repaired during long-term operation.

[0007] As one possible implementation, the first performance-related parameters include: design operating temperature, design maximum voltage stress, design operating time, design threshold voltage, design saturation leakage current, and design circuit turn-on delay time.

[0008] When using the above technical solution, the first performance correlation parameter serves as the parameter for ensuring the normal operation of the integrated circuit to be repaired. It is used to establish a circuit aging model, which is then used for simulation. In this case, the design operating temperature, design maximum voltage stress, and design operating time can comprehensively characterize the operating state of the integrated circuit to be repaired. The integrated circuit to be repaired needs to operate at the design operating temperature for at least the designed continuous operating time. Parameters such as the design threshold voltage, design saturation leakage current, and design circuit turn-on delay time can comprehensively characterize the various parameters required by the integrated circuit to be repaired under its operating state. This allows the circuit aging model established based on the first performance correlation parameter to accurately characterize the actual situation of the integrated circuit to be repaired, improving the accuracy of the simulation results and enhancing the repair effect of the repair method provided by this invention.

[0009] As one possible implementation, the performance degradation-related parameters include: circuit type, degradation threshold voltage, degradation saturation leakage current, and degradation circuit turn-on delay time; wherein, the circuit type includes: memory, arithmetic unit, or amplifier.

[0010] When the above technical solution is adopted, the performance degradation correlation parameter is used as a standard to judge the aging condition of the integrated circuit to be repaired. Based on four parameters, namely circuit type, degradation threshold voltage, degradation saturation leakage current and degradation circuit conduction delay time, the standard for determining the aging condition of the integrated circuit to be repaired can comprehensively characterize the various parameters required by the integrated circuit to be repaired in the working state. This makes the judgment result of using the performance degradation correlation parameter to judge the integrated circuit to be repaired more effective, can accurately identify the transistor to be repaired, and is conducive to improving the repair effect of the repair method provided by the present invention.

[0011] As one possible implementation, when the integrated circuit to be repaired is a memory, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%. When the integrated circuit to be repaired is an arithmetic logic unit (ALU), the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%. When the integrated circuit to be repaired is an amplifier, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%.

[0012] When the above technical solution is adopted, since different types of integrated circuits to be repaired have different uses, the fault standards of different types of integrated circuits to be repaired on different parameters may be the same or different. Therefore, according to the working characteristics of different types of integrated circuits to be repaired, appropriate fault standards are selected on different parameters, thereby improving the pertinence of the repair method provided by the present invention and ultimately improving the effect of the integrated circuit repair method provided by the present invention.

[0013] As one possible implementation, the second performance-related parameters include: the drop in threshold voltage, subthreshold swing, transconductance, electric field intensity distribution, saturation leakage current, overlap length between gate and drain regions, and gate dielectric layer thickness.

[0014] In the above-described scheme, the second performance correlation parameter serves as the device parameter of the transistor to be repaired. During subsequent repair of the transistor, this second performance correlation parameter is used in conjunction with the repair parameters to address device aging. Common device aging issues include hot carrier degradation (HCD), which originates from heating and subsequent carrier injection into the gate oxide layer. This leads to the formation of localized and non-uniform interface states and oxide charge accumulation near the transistor's drain junction. The resulting defects can cause threshold voltage drift, transconductance degradation, and reduced leakage current, ultimately leading to device failure. Furthermore, because the lateral electric field near the drain junction causes carrier heating and avalanche, and this lateral electric field affects carrier injection into the gate oxide layer, the electric field distribution within the transistor also significantly influences hot carrier degradation. In this case, specific parameters such as the drop in threshold voltage, subthreshold swing, transconductance, electric field intensity distribution, drop in saturation leakage current, overlap length between gate and drain regions, and gate dielectric layer thickness are used as device parameters of the transistor to be repaired. These parameters can effectively characterize the hot carrier degradation of the transistor to be repaired, thereby facilitating accurate calculation of the first fault time and repair parameters, and improving the repair effect of the repair method provided by this invention.

[0015] As one possible implementation, the relationships in the circuit aging model include:

[0016] Where Vth is the threshold voltage, A is the threshold voltage degradation parameter 1, k is the Boltzmann constant, T is the operating temperature, Vg is the stress bias, b is the threshold voltage degradation parameter 2, t is the operating time, and n is the time exponent.

[0017] When the above scheme is adopted, the establishment of the circuit aging model is used to determine the parameters. V th The specific value. In this case, the threshold voltage in the circuit aging model can effectively characterize the aging condition of the integrated circuit to be repaired using the above relationship. The circuit aging model is more accurate, which is beneficial to improving the repair effect of the repair method provided by the present invention.

[0018] As one possible implementation, the transistor to be repaired and the first fault time in the integrated circuit to be repaired are determined based on the circuit aging model, simulation performance correlation parameters, and performance degradation correlation parameters. This includes: calculating the first fault time based on the circuit aging model and performance degradation correlation parameters; and determining the transistor to be repaired based on the first fault time and simulation performance correlation parameters.

[0019] Using the above scheme, the accurate first fault time can be obtained. Subsequent repair of the transistor to be repaired based on the first fault time can ensure that the performance degradation of the transistor to be repaired does not exceed the design value, thereby ensuring the effectiveness of the repair method provided by the present invention.

[0020] As one possible implementation, simulation performance-related parameters include: circuit type, simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time. Repair parameters include: gate-drain voltage and repair time.

[0021] When using the above scheme, the simulation performance correlation parameters are the results of the circuit aging model simulation. These parameters have the same parameter type as the performance degradation correlation parameters. Comparing them allows for a more effective assessment of the aging condition of the integrated circuit to be repaired and the transistors within it. The repair parameters serve as the operational parameters for subsequent repairs. Since the repair method provided by this invention uses a gate-induced drain leakage current repair method, obtaining the gate-drain voltage and repair time used during repair can further improve the repair effect and ensure that the repair effect meets design expectations.

[0022] As one possible implementation, the repair parameters of the transistor to be repaired are determined based on the second performance correlation parameters, the simulation performance correlation parameters, and the performance degradation correlation parameters. These parameters include: determining the gate-drain voltage and repair time in the repair parameters based on the threshold voltage drop, subthreshold swing, transconductance, electric field intensity distribution, saturation leakage current drop, overlap length between the gate and drain regions, and gate dielectric layer thickness in the second performance correlation parameters, and the simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time in the simulation performance correlation parameters.

[0023] In the above-described scheme, the gate-drain voltage and repair time in the repair parameters are obtained through a combination of analysis of the threshold voltage drop, subthreshold swing, transconductance, electric field distribution, saturation leakage current drop, overlap length between the gate and drain regions, gate dielectric layer thickness, and simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time in the second performance correlation parameters. These parameters are then used to repair the transistor to be repaired. Based on the threshold voltage, subthreshold swing, saturation leakage current, overlap length between the gate and drain regions, gate dielectric layer thickness, and simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time in the second performance correlation parameters, the gate-drain voltage and repair time during transistor repair can be accurately determined, improving the repair effect of the integrated circuit repair method provided by this invention.

[0024] As one possible implementation, a gate-induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and repair parameters, including: after timing reaches the first fault time, according to the repair parameters, the gate, source and substrate of the transistor to be repaired are set to low level, and the drain of the transistor to be repaired is set to high level to induce gate-induced drain leakage current; timing is restarted and the above operation is repeated.

[0025] When the above scheme is adopted, after the first fault time is reached, the gate-induced drain leakage current is used to repair the transistor to be repaired. The repair method is relatively simple, and the corresponding repair circuit is also relatively simple. This can reduce the design difficulty of the integrated circuit repair method provided by the present invention, and reduce the design overhead and power consumption of the repair circuit.

[0026] As one possible implementation, a gate-induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to a first fault time and repair parameters. This includes: after timing to the first fault time, performing real-time performance testing on the transistor to be repaired to obtain a third performance correlation parameter; and determining the current performance degradation ratio based on the third performance correlation parameter and the performance degradation correlation parameter. Next, if the current performance degradation ratio is greater than or equal to a performance degradation threshold, the gate, source, and substrate of the transistor to be repaired are placed at a low level, and the drain of the transistor to be repaired is placed at a high level, inducing a gate-induced drain leakage current. Next, if the current performance degradation ratio is less than the performance degradation threshold, a second fault time is determined based on the third performance correlation parameter and the performance degradation correlation parameter; and after timing to the second fault time, the gate, source, and substrate of the transistor to be repaired are placed at a low level, and the drain of the transistor to be repaired is placed at a high level, inducing a gate-induced drain leakage current; and the first fault time is updated based on the second fault time. Timing is restarted, and the above operations are repeated.

[0027] In the above-described scheme, the second fault time and the first fault time have the same starting point. Furthermore, the performance degradation threshold can be obtained manually based on actual needs, or it can be a threshold value including the difference between the degradation threshold voltage and the design threshold voltage, the degradation ratio between the degradation saturation leakage current and the design saturation leakage current, and a threshold value where the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to a certain threshold value. The third performance correlation parameter includes the threshold voltage, saturation leakage current, and circuit turn-on delay time of the transistor to be repaired. Determining the current performance degradation ratio based on the third performance correlation parameter and the performance degradation correlation parameter involves determining the current performance degradation ratio of the threshold voltage, saturation leakage current, and circuit turn-on delay time of the transistor to be repaired, and determining whether this current performance degradation ratio exceeds the aforementioned performance degradation threshold values ​​included in the performance degradation correlation parameter. In this case, the present invention provides another repair method, improving the applicability of the integrated circuit repair method provided by the present invention. Furthermore, since the transistor to be repaired is subjected to real-time performance testing and a third performance correlation parameter is obtained before repair, the current performance degradation ratio is determined based on the third performance correlation parameter and the performance degradation correlation parameter. The transistor to be repaired is only repaired when the current performance degradation ratio is greater than or equal to the performance degradation threshold, which reduces the number of repairs and avoids damage to the structure of the transistor device to be repaired due to invalid repairs or multiple repairs, thus effectively extending the life of the integrated circuit to be repaired.

[0028] As one possible implementation, the gate-induced drain leakage current repair method, and the repair of the transistor to be repaired based on the first fault time and repair parameters, further includes: using the gate-induced drain leakage current repair method, and using a repair circuit to repair the transistor to be repaired based on the first fault time and repair parameters; the repair circuit includes: a timer and a repair module; the timer is triggered every first fault time; the repair module is connected to at least the gate, source, drain, and substrate of the transistor to be repaired; after the timer is triggered, the repair module tests the performance of the transistor to be repaired to obtain a third performance correlation parameter; and determines the current performance degradation based on the third performance correlation parameter and the performance degradation correlation parameter. The performance degradation ratio is determined as follows: If the current performance degradation ratio is greater than or equal to the performance degradation threshold, the repair module sets the gate, source, and substrate of the transistor to be repaired to a low level and the drain of the transistor to be repaired to a high level, based on the repair parameters, thus inducing gate-induced drain leakage current. If the current performance degradation ratio is less than the performance degradation threshold, the second fault time is determined based on the third performance correlation parameter and the performance degradation correlation parameter. After the timer reaches the second fault time, the repair module sets the gate, source, and substrate of the transistor to be repaired to a low level and the drain of the transistor to be repaired to a high level, based on the repair parameters, thus inducing gate-induced drain leakage current. The first fault time is updated based on the second fault time.

[0029] When adopting the above scheme, please refer to the relevant description of the beneficial effects of "after the timer reaches the first fault time, ... and repeat the above operation" in the previous text, which will not be repeated here. Attached Figure Description

[0030] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0031] Figure 1 A flowchart illustrating an integrated circuit repair method provided in an embodiment of the present invention;

[0032] Figure 2 This is a flowchart of one embodiment of the gate-induced drain leakage current repair method in this invention.

[0033] Figure 3 A flowchart of another implementation scheme of the gate-induced drain leakage current repair method in this invention. Detailed Implementation

[0034] To make the technical problems, technical solutions, and beneficial effects of the embodiments of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the embodiments of the present invention and are not intended to limit the embodiments of the present invention.

[0035] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of the present invention, "a plurality of" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.

[0037] In the description of the embodiments of the present invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of the present invention.

[0038] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of the present invention according to the specific circumstances.

[0039] The purpose of this invention is to provide a method for repairing integrated circuits, which improves the real-time performance and speed of integrated circuit aging design, thereby improving the performance of the integrated circuit to be repaired during long-term operation.

[0040] Integrated circuits (ICs) experience performance degradation after prolonged operation, potentially preventing them from functioning properly within their designed lifespan. Therefore, in the overall design of ICs, optimization based on post-production testing is necessary to extend their lifespan.

[0041] In existing technologies, repairing aging integrated circuits typically involves performing lifetime testing on the integrated circuit after manufacturing, and then statistically analyzing the aging process during actual application to identify the causes of failure. The device and structural parameters are then optimized to extend the lifespan. However, this repair method requires actual lifetime testing and parameter adjustments based on post-production aging data. It essentially involves redesigning the integrated circuit rather than directly modifying or repairing a pre-designed and manufactured circuit. The testing and parameter modification process consumes significant time and produces a large number of short-lived integrated circuits, resulting in low efficiency and a lack of real-time capability. Furthermore, the limitations of parameter adjustment methods make it difficult to accurately and effectively extend the lifespan of integrated circuits, thus impacting their performance during long-term operation.

[0042] Furthermore, in the existing technology, the design of integrated circuits uses simulation program with integrated circuit emulation (SPICE) models to adjust parameters. However, SPICE models generally do not have circuit aging models or only have incomplete circuit aging models. Aging design still needs to be achieved through the above-mentioned post-production testing and statistical methods, which still have the same defects and cannot effectively repair integrated circuits.

[0043] To improve the efficiency, real-time performance, repair accuracy, and repair effect of integrated circuit aging repair methods, thereby enhancing the performance of the integrated circuits to be repaired during long-term operation, please refer to [the relevant documentation / reference]. Figure 1 This invention provides a method for repairing an integrated circuit. The method includes the following steps: First, providing an integrated circuit to be repaired. Next, obtaining first performance correlation parameters and performance degradation correlation parameters of the integrated circuit to be repaired, and establishing a circuit aging model based on the first performance correlation parameters. Next, simulating the integrated circuit to be repaired according to the circuit aging model to obtain simulated performance correlation parameters, and determining the transistors to be repaired in the integrated circuit based on the simulated performance correlation parameters and performance degradation correlation parameters. Next, obtaining second performance correlation parameters of the transistors to be repaired. Next, determining the first fault time and repair parameters of the transistors to be repaired based on the second performance correlation parameters, the simulated performance correlation parameters, and the performance degradation correlation parameters. Finally, using a gate-induced drain leakage current repair method, and repairing the transistors to be repaired according to the first fault time and repair parameters.

[0044] Using the above technical solution, before repairing the integrated circuit to be repaired, a first performance correlation parameter and a performance degradation correlation parameter are obtained in advance. The first performance correlation parameter characterizes the operating state of the integrated circuit and the corresponding operating parameters under that state. Based on this, a circuit aging model of the individual transistors in the integrated circuit to be repaired is established according to the first performance correlation parameter. This facilitates targeted aging assessment of the integrated circuit to be repaired, accurately determining the performance degradation of each transistor and improving simulation accuracy. Furthermore, the performance degradation correlation parameter serves as a threshold standard for judging the integrated circuit to be repaired. Then, based on the obtained simulation performance correlation parameter (i.e., the simulation result), a comparison is made with the performance degradation correlation parameter to determine the aging condition and first fault time of each transistor in the integrated circuit to be repaired. If the simulation performance correlation parameter of a certain transistor meets the degradation standard in the performance degradation correlation parameter, that part is identified as a transistor to be repaired, and the transistor to be repaired is repaired in the subsequent repair process. Secondly, the ratio of simulation performance correlation parameters to performance degradation correlation parameters is used as a parameter to measure the degradation status of the transistor to be repaired, facilitating subsequent repair. The first fault time is considered to be the time after which the simulation performance correlation parameters of the transistor to be repaired meet the degradation criteria in the performance degradation correlation parameters. Next, the second performance correlation parameters of the transistor to be repaired are obtained. These second performance correlation parameters serve as the basic device parameters of the transistor to be repaired and will be used as the basis for determining the specific means of subsequent repair methods. Following this, based on the second performance correlation parameters, simulation performance correlation parameters, and performance degradation correlation parameters, the degradation status of the transistor to be repaired is obtained. Combined with the degradation status of the transistor to be repaired and its basic device parameters, the repair parameters for repairing the transistor to be repaired are determined. Finally, based on the first fault time and the repair parameters, the gate-induced drain leakage current repair method is used to repair the transistor to be repaired. Compared to the existing technology that uses thermal annealing to repair aged transistors, this method requires thermal annealing of the entire integrated circuit to be repaired, inevitably interrupting the normal operation of the system using the integrated circuit to be repaired, resulting in a longer repair time. The present invention uses a gate-induced drain leakage current repair method to repair the transistor to be repaired. Compared with the prior art, it can repair the integrated circuit to be repaired without interrupting the normal operation of the system using the integrated circuit to be repaired, which greatly reduces the repair time.Furthermore, the repair method provided by this invention does not involve remanufacturing the integrated circuit after adjusting its device parameters. This solves the problems of low efficiency and low real-time performance of the indirect repair method in the prior art, which requires testing after the integrated circuit is manufactured to adjust the parameters and extend the life of the integrated circuit. Moreover, since the repair is performed directly on the transistor to be repaired, the problem of low repair accuracy and poor repair caused by low simulation results can be solved by using more conservative repair parameters, thereby improving the performance of the integrated circuit to be repaired during long-term operation.

[0045] In practical applications, the embodiments of this invention do not specifically limit the type of integrated circuit to be repaired, as long as its performance degradation can be repaired using the gate-induced drain leakage current repair method. For example, the integrated circuit to be repaired can be a memory, an arithmetic unit, an amplifier, or other possible types.

[0046] Next, the first performance correlation parameters and performance degradation correlation parameters of the integrated circuit to be repaired are obtained; and a circuit aging model is established based on the first performance correlation parameters.

[0047] The aforementioned first performance correlation parameter is used to characterize the operating state of the integrated circuit to be repaired and the corresponding operating parameters under that operating state, effectively supporting the establishment of the circuit aging model. The specific parameter types included in the first performance correlation parameter can be determined according to the type of integrated circuit and the actual application scenario; this embodiment of the invention does not impose specific limitations on them.

[0048] For example, the first performance-related parameters may include the design operating temperature, design maximum voltage stress, design operating time, design threshold voltage, design saturation leakage current, and design circuit turn-on delay time. In this case, the parameters such as the design threshold voltage, design saturation leakage current, and design circuit turn-on delay time can comprehensively characterize the various parameters required by the integrated circuit to be repaired under operating conditions. This allows the circuit aging model established based on the first performance-related parameters to accurately characterize the actual situation of the integrated circuit to be repaired, improving the accuracy of simulation results and enhancing the repair effect of the repair method provided in this embodiment of the invention.

[0049] The aforementioned design threshold voltage, design saturation leakage current, and design circuit turn-on delay time can be calculated from the design parameters of the integrated circuit to be repaired, or obtained by means of measurement, for example, using an oscilloscope.

[0050] The above-mentioned design operating temperature, design maximum voltage stress, and design operating time are design values ​​when designing the integrated circuit to be repaired. The integrated circuit to be repaired must, after operating at the design operating temperature and under the design maximum voltage stress for at least the design operating time, still maintain the design threshold voltage, design saturation leakage current, and design circuit turn-on delay time within the degradation range specified by the performance degradation associated parameters.

[0051] Regarding the relationship in the circuit aging model described above, the embodiments of the present invention are not limited to a relationship for threshold voltage; they may also include relationships for saturation leakage current and conduction delay time. For example, when the relationship in the circuit aging model is a relationship for threshold voltage, the relationship is: Where Vth is the threshold voltage, A is the threshold voltage degradation parameter 1, k is the Boltzmann constant, T is the operating temperature, Vg is the stress bias, b is the threshold voltage degradation parameter 2, t is the operating time, and n is the time exponent.

[0052] When the above scheme is adopted, the establishment of the circuit aging model is used to determine the parameters. V th The specific value. In this case, the threshold voltage in the circuit aging model can effectively characterize the aging condition of the integrated circuit to be repaired using the above relationship. The circuit aging model is more accurate, which is beneficial to improving the repair effect of the repair method provided in the embodiments of the present invention.

[0053] Furthermore, in one embodiment, the specific method for establishing a circuit aging model based on the first performance correlation parameters, including the design operating temperature, design continuous operating time, design threshold voltage, design saturation leakage current, and design circuit turn-on delay time, is as follows: At different temperatures including the design operating temperature, the maximum design voltage stress is applied to a single transistor in the integrated circuit for continuous testing. After multiple different test times, the specific values ​​of the threshold voltage, saturation leakage current, and circuit turn-on delay time of the transistor are measured. Based on these specific values, statistical software is used to fit the relationship between the threshold voltage, saturation leakage current, and turn-on delay time of the integrated circuit to be repaired and the operating time and operating temperature of the integrated circuit to be repaired to the above-mentioned relationship formula, obtaining the specific values ​​in the relationship formula.

[0054] It should be noted that the methods for determining other relationships in the circuit aging model are largely the same as those for the threshold voltage relationship and the methods for determining parameters, and will not be repeated here.

[0055] As for the aforementioned performance degradation-related parameters, they serve as a standard for judging the aging status of the integrated circuit to be repaired. The specific parameter types included in the performance degradation-related parameters can be based on the type of integrated circuit and the types of judgment parameters required by the gate-induced drain leakage current repair method adopted. This embodiment of the invention does not specifically limit them.

[0056] For example, performance degradation-related parameters include: circuit type, degradation threshold voltage, degradation saturation leakage current, and degradation circuit turn-on delay time. The circuit type includes: memory, arithmetic unit, or amplifier.

[0057] When the above technical solution is adopted, the performance degradation correlation parameter serves as the standard for judging the aging condition of the integrated circuit to be repaired. Based on four parameters—circuit type, degradation threshold voltage, degradation saturation leakage current, and degradation circuit conduction delay time—the standard for determining the aging condition of the integrated circuit to be repaired can comprehensively characterize all parameters required by the integrated circuit to be repaired in its working state. This makes the judgment result of using the performance degradation correlation parameter to judge the integrated circuit to be repaired more effective, can accurately identify the transistor to be repaired, improve the accuracy of simulation results, and help improve the repair effect of the repair method provided in the embodiments of the present invention.

[0058] Specifically, regarding the range of performance degradation-related parameters, when the integrated circuit to be repaired is a memory, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%.

[0059] When the integrated circuit to be repaired is an arithmetic unit, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%.

[0060] When the integrated circuit to be repaired is an amplifier, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%.

[0061] When the above technical solution is adopted, since different types of integrated circuits to be repaired have different uses, the fault standards of different types of integrated circuits to be repaired on different parameters may be the same or different. Therefore, according to the working characteristics of different types of integrated circuits to be repaired, appropriate fault standards are selected on different parameters, thereby improving the pertinence of the repair method provided by the present invention and ultimately improving the effect of the integrated circuit repair method provided by the present invention.

[0062] For example, different types of integrated circuits (ICs) to be repaired may have different fault criteria for different parameters. For instance, if the IC to be repaired is a memory circuit, it is relatively less sensitive to device parameter degradation and can be subject to more lenient fault criteria than if the IC is an arithmetic logic unit (ALU). For example, the difference between the degradation threshold voltage and the design threshold voltage may be greater than or equal to 35mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current may be greater than or equal to 17%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time may be greater than or equal to 35%. If the IC to be repaired is an amplifier, it is more sensitive to device parameter degradation than if the IC is an ALU, and can be subject to more lenient fault criteria. For example, the difference between the degradation threshold voltage and the design threshold voltage may be greater than or equal to 25mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current may be greater than or equal to 10%; and the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time may be greater than or equal to 25%.

[0063] Next, the integrated circuit to be repaired is simulated according to the circuit aging model to obtain the simulation performance correlation parameters; and based on the circuit aging model, simulation performance correlation parameters and performance degradation correlation parameters, the transistor to be repaired and the first fault time in the integrated circuit to be repaired are determined.

[0064] For example, based on the relationships in the circuit aging model described above, the time when the simulation performance correlation parameter of any integrated circuit to be repaired exceeds the performance degradation correlation parameter is calculated, and this time is denoted as the failure duration t0. Then, using integrated circuit simulation software including Cadence, ANSYS, and Empyrean, device simulations are performed on each transistor in the integrated circuit to be repaired to obtain the duty cycle time T1 and the time t during which each transistor bears voltage stress in one duty cycle. The duty cycle is the minimum number of cycles that the integrated circuit to be repaired can repeatedly operate in actual operation. Next, the design duty cycle time is divided by T1 to obtain the design cycle number N. Finally, transistors with t greater than or equal to t0 / N are selected and designated as transistors to be repaired.

[0065] Next, the first fault time is determined based on the failure duration t0 and the actual situation. When repairing the transistor to be repaired, the cumulative time of voltage stress borne by the transistor is timed and compared with the first fault time. In the above implementation scheme, the first fault time can be either the failure duration t0 or earlier or later than the failure duration t0, depending on the actual manufacturing conditions of the integrated circuit to be repaired. Specifically, if it is desired to provide early warning of the aging of the transistor to be repaired and to implement a more conservative repair method, a shorter first fault time, significantly shorter than the failure duration t0, can be selected. Furthermore, the circuit aging model and device simulation are only theoretical simulations. In practical applications, the actual device parameters, actual working environment, and working conditions of different integrated circuits to be repaired after production can be combined with the failure duration t0. The specific value of the first fault time can be adjusted based on the fault warning time, thereby improving the repair accuracy and precision of the repair method provided in this embodiment. For example, if the manufacturing process of the integrated circuit to be repaired is perfect and the yield is high, the first fault time can be appropriately delayed compared to the failure duration t0, thereby reducing the number of repairs and reducing secondary damage caused by repairs, thus further extending the life of the integrated circuit to be repaired; if the manufacturing process of the integrated circuit to be repaired is imperfect and the yield is low, the first fault time can be appropriately advanced compared to the failure duration t0, thereby further ensuring the life of the integrated circuit to be repaired.

[0066] For example, the value range of the first failure time can be greater than or equal to 80% failure duration t0 and less than or equal to 110% failure duration t0.

[0067] The above-mentioned simulation performance correlation parameters are the results of circuit aging model simulation. The simulation performance correlation parameters and the performance degradation correlation parameters have the same parameter type. By comparing them with the performance degradation correlation parameters, the aging status of the integrated circuit to be repaired and the transistors to be repaired in the integrated circuit to be repaired can be determined more effectively.

[0068] For example, simulation performance-related parameters include: circuit type, simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time.

[0069] Next, the second performance-related parameters of the transistor to be repaired are obtained. These second performance-related parameters serve as the device parameters of the transistor to be repaired, and are used in conjunction with these parameters to address device aging during subsequent repairs. Furthermore, for better repair results, different transistors require different second performance-related parameters.

[0070] For example, the second performance-related parameters include: the decrease in threshold voltage, subthreshold swing, transconductance, electric field intensity distribution, the decrease in saturation leakage current, the overlap length between the gate and drain regions, and the gate dielectric layer thickness.

[0071] In the above-described scheme, common device aging, such as hot carrier degradation (HCD), originates from heating and subsequent carrier injection into the gate oxide layer. This leads to the formation of localized and non-uniform interface states and oxide charge accumulation near the transistor drain junction. The resulting defects can cause threshold voltage drift, transconductance degradation, and reduced leakage current, ultimately leading to device failure. Furthermore, the lateral electric field near the drain junction causes carrier heating and avalanche, and this lateral electric field affects carrier injection into the gate oxide layer. The electric field distribution within the transistor also significantly influences the hot carrier degradation. In this case, specific parameters such as the decrease in threshold voltage, subthreshold swing, transconductance, electric field intensity distribution, decrease in saturated leakage current, overlap length between the gate and drain regions, and gate dielectric layer thickness serve as device parameters for the transistor to be repaired. These parameters can effectively characterize the hot carrier degradation of the transistor, thereby facilitating accurate calculation of the first fault time and repair parameters, and improving the repair effect of the repair method provided in this embodiment.

[0072] Next, based on the second performance correlation parameters, simulation performance correlation parameters, and performance degradation correlation parameters, the repair parameters for the transistor to be repaired are determined. Specifically, the gate-drain voltage and repair time in the repair parameters are determined based on the threshold voltage, subthreshold swing, and saturation leakage current in the second performance correlation parameters, and the simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time in the simulation performance correlation parameters, thereby ensuring that subsequent steps in repairing the transistor to be repaired are effective.

[0073] The above-mentioned repair parameters serve as operating parameters for subsequent repairs. Since the repair method provided in this embodiment of the invention uses the gate-induced drain leakage current repair method, obtaining the gate-drain voltage and repair time used during repair can further improve the repair effect and ensure that the repair effect meets the design expectations.

[0074] Optionally, the gate-drain voltage is determined based on at least one of the overlap length between the gate and drain regions of the transistor to be repaired and the thickness of the gate dielectric layer; the repair time is determined based on the degradation of the transistor to be repaired.

[0075] In the above-described scheme, the gate-drain voltage and repair time in the repair parameters are obtained by combining the threshold voltage drop, subthreshold swing, transconductance, electric field intensity distribution, saturation leakage current drop, gate-drain overlap length, gate dielectric layer thickness, and simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time in the second performance correlation parameters. These parameters are then used to repair the transistor to be repaired. Based on the threshold voltage, subthreshold swing, saturation leakage current, gate-drain overlap length, gate dielectric layer thickness, and simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time in the second performance correlation parameters, the gate-drain voltage and repair time during transistor repair can be accurately determined, improving the repair effect of the integrated circuit repair method provided in this embodiment of the invention.

[0076] Next, the gate-induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and repair parameters.

[0077] This invention does not specifically limit the method of repairing the transistor using gate-induced drain leakage current based on the first fault time and repair parameters, but can determine the method based on actual design requirements such as lifespan and power consumption. For example, please refer to... Figure 2 and Figure 3 The integrated circuit repair method provided in this embodiment of the invention offers two possible implementation schemes.

[0078] As one possible implementation method, please refer to Figure 2 The gate-induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and repair parameters. The method includes: after timing reaches the first fault time, according to the repair parameters, the gate, source and substrate of the transistor to be repaired are set to low level, and the drain of the transistor to be repaired is set to high level, inducing the gate-induced drain leakage current. Timing is restarted and the above operation is repeated.

[0079] When the above scheme is adopted, after the first fault time is reached, the gate-induced drain leakage current is used to repair the transistor to be repaired. The repair method is relatively simple, and the corresponding repair circuit is also relatively simple. This can reduce the design difficulty of the integrated circuit repair method provided by the embodiments of the present invention, and reduce the design overhead and power consumption overhead of the repair circuit.

[0080] As another possible implementation, please refer to Figure 3The method employs gate-induced drain leakage current repair and repairs the transistor to be repaired based on a first fault time and repair parameters. This includes: First, after timing to the first fault time, performing real-time performance testing on the transistor to be repaired to obtain a third performance correlation parameter; and determining the current performance degradation ratio based on the third performance correlation parameter and the performance degradation correlation parameter. Next, if the current performance degradation ratio is greater than or equal to a performance degradation threshold, then according to the repair parameters, setting the gate, source, and substrate of the transistor to be repaired to a low level and the drain of the transistor to be repaired to a high level, inducing gate-induced drain leakage current. Next, if the current performance degradation ratio is less than the performance degradation threshold, then determining a second fault time based on the third performance correlation parameter and the performance degradation correlation parameter; and after timing to the second fault time, setting the gate, source, and substrate of the transistor to be repaired to a low level and the drain of the transistor to be repaired to a high level, inducing gate-induced drain leakage current; and updating the first fault time based on the second fault time. Timing is then restarted, and the above operations are repeated.

[0081] In the above-described scheme, the second fault time and the first fault time have the same starting point. Furthermore, the performance degradation threshold can be obtained manually based on actual needs, or it can be a threshold value including the difference between the degradation threshold voltage and the design threshold voltage, a threshold value for the degradation ratio between the degradation saturation leakage current and the design saturation leakage current, and a threshold value where the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to a certain threshold value. The third performance correlation parameter includes the threshold voltage, saturation leakage current, and circuit turn-on delay time of the transistor to be repaired. Determining the current performance degradation ratio based on the third performance correlation parameter and the performance degradation correlation parameter involves determining the current performance degradation ratio of the threshold voltage, saturation leakage current, and circuit turn-on delay time of the transistor to be repaired, and determining whether this current performance degradation ratio exceeds the aforementioned performance degradation threshold values ​​included in the performance degradation correlation parameter. In this case, the embodiments of the present invention provide another repair method, improving the applicability of the integrated circuit repair method provided by the embodiments of the present invention. Furthermore, since the transistor to be repaired is subjected to real-time performance testing and a third performance correlation parameter is obtained before repair, the current performance degradation ratio is determined based on the third performance correlation parameter and the performance degradation correlation parameter. The transistor to be repaired is only repaired when the current performance degradation ratio is greater than or equal to the performance degradation threshold, which reduces the number of repairs and avoids damage to the structure of the transistor device to be repaired due to invalid repairs or multiple repairs, thus effectively extending the life of the integrated circuit to be repaired.

[0082] When applying the integrated circuit repair method provided in the embodiments of the present invention, a repair circuit is typically used to repair the transistor to be repaired based on the first fault time and repair parameters. The embodiments of the present invention do not specifically limit the structure of the repair circuit corresponding to the above-described implementation scheme and the specific functions of each structure; these can be determined based on actual needs such as the power consumption of the repair structure.

[0083] For example, the repair circuit includes: a timer and a repair module; the timer is triggered every first fault time; the repair module is connected to at least the gate, source, drain, and substrate of the transistor to be repaired; after the timer is triggered, the repair module tests the performance of the transistor to be repaired to obtain a third performance correlation parameter; and determines the current performance degradation ratio based on the third performance correlation parameter and the performance degradation correlation parameter; if the current performance degradation ratio is greater than or equal to the performance degradation threshold, according to the repair parameter, the repair module sets the gate, source, and substrate of the transistor to be repaired to a low level and sets the drain of the transistor to be repaired to a high level, triggering a gate-induced drain leakage current; if the current performance degradation ratio is less than the performance degradation threshold, a second fault time is determined based on the third performance correlation parameter and the performance degradation correlation parameter, and after the timer counts to the second fault time, according to the repair parameter, the repair module sets the gate, source, and substrate of the transistor to be repaired to a low level and sets the drain of the transistor to be repaired to a high level, triggering a gate-induced drain leakage current; and updates the first fault time according to the second fault time.

[0084] It should be noted that the voltage difference between the high and low levels mentioned above is determined by the repair parameters.

[0085] The specific type of timer mentioned above can be set according to the actual application scenario. For example, the timer can use the built-in timer of the microcontroller, and the first fault time is stored in the built-in memory of the microcontroller.

[0086] The specific structure of the aforementioned repair module can be configured according to the actual application scenario. For example, the repair module may include a microcontroller, a digital-to-analog converter, and repair circuitry connected to the gate, source, drain, and substrate of the transistor to be repaired. The microcontroller's built-in memory stores repair parameters, performance degradation correlation parameters, a program for acquiring third performance correlation parameters, a program for determining the current performance degradation ratio, and a program for calculating the second fault time.

[0087] When adopting the above scheme, please refer to the relevant description of another possible implementation scheme above for the beneficial effects of this implementation scheme, which will not be repeated here.

[0088] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0089] The above are merely specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.

Claims

1. A repair method of an integrated circuit, characterized by, The method comprises: providing an integrated circuit to be repaired; obtaining first performance-related parameters and performance degradation-related parameters of the integrated circuit to be repaired; establishing a circuit aging model according to the first performance-related parameters; the first performance-related parameters include: design operating temperature, design maximum voltage stress, design operating time, design threshold voltage, design saturation drain current, and design circuit conduction delay time; the performance degradation-related parameters include: circuit type, degradation threshold voltage, degradation saturation drain current, and degradation circuit conduction delay time; wherein the circuit type includes: memory, arithmetic unit, or amplifier; performing simulation on the integrated circuit to be repaired to obtain simulation performance-related parameters; and determining a transistor to be repaired and a first failure time in the integrated circuit to be repaired according to the circuit aging model, the simulation performance-related parameters, and the performance degradation-related parameters; obtaining second performance-related parameters of the transistor to be repaired; the second performance-related parameters include: threshold voltage drop, sub-threshold swing, transconductance, electric field intensity distribution, and saturation drain current drop; determining a repair parameter corresponding to the transistor to be repaired according to the second performance-related parameters, the simulation performance-related parameters, and the performance degradation-related parameters; using a gate-induced drain leakage current repair method, and repairing the transistor to be repaired according to the first failure time and the repair parameter.

2. The integrated circuit repair method of claim 1, wherein: when the integrated circuit to be repaired is a memory, a difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30 mV; a degradation ratio between the degradation saturation drain current and the design saturation drain current is greater than or equal to 15%; and a degradation ratio between the design circuit conduction delay time and the degradation circuit conduction delay time is greater than or equal to 30%; when the integrated circuit to be repaired is an arithmetic unit, a difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30 mV; a degradation ratio between the degradation saturation drain current and the design saturation drain current is greater than or equal to 15%; and a degradation ratio between the design circuit conduction delay time and the degradation circuit conduction delay time is greater than or equal to 30%; when the integrated circuit to be repaired is an amplifier, a difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30 mV; a degradation ratio between the degradation saturation drain current and the design saturation drain current is greater than or equal to 15%; and a degradation ratio between the design circuit conduction delay time and the degradation circuit conduction delay time is greater than or equal to 30%.

3. The repair method of an integrated circuit according to claim 1, characterized by, The relationship of the circuit aging model includes: ; where Vth is the threshold voltage, A is a threshold voltage degradation parameter 1, k is the Boltzmann constant, T is the operating temperature, Vg is the stress bias, b is a threshold voltage degradation parameter 2, t is the operating time, and n is a time exponent. And / or, the determination of the transistor to be repaired and the first failure time in the integrated circuit to be repaired according to the circuit aging model, the simulation performance-related parameters, and the performance degradation-related parameters comprises: calculating the first failure time according to the circuit aging model and the performance degradation-related parameters; and determining the transistor to be repaired according to the first failure time and the simulation performance-related parameters.

4. The repair method of an integrated circuit according to claim 1, characterized by, The simulation performance correlation parameters include: circuit type, simulation threshold voltage, simulation saturation drain current and simulation circuit conduction delay time. The repair parameters include: gate-drain voltage and repair time.

5. The repair method of an integrated circuit according to claim 4, characterized by, The method further comprises: According to the decrease of threshold voltage, subthreshold swing, transconductance, electric field intensity distribution, the decrease of saturation drain current, the overlap length of gate region and drain region, gate dielectric layer thickness in the second performance correlation parameters and the simulation threshold voltage, simulation saturation drain current and simulation circuit conduction delay time in the simulation performance correlation parameters, the gate-drain voltage and repair time in the repair parameters are determined.

6. The repair method of an integrated circuit according to claim 1, characterized by, The method further comprises: After timing to the first failure time, the gate, source and substrate of the transistor to be repaired are set to low level, the drain of the transistor to be repaired is set to high level according to the repair parameters, and gate-induced drain leakage current is induced. The timing is restarted, and the above operation is repeated.

7. The repair method of an integrated circuit according to claim 1, characterized by, The method further comprises: After timing to the first failure time, real-time performance test is performed on the transistor to be repaired, and third performance correlation parameters are obtained; and the current performance degradation ratio is determined according to the third performance correlation parameters and the performance degradation correlation parameters. If the current performance degradation ratio is greater than or equal to the performance degradation threshold, the gate, source and substrate of the transistor to be repaired are set to low level, the drain of the transistor to be repaired is set to high level according to the repair parameters, and gate-induced drain leakage current is induced. If the current performance degradation ratio is less than the performance degradation threshold, the second failure time is determined according to the third performance correlation parameters and the performance degradation correlation parameters; and after timing to the second failure time, the gate, source and substrate of the transistor to be repaired are set to low level, the drain of the transistor to be repaired is set to high level according to the repair parameters, and gate-induced drain leakage current is induced; and the first failure time is updated according to the second failure time. The timing is restarted, and the above operation is repeated.

8. The repair method of an integrated circuit according to claim 7, characterized by, The method further comprises: The repair circuit comprises: a timer and a repair module; the timer is triggered every first failure time; and the repair module is connected with at least the gate, source, drain and substrate of the transistor to be repaired. ​ After the timer triggers, the repair module tests the performance of the transistor to be repaired to obtain a third performance correlation parameter; and judges a current performance degradation ratio according to the third performance correlation parameter and the performance degradation correlation parameter; If the current performance degradation ratio is greater than or equal to a performance degradation threshold, according to the repair parameter, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level, sets the drain of the transistor to be repaired to a high level, and triggers gate-induced drain leakage current; If the current performance degradation ratio is less than the performance degradation threshold, the second fault time is determined according to the third performance correlation parameter and the performance degradation correlation parameter, and after the timer counts to the second fault time, according to the repair parameter, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level, sets the drain of the transistor to be repaired to a high level, and triggers gate-induced drain leakage current; and the first fault time is updated according to the second fault time.

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