Semiconductor device

Abstract

The invention relates to a semiconductor device, and aims to provide a semiconductor device capable of improving short circuit tolerance. A semiconductor manufacturing apparatus according to the present invention includes: a semiconductor substrate having a semiconductor element formed on a surface thereof; a surface electrode formed on the surface and connected to the semiconductor element; a metal film formed on the surface electrode; a suppression film which is formed on the surface electrode and suppresses the expansion of the solder applied on the metal film; and a heat-conducting film which is formed on the surface electrode on the outer peripheral side of the metal film and the suppression film, and which is thicker than the metal film and has a higher thermal conductivity than the suppression film.

Description

Technical Field

[0001] The present invention relates to semiconductor devices. Background Art

[0002] A technique is disclosed in which the tip of a surface electrode formed on a conductive region of a semiconductor device is covered with a protective film and the surface electrode and an external electrode are bonded together with solder (for example, see Patent Document 1).

[0003] Patent Document 1: Japanese Patent No. 4640345

[0004] However, when the thermal conductivity of the protective film is low, the overlapping region of the protective film and the conductive region generates heat in conjunction with an overload such as a short-circuit withstand test. This heat generation reduces the short-circuit withstand capacity in the overlapping region. Summary of the invention

[0005] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor device capable of improving short-circuit tolerance.

[0006] The semiconductor device to which the present invention relates comprises: a semiconductor substrate having a semiconductor element formed on its surface; a surface electrode formed on the surface and connected to the semiconductor element; a metal film formed on the surface electrode; an inhibition film formed on the surface electrode and inhibiting the spread of solder applied on the metal film; and a thermally conductive film formed on the surface electrode on the outer peripheral side compared with the metal film and the inhibition film, the thermally conductive film being thicker than the metal film and having a higher thermal conductivity than the inhibition film.

[0007] Effects of the Invention

[0008] According to the present invention, the short-circuit withstand capability of a semiconductor device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a plan view showing the structure of the semiconductor device according to the first embodiment of the present invention.

[0010] Figure 2 It is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 1 of the present invention.

[0011] Figure 3 It is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 2 of the present invention.

[0012] Figure 4 It is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 3 of the present invention.

[0013] Figure 5It is a cross-sectional view showing the structure of a semiconductor device according to a fourth embodiment of the present invention.

[0014] Figure 6 It is a cross-sectional view showing the structure of a semiconductor device according to a fifth embodiment of the present invention.

[0015] Figure 7 It is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 6 of the present invention.

[0016] Figure 8 It is a plan view showing the structure of a semiconductor device according to Embodiment 7 of the present invention.

[0017] Fig. 9 It is a cross-sectional view showing the structure of a semiconductor device according to an eighth embodiment of the present invention. DETAILED DESCRIPTION

[0018] Implementation Method 1

[0019] Figure 1 1 is a plan view showing the structure of a semiconductor device according to Embodiment 1 of the present invention. A first region 101 is provided in the center of the semiconductor device 100. The first region 101 is a region where soldering is performed.

[0020] The second region 102 surrounds the first region 101. The second region 102 is a region for suppressing the spread of solder.

[0021] The third region 103 surrounds the second region 102. The third region 103 is a region for improving short-circuit tolerance.

[0022] The fourth region 104 surrounds the third region 103. A gate pad is formed in the fifth region 105 at the corner of the semiconductor device 100. The first region 101, the second region 102, the third region 103, and the fifth region 105 are located inside the conductive region 111. The fourth region 104 covers the periphery of the conductive region 111 and the outside of the conductive region 111.

[0023] Figure 2 It is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 1 of the present invention. Figure 2 Yes Figure 1 FIG. 1 is a diagram showing an enlarged view of a portion of a cross section of a semiconductor device 100 .

[0024] The semiconductor device 100 includes a semiconductor substrate 1 . The semiconductor substrate 1 is formed of, for example, Si. A back surface electrode 3 is connected to the back surface of the semiconductor substrate 1 .

[0025] In addition, a semiconductor element is formed on the surface of the semiconductor substrate 1. The semiconductor element is, for example, an IGBT. Figure 1The conductive region 111 shown is a region where a semiconductor element is formed on the surface of the semiconductor substrate 1 .

[0026] In addition, the semiconductor substrate 1 may be formed of a material having a larger band gap than Si. That is, the semiconductor element may be formed of a wide band gap semiconductor. Examples of the wide band gap semiconductor are silicon carbide, gallium nitride-based materials, or diamond.

[0027] Above the semiconductor element, a surface electrode 2 is formed on the surface of the semiconductor substrate 1. The surface electrode 2 is formed of, for example, AlSi. In addition, the surface electrode 2 is connected to the semiconductor element.

[0028] A metal film 21 is formed on the central portion of the surface electrode 2. The metal film 21 is a structure that can be soldered, for example, a metal film containing Ni or Au. The metal film 21 can be formed, for example, by plating or sputtering. The surface electrode 2 and the external electrode can be directly joined by solder through the metal film 21. In addition, Figure 1 The first region 101 shown is a region where the metal film 21 is formed and solder can be applied.

[0029] In addition, an inhibition film 22 is formed on the surface electrode 2 so as to surround the outer periphery of the metal film 21 when viewed from above. The inhibition film 22 is formed of a material having poorer solder wettability than the metal film 21, for example, a non-metallic material. The inhibition film 22 inhibits the spread of the solder applied on the metal film 21. In addition, Figure 1 The second region 102 shown is a region where the suppression film 22 is formed.

[0030] A heat-conducting film 23 is formed on the surface electrode 2 at the outer peripheral side compared with the metal film 21 and the inhibition film 22. The heat-conducting film 23 is formed of a material having a thicker film thickness than the metal film 21 and a higher thermal conductivity than the inhibition film 22. The heat-conducting film 23 is, for example, a metal film containing Ni or Au. Figure 1 The third region 103 shown is a region where the heat conductive film 23 is formed.

[0031] Here, the heat dissipation path from the third region 103 is considered. In the absence of the thermally conductive film 23, the main heat dissipation path of the heat generated by the conductive region 111 is the first path via the surface electrode 2, the metal film 21, the solder, and the external electrode. However, the semiconductor device 100 of the present invention has a thermally conductive film 23. Therefore, the heat dissipation path of the heat generated by the conductive region 111 is a second path via the surface electrode 2, the thermally conductive film 23, and the module packaging material not shown in the figure in addition to the first path. That is, the heat dissipation path is increased by the thermally conductive film 23, so that the heat generated by the overload can be suppressed and the short-circuit tolerance can be improved. In addition, as a test accompanied by the heat generated by the overload, a test of applying a short pulse such as a short-circuit damage test can be exemplified.

[0032] On the surface of the semiconductor substrate 1, an insulating film 7 is formed in the peripheral area of ​​the conductive region 111. A gate wiring 6 is arranged on the insulating film 7. A nitride film 4 is formed on the gate wiring 6. The nitride film 4 is formed of, for example, silicon nitride. The nitride film 4 is a film having adhesion to the semiconductor and insulating properties for suppressing discharge on the fourth region 104.

[0033] The end of the surface electrode 2 and the nitride film 4 are covered by the protective film 5. That is, the protective film 5 covers the end of the surface electrode 2 on the outer peripheral side compared with the thermal conductive film 23. The protective film 5 is formed of, for example, polyimide. The protective film 5 is a film having insulation for suppressing discharge, strength, heat resistance, and low thermal shrinkage for protecting the semiconductor device from stress and temperature cycle damage after module installation. In addition, as for the protective film 5, by ensuring flatness, stress concentration is suppressed in the area with a film thickness difference, so in most cases the film thickness is thicker than the gate wiring 6.

[0034] also, Figure 1 The fourth region 104 shown is a region where the protective film 5 is formed. The nitride film 4 and the protective film 5 can achieve pressure resistance, moisture resistance improvement, and stress relaxation after module mounting, and are formed to protect the fourth region 104. In addition, the nitride film 4 and the protective film 5 have transparency. Therefore, foreign matter or pattern formation defects on the fourth region 104 can be determined by visual inspection from above.

[0035] In addition, although the case where the gate wiring 6 is provided in the fourth region 104 as the non-conductive region is shown here, an end region or a wiring portion may be provided.

[0036] Implementation Method 2

[0037] Figure 32 is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 2 of the present invention. The semiconductor device 120 according to Embodiment 2 is different from the semiconductor device 100 in that the inhibition film 22 a formed in the second region 102 a is formed of the same material as the protection film 5 .

[0038] Since the suppression film 22a is made of the same material as the protection film 5, it can be formed simultaneously with the protection film 5. That is, the number of steps can be reduced compared with the first embodiment.

[0039] In addition, when the thermal conductivity of the protective film 5 is low, the thermal conductivity of the suppression film 22a is also low, so the short-circuit resistance of the second region 102a may be reduced. However, the second region 102a is located between the first region 101 and the third region 103 with high heat dissipation, so it is considered that the heat dissipation path is dispersed. Thus, the reduction in short-circuit resistance can be suppressed.

[0040] In addition, Figure 3 , the second region 102a and the third region 103 are shown to have the same width, but the reduction in short-circuit tolerance can be further suppressed by making the area of ​​the second region 102a smaller than the area of ​​the third region 103. Theoretically, it is considered that the width of the second region 102a can be set to the minimum size width that can be configured for the protective film 5.

[0041] Implementation 3

[0042] Figure 4 1 is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 3 of the present invention. A semiconductor device 140 according to Embodiment 3 is different from the semiconductor device 100 in that a thermally conductive film formed in the third region 103 a has a double-layer structure.

[0043] The semiconductor device 140 has a thermally conductive film 23a. The thermally conductive film 23a is a film having the same characteristics as the thermally conductive film 23. A covering film 24 is formed on the thermally conductive film 23a. The covering film 24 is formed of a material different from that of the thermally conductive film 23a. The covering film 24 may be, for example, a structure that does not hinder heat dissipation from the thermally conductive film 23a. In addition, the covering film 24 may be, for example, formed of a material that is difficult to make thick, or a material with low thermal conductivity.

[0044] In the manufacturing process of the semiconductor device 100 , the material of the outermost film of the third region 103 may be limited. If the limited material is a material that is difficult to increase the film thickness or a material with low thermal conductivity, it is difficult to form the thermally conductive film 23 .

[0045] However, in semiconductor device 140, the thermally conductive film formed in third region 103a has a double-layer structure of thermally conductive film 23a and cover film 24. Therefore, cover film 24 satisfies material restrictions in the manufacturing process, while thermally conductive film 23a can solve the problem of the present invention.

[0046] In addition, the cover film 24 may be formed to fill the difference in film thickness between the protective film 5 and the thermal conductive film 23a. This ensures the flatness of the entire film, thereby suppressing stress concentration on the region having the film thickness difference.

[0047] Alternatively, the thermally conductive film 23a may be formed of the same material as the surface electrode 2, and the cover film 24 may be formed of the same material as the metal film 21, so that the thermally conductive film formed in the third region 103a is double-layered. In this case, the types of materials required to manufacture the semiconductor device 140 can be reduced, thereby reducing the number of steps.

[0048] Implementation 4

[0049] Figure 5 1 is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 4 of the present invention. The semiconductor device 160 according to Embodiment 4 is different from the semiconductor device 100 in that the film thickness of the thermally conductive film 23 b formed in the third region 103 b is thicker than the suppression film 22 .

[0050] The semiconductor device 160 includes a thermally conductive film 23b. The thermally conductive film 23b is formed of a material having a film thickness thicker than the metal film 21 and the inhibition film 22 and having a higher thermal conductivity than the inhibition film 22. Since the thermally conductive film 23b is thicker than the thermally conductive film 23, the heat capacity is increased. Thus, the effect of improving the short-circuit tolerance can be further enhanced.

[0051] Implementation method 5

[0052] Figure 6 1 is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 5 of the present invention. A semiconductor device 180 according to Embodiment 5 is different from the semiconductor device 100 in that a thermally conductive film 23 c formed in a third region 103 c is made of the same material as other films.

[0053] The semiconductor device 180 includes a heat-conducting film 23 c. The heat-conducting film 23 c is made of the same material as the surface electrode 2, for example, AlSi. This can reduce the types of materials required to manufacture the semiconductor device 180.

[0054] Although the thermally conductive film 23c is formed of the same material as the surface electrode 2, it may be formed of the same material as the metal film 21 or the nitride film 4. In this case, the types of materials required to manufacture the semiconductor device 180 can be reduced, thereby reducing the number of steps.

[0055] Implementation 6

[0056] Figure 7 2 is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 6 of the present invention. A semiconductor device 200 according to Embodiment 6 is different from the semiconductor device 100 in that an inhibition film 22a is formed on the outer peripheral region of a metal film 21a.

[0057] In the semiconductor device 200, a metal film 21a is formed on the surface electrode 2. The metal film 21a is a structure that can be soldered, for example, a metal film containing Ni or Au. The metal film 21a can be formed by a plating method, or by a sputtering method. Through the metal film 21a, the surface electrode 2 and the external electrode can be directly joined by solder.

[0058] An inhibition film 22a is formed on the outer peripheral region of the metal film 21a. The inhibition film 22a is formed of a material with poor solder wettability, for example, a non-metallic material. The inhibition film 22a can inhibit the spread of the solder applied on the metal film 21a.

[0059] As described above, the suppression film 22a is formed on the outer peripheral region of the metal film 21a. That is, the metal film 21a with high thermal conductivity is also arranged in the second region 102b. This can further enhance the effect of improving the short-circuit resistance.

[0060] Implementation 7

[0061] Figure 8 2 is a plan view showing the structure of a semiconductor device according to Embodiment 7 of the present invention. The semiconductor device 220 according to Embodiment 7 is different from the semiconductor device 100 in that the third region 103 d is arranged only in a part of the inner peripheral region of the fourth region 104 .

[0062] The semiconductor device 220 has a third region 103d. The third region 103d is a region in which the short circuit tolerance is improved by forming a thermally conductive film 23 on the surface. In addition, the third region 103d is arranged in the central portion of each side of the quadrilateral forming the inner circumference of the fourth region 104, and the fourth region 104 is formed in a quadrilateral frame shape when viewed from above. That is, the thermally conductive film 23 is arranged near the central portion of each side of the quadrilateral forming the inner circumference of the protective film 5, and the protective film 5 is formed in a quadrilateral frame shape when viewed from above.

[0063] In this way, the third region 103d is selectively arranged at a location that is prone to heat generation. The location that is prone to heat generation is, for example, near the center of the conductive region 111. This allows the effect of the third region 103d to be more efficiently obtained, thereby increasing the degree of freedom in layout.

[0064] In addition, considering the resistance component of the gate wiring 6, the portion far from the fifth region 105 as the gate pad has low responsiveness to the on / off of the gate voltage. That is, the timing of the gate voltage turning off becomes late, and there is a possibility that it becomes a portion that is prone to heat. Therefore, the third region 103d can also be arranged at a portion far from the fifth region 105.

[0065] Implementation 8

[0066] Fig. 9 2 is a cross-sectional view showing the structure of a semiconductor device according to Embodiment 8 of the present invention. A semiconductor device 240 according to Embodiment 8 is different from the semiconductor device 100 in that a semiconductor element is an RC-IGBT.

[0067] The semiconductor device 240 has a p-type semiconductor region 31 on the back side of the semiconductor substrate 1. The p-type semiconductor region 31 functions as a collector of the IGBT in a region where the IGBT is formed on the surface of the semiconductor substrate 1. The region where the IGBT is formed is referred to as a conducting region 111a.

[0068] The semiconductor device 240 has an n-type semiconductor region 32 on the back side of the semiconductor substrate 1. The n-type semiconductor region 32 functions as an anode of the diode in a region where a diode is formed on the surface of the semiconductor substrate 1. The region where the diode is formed is referred to as a conducting region 111b.

[0069] As described above, the conductive region 111a functions as an IGBT, and the conductive region 111b functions as a diode. That is, the conductive regions 111a and 111b operate as RC-IGBTs. This can reduce the chip mounting area and improve the reliability of the semiconductor device.

[0070] The aspects of the present invention are summarized below as supplementary notes.

[0071] (Note 1)

[0072] A semiconductor device comprising:

[0073] A semiconductor substrate having a semiconductor element formed on its surface;

[0074] a surface electrode formed on the surface and connected to the semiconductor element;

[0075] a metal film formed on the surface electrode;

[0076] an inhibitory film formed on the surface electrode to inhibit the spread of solder applied on the metal film; and

[0077] A heat-conductive film is formed on the surface electrode on the outer peripheral side than the metal film and the inhibition film, and has a film thickness thicker than the metal film and a higher thermal conductivity than the inhibition film.

[0078] (Note 2)

[0079] The semiconductor device according to Supplementary Note 1, wherein:

[0080] A protective film covering the end of the surface electrode is further provided on the outer peripheral side than the thermal conductive film.

[0081] The suppression film is formed of the same material as the protection film.

[0082] (Note 3)

[0083] The semiconductor device according to Supplement 1 or 2, wherein:

[0084] A cover film is formed on the thermally conductive film and is made of a material different from that of the thermally conductive film.

[0085] (Note 4)

[0086] A semiconductor device according to any one of Supplementary Notes 1 to 3, wherein:

[0087] The thermally conductive film has a thickness thicker than that of the suppressing film.

[0088] (Note 5)

[0089] A semiconductor device according to any one of Supplementary Notes 1 to 4, wherein:

[0090] The thermally conductive film is formed of the same material as that of the surface electrode.

[0091] (Note 6)

[0092] A semiconductor device according to any one of Supplementary Notes 1 to 5, wherein:

[0093] The suppression film is formed on the surface electrode so as to surround the outer periphery of the metal film in a plan view.

[0094] (Note 7)

[0095] A semiconductor device according to any one of Supplementary Notes 1 to 5, wherein:

[0096] The suppression film is formed on an outer peripheral region of the metal film.

[0097] (Note 8)

[0098] The semiconductor device according to Supplementary Note 2, wherein:

[0099] The protective film is formed into a quadrilateral frame shape when viewed from above.

[0100] The thermally conductive film is disposed at a center portion of each side of a quadrilateral forming an inner periphery of the protective film.

[0101] (Note 9)

[0102] A semiconductor device according to any one of Supplementary Notes 1 to 8, wherein:

[0103] The semiconductor element is an RC-IGBT.

[0104] (Note 10)

[0105] A semiconductor device according to any one of Supplementary Notes 1 to 9, wherein:

[0106] The semiconductor element is formed of a wide bandgap semiconductor.

[0107] (Note 11)

[0108] The semiconductor device according to Supplementary Note 10, wherein:

[0109] The wide bandgap semiconductor is silicon carbide, gallium nitride-based material or diamond.

[0110] Description of the label

[0111] 1 Semiconductor substrate

[0112] 2 Surface electrodes

[0113] 5. Protective film

[0114] 21 metal film

[0115] 21a Metal film

[0116] 22 Inhibitory membrane

[0117] 22a Inhibitory membrane

[0118] 23 Thermally conductive film

[0119] 23a Thermally conductive film

[0120] 23b Thermally Conductive Film

[0121] 23c Thermally Conductive Film

[0122] 24 Covering film

[0123] 100 Semiconductor devices

[0124] 120 Semiconductor devices

[0125] 140 Semiconductor devices

[0126] 160 Semiconductor devices

[0127] 180 Semiconductor devices

[0128] 200 Semiconductor devices

[0129] 220 Semiconductor devices

[0130] 240 Semiconductor devices

Claims

1. A semiconductor device comprising: A semiconductor substrate having a semiconductor element formed on its surface; a surface electrode formed on the surface and connected to the semiconductor element; a metal film formed on the surface electrode; an inhibition film formed on the surface electrode to inhibit the spread of solder applied on the metal film; as well as A heat-conductive film is formed on the surface electrode on the outer peripheral side than the metal film and the inhibition film, and has a film thickness thicker than the metal film and a higher thermal conductivity than the inhibition film.

2. The semiconductor device according to claim 1, wherein A protective film covering the end of the surface electrode is further provided on the outer peripheral side than the thermal conductive film. The suppression film is formed of the same material as the protection film.

3. The semiconductor device according to claim 1, wherein A cover film is formed on the thermally conductive film and is made of a material different from that of the thermally conductive film.

4. The semiconductor device according to claim 1, wherein The thermally conductive film has a thickness thicker than that of the suppressing film.

5. The semiconductor device according to claim 1, wherein The thermally conductive film is formed of the same material as that of the surface electrode.

6. The semiconductor device according to claim 1, wherein The suppression film is formed on the surface electrode so as to surround the outer periphery of the metal film in a plan view.

7. The semiconductor device according to claim 1, wherein The suppression film is formed on an outer peripheral region of the metal film.

8. The semiconductor device according to claim 2, wherein: The protective film is formed into a quadrilateral frame shape when viewed from above. The thermally conductive film is disposed at a center portion of each side of a quadrilateral forming an inner periphery of the protective film.

9. The semiconductor device according to claim 1, wherein: The semiconductor element is an RC-IGBT.

10. The semiconductor device according to claim 1, wherein The semiconductor element is formed of a wide bandgap semiconductor.

11. The semiconductor device according to claim 10, wherein The wide bandgap semiconductor is silicon carbide, gallium nitride-based material or diamond.

Images